ADC (Analog to Digital Converter) function safety self-test system, method and equipment and storage medium
By designing an ADC functional security self-test system including self-test control module, event trigger routing module, ADC digital control module, etc., the problem of redundant design in the prior art increases system complexity and waste of hardware resources is solved, and efficient functional security detection and hardware resource optimization are achieved.
Patent Information
- Application Number
- CN202510037193.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-09
- Publication Date
- 2025-04-25
AI Technical Summary
In the prior art, in order to ensure the functional safety of ADCs, redundant designs are usually adopted, which increases system complexity and waste of hardware resources, resulting in increased chip area and increased manufacturing costs.
Design an ADC functional safety self-test system, including a self-test control module, event trigger routing module, ADC digital control module, ADC, multiplexer, DAC and IOPAD. The test task is started through the self-test control module, and the routing module uses the event to trigger the coordinated sampling event. The multiplexer selects the signal source, the DAC generates the test signal, and the IOPAD provides the adjusted analog signal to realize self-testing of the ADC.
The system does not need to add multiple ADCs, and the multi-channel ADC is tested through only one DAC multiplexing, which significantly saves chip area and hardware costs, improves functional safety detection coverage, and optimizes hardware resources to ensure efficient coordination between tests and functions.
Smart Images
Figure CN119882683A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of ADC functional safety testing, and in particular to an ADC functional safety self-testing system, method, device and storage medium. Background Art
[0002] With the widespread application of electronic systems and smart devices in the fields of automobiles, medical treatment, industrial control, etc., the importance of functional safety technology has become increasingly prominent. Functional safety technology aims to ensure that the system can operate safely in the event of a failure or abnormality through redundant design and fault tolerance mechanisms of hardware and software. This technology plays a key role in ensuring equipment reliability and user safety.
[0003] At present, analog-to-digital converters (ADCs) are widely used in various electronic systems in the above-mentioned fields as key signal processing devices. The core function of ADC is to convert analog signals into digital signals for subsequent processing and analysis. However, in order to ensure that ADC can reliably output accurate signals during operation, the existing technology generally adopts redundant design.
[0004] The characteristic of this redundant design is that a redundant structure is formed by adding multiple ADCs to the system. Some ADCs are used to realize the normal functions of the system, and the other ADCs are used specifically for safety monitoring. When working, these ADCs will sample the same signal at the same time and compare the sampling results. If the result is within the specified range, the system is considered normal; otherwise, the system is considered to be abnormal. This method can effectively improve the safety and reliability of the system.
[0005] However, the simultaneous operation of multiple ADCs increases the complexity of the system. Secondly, there is a large waste of hardware resources. The additional ADCs occupy chip area, resulting in an increase in manufacturing costs. In addition, the redundant design requires a high chip area, which limits the integration of the system and is not conducive to the development of miniaturization and low cost. Summary of the invention
[0006] Based on this, it is necessary to provide an ADC functional safety self-test system, method, device and storage medium to address the above technical problems.
[0007] An ADC functional safety self-test system, the system comprising:
[0008] Self-check control module, event-triggered routing module, ADC digital control module, ADC, multiplexer, DAC and IOPAD;
[0009] The self-test control module is respectively connected to the ADC digital control module, the event trigger routing module, the DAC and the IOPAD, and is used to start the test task according to the preset configuration, obtain sampling data from the ADC digital control module during the test, analyze the sampling data to obtain the analysis result, and output the self-test result according to the analysis result; the test task includes ADC test or channel test;
[0010] The ADC digital control module is connected to the ADC and is used to control the sampling process of the ADC and receive the sampling data of the ADC;
[0011] The event trigger routing module is used to transmit sampling trigger events and sampling completion events between the self-check control module and the ADC control module;
[0012] The multiplexer is connected to the ADC digital control module, ADC, DAC and IOPAD respectively, and is used to select the corresponding signal source for ADC sampling according to the channel selection signal output by the ADC digital control module;
[0013] The DAC generates a known analog voltage signal according to the DAC control signal output by the self-test control module and outputs the signal to the multiplexer for ADC testing;
[0014] The IOPAD is connected to a pull-up resistor or a pull-down resistor according to a pull-up control signal or a pull-down control signal provided by the self-test control module, and outputs the adjusted analog signal to the multiplexer for channel testing.
[0015] An ADC functional safety self-test method, the method comprising:
[0016] The test task is started by the self-test control module according to the preset configuration, sampling data is obtained from the ADC digital control module during the test, the sampling data is analyzed to obtain the analysis result, and the self-test result is output according to the analysis result; the test task includes ADC test or channel test;
[0017] Controlling the sampling process of the ADC through the ADC digital control module and receiving the sampling data of the ADC;
[0018] Transmitting sampling trigger events and sampling completion events between the self-check control module and the ADC control module through the event-triggered routing module;
[0019] Selecting a corresponding signal source for ADC sampling according to a channel selection signal output by the ADC digital control module through the multiplexer;
[0020] Generate a known analog voltage signal through the DAC according to the DAC control signal output by the self-test control module and output it to the multiplexer for ADC testing;
[0021] The IOPAD is connected to a pull-up resistor or a pull-down resistor according to a pull-up control signal or a pull-down control signal provided by the self-test control module, and the adjusted analog signal is output to the multiplexer for channel testing.
[0022] A computer device comprises a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:
[0023] The test task is started by the self-test control module according to the preset configuration, sampling data is obtained from the ADC digital control module during the test, the sampling data is analyzed to obtain the analysis result, and the self-test result is output according to the analysis result; the test task includes ADC test or channel test;
[0024] Controlling the sampling process of the ADC through the ADC digital control module and receiving the sampling data of the ADC;
[0025] Transmitting sampling trigger events and sampling completion events between the self-check control module and the ADC control module through the event-triggered routing module;
[0026] Selecting a corresponding signal source for ADC sampling according to a channel selection signal output by the ADC digital control module through the multiplexer;
[0027] Generate a known analog voltage signal through the DAC according to the DAC control signal output by the self-test control module and output it to the multiplexer for ADC testing;
[0028] The IOPAD is connected to a pull-up resistor or a pull-down resistor according to a pull-up control signal or a pull-down control signal provided by the self-test control module, and the adjusted analog signal is output to the multiplexer for channel testing.
[0029] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the following steps:
[0030] The test task is started by the self-test control module according to the preset configuration, sampling data is obtained from the ADC digital control module during the test, the sampling data is analyzed to obtain the analysis result, and the self-test result is output according to the analysis result; the test task includes ADC test or channel test;
[0031] Controlling the sampling process of the ADC through the ADC digital control module and receiving the sampling data of the ADC;
[0032] Transmitting sampling trigger events and sampling completion events between the self-check control module and the ADC control module through the event-triggered routing module;
[0033] Selecting a corresponding signal source for ADC sampling according to a channel selection signal output by the ADC digital control module through the multiplexer;
[0034] Generate a known analog voltage signal through the DAC according to the DAC control signal output by the self-test control module and output it to the multiplexer for ADC testing;
[0035] The IOPAD is connected to a pull-up resistor or a pull-down resistor according to a pull-up control signal or a pull-down control signal provided by the self-test control module, and the adjusted analog signal is output to the multiplexer for channel testing.
[0036] The above-mentioned ADC functional safety self-test system, method, device and storage medium start ADC test or channel test according to the configuration through the self-test control module, flexibly select test tasks, coordinate sampling trigger events and sampling completion events through the event trigger routing module, realize the controllability of test time and the parallel operation of test and normal function, the multiplexer flexibly selects the signal source according to the channel selection signal of the ADC digital control module, the DAC generates a known analog voltage signal for ADC test, and the IOPAD provides a known level signal for channel test through a pull-up or pull-down resistor, which fully covers the failure mode of the ADC module and channel, and has a high detection coverage. Compared with the traditional redundant design, this system does not need to add multiple ADCs, and only one DAC is used to multiplex the test of the multi-channel ADC, which significantly saves chip area and hardware costs. While improving the coverage of functional safety detection, the overall system optimizes hardware resources and ensures efficient coordination between test and function, with technical effects of better area, flexible testing and reliable accuracy. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Figure 1 An application scenario diagram of an ADC functional safety self-test method in an embodiment;
[0038] Figure 2 A schematic diagram of a flow chart of a channel test in a specific embodiment;
[0039] Figure 3 A schematic diagram of a flow chart of ADC testing in a specific embodiment;
[0040] Figure 4 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION
[0041] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0042] In one embodiment, Figure 1 As shown, an ADC functional safety self-test system is provided, comprising:
[0043] Self-check control module, event-triggered routing module, ADC digital control module, ADC, multiplexer, DAC and IOPAD;
[0044] The self-test control module is respectively connected to the ADC digital control module, the event trigger routing module, the DAC and the IOPAD, and is used to start the test task according to the preset configuration, obtain sampling data from the ADC digital control module during the test, analyze the sampling data to obtain the analysis result, and output the self-test result according to the analysis result; the test task includes ADC test or channel test;
[0045] The ADC digital control module is connected to the ADC and is used to control the sampling process of the ADC and receive the sampling data of the ADC;
[0046] The event trigger routing module is used to transmit the sampling trigger event and the sampling completion event between the self-check control module and the ADC control module;
[0047] The multiplexer is connected to the ADC digital control module, the ADC, the DAC and the IOPAD respectively, and is used to select a corresponding signal source for ADC sampling according to a channel selection signal output by the ADC digital control module;
[0048] The DAC generates a known analog voltage signal according to the DAC control signal output by the self-test control module and outputs the signal to the multiplexer for ADC testing;
[0049] According to the pull-up control signal or pull-down control signal provided by the self-test control module, the IOPAD connects the pull-up resistor or the pull-down resistor, and outputs the adjusted analog signal to the multiplexer for channel testing.
[0050] exist Figure 1In the example, adc_test is a self-test control module, which starts self-test and analyzes adc sampling data according to the configuration. trigmux is an event trigger routing module, which is used to pass the adc_ctrl sampling completion event to adc_test and pass the adc_test channel sampling trigger signal to adc_ctrl. adc_ctrl is an ADC digital control module. ADC is an analog-to-digital converter analog module. MUX is an ADC channel selection module. DAC is an analog-to-digital converter module. IOPAD is an ADC pin that receives analog signals.
[0051] In the above-mentioned ADC functional safety self-test system, the self-test control module starts the ADC test or channel test according to the configuration, flexibly selects the test task, and coordinates the sampling trigger event and the sampling completion event through the event trigger routing module to achieve the controllability of the test time and the parallel operation of the test and normal functions. The multiplexer flexibly selects the signal source according to the channel selection signal of the ADC digital control module, and the DAC generates a known analog voltage signal for ADC testing. The IOPAD provides a known level signal for channel testing through a pull-up or pull-down resistor, which fully covers the failure modes of the ADC module and channel, and has a high detection coverage. Compared with the traditional redundant design, this system does not need to add multiple ADCs, and only one DAC is used to multiplex the test of the multi-channel ADC, which significantly saves chip area and hardware costs. While improving the coverage of functional safety detection, the overall system optimizes hardware resources and ensures efficient coordination between testing and functions, with technical effects of better area, flexible testing, and reliable accuracy.
[0052] In one embodiment, the system further includes a processor; the processor is connected to the self-test control module and is used to read configuration data from the non-volatile memory and initialize the self-test control module using the configuration data. In this embodiment, the chip internal processor (CPU) is used to implement software configuration adc_test. If the system does not have a CPU, it can also be configured through hardware initialization.
[0053] In one embodiment, a test task is started according to a preset configuration, including: generating a corresponding pull-up control signal or a pull-down control signal according to the pull-up and pull-down resistance validity flags of the channel to be tested in the channel test configuration, and sending the pull-up control signal or the pull-down control signal to the IOPAD connected to the channel to be tested; the pull-up control signal is used to pull the IOPAD voltage to a known power supply voltage; the pull-down control signal is used to pull the IOPAD voltage to a known ground voltage; and generating a channel sampling trigger signal according to the channel to be tested in the channel test configuration and sending it to the event trigger routing module.
[0054] In one embodiment, during the test, sampling data is obtained from the ADC digital control module, the sampling data is analyzed to obtain analysis results, and the self-test results are output according to the analysis results, including: receiving a sampling completion event sent by an event-triggered routing module, and obtaining sampling data from the ADC digital control module; analyzing whether the sampling data meets a preset threshold range, if so, the current test channel self-test passes, if not, the current test channel self-test fails, and a self-test error result is output; if all channels to be tested pass the self-test, a self-test correct result is output.
[0055] In one embodiment, a test task is started according to a preset configuration, including: generating a DAC control signal according to an ADC test configuration; the DAC control signal is used to control the DAC to generate a known analog voltage signal; and generating a channel sampling trigger signal according to a fixed test channel in the ADC test configuration and sending it to an event trigger routing module.
[0056] In one embodiment, during the test, sampling data is obtained from the ADC digital control module, the sampling data is analyzed to obtain analysis results, and the self-test results are output according to the analysis results, including: receiving a sampling completion event sent by an event-triggered routing module, and obtaining sampling data from the ADC digital control module; analyzing whether the sampling data meets a preset threshold range, if so, the self-test passes under the current DAC analog voltage signal, if not, the self-test fails under the current DAC analog voltage signal, and a self-test error result is output; if the self-test passes under all analog voltage signals of the DAC, a self-test correct result is output.
[0057] In one embodiment, the ADC digital control module sends a sampling completion event to the event trigger routing module when the ADC sampling is completed.
[0058] In a specific embodiment, Figure 2 As shown, a schematic diagram of a channel test process is provided, and the steps are described as follows:
[0059] S10, the CPU or hardware initializes the configuration of adc_test according to the NVM, and selects the test including the channel test.
[0060] S11, adc_test selects a channel according to the channel information and configures whether the pull-up and pull-down resistors are effective. When the pull-up resistor is effective, the input voltage is the known power supply voltage, and when the pull-down resistor is effective, the input is 0V.
[0061] S12, adc_test generates a trigger event for the corresponding channel sampling, which is routed to adc_ctrl through trigmux to control the corresponding channel sampling.
[0062] S13, after adc_ctrl sampling is completed, a sampling completion event is generated, which is routed to adc_test through trigmux. adc_test obtains the sampling data from adc_ctrl and compares it with the expected sampling code. If it does not meet the expectations, a self-check error occurs.
[0063] S14, traverse the pull-up and pull-down of each channel in turn.
[0064] S15. After all channels have been traversed and all meet expectations, the channel self-inspection passes.
[0065] In a specific embodiment, Figure 3 As shown, a schematic diagram of the ADC test process is provided, and the steps are described as follows:
[0066] S20, the CPU or hardware initializes the configuration of adc_test according to the NVM, and selects the test including the ADC test.
[0067] S21, adc_test selects a fixed channel to perform ADC test.
[0068] S22, adc_test controls the DAC to output a known fixed voltage.
[0069] S23, adc_test generates a trigger event for channel sampling, which is routed to adc_ctrl through trigmux to control the corresponding channel sampling.
[0070] S24, after adc_ctrl sampling is completed, a sampling completion event is generated, which is routed to adc_test through trigmux. adc_test obtains the sampling data from adc_ctrl and compares it with the expected sampling code. If it does not meet the expectations, a self-check error occurs.
[0071] S25, traverse the DAC according to the configuration and output different voltage tests.
[0072] S26. After all DAC voltages are traversed and meet expectations, the channel self-test passes.
[0073] The system of the present invention adopts a combination of channel testing (verifying the function of the input channel) and ADC testing (verifying the overall performance), which can cover most failure modes. A DAC module is used to replace the redundant ADC as the test signal source, and no additional ADC is needed. When the number of ADCs increases, the DAC can still be reused, thereby significantly reducing the chip area and cost. The event-triggered routing module coordinates the work between the self-test task and the normal function, ensuring that the test process does not interfere with the normal function of the system, so that the system can complete the test without affecting the normal function, thereby improving the flexibility and efficiency of the system.
[0074] It should be understood that although Figure 2 and Figure 3 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 2 and Figure 3 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.
[0075] In one embodiment, a method for self-testing ADC functional safety is provided, comprising the following steps:
[0076] The test task is started by the self-test control module according to the preset configuration, sampling data is obtained from the ADC digital control module during the test, the sampling data is analyzed to obtain the analysis result, and the self-test result is output according to the analysis result; the test task includes ADC test or channel test;
[0077] The ADC sampling process is controlled by the ADC digital control module, and the ADC sampling data is received;
[0078] The sampling trigger event and the sampling completion event are transmitted between the self-checking control module and the ADC control module through the event trigger routing module;
[0079] A multiplexer is used to select a corresponding signal source for ADC sampling according to a channel selection signal output by an ADC digital control module;
[0080] Generate a known analog voltage signal through the DAC according to the DAC control signal output by the self-test control module and output it to the multiplexer for ADC testing;
[0081] According to the pull-up control signal or pull-down control signal provided by the self-test control module, the pull-up resistor or the pull-down resistor is connected through the IOPAD, and the adjusted analog signal is output to the multiplexer for channel testing.
[0082] For the specific definition of the ADC functional safety self-test method, please refer to the definition of the ADC functional safety self-test system above, which will not be repeated here. Each module in the above-mentioned ADC functional safety self-test system can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.
[0083] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 4 As shown. The computer device includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, an ADC functional safety self-test method is implemented. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device housing, or an external keyboard, touchpad or mouse, etc.
[0084] Those skilled in the art will understand that Figure 4 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.
[0085] In one embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method in the above embodiment when executing the computer program.
[0086] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method in the above embodiment are implemented.
[0087] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing related hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods.
[0088] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0089] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.
Claims
1. An ADC functional safety self-test system, characterized in that: The system includes a self-check control module, an event-triggered routing module, an ADC digital control module, an ADC, a multiplexer, a DAC and an IOPAD; The self-test control module is respectively connected to the ADC digital control module, the event trigger routing module, the DAC and the IOPAD, and is used to start the test task according to the preset configuration, obtain sampling data from the ADC digital control module during the test, analyze the sampling data to obtain the analysis result, and output the self-test result according to the analysis result; the test task includes ADC test or channel test; The ADC digital control module is connected to the ADC and is used to control the sampling process of the ADC and receive the sampling data of the ADC; The event trigger routing module is used to transmit sampling trigger events and sampling completion events between the self-check control module and the ADC control module; The multiplexer is connected to the ADC digital control module, ADC, DAC and IOPAD respectively, and is used to select the corresponding signal source for ADC sampling according to the channel selection signal output by the ADC digital control module; The DAC generates a known analog voltage signal according to the DAC control signal output by the self-test control module and outputs the signal to the multiplexer for ADC testing; The IOPAD is connected to a pull-up resistor or a pull-down resistor according to a pull-up control signal or a pull-down control signal provided by the self-test control module, and outputs the adjusted analog signal to the multiplexer for channel testing.
2. The system according to claim 1, characterized in that The system also includes a processor; The processor is connected to the self-check control module and is used to read configuration data from the non-volatile memory and initialize the self-check control module using the configuration data.
3. The system according to claim 1, characterized in that Start the test task according to the pre-set configuration, including: Generate a corresponding pull-up control signal or a pull-down control signal according to the pull-up and pull-down resistance validity flags of the channel to be tested in the channel test configuration, and send the pull-up control signal or the pull-down control signal to the IOPAD connected to the channel to be tested; the pull-up control signal is used to pull the IOPAD voltage to a known power supply voltage; the pull-down control signal is used to pull the IOPAD voltage to a known ground voltage; According to the channel to be tested in the channel test configuration, a channel sampling trigger signal is generated and sent to the event trigger routing module.
4. The system according to claim 3, characterized in that During the test, sampling data is obtained from the ADC digital control module, the sampling data is analyzed to obtain analysis results, and a self-test result is output according to the analysis results, including: Receiving a sampling completion event sent by an event-triggered routing module, and acquiring sampling data from the ADC digital control module; Analyze whether the sampled data meets the preset threshold range. If so, the current test channel self-test passes. If not, the current test channel self-test fails and outputs a self-test error result. If all channels to be tested pass the self-test, the correct self-test results will be output.
5. The system according to claim 1, characterized in that Start the test task according to the pre-set configuration, including: Generate a DAC control signal according to the ADC test configuration; the DAC control signal is used to control the DAC to generate a known analog voltage signal; According to the fixed test channel in the ADC test configuration, a channel sampling trigger signal is generated and sent to the event trigger routing module.
6. The system according to claim 5, characterized in that During the test, sampling data is obtained from the ADC digital control module, the sampling data is analyzed to obtain analysis results, and a self-test result is output according to the analysis results, including: Receiving a sampling completion event sent by an event-triggered routing module, and acquiring sampling data from the ADC digital control module; Analyze whether the sampled data meets the preset threshold range. If so, the self-test passes under the current DAC analog voltage signal. If not, the self-test fails under the current DAC analog voltage signal and outputs a self-test error result. If the self-test passes under all analog voltage signals of the DAC, the correct self-test result is output.
7. The system according to claim 1, characterized in that When ADC sampling is completed, the ADC digital control module sends a sampling completion event to the event trigger routing module.
8. An ADC functional safety self-test method implemented in the system according to any one of claims 1 to 7, characterized in that: The method comprises: The test task is started by the self-test control module according to the preset configuration, sampling data is obtained from the ADC digital control module during the test, the sampling data is analyzed to obtain the analysis result, and the self-test result is output according to the analysis result; the test task includes ADC test or channel test; Controlling the sampling process of the ADC through the ADC digital control module and receiving the sampling data of the ADC; Transmitting sampling trigger events and sampling completion events between the self-check control module and the ADC control module through the event-triggered routing module; Selecting a corresponding signal source for ADC sampling according to a channel selection signal output by the ADC digital control module through the multiplexer; Generate a known analog voltage signal through the DAC according to the DAC control signal output by the self-test control module and output it to the multiplexer for ADC testing; The IOPAD is connected to a pull-up resistor or a pull-down resistor according to a pull-up control signal or a pull-down control signal provided by the self-test control module, and the adjusted analog signal is output to the multiplexer for channel testing.
9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.