Low-power-consumption starting circuit with wide power supply voltage range and electronic equipment

Abstract

The invention provides a low-power-consumption starting circuit with a wide power supply voltage range and electronic equipment, and the circuit comprises a starting circuit which is used for starting the circuit in response to the power-on of a power supply and generating starting voltage / current; the reference circuit is used for generating a fixed voltage reference signal under the action of the starting circuit; the turn-off signal generating circuit is used for generating a turn-off signal to cut off the current of the starting circuit after the starting is completed; and the turn-off enhancement signal generation circuit is used for generating a turn-off enhancement signal when receiving the system power-on indication signal and the mirror image signal so as to ensure that the starting circuit is completely turned off. On the basis of meeting the starting requirement, a turn-off enhanced signal generation circuit is additionally added, so that the requirement of turning off a starting signal after starting is completed is met; and meanwhile, the current of the circuit is set to be zero by utilizing a POREXT signal of the system, so that the requirement of low power consumption is met.

Description

Technical Field

[0001] The present invention relates to the technical field of low-power startup circuits, and in particular to a low-power startup circuit and electronic equipment with a wide power supply voltage range. Background Art

[0002] Many single analog chips have increasingly higher power consumption requirements, and at the same time, the power supply voltage range is getting larger and larger to meet the needs of different system applications, for example: supporting a power supply voltage range of 1.6V to 5.5V and power consumption <500nA.

[0003] The compromise point of the bandgap reference startup circuit design is to make a compromise between the ease of startup and whether it is easy to shut down. The lower the power consumption requirement, the more difficult the compromise design is. The larger the power supply voltage range, the limited power supply range of the startup circuit, and the greater the difficulty of the compromise design.

[0004] Figure 1 A typical existing bandgap reference startup circuit is used to illustrate the limitations of existing solutions under low power consumption and wide power supply voltage range. In the figure, M1, M2, Ma1~Man constitute the startup circuit of the current-type bandgap reference (Vstart is named as the startup voltage); M4~M7, Q1~Q2, R1~R2 constitute the reference circuit; M2, M8, M9 constitute the shutdown signal (vb1) generation circuit. Its simple block diagram is as follows Figure 2 As shown. During the power-on process of the power supply AVDD, M1~M2 has no current at the beginning, but is basically weakly turned on. The diode connection formed by Ma1~Man hopes to bring Vstart to a relatively high position. In this way, after being pulled down by M3, Vb2 and Vb3 will be pulled down, so that the BandGap main loop will form current and complete the startup. When the current is formed, M8 and M9 mirror the current, causing Vb2 to stretch, Vstart to be pulled down, and M3 to be turned off, completing the startup and shutdown operations. Therefore, the Vstart voltage becomes the key to the control of the startup circuit, and the control of the Vstart point is related to the number of Ma1~Man. When the power supply voltage range is particularly wide. There are the following limitations:

[0005] a) The number of N is small, which is fine at low power supply voltage. However, at high power supply voltage, Vstart cannot be pulled down during the pull-down operation, causing M3 to be continuously turned off and the output will be biased.

[0006] b) There are many Ns, which is fine at high power supply voltage. However, at low power supply voltage, Vstart cannot be pulled up during the pull-up operation, so M3 cannot be turned on and startup fails.

[0007] Traditional reference startup circuits cannot simultaneously meet the goals of startup and complete shutdown when faced with the requirements of a wide power supply voltage range.

[0008] Terminology explanation:

[0009] (1) BandGap: Bandgap reference;

[0010] (2) Startup Circuit: Startup Circuit;

[0011] (3) MOS: transistor;

[0012] (4) BIAS: bias circuit;

[0013] (5)POREXT: Power On Reset Extension Signal. Summary of the invention

[0014] In view of the defects in the prior art, an object of the present invention is to provide a low-power startup circuit and an electronic device with a wide power supply voltage range.

[0015] The low power consumption startup circuit with a wide power supply voltage range provided by the present invention comprises:

[0016] A starting circuit, for starting the circuit and generating a starting voltage / current in response to power-on of the power supply;

[0017] A reference circuit, used for generating a fixed voltage reference signal under the action of the start-up circuit;

[0018] A shutdown signal generating circuit, used for generating a shutdown signal to cut off the current of the startup circuit after the startup is completed;

[0019] A shutdown enhancement signal generating circuit, used for generating a shutdown enhancement signal upon receiving a system power-on indication signal and a mirror signal, so as to further enhance the shutdown effect and ensure that the startup circuit is completely shut down;

[0020] The startup circuit is connected to a reference circuit, a shutdown signal generating circuit and a shutdown enhancement signal generating circuit, wherein the shutdown signal generating circuit sends a shutdown signal to the startup circuit, and the shutdown enhancement signal generating circuit is driven by a system power-on indication signal and a mirror signal.

[0021] Preferably, the startup circuit comprises: Ma1 to Man transistors, which are used to increase the startup voltage to a preset high level during the startup process; M13 transistor, which is turned on according to the increase of the startup voltage during the startup process;

[0022] The startup circuit comprises:

[0023] A voltage comparator is used to detect whether the power supply reaches a preset threshold voltage. Once the voltage is reached, the comparator outputs a high level signal;

[0024] By utilizing the charging characteristics of the capacitor when the power supply is turned on, when the capacitor voltage rises to a certain threshold, the subsequent circuit action is triggered;

[0025] Through a low-power oscillator, it starts to oscillate after the power is turned on, thereby generating a start signal;

[0026] A current source circuit, including a biasing diode or transistor, is used to provide the initial current required for startup.

[0027] Preferably, the reference circuit comprises:

[0028] Bandgap reference: Generates a constant voltage at different temperatures through a transistor and resistor network;

[0029] Zener diode: provides a relatively stable reference voltage;

[0030] Operational Amplifiers: Use operational amplifiers with precision resistor networks to build high-precision voltage reference circuits.

[0031] Preferably, the shutdown signal generating circuit comprises:

[0032] Use a timer to automatically generate a shutdown signal after the start circuit is activated for a period of time;

[0033] A finite state machine is used to monitor the system status, and a shutdown signal is issued when it is detected that the system is running stably;

[0034] A feedback loop is used to monitor the power supply current or voltage level and generate a shutdown signal when the parameters of the power supply current or voltage level are stable within a preset range.

[0035] Preferably, the shutdown enhancement signal generating circuit comprises at least one inverter, M10-M12 transistors, a resistor R3 and a control transistor Mctrl, wherein Mctrl acts as a shutdown enhancement switch, and its on or off state is controlled by the output signal of the inverter when the power supply is powered on;

[0036] The shutdown enhancement signal generating circuit maintains a high level state when the system power-on indication signal becomes a high level, so that the control transistor Mctrl maintains a shutdown state, ensuring that the startup circuit is shut down;

[0037] The shutdown enhancement signal generating circuit comprises:

[0038] Use AND gate and OR gate to process the power-on indication signal and the mirror signal, and output the shutdown signal only when both signals meet the conditions;

[0039] Use a latch to lock the shutdown signal to ensure that the shutdown state is maintained even if the subsequent signal changes;

[0040] Use MOSFET or BJT as the switching element to enhance the drive capability of the shutdown signal and ensure that the high current path in the startup circuit is reliably cut off.

[0041] Preferably, in the startup circuit, the Ma1 transistor, the Ma2 transistor, the control transistor Mctrl and the shutdown enhancement switch are connected in sequence to obtain the shutdown enhancement signal VCTRL and the startup voltage Vstart, and then respectively connected to the PMOS field effect transistors M1 and M3 to obtain the shutdown signal vb1;

[0042] When the power supply AVDD is powered on, the voltage on Vstart gradually increases until it reaches a certain threshold, thereby providing a startup current for subsequent circuits.

[0043] Preferably, in the reference circuit, the PMOS field effect transistors M4 and M5 are connected to the power supply AVDD, and then connected to M6 and M7 respectively, wherein M4 and M5 are connected to obtain a shutdown signal vb3; M6 and M7 are connected to obtain a shutdown signal vb2;

[0044] M3 is connected to M6, M6 is connected to resistors R1 and R2, circuit R1 is connected to NPN transistor Q1, and M7 is connected to NPN transistor Q2;

[0045] The shutdown signals vb3 and vb2 are transmitted to the operational amplifier, and the operational amplifier is connected to the resistors R1 and R2 and the NPN transistor Q2.

[0046] Preferably, in the shutdown signal generating circuit, the PMOS field effect transistor M8 is connected to the power supply AVDD and then connected to the PMOS field effect transistor M9; M8 is connected to M5, M9 is connected to M7; and M9 is connected to the MOS field effect transistor M2.

[0047] Preferably, in the shutdown enhancement signal generating circuit, the MOS field effect transistor M10 is connected to the power supply AVDD and then connected to the PMOS field effect transistor M11; M10 is connected to M8, and M11 is connected to M9;

[0048] M11 is connected to the resistor R3 and then to the MOS field effect transistor M12, and then to the inverter.

[0049] The electronic device provided by the present invention adopts the low-power startup circuit with a wide power supply voltage range.

[0050] Compared with the prior art, the present invention has the following beneficial effects:

[0051] The present invention is based on meeting the startup requirements, and an additional shutdown enhancement signal generating circuit is added to meet the requirement of shutting down the startup signal after the startup is completed; at the same time, the system's "POREXT" signal is used to set the circuit current to 0 to meet the low power consumption requirement. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0053] Figure 1 The circuit diagram for the traditional Bandgap startup;

[0054] Figure 2 This is the design block diagram of the traditional startup circuit;

[0055] Figure 3 A block diagram of the enhanced startup circuit design of the present invention;

[0056] Figure 4 This is an example of the enhanced startup circuit design of the present invention;

[0057] Figure 5 The present invention is applied in a bias circuit;

[0058] Figure 6 The invention is applied in a voltage-type bandgap reference circuit. DETAILED DESCRIPTION

[0059] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those of ordinary skill in the art, several changes and improvements can also be made without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0060] Example

[0061] The present invention uses the current mirror of the reference itself to create a shutdown enhancement circuit and a shutdown enhancement switch to further control the two states (startup operation and startup shutdown) during the startup process of the reference circuit. This allows the reference to complete startup and shutdown within a wide power supply voltage range. At the same time, the combination of the system Power on Reset signal and the shutdown enhancement circuit is used to complete the current cutoff after startup to meet the requirements of low power consumption. The specific design ideas are as follows Figure 3 Specific design such as Figure 4 .

[0062] The concept of the present invention can be used in various types of Bandgap circuit structures, such as: voltage mode bandgap reference circuit, current mode bandgap reference circuit, non-bandgap reference circuit, and the like. Figure 5 , Figure 6 It is the application of the design idea of ​​this case in other benchmark circuits.

[0063] Aiming at the limitation of the existing traditional startup circuit under the application of wide power supply voltage range, this case designs a shutdown enhancement signal generation circuit by using the reference image and the system POREXT signal, so as to solve the limitation under the application of wide power supply voltage range.

[0064] like Figure 3 , based on Figure 1 Block diagram of the proposed improved scheme with limitations.

[0065] The startup circuit transmits the startup voltage / current to the reference / bias generating circuit to obtain a Mirror signal, which is transmitted to the shutdown enhancement signal generating circuit and the shutdown signal generating circuit respectively; the shutdown signal generating circuit transmits the shutdown signal (vb1) to the startup circuit; POREXT and Mirror are input together to the shutdown enhancement signal generating circuit, and then transmitted to the startup circuit.

[0066] Figure 4 This is an example of this design idea. In the figure, M10~M12, R3, Mctrl and an inverter are added to form a shutdown enhancement signal (VCTRL) generation circuit. Mctrl is a shutdown enhancement switch. At the same time, Ma1~Man in the original startup, N can be obtained relatively small, and N=2 is used as an example here. The startup process is analyzed below to describe how this solution solves the limitations of the original solution.

[0067] Figure 4 In the invention, a startup circuit, a reference circuit, a shutdown signal generating circuit and a shutdown enhancement signal generating circuit are included;

[0068] 1) The starting circuit is responsible for the function of powering on the circuit;

[0069] 2) The reference circuit generates a fixed voltage reference signal;

[0070] 3) The shutdown signal generating circuit is responsible for shutting down the startup circuit after the circuit is started;

[0071] 4) The shutdown enhancement signal generating circuit has an enhanced shutdown effect to solve the problem of insufficient shutdown of the startup circuit;

[0072] a) When the power is turned on, POREXT is still in a low state, and the inverter turns on M12. VCTRL is approximately equal to 0, Mctrl turns on, and Ma1, Man, and M1 pull Vstart to a relatively high position (because N is relatively small, whether the power supply voltage is low or high, the position of Vstart is relatively high). M13 turns on and the startup begins.

[0073] b) During the startup process, the main loop current gradually increases, and the mirror part also gradually increases. Vb1 increases, and M1 is fully turned on. At the same time, VCTRL increases, and MCTRL is completely turned off. The entire startup process is completed.

[0074] c) Start the branch circuit shutdown phase. When POREXT (system power-on indication signal) is pulled high, the current of the entire branch where R3 is located is completely shut off, Vctrl remains high, and the Mctrl shutdown state remains unchanged.

[0075] In the startup circuit, the Ma1 transistor, the Ma2 transistor, the control transistor Mctrl and the shutdown enhancement switch are connected in sequence to obtain the shutdown enhancement signal VCTRL and the startup voltage Vstart, and then connected to the PMOS field effect transistors M1 and M3 respectively to obtain the shutdown signal vb1; when the power supply AVDD is powered on, the voltage on Vstart gradually increases until it reaches a certain threshold, thereby providing a startup current for the subsequent circuit.

[0076] In the reference circuit, PMOS field effect transistors M4 and M5 are connected to the power supply AVDD, and then connected to M6 and M7 respectively, wherein M4 and M5 are connected to obtain a shutdown signal vb3; M6 and M7 are connected to obtain a shutdown signal vb2; M3 is connected to M6, M6 is connected to resistors R1 and R2, circuit R1 is connected to NPN transistor Q1, and M7 is connected to NPN transistor Q2; the shutdown signals vb3 and vb2 are transmitted to the operational amplifier, and the operational amplifier is connected to resistors R1, R2 and NPN transistor Q2.

[0077] In the shutdown signal generating circuit, the PMOS field effect transistor M8 is connected to the power supply AVDD and then connected to the PMOS field effect transistor M9; M8 is connected to M5, M9 is connected to M7; M9 is connected to the MOS field effect transistor M2.

[0078] In the shutdown enhancement signal generating circuit, the MOS field effect transistor M10 is connected to the power supply AVDD and then connected to the PMOS field effect transistor M11; M10 is connected to M8, and M11 is connected to M9; M11 is connected to the resistor R3 and then connected to the MOS field effect transistor M12, and then connected to the inverter.

[0079] The solution addresses the following problem: when N is relatively small, the high power supply voltage cannot be turned off in the existing traditional solutions.

[0080] Solution: 1) Design a shutdown enhancement signal generation circuit; 2) Use the system POREXT signal to cut off the current of the enhancement signal generation circuit to reduce power consumption.

[0081] Effect: It can meet the requirements of wide power supply voltage range and low power consumption at the same time.

[0082] Figure 5 This idea is used in another self-bias circuit. The turn-off enhancement switch here is NMOSMctrl; the turn-off signal is vb1 generated by PMOS; Vctrl is the turn-off enhancement signal.

[0083] Figure 6 This idea is used in another voltage-type bandgap reference generation circuit. The turn-off enhancement switch here is PMOSMctrl; the turn-off signal is vbg, which is used as both a bandgap reference output and a turn-off signal; Vctrl is the turn-off enhancement signal.

[0084] The startup circuit includes: using a voltage comparator to detect whether the power supply reaches a preset threshold voltage. Once the voltage is reached, the comparator outputs a high-level signal; utilizing the charging characteristics of the capacitor when the power supply is powered on, when the capacitor voltage rises to a certain threshold, triggering the subsequent circuit action; using a low-power oscillator to start oscillating after the power supply is powered on, thereby generating a startup signal; using a current source circuit, including a bias diode or a transistor, to provide the initial current required for startup.

[0085] The reference circuit includes: a bandgap reference source: generating a constant voltage at different temperatures through a transistor and a resistor network; a Zener diode: providing a relatively stable reference voltage; an operational amplifier: using an operational amplifier in combination with a precision resistor network to construct a high-precision voltage reference circuit.

[0086] The shutdown signal generating circuit includes: using a timer to automatically generate a shutdown signal after the startup circuit is activated for a period of time; using a finite state machine to monitor the system status, and when it is detected that the system is running stably, a shutdown signal is issued; using a feedback loop to monitor the power supply current or voltage level, and when the parameters of the power supply current or voltage level are stable within a preset range, a shutdown signal is generated.

[0087] The shutdown enhancement signal generating circuit includes: using an AND gate and an OR gate to process a power-on indication signal and a mirror signal, and outputting a shutdown signal only when both signals meet the conditions; using a latch to lock the shutdown signal to ensure that the shutdown state can be maintained even if subsequent signals change; using MOSFET or BJT as a switching element to enhance the driving capability of the shutdown signal and ensure that the large current path in the startup circuit is reliably cut off.

[0088] Those skilled in the art know that, in addition to implementing the system, device and its various modules provided by the present invention in a purely computer-readable program code, it is entirely possible to implement the same program in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers and embedded microcontrollers by logically programming the method steps. Therefore, the system, device and its various modules provided by the present invention can be considered as a hardware component, and the modules included therein for implementing various programs can also be considered as structures within the hardware component; the modules for implementing various functions can also be considered as both software programs for implementing the method and structures within the hardware component.

[0089] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essence of the present invention. In the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other arbitrarily.

Claims

1. A low power startup circuit with a wide power supply voltage range, characterized in that: include: A starting circuit, for starting the circuit and generating a starting voltage / current in response to power-on of the power supply; A reference circuit, used for generating a fixed voltage reference signal under the action of the start-up circuit; A shutdown signal generating circuit, used for generating a shutdown signal to cut off the current of the startup circuit after the startup is completed; A shutdown enhancement signal generating circuit, used for generating a shutdown enhancement signal upon receiving a system power-on indication signal and a mirror signal, so as to further enhance the shutdown effect and ensure that the startup circuit is completely shut down; The startup circuit is connected to a reference circuit, a shutdown signal generating circuit and a shutdown enhancement signal generating circuit, wherein the shutdown signal generating circuit sends a shutdown signal to the startup circuit, and the shutdown enhancement signal generating circuit is driven by a system power-on indication signal and a mirror signal.

2. The low power consumption startup circuit with a wide power supply voltage range according to claim 1, characterized in that: The startup circuit includes: Ma1 to Man transistors, which are used to increase the startup voltage to a preset high level during the startup process; M13 transistor, which is turned on according to the increase of the startup voltage during the startup process; The startup circuit comprises: A voltage comparator is used to detect whether the power supply reaches a preset threshold voltage. Once the voltage is reached, the comparator outputs a high level signal; By utilizing the charging characteristics of the capacitor when the power supply is turned on, when the capacitor voltage rises to a certain threshold, the subsequent circuit action is triggered; Through a low-power oscillator, it starts to oscillate after the power is turned on, thereby generating a start signal; A current source circuit, including a biasing diode or transistor, is used to provide the initial current required for startup.

3. The low power consumption startup circuit with a wide power supply voltage range according to claim 1, characterized in that: The reference circuit comprises: Bandgap reference: Generates a constant voltage at different temperatures through a transistor and resistor network; Zener diode: provides a relatively stable reference voltage; Operational Amplifiers: Use operational amplifiers with precision resistor networks to build high-precision voltage reference circuits.

4. The low power consumption startup circuit with a wide power supply voltage range according to claim 1, characterized in that: The shutdown signal generating circuit comprises: Use a timer to automatically generate a shutdown signal after the start circuit is activated for a period of time; A finite state machine is used to monitor the system status, and a shutdown signal is issued when it is detected that the system is running stably; A feedback loop is used to monitor the power supply current or voltage level and generate a shutdown signal when the parameters of the power supply current or voltage level are stable within a preset range.

5. The low power consumption startup circuit with a wide power supply voltage range according to claim 1, characterized in that: The shutdown enhancement signal generating circuit includes at least one inverter, M10-M12 transistors, a resistor R3 and a control transistor Mctrl, wherein Mctrl acts as a shutdown enhancement switch, and its on or off state is controlled by the output signal of the inverter when the power supply is powered on; The shutdown enhancement signal generating circuit maintains a high level state when the system power-on indication signal becomes a high level, so that the control transistor Mctrl maintains a shutdown state, ensuring that the startup circuit is shut down; The shutdown enhancement signal generating circuit comprises: Use AND gate and OR gate to process the power-on indication signal and the mirror signal, and output the shutdown signal only when both signals meet the conditions; Use a latch to lock the shutdown signal to ensure that the shutdown state is maintained even if the subsequent signal changes; Use MOSFET or BJT as the switching element to enhance the drive capability of the shutdown signal and ensure that the high current path in the startup circuit is reliably cut off.

6. The low power consumption startup circuit with a wide power supply voltage range according to claim 1, characterized in that: In the startup circuit, the Ma1 transistor, the Ma2 transistor, the control transistor Mctrl and the shutdown enhancement switch are connected in sequence to obtain the shutdown enhancement signal VCTRL and the startup voltage Vstart, and then connected to the PMOS field effect transistors M1 and M3 respectively to obtain the shutdown signal vb1; When the power supply AVDD is powered on, the voltage on Vstart gradually increases until it reaches a certain threshold, thereby providing a startup current for subsequent circuits.

7. The low power consumption startup circuit with a wide power supply voltage range according to claim 6, characterized in that: In the reference circuit, PMOS field effect transistors M4 and M5 are connected to the power supply AVDD, and then connected to M6 and M7 respectively, wherein M4 and M5 are connected to obtain a shutdown signal vb3; M6 and M7 are connected to obtain a shutdown signal vb2; M3 is connected to M6, M6 is connected to resistors R1 and R2, circuit R1 is connected to NPN transistor Q1, and M7 is connected to NPN transistor Q2; The shutdown signals vb3 and vb2 are transmitted to the operational amplifier, and the operational amplifier is connected to the resistors R1 and R2 and the NPN transistor Q2.

8. The low power consumption startup circuit with a wide power supply voltage range according to claim 7, characterized in that: In the shutdown signal generating circuit, the PMOS field effect transistor M8 is connected to the power supply AVDD and then connected to the PMOS field effect transistor M9; M8 is connected to M5, M9 is connected to M7; M9 is connected to the MOS field effect transistor M2.

9. The low power consumption startup circuit with a wide power supply voltage range according to claim 8, characterized in that: In the shutdown enhancement signal generating circuit, the MOS field effect transistor M10 is connected to the power supply AVDD and then connected to the PMOS field effect transistor M11; M10 is connected to M8, and M11 is connected to M9; M11 is connected to the resistor R3 and then to the MOS field effect transistor M12, and then to the inverter.

10. An electronic device, characterized in that: A low power consumption startup circuit with a wide power supply voltage range as claimed in any one of claims 1 to 9.

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