Temperature compensation circuit and method of programmable linear Hall sensor chip

Abstract

The invention discloses a temperature compensation circuit and method for a programmable linear Hall sensor chip, and the circuit comprises a Hall sheet which is used for outputting a differential Hall signal; the first-stage amplifier comprises an input transconductance stage circuit and a transimpedance stage circuit; the input transconductance stage circuit is used for converting the differential Hall signal into Hall signal current through equivalent transconductance; the transimpedance stage circuit is used for converting the Hall signal current into a voltage signal and outputting the voltage signal; the temperature sensor is used for collecting the temperature of the first-stage amplifier and providing temperature information for the trimming module; the trimming module is used for trimming at different temperature points according to the magnetic sensitivity calibration result of the Hall sheet in combination with the temperature information provided by the temperature sensor to obtain a trimming result; and the logic control module is used for regulating the gain, namely the sensitivity, at different temperatures by regulating the equivalent transconductance of the first-stage amplifier based on the trimming result. Through temperature compensation, the influence of process fluctuation is avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of temperature compensation circuits for Hall chips, and in particular to a temperature compensation circuit and method for a programmable linear Hall sensor chip. Background Art

[0002] like Figure 1 As shown, the patent document with publication number CN201620932356.3 adopts the tail current node differential input pair transconductance gm adjustment method, which can effectively perform temperature compensation on the magnetic sensitivity. However, since the transconductance gm of the differential input pair tube (BJT or MOS) is greatly affected by the process, this compensation method is related to process fluctuations and process batches.

[0003] Specifically, transconductance gm=2*sqrt(K*W / L*Ids); wherein k is a parameter related to the process, W and L are the width and length of the input pair tube, respectively, and Ids is equal to the tail current Ibias / 2; thus, it can be seen that transconductance gm is a quantity affected by the process and is correlated with the bias current.

[0004] Therefore, in the above prior art, the transconductance gm of the input pair tube is regulated by adjusting the tail current Ibias. This temperature compensation method is easily affected by process fluctuations. Summary of the invention

[0005] The technical problem to be solved by the present invention is that the existing temperature compensation circuit adjusts the transconductance gm of the input pair tube by adjusting the tail current Ibias, and this temperature compensation method is easily affected by process fluctuations. The purpose of the present invention is to provide a temperature compensation circuit and method for a programmable linear Hall sensor chip, which desensitizes its transconductance to process factors and chip working bias state through a newly designed first-stage amplifier. The equivalent transconductance gm_equal of the first stage is controlled by logic through the information fed back by the temperature sensor, thereby adjusting the gain, that is, the sensitivity, at different temperatures. The temperature compensation of the present invention avoids the influence of process fluctuations.

[0006] The present invention is achieved through the following technical solutions:

[0007] In a first aspect, the present invention provides a temperature compensation circuit for a programmable linear Hall sensor chip, the circuit comprising:

[0008] A Hall chip, used for outputting a differential Hall signal;

[0009] The first-stage amplifier includes an input transconductance stage circuit and a transimpedance stage circuit; the input transconductance stage circuit is used to convert the differential Hall signal output from the Hall slice into a Hall signal current through an equivalent transconductance gm; the transimpedance stage circuit is used to convert the Hall signal current into a voltage signal output;

[0010] A temperature sensor is used to collect the temperature of the first-stage amplifier and provide the temperature information to the adjustment module;

[0011] The adjustment module is used to combine the temperature information provided by the temperature sensor and perform adjustment at different temperature points according to the calibration result of the magnetic sensitivity of the Hall film to obtain the adjustment result;

[0012] The logic control module is used to adjust the gain or sensitivity at different temperatures by adjusting the equivalent transconductance of the first-stage amplifier based on the adjustment result and in combination with different control logics.

[0013] Furthermore, the equivalent transconductance of the first-stage amplifier is only related to the resistance of the passive device and is less affected by the fluctuation of the production process and the product operation and application environment.

[0014] Furthermore, the input transconductance stage circuit of the first-stage amplifier includes MOS tube M1, MOS tube M2, MOS tube M3, MOS tube M4 and an adjustable resistor Rsense; MOS tube M1 and MOS tube M2 are used as input pair tubes, and MOS tube M3 and MOS tube M4 are used as feedback tubes of MOS tube M1 and MOS tube M2 respectively;

[0015] The gate of the MOS tube M1 is connected to the output pin of the Hall sheet, the drain of the MOS tube M1 is connected to the current source ib, and the source of the MOS tube M1 is connected to the input port of the adjustable resistor Rsense; the gate of the MOS tube M2 is connected to the empty pin of the Hall sheet, the drain of the MOS tube M2 is connected to the current source ib, the source of the MOS tube M2 is connected to the output port of the adjustable resistor Rsense, and the resistance value adjustment port of the adjustable resistor Rsense is connected to the logic control module;

[0016] The source of the MOS tube M3 is grounded, the drain of the MOS tube M3 is connected to the source of the MOS tube M1, and the gate of the MOS tube M3 is connected to the drain of the MOS tube M1; the source of the MOS tube M4 is grounded, the drain of the MOS tube M4 is connected to the source of the MOS tube M2, and the gate of the MOS tube M4 is connected to the drain of the MOS tube M2;

[0017] The source of the MOS tube M1 and the source of the MOS tube M2 are both connected to a 2-fold current source ib; the current source ib is grounded.

[0018] Furthermore, the MOS tube M1 and the MOS tube M2 are both PMOS tubes, and the MOS tube M3 and the MOS tube M4 are both NMOS tubes.

[0019] Furthermore, the gain of the first stage amplifier is:

[0020] Av=gm_equal*m*Rhall

[0021] gm_equal=1 / Rsense

[0022] Among them, gm_equal is the equivalent transconductance gm, which is only related to the resistance value of the adjustable resistor Rsense; m is the amplification factor of the small AC current iac generated by the Hall differential voltage during the conduction process, and m is a positive integer; Rhall is the resistance value of the output resistor.

[0023] Furthermore, the transimpedance stage circuit includes an output resistor Rout, a MOS transistor M5 and a MOS transistor M6;

[0024] The gate of the MOS tube M5 is connected to the gate of the MOS tube M3, the drain of the MOS tube M5 is connected to the 2-fold current source ib, and the source of the MOS tube M5 is grounded; the gate of the MOS tube M6 is connected to the gate of the MOS tube M4, the drain of the MOS tube M6 is connected to the 2-fold current source ib, and the source of the MOS tube M6 is grounded;

[0025] One end of the output resistor Rout is connected to the drain of the MOS tube M5, and the other end is connected to the drain of the MOS tube M6; the output of the first stage amplifier is respectively drawn between the drain of the MOS tube M5 and the output resistor Rout, and between the drain of the MOS tube M6 and the output resistor Rout.

[0026] Furthermore, the output resistor Rout uses a resistor with the same shape and material as the Hall film, which is used to preliminarily offset the temperature characteristics of the Hall film itself.

[0027] Furthermore, the logic control module adjusts the value of the adjustable resistor Rsense by controlling the gate logic high and low of the MOS tubes M3 , MOS tubes M4 , MOS tubes M5 and MOS tubes M6 , thereby adjusting the gain value of the first-stage amplifier.

[0028] Furthermore, the trimming module is a programmable module, which together with the temperature sensor module determines the trimming logic:

[0029] When the temperature is greater than a certain high temperature TH, a logic high or logic low is given through n BIT control logics; when the temperature is less than a certain low temperature TL, a logic high or logic low is given through n BIT control logics;

[0030] When the temperature is within a certain temperature range, n BIT control logics are used to give logic high or logic low;

[0031] The high temperature TH and the low temperature TL themselves are used as TRIM commands of the resistance adjustment port to control the temperature to be higher or lower.

[0032] In a second aspect, the present invention further provides a compensation method for a programmable linear Hall sensor chip, the compensation method comprising:

[0033] The differential Hall signal output from the Hall slice is input into the first-stage amplifier; the first-stage amplifier desensitizes its equivalent transconductance to process factors and chip working bias state;

[0034] The temperature information fed back by the temperature sensor is used to control the equivalent transconductance of the first-stage amplifier based on the control logic of the logic control module, thereby adjusting the gain, that is, the sensitivity, at different temperatures.

[0035] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0036] The present invention discloses a temperature compensation circuit and method for a programmable linear Hall sensor chip. The present invention uses a newly designed first-stage amplifier to desensitize its transconductance from process factors and chip working bias state. The temperature information fed back by the temperature sensor is used to control the equivalent transconductance gm_equal composed of MOS tube M1, MOS tube M2, MOS tube M3, MOS tube M4 and adjustable resistor Rsense in the first-stage amplifier based on the control logic of the logic control module, thereby adjusting the gain at different temperatures, that is, the sensitivity. The temperature compensation of the present invention avoids the influence of process fluctuations. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The drawings described herein are used to provide a further understanding of the embodiments of the present invention, constitute a part of this application, and do not constitute a limitation of the embodiments of the present invention. In the drawings:

[0038] Figure 1 The present invention is an existing temperature compensation circuit diagram;

[0039] Figure 2 A block diagram of a temperature compensation circuit of a programmable linear Hall sensor chip of the present invention;

[0040] Figure 3 It is a schematic diagram of the structure of the first-stage amplifier circuit of the present invention;

[0041] Figure 4 It is a structural schematic diagram of the adjustable resistor Rsense of the present invention. DETAILED DESCRIPTION

[0042] Hereinafter, the term "include" or "may include" used in various embodiments of the present invention indicates the presence of the invented function, operation or element, and does not limit the addition of one or more functions, operations or elements. In addition, as used in various embodiments of the present invention, the terms "include", "have" and their cognates are intended only to indicate specific features, numbers, steps, operations, elements, components or combinations of the foregoing items, and should not be understood as first excluding the presence of one or more other features, numbers, steps, operations, elements, components or combinations of the foregoing items or the possibility of adding one or more features, numbers, steps, operations, elements, components or combinations of the foregoing items.

[0043] In various embodiments of the present invention, the expression "or" or "at least one of A or / and B" includes any combination or all combinations of the words listed at the same time. For example, the expression "A or B" or "at least one of A or / and B" may include A, may include B, or may include both A and B.

[0044] The expressions (such as "first", "second", etc.) used in various embodiments of the present invention may modify the various constituent elements in various embodiments, but may not limit the corresponding constituent elements. For example, the above expressions do not limit the order and / or importance of the elements. The above expressions are only used for the purpose of distinguishing an element from other elements. For example, the first user device and the second user device indicate different user devices, although both are user devices. For example, without departing from the scope of various embodiments of the present invention, the first element may be referred to as the second element, and similarly, the second element may also be referred to as the first element.

[0045] It should be noted that if it is described that one component element is “connected” to another component element, the first component element may be directly connected to the second component element, and a third component element may be “connected” between the first component element and the second component element. Conversely, when one component element is “directly connected” to another component element, it can be understood that there is no third component element between the first component element and the second component element.

[0046] The terms used in various embodiments of the present invention are only used for the purpose of describing specific embodiments and are not intended to limit various embodiments of the present invention. As used herein, the singular form is intended to also include the plural form, unless the context clearly indicates otherwise. Unless otherwise limited, all terms used here (including technical terms and scientific terms) have the same meaning as the meaning generally understood by those of ordinary skill in the art to which the various embodiments of the present invention belong. The terms (such as the terms defined in the dictionary generally used) will be interpreted as having the same meaning as the contextual meaning in the relevant technical field and will not be interpreted as having an idealized meaning or an overly formal meaning, unless clearly defined in various embodiments of the present invention.

[0047] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with embodiments and drawings. The exemplary embodiments of the present invention and their description are only used to explain the present invention and are not intended to limit the present invention.

[0048] Desensitization of magnetic sensitivity to different operating temperatures is a necessary requirement for Hall sensor chips. However, the existing temperature compensation circuit adjusts the transconductance gm of the input pair by adjusting the tail current Ibias. This temperature compensation method is easily affected by process fluctuations. For different process platforms or different batches of wafers, this compensation method shows different compensation effects.

[0049] In view of the above problems, the present invention designs a new first-stage amplifier structure for the Hall signal, constructs an input pair tube equivalent transconductance gm_equal, desensitizes the equivalent transconductance gm_equal to process-related factors (such as tube W, L, process parameter K) and the working bias state of the chip MOS tube (such as different power supply voltages, different working modes\power consumption, etc.), and then adjusts the equivalent transconductance gm_equal through programming, avoiding the product robustness problem caused by the traditional "programming control of transconductance gm to adjust temperature drift". When the chip works in the temperature range of -40℃ to 150℃, the magnetic sensitivity of the chip can be compensated programmably. Avoid performance abnormalities caused by sensitivity fluctuations due to different working temperatures of the chip.

[0050] The principle of the present invention is shown in the following formula:

[0051] Magnetic sensitivity (sns) = sns_hall*sns_AMP*sns_SignalChain

[0052] =(k*VDDhall / Rhall*B)*(gm_equal*m*Rout)*(Av_OPA_signalChain);

[0053] The magnetic conversion gain (magnetic field converted into hall voltage) sns_hall of the Hall disk is determined by the external magnetic field B and the Hall coefficient k, the Hall resistance Rhall and the voltage VDDhall applied to the Hall disk; the first-stage amplifier gain sns_AMP is determined by the equivalent transconductance gm_equal of the first-stage amplifier and the output resistance Rout and the proportional factor m, where Rout follows the "resistance with the same shape and material as the Hall film" in the existing patent literature (see Figure 1), m is the amplification factor, m is a positive integer and m ≥ 1. The remaining post-stage signal chain gain sns_SignalChain is determined by the op amp gain in the signal chain, sns_SignalChain is a positive number and a constant.

[0054] The present invention adjusts the sensitivity temperature drift by adjusting the gain sns_AMP of the first-stage amplifier. Figure 2 As shown. The present invention uses a newly designed first-stage amplifier to desensitize its transconductance from process factors and chip working bias state. The equivalent transconductance gm_equal composed of MOS tubes M1, MOS tubes M2, MOS tubes M3, MOS tubes M4 and adjustable resistor Rsense in the first-stage amplifier is controlled based on the control logic of the logic control module through the temperature information fed back by the temperature sensor, so as to adjust the gain at different temperatures, that is, the sensitivity.

[0055] Example 1

[0056] like Figure 2 As shown, the present invention provides a temperature compensation circuit for a programmable linear Hall sensor chip, the circuit comprising:

[0057] A Hall chip, used for outputting a differential Hall signal;

[0058] The first-stage amplifier includes an input transconductance stage circuit and a transimpedance stage circuit; the input transconductance stage circuit is used to convert the differential Hall signal output from the Hall slice into a Hall signal current through an equivalent transconductance gm; the transimpedance stage circuit is used to convert the Hall signal current into a voltage signal output;

[0059] A temperature sensor is used to collect the temperature of the first-stage amplifier and provide the temperature information to the adjustment module;

[0060] The adjustment module is used to combine the temperature information provided by the temperature sensor and perform adjustment at different temperature points according to the calibration result of the magnetic sensitivity of the Hall film to obtain the adjustment result;

[0061] The logic control module is used to adjust the gain or sensitivity at different temperatures by adjusting the equivalent transconductance of the first-stage amplifier based on the adjustment result and in combination with different control logics.

[0062] in, Figure 2 The decoding logic in is the logic control module. Figure 2 The programming circuit in is the adjustment module.

[0063] In this embodiment, the equivalent transconductance of the first-stage amplifier is only related to the resistance of the passive device and is less affected by the fluctuation of the production process and the product operation and application environment.

[0064] like Figure 3 As shown, Figure 3 A first-stage amplifier designed for the present invention; the input transconductance stage circuit of the first-stage amplifier includes MOS tube M1, MOS tube M2, MOS tube M3, MOS tube M4, an adjustable resistor Rsense and a current source ib; MOS tube M1 and MOS tube M2 are both PMOS tubes, and MOS tube M3 and MOS tube M4 are both isolated NMOS tubes; the current source is a zero temperature coefficient current copied from a reference source by a current mirror (PMOS / NMOS cascode structure); Figure 4 The structure is an adjustable resistor Rsense, which is an array of polysilicon resistors or diffused resistors or a combination of the two. It is an adjustable resistor, and the resistance value can be controlled by a MOS switch. The transimpedance circuit includes an output resistor Rout, a MOS tube M5 and a MOS tube M6, and both the MOS tube M5 and the MOS tube M6 are isolated NMOS tubes; the output resistor Rout uses a resistor of the same shape and material as the Hall film, which is used to preliminarily offset the temperature characteristics of the Hall film itself.

[0065] Figure 3 The circuit connection relationship of the input transconductance stage circuit is as follows: MOS tube M1 and MOS tube M2 are used as input pair tubes, and the gates of MOS tube M1 and MOS tube M2 are used as input ports for collecting Hall signal voltage respectively. Specifically, the gate of MOS tube M1 is connected to the output pin of the Hall sheet, the drain of MOS tube M1 is connected to the current source ib, and the source of MOS tube M1 is connected to the input port of the adjustable resistor Rsense; the gate of MOS tube M2 is connected to the empty pin of the Hall sheet, the drain of MOS tube M2 is connected to the current source ib, the source of MOS tube M2 is connected to the output port of the adjustable resistor Rsense, and the resistance value adjustment port of the adjustable resistor Rsense is connected to the logic control module (i.e. Figure 3 Temperature sensitivity adjustment decoding module in the system);

[0066] MOS tube M3 and MOS tube M4 are respectively used as feedback tubes of MOS tube M1 and MOS tube M2. The source of MOS tube M3 is grounded, the drain of MOS tube M3 is connected to the source of MOS tube M1, and the gate of MOS tube M3 is connected to the drain of MOS tube M1. The source of MOS tube M4 is grounded, the drain of MOS tube M4 is connected to the source of MOS tube M2, and the gate of MOS tube M4 is connected to the drain of MOS tube M2.

[0067] The source of the MOS tube M1 and the source of the MOS tube M2 are both connected to a 2-fold current source ib; the current source ib is grounded.

[0068] In addition, the ground pin of the Hall film is grounded, and the power pin of the Hall film is connected to the power supply and provides a 2-fold current source.

[0069] Figure 3The circuit connection relationship of the middle cross-resistance circuit is as follows: the gate of the MOS tube M5 is connected to the gate of the MOS tube M3, the drain of the MOS tube M5 is connected to the twice current source ib, and the source of the MOS tube M5 is grounded; the gate of the MOS tube M6 is connected to the gate of the MOS tube M4, the drain of the MOS tube M6 is connected to the twice current source ib, and the source of the MOS tube M6 is grounded; the MOS tubes M5 and M6 are used for mirroring the iac current, and the number of them is m times that of M1 and M2, where m is a positive integer, and m≥1;

[0070] One end of the output resistor Rout is connected to the drain of the MOS tube M5, and the other end is connected to the drain of the MOS tube M6; the output of the first stage amplifier is respectively drawn between the drain of the MOS tube M5 and the output resistor Rout, and between the drain of the MOS tube M6 and the output resistor Rout.

[0071] It should be noted that all bias currents in the first-stage amplifier use zero temperature coefficient currents.

[0072] The signal transmission relationship of the present invention is:

[0073] (1) Hall film (i.e. Figure 3 The Hall plate in the figure gives a Hall differential voltage signal ΔVhall, which is received by the input pair MOS tube M1 and MOS tube M2 and converted into a small signal current iac through the equivalent transconductance gm_equal. The derivation of the equivalent transconductance gm_equal is as follows: Figure 3 The dotted line framed part: Under the appropriate bias, there is a relationship: the AC impedance value seen from any port of the adjustable resistor Rsense, rin = 1 / (gm1*ro1*gm3), where gm1 and gm3 are the MOS tube transconductances of MOS tubes M1 and MOS tubes M3 under their respective biases, and ro1 is the AC channel impedance of MOS tube M1. Rsense is a Kohm-level resistor. Since rin is much smaller than Rsense (at least 4 orders of magnitude smaller), gm_equal = (ΔVhall / Rsense) / ΔVhall = 1 / Rsense. gm_equal is no longer related to MOS tube parameters and MOS workload, while the equivalent transconductance is related to the value of the passive device Rsense, and is less affected by production process fluctuations, product operation, and application environment. The small AC current iac generated by the Hall differential voltage is gm_equal*ΔVhall;

[0074] (2) iac is transmitted to the output stage, generating the differential amplified voltage ΔVo1=OUTP-OUTN=iac*m*Rhall2 of the first-stage amplifier; wherein, m is the amplification factor in the conduction process of iac (m is a positive integer), and Rhall2 is the resistance of the Hall film with the same shape and material resistance, which is equal to the resistance of the Hall film, that is, Rhall=Rhall2; therefore, the gain of the first-stage amplifier Av=gm_equal*m*Rhall; thus, the gain of the entire linear Hall sensor chip can be controlled by adjusting the equivalent transconductance gm_equal, that is, adjusting the magnetic sensitivity.

[0075] (3) The adjustable resistor Rsense has three ports, two of which are input and output ports, and the other port is a resistance adjustment trim port. The Rsense module has n bits of control bits, which is a positive integer, and n≥2.

[0076] (4) Temperature sensor, providing temperature information to the adjustment module.

[0077] (5) The trimming module is a programmable module, which together with the temperature sensor module determines the trimming logic: a) When the temperature is greater than a certain high temperature TH, a logic high or logic low is given through n BIT control logics; when the temperature is less than a certain low temperature TL, a logic high or logic low is given through n BIT control logics; b) When the temperature is between a certain temperature range, a logic high or logic low is given through n BIT control logics; c) The high temperature TH and the low temperature TL themselves are used as TRIM commands of the resistance adjustment port to control the adjustment temperature to a higher or lower level; d) The above-mentioned high temperature TH and low temperature TL only represent two temperature points, and TH and TL in the solution of the present invention can have multiple points.

[0078] (6) The logic control module outputs the control logic, and adjusts the value of the adjustable resistor Rsense by controlling the gate logic high and low of the MOS tubes M3, M4, M5, and M6, thereby adjusting the gain value of the first-stage amplifier.

[0079] The present invention can actively adjust the magnetic sensitivity temperature curve within the entire temperature range, and the chip itself dynamically and actively adjusts the magnetic sensitivity at different temperatures according to the temperature.

[0080] Example 2

[0081] The difference between this embodiment and embodiment 1 is that this embodiment provides a compensation method for a programmable linear Hall sensor chip, and the compensation method includes:

[0082] The differential Hall signal output from the Hall slice is input into the first-stage amplifier; the first-stage amplifier desensitizes its equivalent transconductance to process factors and chip working bias state;

[0083] The temperature information fed back by the temperature sensor is used to control the equivalent transconductance of the first-stage amplifier based on the control logic of the logic control module, thereby adjusting the gain, that is, the sensitivity, at different temperatures.

[0084] The magnetic sensitivity adjustment method at different temperatures of the present invention is robust to the process and adaptable to different working modes of the chip.

[0085] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A temperature compensation circuit for a programmable linear Hall sensor chip, characterized in that: The circuit includes: A Hall chip, used for outputting a differential Hall signal; The first-stage amplifier includes an input transconductance stage circuit and a transimpedance stage circuit; the input transconductance stage circuit is used to convert the differential Hall signal output from the Hall slice into a Hall signal current through an equivalent transconductance; the transimpedance stage circuit is used to convert the Hall signal current into a voltage signal output; A temperature sensor is used to collect the temperature of the first-stage amplifier and provide the temperature information to the adjustment module; The adjustment module is used to combine the temperature information provided by the temperature sensor and perform adjustment at different temperature points according to the calibration result of the magnetic sensitivity of the Hall film to obtain the adjustment result; The logic control module is used to adjust the gain or sensitivity at different temperatures by adjusting the equivalent transconductance of the first-stage amplifier based on the adjustment result and in combination with different control logics.

2. The temperature compensation circuit of a programmable linear Hall sensor chip according to claim 1, characterized in that: The equivalent transconductance of the first-stage amplifier is only related to the resistance of the passive devices.

3. The temperature compensation circuit of a programmable linear Hall sensor chip according to claim 1, characterized in that: The input transconductance stage circuit of the first-stage amplifier includes MOS tube M1, MOS tube M2, MOS tube M3, MOS tube M4 and an adjustable resistor Rsense; the MOS tube M1 and MOS tube M2 are used as input pair tubes, and the MOS tube M3 and MOS tube M4 are used as feedback tubes of the MOS tube M1 and MOS tube M2 respectively; The gate of the MOS tube M1 is connected to the output pin of the Hall sheet, the drain of the MOS tube M1 is connected to the current source ib, and the source of the MOS tube M1 is connected to the input port of the adjustable resistor Rsense; the gate of the MOS tube M2 is connected to the empty pin of the Hall sheet, the drain of the MOS tube M2 is connected to the current source ib, the source of the MOS tube M2 is connected to the output port of the adjustable resistor Rsense, and the resistance adjustment port of the adjustable resistor Rsense is connected to the logic control module; The source of the MOS tube M3 is grounded, the drain of the MOS tube M3 is connected to the source of the MOS tube M1, and the gate of the MOS tube M3 is connected to the drain of the MOS tube M1; the source of the MOS tube M4 is grounded, the drain of the MOS tube M4 is connected to the source of the MOS tube M2, and the gate of the MOS tube M4 is connected to the drain of the MOS tube M2; The source of the MOS tube M1 and the source of the MOS tube M2 are both connected to a 2-fold current source ib; the current source ib is grounded.

4. The temperature compensation circuit of a programmable linear Hall sensor chip according to claim 3, characterized in that: The MOS tube M1 and the MOS tube M2 are both PMOS tubes, and the MOS tube M3 and the MOS tube M4 are both NMOS tubes.

5. The temperature compensation circuit of a programmable linear Hall sensor chip according to claim 3, characterized in that: The gain of the first-stage amplifier is: Av=gm_equal*m*Rhall gm_equal=1 / Rsense Among them, gm_equal is the equivalent transconductance, which is only related to the resistance value of the adjustable resistor Rsense; m is the amplification factor of the small AC current iac generated by the Hall differential voltage during the conduction process, and m is a positive integer; Rhall is the resistance value of the output resistor.

6. The temperature compensation circuit of a programmable linear Hall sensor chip according to claim 3, characterized in that: The transimpedance stage circuit includes an output resistor Rout, a MOS tube M5 and a MOS tube M6; The gate of the MOS tube M5 is connected to the gate of the MOS tube M3, the drain of the MOS tube M5 is connected to the 2-fold current source ib, and the source of the MOS tube M5 is grounded; the gate of the MOS tube M6 is connected to the gate of the MOS tube M4, the drain of the MOS tube M6 is connected to the 2-fold current source ib, and the source of the MOS tube M6 is grounded; One end of the output resistor Rout is connected to the drain of the MOS tube M5, and the other end is connected to the drain of the MOS tube M6; the output of the first stage amplifier is respectively drawn between the drain of the MOS tube M5 and the output resistor Rout, and between the drain of the MOS tube M6 and the output resistor Rout.

7. The temperature compensation circuit of a programmable linear Hall sensor chip according to claim 6, characterized in that: The output resistor Rout is a resistor having the same shape and material as the Hall film.

8. The temperature compensation circuit of a programmable linear Hall sensor chip according to claim 6, characterized in that: The logic control module controls the gate logic high and low of the MOS tubes M3, M4, M5 and M6 to adjust the value of the adjustable resistor Rsense, thereby adjusting the gain value of the first-stage amplifier.

9. The temperature compensation circuit of a programmable linear Hall sensor chip according to claim 1, characterized in that: The trimming module is a programmable module, which together with the temperature sensor module determines the trimming logic: When the temperature is greater than a certain high temperature TH, the n BIT control logic gives a logic high or logic low; when the temperature is less than a certain low temperature TL, the n BIT control logic outputs a logic high or logic low; When the temperature is within a certain temperature range, the n BIT control logic outputs logic high or logic low; The high temperature TH and the low temperature TL themselves are used as TRIM commands of the resistance adjustment port to control the temperature increase or decrease.

10. A compensation method for a temperature compensation circuit of a programmable linear Hall sensor chip as claimed in any one of claims 1 to 9, characterized in that: The compensation method includes: The differential Hall signal output from the Hall slice is input into the first-stage amplifier; the first-stage amplifier desensitizes its equivalent transconductance to process factors and chip working bias state; The temperature information fed back by the temperature sensor is used to control the equivalent transconductance of the first-stage amplifier based on the control logic of the logic control module, thereby adjusting the gain, that is, the sensitivity, at different temperatures.

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