UVM register model address randomization method and device

Abstract

According to the UVM register model address randomization method and device, UVM register model address randomization can be achieved, the function of a UVM register model is expanded, and convenience is provided for vast verification personnel. The method comprises the following steps of: (1) constructing a random addrreg in a regmodel; (2) a random adddr is defined in a global config, and the random adddr is transmitted to an adapter; and (3) a reg2bus function is constructed in the adapter, when write function write operation is called in the sequence, and when a fixed address 32'h10086007 is transmitted to the adapter to construct the reg2bus function, the fixed address 32'h10086007 is replaced by a random address transmitted from the global situation, and finally the address is transmitted to a random address after dut randomization, so that randomization of the UVM register model address is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a UVM register model address randomization method and a UVM register model address randomization device. Background Art

[0002] With the rapid development of information technology in modern society, the continuous improvement of semiconductor process technology and the continuous progress of integrated circuit (IC) design, the functions of digital ICs are becoming more and more complex. As a result, the previously simple verification work has become complicated, and traditional verification methods are no longer applicable to current IC verification work. Logical errors in chip design are the main reason for chip tape-out failure, so sufficient functional verification is a key step to successful chip design.

[0003] The purpose of verification is to find defects or errors (bugs) in chip design by simulating and testing the designed chip functions, so that IC design engineers can make corrections as much as possible before the chip is tape out, so that the verified modules and chip systems can complete the expected functions as much as possible. At present, Universal Verification Methodology (UVM) has become the mainstream verification method due to its strong reusability and ease of use. UVM verification registers mainly use register models (Register Model) to read and write registers in RTL through front door access (FRONTDOOR) or back door (BACKDOOR) access in any time-consuming phase. Its essence is to redefine the interface between the verification platform and the registers of the design under test (DUT), so that the verification personnel can better organize and configure registers, simplify the process and reduce the workload. However, using Register Model to verify registers can only randomly configure the value of the register in DUT by the field of Register Model, and cannot randomly configure the address of the register in DUT by the address of Register Model. In some special verification scenarios, such as verifying flash, a virtual register needs to be constructed to randomly verify the address of the flash. However, the traditional register model cannot randomly verify the address, which limits the use of the register model. Summary of the invention

[0004] To overcome the defects of the prior art, the technical problem to be solved by the present invention is to provide a UVM register model address randomization method, which can realize UVM register model address randomization, expand the function of the UVM register model, and provide convenience for a large number of verification personnel.

[0005] The technical solution of the present invention is: this UVM register model address randomization method, which comprises the following steps: (1) Construct a random address register random_addr_reg in the register model reg_model; (2) Define the random address random_addr in the global configuration config, and then pass the randomized random_addr to the converter adapter by configuring the database config_db; (3) Construct the register to bus reg2bus function in the adapter. When the write function is called with the random_addr_reg register in the sequence, when its fixed address 32'h10086007 is passed to the adapter to construct the reg2bus function, it is replaced by the random_addr passed in from the global address, and finally passed to the random address of the design dut after randomization.

[0006] The invention provides a method capable of randomizing the address of a UVM register model, expands the function of the UVM register model, and provides convenience for a large number of verification personnel.

[0007] A UVM register model address randomization device is also provided, comprising: A register construction module configured to construct a random address register random_addr_reg in a register model reg_model; Define the transfer module, which is configured to define the random address random_addr in the global configuration config, and then pass the randomized random_addr to the converter adapter by configuring the database config_db; The replacement module is configured to construct the register to bus reg2bus function in the adapter. When the write function is called with the random_addr_reg register in the sequence sequence for write operation, when its fixed address 32'h10086007 is passed to the adapter to construct the reg2bus function, it is replaced by the random_addr passed in from the global, and finally passed to the random address of the design dut under test after randomization. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 The program code of step (1) of the UVM register model address randomization method according to the present invention is shown.

[0009] Figure 2 The program code of step (2) of the UVM register model address randomization method according to the present invention is shown.

[0010] Figure 3 The overall verification environment architecture diagram of step (3) of the UVM register model address randomization method according to the present invention is shown.

[0011] Figure 4 A flow chart of a UVM register model address randomization method according to the present invention is shown. DETAILED DESCRIPTION

[0012] The register model of UVM redefines the interface between the verification platform and the register of the design under test (DUT), so that the verification personnel can better organize and configure the register, simplify the process and reduce the workload. However, it can only randomly register the data, thus limiting its verification function. In some special verification occasions, the register model needs to be able to randomly address its address. The present invention provides a method that can randomly address the UVM register model, expands the function of the UVM register model, and provides convenience for the majority of verification personnel.

[0013] Specifically, if Figure 4 As shown, this UVM register model address randomization method includes the following steps: (1) Construct a random address register random_addr_reg in the register model reg_model; (2) Define the random address random_addr in the global configuration config, and then pass the randomized random_addr to the converter adapter by configuring the database config_db; (3) Construct the register to bus reg2bus function in the adapter. When the write function is called with the random_addr_reg register in the sequence, when its fixed address 32'h10086007 is passed to the adapter to construct the reg2bus function, it is replaced by the random_addr passed in from the global address, and finally passed to the random address of the design dut after randomization.

[0014] Preferably, in the step (1), a random_addr_reg class is derived from the UVM register uvm_reg, and then a random_addr domain is declared; in the new function new, the width 32 of the random_addr_reg register is passed as a parameter to the super.new function, and another parameter in super.new selects NO_COVERAGE; and the new function new is created and assigned values ​​in build().

[0015] Preferably, in the step (1), after the random_addr_reg register is defined, the random_addr_reg register is instantiated in a class reg_model derived from the UVM register block uvm_reg_block.

[0016] Preferably, in step (1), the previously instantiated register random_addr is defined in build() and added to the fixed address 32'h10086007 in the second parameter of the add_reg function.

[0017] Preferably, in the step (2), the structure of the reg2bus function of the adapter in the UVM verification platform is as follows: using an if_else statement in the assignment process of addr, if the address of the register calling the function is 32'h10086007, then assigning addr_random to the transaction to be driven by the driver driver; if the address of the register calling the function is not 32'h10086007, then assigning the actual address of the register to the corresponding transaction.

[0018] Preferably, in the step (3), the random address random_addr is passed into the UVM verification platform as follows: first, the random address random_addr is defined in the global config of the verification platform, and then the random address random_addr is passed to the reg2bus function in the adapter through config_db.

[0019] Those skilled in the art can understand that all or part of the steps in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a program, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes the steps of the above-mentioned embodiment method, and the storage medium can be: ROM / RAM, disk, CD, memory card, etc. Therefore, corresponding to the method of the present invention, the present invention also includes a UVM register model address randomization device, which is usually represented in the form of functional modules corresponding to the steps of the method. The device includes: A register construction module configured to construct the random_addr_reg register in reg_model; Define the transfer module, which is configured to define the random address random_addr in the global config, and then pass the random address random_addr to the adapter through config_db; The replacement module is configured to construct the reg2bus function in the adapter. When the write function is called with the random_addr_reg register in the sequence, when its fixed address 32'h10086007 is passed to the adapter to construct the reg2bus function, it is replaced by the random address random_addr passed in from the global, and finally passed to the random address after dut randomization.

[0020] Preferably, in the register construction module, a random_addr_reg class is derived from the UVM register uvm_reg, and then a random_addr domain is declared; in the new function new, the width 32 of the random_addr_reg register is passed as a parameter to the super.new function, and another parameter in super.new selects NO_COVERAGE; in the creation build(), the new function new is created and assigned a value; after the random_addr_reg register is defined, the random_addr_reg register is instantiated in a class reg_model derived from the UVM register block uvm_reg_block; in the definition, the previously instantiated register random_addr is added to the fixed address 32'h10086007 in the second parameter of the addr_reg function in build().

[0021] Preferably, in the definition transfer module, the structure of the reg2bus function of the adapter in the UVM verification platform is: using the if_else statement in the assignment process of addr, if the address of the register calling the function is 32'h10086007, then addr_random is assigned to the transaction transaction to be driven by the driver driver; if the address of the register calling the function is not 32'h10086007, then the actual address of the register is assigned to the corresponding transaction.

[0022] Preferably, in the replacement module, the random address random_addr is passed in the UVM verification platform as follows: first, the random address random_addr is defined in the global config of the verification platform, and then the random address random_addr is passed to the reg2bus function in the adapter by means of config_db.

[0023] The present invention will be described in more detail below.

[0024] The structure of the register with random address in the UVM verification platform is as follows Figure 1 First, derive a random_addr_reg class from uvm_reg, and then declare a random_addr domain. In the new function, pass the width of the random_addr_reg register 32 as a parameter to the super.new function. Another parameter in super.new can choose not to support coverage, that is, NO_COVERAGE. Finally, create and assign values ​​in build. After defining the random_addr_reg register, it needs to be instantiated in a class reg_model derived from uvm_reg_block. The key is to add the previously instantiated register random_addr to its fixed address 32'h10086007 in the second parameter of the add_reg function in build().

[0025] The construction of the adapter's reg2bus function in the UVM verification platform is as follows Figure 2 , use the if_else statement in the assignment process of addr. If the address of the register that calls the function is 32'h10086007, assign addr_random to the transaction tr that the driver wants to drive. If the address of the register that calls the function is not 32'h10086007, assign the actual address of the register to the corresponding tr.

[0026] In the UVM verification platform, the random address random_addr is passed in as follows Figure 3 As shown, first define the random address random_addr in the global config of the verification platform, and then pass the random address random_addr to the reg2bus function in the adapter through config_db.

[0027] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Any simple modification, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention are still within the protection scope of the technical solution of the present invention.

Claims

1. UVM register model address randomization method, characterized by: It includes the following steps: (1) Construct a random address register random_addr_reg in the register model reg_model; (2) Define the random address random_addr in the global configuration config, and then pass the randomized random_addr to the converter adapter by configuring the database config_db; (3) Construct the register to bus reg2bus function in the adapter. When the write function is called with the random_addr_reg register in the sequence, when its fixed address 32'h10086007 is passed to the adapter to construct the reg2bus function, it is replaced by the random_addr passed in from the global register, and finally the random address is passed to the design under test dut.

2. UVM register model address randomization method according to claim 1, it is characterized in that: In the step (1), a random_addr_reg class is derived from the UVM register uvm_reg, and then a random_addr domain is declared; in the new function new, the width 32 of the random_addr_reg register is passed as a parameter to the super.new function, and another parameter in super.new selects NO_COVERAGE; in the build(), the new function new is created and assigned values.

3. UVM register model address randomization method according to claim 2, it is characterized in that: In the step (1), after the random_addr_reg register is defined, the random_addr_reg register is instantiated in a class reg_model derived from the UVM register block uvm_reg_block.

4. UVM register model address randomization method according to claim 3, it is characterized in that: In the step (1), in the defined build(), the previously instantiated register random_addr is added to the fixed address 32'h10086007 in the second parameter of the add_reg function.

5. UVM register model address randomization method according to claim 4, it is characterized in that: In the step (2), the reg2bus function of the adapter in the UVM verification platform is constructed as follows: in the assignment process of addr, an if_else statement is used. If the address of the register that calls the function is 32'h10086007, addr_random is assigned to the transaction that the driver driver wants to drive; if the address of the register that calls the function is not 32'h10086007, the actual address of the register is assigned to the corresponding transaction.

6. UVM register model address randomization method according to claim 5, characterized in that: In the step (3), the random address random_addr is passed into the UVM verification platform as follows: first, the random address random_addr is defined in the global config of the verification platform, and then the random address random_addr is passed to the reg2bus function in the adapter through config_db.

7. UVM register model address randomization device, characterized in that: include: A register construction module configured to construct a random address register random_addr_reg in a register model reg_model; Define the transfer module, whose configuration defines the random address random_addr in the global configuration config, and then transfers the randomized random_addr to the converter adapter by configuring the database config_db; The replacement module is configured to construct the register to bus reg2bus function in the adapter. When the write function is called with the random_addr_reg register in the sequence sequence for write operation, when its fixed address 32'h10086007 is passed to the adapter to construct the reg2bus function, it is replaced by the random_addr passed in from the global address, and finally passed to the random address of the design dut under test after randomization.

8. UVM register model address randomization device according to claim 7, characterized in that: In the register construction module, a random_addr_reg class is derived from the UVM register uvm_reg, and then a random_addr domain is declared; in the new function new, the width 32 of the random_addr_reg register is passed as a parameter to the super.new function, and another parameter in super.new selects NO_COVERAGE; in the creation build(), the new function new is created and assigned a value; after the random_addr_reg register is defined, the random_addr_reg register is instantiated in a class reg_model derived from the UVM register block uvm_reg_block; in the definition, the previously instantiated register random_addr is added to the fixed address 32'h10086007 in the second parameter of the addr_reg function in build().

9. UVM register model address randomization device according to claim 8, characterized in that: In the definition transfer module, the structure of the reg2bus function of the adapter in the UVM verification platform is: use the if_else statement in the assignment process of addr, if the address of the register calling the function is 32'h10086007, then addr_random is assigned to the transaction transaction to be driven by the driver driver; if the address of the register calling the function is not 32'h10086007, then the actual address of the register is assigned to the corresponding transaction.

10. The UVM register model address randomization device according to claim 9, characterized in that: In the replacement module, the random address random_addr is passed in the UVM verification platform as follows: first, the random address random_addr is defined in the global config of the verification platform, and then the random address random_addr is passed to the reg2bus function in the adapter by means of config_db.

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