Construction method, device and equipment of interconnection network dominating set and readable storage medium

Abstract

The invention discloses a construction method, device and equipment of an interconnection network dominating set and a readable storage medium, and relates to the technical field of computers. The construction method of the interconnection network dominating set comprises the steps that an initial folding segmentation and exchange cube network (FDSC2) is constructed, the dimension n of a target folding segmentation and exchange cube network (FDSCn) is obtained, n = 2d, and d is larger than or equal to 1; according to the dimension n of the target folding segmentation and exchange cube network (FDSCn), constructing the target folding segmentation and exchange cube network (FDSCn) by using the plurality of initial folding segmentation and exchange cube networks (FDSC2); a first processor node is extracted from each initial folding partition and exchange cube network (FDSC2) included in a target folding partition and exchange cube network (FDSCn) to form a dominating set of the target folding partition and exchange cube network (FDSCn). According to the scheme, the resource utilization rate of the interconnection network is improved, and the overall stability of the interconnection network is also improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a method, device, equipment and readable storage medium for constructing an interconnection network dominating set. Background Art

[0002] A high-performance parallel computer is a computer system. As the performance of computer systems continues to improve, the number of processors it has is increasing. A network that connects several processors in a specific way is called an interconnection network. An interconnection network can be represented by a simple graph G = (V, E), where V(G) represents the set of processor nodes in the graph and E(G) represents the edge set. The processor nodes in the graph G represent the processor nodes in the interconnection network, and the edges represent the connection links between the processor nodes.

[0003] The dominating set of an interconnected network can be used to optimize resource allocation. When resources are limited, the dominating set can be used to optimize resource allocation. The system can reasonably allocate resources based on the resource requirements of the nodes in the dominating set to ensure that key nodes (processor nodes in the dominating set) or tasks receive sufficient resource support. This optimized allocation can improve resource utilization, reduce resource waste, and improve the overall performance of the system.

[0004] The dominating set of an interconnected network can also be used for load balancing. In distributed systems, load balancing can be achieved through the dominating set. The system can dynamically adjust the allocation of resources based on the load of the nodes in the dominating set to ensure that the load of each node is balanced. This helps to avoid the situation where some nodes are overloaded while other nodes are idle, thereby improving the overall efficiency and stability of the system. The dominating set strategy has important application prospects in the fields of cloud computing and the Internet of Things.

[0005] There is currently no folded divide-and-swap cube (FDSC) network. n ) is a method for constructing dominating sets on . Summary of the invention

[0006] The object of the present invention is to provide a method, device, apparatus and readable storage medium for constructing an interconnection network dominating set by using a folded partitioning and switching cube network (FDSC) n ) to understand the resource demand and load conditions of each processor node, so as to optimize the resource allocation and load balancing of each processor node, which not only improves the resource utilization but also improves the overall stability of the system.

[0007] In order to achieve the above object, the present invention provides the following technical solutions:

[0008] In a first aspect, the present invention provides a method for constructing a dominating set of an interconnection network, wherein the interconnection network is a folded partition and switched cube network (FDSC) n ), the interconnection network is a network obtained by connecting several processors in a specific manner, and the method includes:

[0009] Construct the initial folding segmentation and exchange cube network (FDSC2) and obtain the target folding segmentation and exchange cube network (FDSC n ) dimension n, where n = 2 d And d ≥ 1;

[0010] According to the objective folding split and exchange cube network (FDSC n ) dimension n, using several initial folding segmentation and exchange cube networks (FDSC2) to construct a target folding segmentation and exchange cube network (FDSC n );

[0011] From the objective folded split and exchange cube network (FDSC n ) contains the first processor node in each initial folding partitioning and switching cube network (FDSC2) to form the target folding partitioning and switching cube network (FDSC n )’s dominating set.

[0012] In some embodiments, the initial folding partitioning and switching cube network (FDSC2) includes four processors, and constructing the initial folding partitioning and switching cube network (FDSC2) includes:

[0013] According to the preset rules, create binary string identifiers of four processors;

[0014] The four processors are connected in pairs to obtain the initial folded partition and exchange cube network (FDSC2).

[0015] In some embodiments, according to a preset rule, binary string identifiers of four processors are created, including:

[0016] The first processor binary string identifier is denoted as μ1μ2, the second processor binary string identifier is denoted as μ1μ2, the third processor binary string identifier is denoted as μ1μ2, and the fourth processor binary string identifier is denoted as μ1μ2; among which μ1 is the complement of μ1, and μ2 is the complement of μ2.

[0017] In some embodiments, the FDSC n) dimension n, using several initial folding segmentation and exchange cube networks (FDSC2) to construct a target folding segmentation and exchange cube network (FDSC n ),include:

[0018] Determine whether n is equal to 2;

[0019] If n is equal to 2, the initial folded split and exchange cube network (FDSC2) is used as the target folded split and exchange cube network (FDSC n ).

[0020] In some embodiments, the method further comprises:

[0021] If n is greater than 2, let i = 2 and determine whether i is less than or equal to d, where d = log2n;

[0022] If i is less than or equal to d, use indivual Construct Will As the current transition fold split and exchange cube network, and increase the value of i by 1;

[0023] Repeat the step of determining whether i is less than or equal to d until i is greater than d.

[0024] In some embodiments, the method further comprises:

[0025] If i is greater than d, the transitional folded split and exchanged cube network is used as the target folded split and exchanged cube network (FDSC n ).

[0026] In a second aspect, the present invention further provides a device for constructing an interconnection network dominating set, the device comprising:

[0027] The network construction module is used to construct the initial folding segmentation and exchange cube network (FDSC2) and obtain the target folding segmentation and exchange cube network (FDSC n ) dimension n, where n = 2 d And d ≥ 1;

[0028] Network integration module for folding, splitting and exchanging cubic networks according to the target (FDSC n ) dimension n, using several initial folding segmentation and exchange cube networks (FDSC2) to construct a target folding segmentation and exchange cube network (FDSC n );

[0029] Set building module for folding segmentation and switching cube networks (FDSC n) contains the first processor node in each initial folding partitioning and switching cube network (FDSC2) to form the target folding partitioning and switching cube network (FDSC n )’s dominating set.

[0030] In a third aspect, the present invention further provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the method for constructing an interconnection network dominating set provided in the first aspect is implemented.

[0031] In a fourth aspect, the present invention further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the method for constructing an interconnection network dominating set provided in the first aspect is implemented.

[0032] In a fifth aspect, the present invention further provides a computer program product, comprising a computer program, which, when executed by a processor, implements the method for constructing an interconnection network dominating set provided in the first aspect.

[0033] The beneficial effects of the present invention are:

[0034] First, we construct an initial folding segmentation and exchange cube network (FDSC2), that is, a folding segmentation and exchange cube network with a dimension of 2, and then use several initial folding segmentation and exchange cube networks (FDSC2) to construct a target folding segmentation and exchange cube network (FDSC n ), and finally from the target folded segmentation and exchange cube network (FDSC n ) contains the first processor node in each initial folding partitioning and switching cube network (FDSC2) to form the target folding partitioning and switching cube network (FDSC n ), so that the dominating set contains the target folded partition and exchange cube network (FDSC n ) contains all the processor nodes of the initial folding partition and exchange cube network (FDSC2), and since each processor node in the initial folding partition and exchange cube network (FDSC2) is interconnected, the target folding partition and exchange cube network (FDSC2) can be mastered through the dominating set. n ) can understand the resource demand and load conditions of all processor nodes in the system, thereby optimizing resource allocation and load balancing for each processor node, which not only improves resource utilization but also improves the overall stability of the system.

[0035] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention and implement it according to the contents of the specification, the following is a detailed description of the preferred embodiments of the present invention in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A schematic diagram of the structure of a four-dimensional partitioning and switching cube network (DSC4) according to an embodiment of the present invention;

[0037] Figure 2 A schematic diagram of the structure of a four-dimensional folded partition and exchange cube network (FDSC4) according to an embodiment of the present invention;

[0038] Figure 3 A simple structural diagram of an interconnection network shown in one embodiment of the present invention;

[0039] Figure 4 A schematic diagram of a flow chart of a method for constructing an interconnection network dominating set according to an embodiment of the present invention;

[0040] Figure 5 A schematic diagram of the structure of an initial folding partitioning and switching cube network (FDSC2) shown in an embodiment of the present invention;

[0041] Figure 6 A schematic diagram of the structure of another four-dimensional folded partition and exchange cube network (FDSC4) shown in one embodiment of the present invention;

[0042] Figure 7 A schematic diagram of the structure of an eight-dimensional folded partition and exchange cube network (FDSC8) according to an embodiment of the present invention;

[0043] Figure 8 A schematic diagram of a flow chart of a method for constructing an initial folding, splitting and exchanging cube network according to an embodiment of the present invention;

[0044] Fig. 9 A schematic diagram of a flow chart of a method for constructing a target folding, segmenting and exchanging cube network according to an embodiment of the present invention;

[0045] Fig.10 A schematic diagram of a flow chart of another method for constructing an interconnection network dominating set according to an embodiment of the present invention;

[0046] Fig.11 A schematic diagram of the structure of a device for constructing an interconnection network dominating set according to an embodiment of the present invention;

[0047] Fig.12 A schematic diagram of the structure of another interconnection network dominating set construction device shown in an embodiment of the present invention;

[0048] Fig.13 A schematic diagram of the structure of an electronic device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0049] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0050] It should be noted that references to "one embodiment", "embodiment", "example embodiment", etc. in this specification refer to the embodiment being described which may include specific features, structures or characteristics, but not every embodiment must include these specific features, structures or characteristics. In addition, such expressions do not refer to the same embodiment. Furthermore, when describing specific features, structures or characteristics in conjunction with an embodiment, whether or not there is an explicit description, it is indicated that incorporating such features, structures or characteristics into other embodiments is within the knowledge of those skilled in the art.

[0051] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0052] In order to better understand the technical solution of the present application, the following first describes the Folded Split and Switched Cube Network (FDSC n ) is described and explained.

[0053] For integer n = 2 d and d ≥ 1, a divide-and-swap cube (DSC n Each processor node μ is represented by an n-bit binary string label, μ = μ1μ2...μ n (μ i ∈{0,1},1≤i≤n). For each 1≤k≤log2 n=d, the binary string label of the processor node μ can be divided into 3 parts, denoted as: μ=t1t2t3. Note that when k=1, then t3 is an empty string.

[0054] If d = 1, then n = 2 1 ,1≤k≤log2 n=1. t1=μ1, t2=μ2, μ=μ1μ2.

[0055] If d = 2, then n = 2 2=4, 1≤k≤log2 n=2.

[0056] When k=1, t1=μ1μ2, t2=μ3μ4, μ=μ1μ2μ3μ4.

[0057] When k=2, t1=μ1, t2=μ2, t3=μ3μ4, μ=μ1μ2μ3μ4.

[0058] A processor node w is adjacent to μ if and only if one of the following two conditions holds:

[0059] (1) in It is the complement of μ1 (0, 1 are complements of each other), and the edge between w and μ is called the e(1) edge.

[0060] (2) At this time, the edge between w and μ is called side.

[0061] like Figure 1 As shown, processor nodes 1110 and 0110 are different in the first digit of the processor node label, which meets condition 1. 1110 and 0110 are connected, and the edge between them is called e(1) edge.

[0062] When k = 1, t1 = μ1μ2, t2 = μ3μ4, μ = μ1μ2μ3μ4. For processor node μ = 1110, t1 = 11, t2 = 10. t1≠t2, so μ is connected to w = 1011. The edge between 1110 and 1011 is called the e(4) edge.

[0063] When k = 2, t1 = μ1, t2 = μ2, t3 = μ3μ4. For processor node μ = 1110, t1 = 1, t2 = 1, t3 = 10. t1 = t2, so μ is connected to w = 0010. The edge between 1110 and 0010 is called the e(2) edge.

[0064] The partitioning and swapping cube DSC(n) has 2 n processor nodes and 2 n-1 (d+1) edges, each processor node has d+1 neighbors, connected by d+1 edges. The d+1 edges are e(1) and Edge (1≤k≤d). For example, if d=2, then n=4, DSC n Each processor node in will be connected with one e(1) edge, one e(4) edge and one e(2) edge.

[0065] For integer n = 2 dand d ≥ 1, a folded divide and swap cube (FDSC n ) is in the Divide and Swap Cube (DSC n ) by adding an edge to each processor node. Folded Divide and Switch Cube (FDSC) n ) has 2 n processor nodes, for each processor node μ = μ1μ2...μ n , add an edge connection At this time, the edge between w and μ is called the e(f) edge.

[0066] like Figure 2 As shown, in FDSC4, for processor node 1110, it has one more e(f) edge connected to processor node 1010.

[0067] Let all e(i) edges be E i , FDSC n It has the following properties:

[0068] (1)FDSC n It is the d+2 rule.

[0069] (2)FDSC n The number of processor nodes is 2 n , the number of sides is 2 n-1 (d+2)

[0070] (3)FDSC n Can be divided into indivual

[0071] (4)|E1|=|E2|=|E4|=...=|E n |=|E f |=2 n-1

[0072] like Figure 3 As shown, given an interconnection network represented by a simple graph G = (V, E), where V is the set of processor nodes and E is the edge set, a subset S of V is called a dominating set if and only if for any point v in VS, there is a point u in S such that (u, v)∈E. Figure 3 In , the dominating set can be S = {v4,v6}.

[0073] In some embodiments, Figure 4 As shown in the figure, a method for constructing a dominating set of an interconnection network is provided, and the interconnection network is a folded partition and switched cube network (FDSC) n ), the interconnection network is a network obtained by connecting several processors in a specific manner, and the method includes:

[0074] S101, construct an initial folding segmentation and exchange cube network (FDSC2), and obtain a target folding segmentation and exchange cube network (FDSC n ) dimension n.

[0075] Where n = 2 d And d ≥ 1, the initial folding partition and exchange cube network is a 2-dimensional folding partition and exchange cube network, and the target folding partition and exchange cube network is an n-dimensional folding partition and exchange cube network.

[0076] Specifically, the four processor nodes are connected to each other and symbolic identifiers are created for each of the four processor nodes, thus completing the creation of the initial folding partitioning and switching cube network (FDSC2). In addition, the manually uploaded target folding partitioning and switching cube network (FDSC n ) dimension n.

[0077] S102, according to the target folding, splitting and exchanging cube network (FDSC n ) dimension n, using several initial folding segmentation and exchange cube networks (FDSC2) to construct a target folding segmentation and exchange cube network (FDSC n ).

[0078] Specifically, the target folding, splitting and switching cube network (FDSC n ) dimension n to calculate the target folded segmentation and exchange cube network (FDSC n ) contains the number of initial folding partitions and exchange cube networks (FDSC2), and then the corresponding number of initial folding partitions and exchange cube networks (FDSC2) are connected to each other to obtain the target folding partition and exchange cube network (FDSC n ).

[0079] S103, from the target folded segmentation and exchange cube network (FDSC n ) contains the first processor node in each initial folding partitioning and switching cube network (FDSC2) to form the target folding partitioning and switching cube network (FDSC n )’s dominating set.

[0080] Specifically, each initial folding partitioning and switching cube network (FDSC2) includes four processor nodes, and any one processor node is selected from the four processor nodes; the target folding partitioning and switching cube network (FDSC n) contains several initial folding partitioning and switching cube networks (FDSC2). According to the same method, the first processor node is extracted from each initial folding partitioning and switching cube network (FDSC2). The set of these processor nodes is recorded as the target folding partitioning and switching cube network (FDSC n )’s dominating set.

[0081] For example, when n=2, Figure 5 As shown, the processor nodes of the FDSC2 network are 00, 10, 11, and 01, respectively, that is, the processor node set of the FDSC2 network is {00, 10, 11, 01}. At this time, the dominating set of the FDSC2 network can be S = {00};

[0082] When n = 4, Figure 6 As shown, a FDSC4 network is composed of four FDSC2s, and the processor node sets of these four FDSC2s are:

[0083] {0000,0100,1000,1100}, {0001,0101,1001,1101}, {0010,0110,1010,1110}, {0011,0111,1011,1111}. In each FDSC2, take the first processor node and put it into the set S. Finally, the dominating set of the FDSC4 network is S = {0000,0001,0010,0011}.

[0084] Similarly, when n = 8, Figure 7 As shown, 64 FDSC2s form an FDSC8 network. The processor node sets of these 64 FDSC2s are:

[0085] {00000000,01000000,10000000,11000000},{00010000,01010000,10010000,11010000},{00100000,01100000,10100000,11100000},{00110000,01110000,10110000,11110000},{00000001,01000001,10000001,11000001},{00010001,01010001,10010001,11010001},{00100001,01100001,10100001,11100001},{00110001,01110001,10110001,11110001},{00000010,01000010,10000010,11000010},{00010010,01010010,10010010,11010010},{00100010,01100010,10100010,11100010},{00110010,01110010,10110010,11110010},{00000011,01000011,10000011,11000011},{00010011,01010011,10010011,11010011},{00100011,01100011,10100011,11100011},{00110011,01110011,10110011,11110011},{00000100,01000100,10000100,11000100},{00010100,01010100,10010100,11010100},{00100100,01100100,10100100,11100100},{00110100,01110100,10110100,11110100},{00000101,01000101,10000101,11000101},{00010101,01010101,10010101,11010101},{00100101,01100101,10100101,11100101},{00110101,01110101,10110101,11110101},{00000110,01000110,10000110,11000110},{00010110,01010110,10010110,11010110},{00100110,01100110,10100110,11100110},{00110110,01110110,10110110,11110110},{00000111,01000111,10000111,11000111},{00010111,01010111,10010111,11010111},{00100111,01100111,10100111,11100111},{00110111,01110111,10110111,11110111},{00001000,01001000,10001000,11001000},{00011000,01011000,10011000,11011000},{00101000,01101000,10101000,11101000},{00111000,01111000,10111000,11111000},{00001001,01001001,10001001,11001001},{00011001,01011001,10011001,11011001},{00101001,01101001,10101001,11101001},{00111001,01111001,10111001,11111001},{00001010,01001010,10001010,11001010},{00011010,01011010,10011010,11011010},{00101010,01101010,10101010,11101010},{00111010,01111010,10111010,11111010},{00001011,01001011,10001011,11001011},{00011011,01011011,10011011,11011011},{00101011,01101011,10101011,11101011},{00111011,01111011,10111011,11111011},{00001100,01001100,10001100,11001100},{00011100,01011100,10011100,11011100},{00101100,01101100,10101100,11101100},{00111100,01111100,10111100,11111100},{00001101,01001101,10001101,11001101},{00011101,01011101,10011101,11011101},{00101101,01101101,10101101,11101101},{00111101,01111101,10111101,11111101},{00001110,01001110,10001110,11001110},{00011110,01011110,10011110,11011110},{00101110 ,01101110,10101110,11101110},{00111110,01111110,10111110,11111110},{00001111,01001111,10001111,11001111},{00011111,0101111,10011111,11011111},{00101111,01101111,10101111,11101111},{00111111,0111111,10111111,11111111}. In each FDSC2, take the first processor node and put it into the set S. Finally, the dominating set of the FDSC8 network is:

[0086] S={00000000,00010000,00100000,00110000,00000001,00010001,00100001,001100 01,00000010,00010010,00100010,00110010,00000011,00010011,00100011,0011001 1,00000100,00010100,00100100,00110100,00000101,00010101,00100101,00110101,00000110,00010110,00100110,00110110,00000111,00010111,00100111,00110111 ,00001000,00011000,00101000,00111000,00001001,00011001,00101001,00111001,00001010,00011010,00101010,00111010,00001011,00011011,00101011,00111011, 00001100,00011100,00101100,00111100,00001101,00011101,00101101,00111101,00001110,00011110,00101110,00111110,00001111,00011111,00101111,00111111}.

[0087] In the above embodiment, an initial folding partitioning and exchange cube network (FDSC2) is first constructed, that is, a folding partitioning and exchange cube network with a dimension of 2, and then a target folding partitioning and exchange cube network (FDSC n ), and finally from the target folded segmentation and exchange cube network (FDSC n ) contains the first processor node in each initial folding partitioning and switching cube network (FDSC2) to form the target folding partitioning and switching cube network (FDSC n ), so that the dominating set includes the processor nodes in each initial folding partition and switching cube network (FDSC2), and since each processor node in the initial folding partition and switching cube network (FDSC2) is interconnected, the dominating set can be used to grasp the target folding partition and switching cube network (FDSC n) can understand the resource demand and load conditions of each processor node in the system, thereby optimizing resource allocation and load balancing for each processor node, which not only improves resource utilization but also improves the overall stability of the system.

[0088] In other embodiments, Figure 8 As shown in FIG. 1 , the method for constructing the initial folded division and exchange cube network (FDSC2) is elaborated in detail, including:

[0089] S201, creating binary string identifiers of four processors according to preset rules.

[0090] Optionally, the first processor binary string identifier may be denoted as μ1μ2 and the second processor binary string identifier may be denoted as The third processor binary string identifier is denoted by The fourth processor binary string identifier is denoted by in, is the complement of μ1, It is the complement of μ2.

[0091] Exemplarily, each processor node μ is represented by an n-bit binary string label, μ=μ1μ2...μ n (μ i ∈{0,1},1≤i≤n). For each 1≤k≤log2 n=d, the binary string label of the processor node μ can be divided into 3 parts, denoted as: μ=t1t2t3. Note that when k=1, then t3 is an empty string.

[0092] If d = 1, then n = 2 1 ,1≤k≤log2 n=1. t1=μ1, t2=μ2, μ=μ1μ2.

[0093] If d = 2, then n = 2 2 =4, 1≤k≤log2 n=2.

[0094] When k=1, t1=μ1μ2, t2=μ3μ4, μ=μ1μ2μ3μ4.

[0095] When k=2, t1=μ1, t2=μ2, t3=μ3μ4, μ=μ1μ2μ3μ4.

[0096] A processor node w is adjacent to μ if and only if one of the following two conditions holds:

[0097] (1) in It is the complement of μ1 (0 and 1 are complements of each other).

[0098] (2)

[0099] That is, when n=2, the binary string identifiers of the four processors may be {00, 10, 11, 01}.

[0100] S202, connect the four processors in pairs to obtain an initial folded partition and exchange cube network (FDSC2).

[0101] Exemplarily, when the binary strings of the four processors are identified as {00, 10, 11, 01}, 00 is connected to 10, 00 is connected to 11, 00 is connected to 01, 10 is connected to 11, 10 is connected to 01, and 11 is connected to 01, thus completing the connection between the four processors in pairs. The constructed network is recorded as the initial folded partition and switch cube network (FDSC2).

[0102] In the above embodiment, a binary string identifier of each processor is first created, and then each processor node is connected to each other, so that any processor node can grasp the resource demand and load conditions of each processor node in the initial folding partitioning and switching cube network (FDSC2), which greatly improves the convenience of obtaining the resource demand and load conditions of each processor node.

[0103] In another embodiment, Fig. 9 As shown in the figure, the folded segmentation and exchange cube network (FDSC) is elaborated in detail. n ) dimension n, using several initial folding segmentation and exchange cube networks (FDSC2) to construct a target folding segmentation and exchange cube network (FDSC n ), the specific methods include:

[0104] S301, start.

[0105] S302, determine whether n is equal to 2; if so, execute S303, if not, execute S304.

[0106] S303, the initial folded segmentation and exchange cube network (FDSC2) is used as the target folded segmentation and exchange cube network (FDSC n ).

[0107] S304, let i=2.

[0108] S305 determines whether i is less than or equal to d, where d=log2n. If so, execute S306; if not, execute S307.

[0109] S306, use indivual Construct Will As the current transition folding split and exchange cube network, and increase the value of i by 1; re-execute S305.

[0110] S307, taking the transition folded segmentation and exchange cube network as the target folded segmentation and exchange cube network (FDSC n ).

[0111] For example, for the above steps S301-S307, after constructing the initial folding partitioning and switching cube network (FDSC2), the FDSC is then constructed. n If n=2, then directly return to FDSC2. If n>2, we loop through it. indivual Construct And FDSC2 is used as FDSC n Finally, in FDSC n Take the first processor node from each basic module and put it into the set S, then the set S is the target folding partitioning and switching cube network (FDSC n )’s dominating set.

[0112] The above process can be implemented based on a program algorithm. The program algorithms corresponding to some embodiments are as follows:

[0113]

[0114]

[0115] }

[0116] returnFDSCNetwork;

[0117] }

[0118] public static List <string>getFDSCDominationSet(intn){

[0119] List <string>dominationSet=newArrayList<>();

[0120] for(BaseModulemodule:copyBuildFDSC(n)){

[0121] / / Put the first processor node in the FDSC2 basic module into the dominating set

[0122] dominationSet.add(module.vertices.get(0));

[0123] }

[0124] System.out.println("\nPrint FDSC"+n+"Dominator set of the network: ");

[0125] for(Stringvertice:dominationSet)

[0126] System.out.print(vertice+",");

[0127] returndominationSet;

[0128] }

[0129] In the above-mentioned embodiment, no matter what the value of n is, the target folding segmentation and exchange cube network (FDSC n ), greatly increasing the construction target folded segmentation and exchange cube network (FDSC n ) convenience.

[0130] In order to more comprehensively demonstrate the present solution, this embodiment provides an optional method for constructing a dominating set of an interconnection network, such as Fig.10 As shown:

[0131] S401: Create binary string identifiers of four processors according to preset rules.

[0132] Specifically, the first processor binary string identifier is denoted as μ1μ2, the second processor binary string identifier is denoted as μ1μ2, the third processor binary string identifier is denoted as μ1μ2, and the fourth processor binary string identifier is denoted as μ1μ2; wherein μ1 is the complement of μ1, and μ2 is the complement of μ2.

[0133] S402, connect the four processors in pairs to obtain an initial folded partitioning and switching cube network (FDSC2).

[0134] S403, obtain the target folded segmentation and exchange cube network (FDSC n ) dimension n.

[0135] S404, determine whether n is equal to 2; if so, execute S405, if not, execute S406.

[0136] S405, if n is equal to 2, the initial folding partitioning and switching cube network (FDSC2) is used as the target folding partitioning and switching cube network (FDSC n ).

[0137] S406, let i=2.

[0138] S407, and determine whether i is less than or equal to d, where d=log2 n, if yes, execute S408, if not, execute S409.

[0139] S408, use indivual Construct Will As the current transition folding split and exchange cube network, and increase the value of i by 1; re-execute S407.

[0140] S409, the transition folded segmentation and exchange cube network target folded segmentation and exchange cube network (FDSC n ).

[0141] S410, from the target folded split and exchange cube network (FDSC n ) contains the first processor node in each initial folding partitioning and switching cube network (FDSC2) to form the target folding partitioning and switching cube network (FDSC n )’s dominating set.

[0142] The specific process of S401-S410 can refer to the description of the above method embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0143] Based on the same inventive concept, the embodiment of the present application also provides a device for constructing an interconnection network dominating set for implementing the method for constructing an interconnection network dominating set involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in the embodiments of one or more interconnection network dominating set construction devices provided below can refer to the limitations of the interconnection network dominating set construction method above, and will not be repeated here.

[0144] In one embodiment, Fig.11 As shown, a device for constructing an interconnection network dominating set is provided, the device comprising:

[0145] The network construction module 50 is used to construct an initial folding segmentation and exchange cube network (FDSC2) and obtain a target folding segmentation and exchange cube network (FDSC n ) dimension n, where n = 2 d And d ≥ 1;

[0146] The network integration module 51 is used to construct a target folding partitioning and switching cube network (FDSC n ) according to the dimension n of the target folding partitioning and switching cube network (FDSC n ) by using a plurality of initial folding partitioning and switching cube networks (FDSC 2 ) n );

[0147] The set building module 52 is used to generate a folded partitioning and switching cube network (FDSC) from the target n ) contains the first processor node in each initial folding partitioning and switching cube network (FDSC2) to form the target folding partitioning and switching cube network (FDSC n )’s dominating set.

[0148] In another embodiment, Fig.12 As shown above Fig.11 The network building module 50 comprises:

[0149] The identification creation unit 500 is used to create binary string identifications of four processors according to preset rules;

[0150] The network construction unit 501 is used to connect the four processors in pairs to obtain an initial folded partition and exchange cube network (FDSC2).

[0151] In another embodiment, the above Fig.12 The identification creation unit 500 in is specifically used for:

[0152] The first processor binary string identifier is denoted as μ1μ2, and the second processor binary string identifier is denoted as The third processor binary string identifier is denoted by The fourth processor binary string identifier is denoted by in, is the complement of μ1, It is the complement of μ2.

[0153] In another embodiment, the above Fig.11 The network integration module 51 is specifically used for:

[0154] Determine whether n is equal to 2;

[0155] If n is equal to 2, the initial folded split and exchange cube network (FDSC2) is used as the target folded split and exchange cube network (FDSC n );

[0156] If n is greater than 2, let i = 2 and determine whether i is less than or equal to d, where d = log2n;

[0157] If i is less than or equal to d, use indivual Construct Will As the current transition fold split and exchange cube network, and increase the value of i by 1;

[0158] Repeat the step of determining whether i is less than or equal to d until i is greater than d;

[0159] If i is greater than d, the transitional folded split and exchanged cube network is used as the target folded split and exchanged cube network (FDSC n ).

[0160] The present application also provides an electronic device, in some implementations, referring to Fig.13 As shown, the electronic device 700 includes an input unit 710, a memory 720, a processor 730, and an output unit 740. The memory 720 stores program instructions that can be run on the processor 730, and the processor 730 calls the program instructions to execute the construction method and / or technical solution based on the interconnection network dominating set in the above embodiment. The electronic device 700 can be a mobile terminal device such as a mobile phone, a computer, etc.

[0161] In addition, the embodiment of the present application also provides a computer-readable storage medium for storing a computer program for executing a method for constructing a dominating set of an interconnected network. For example, a computer program instruction, when executed by a computer, can call or provide a method and / or technical solution according to the present application through the operation of the computer. The program instruction for calling the method of the present application may be stored in a fixed or removable storage medium, and / or transmitted through a data stream in a broadcast or other signal-bearing medium and / or stored in a storage medium that runs according to the program instruction.

[0162] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, and optionally, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. In this way, the present application is not limited to any specific combination of hardware and software.

[0163] The technical features of the above embodiments may be arbitrarily integrated. To make the description concise, not all possible integrations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the integration of these technical features, they should be considered to be within the scope of this specification.

[0164] The above embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for those of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.< / string> < / string>

Claims

1. A method for constructing an interconnection network dominating set, characterized in that: The interconnection network is a folded divide and switch cube network (FDSC n ), the interconnection network is a network obtained by connecting a plurality of processors in a specific manner, and the method comprises: Construct the initial folding segmentation and exchange cube network (FDSC2) and obtain the target folding segmentation and exchange cube network (FDSC n ) dimension n, where n = 2 d And d ≥ 1; According to the objective Folding Split and Exchange Cube Network (FDSC n ) dimension n, using several initial folding partitioning and exchange cube networks (FDSC2) to construct the target folding partitioning and exchange cube network (FDSC n ); From the objective Folded Division and Exchange Cube Network (FDSC n ) contains each of the initial folding partitioning and switching cube networks (FDSC2) to extract the first processor node to form the target folding partitioning and switching cube network (FDSC n )’s dominating set.

2. The method for constructing an interconnection network dominating set according to claim 1, characterized in that: The initial folding segmentation and exchange cube network (FDSC2) includes four processors, and constructs the initial folding segmentation and exchange cube network (FDSC2), including: According to the preset rules, create binary string identifiers of four processors; The four processors are connected in pairs to obtain the initial folded partition and exchange cube network (FDSC2).

3. The method for constructing an interconnection network dominating set according to claim 2, characterized in that: The binary string identifiers of the four processors are created according to the preset rules, including: The first processor binary string identifier is denoted as μ1μ2, and the second processor binary string identifier is denoted as The third processor binary string identifier is denoted by The fourth processor binary string identifier is denoted by in, is the complement of μ1, It is the complement of μ2.

4. The method for constructing an interconnection network dominating set according to claim 1, characterized in that: According to the objective Folding Split and Exchange Cube Network (FDSC n ) dimension n, using several initial folding segmentation and exchange cube networks (FDSC2) to construct the target folding segmentation and exchange cube network (FDSC n ),include: Determine whether n is equal to 2; If n is equal to 2, the initial folded partitioning and exchange cube network (FDSC2) is used as the target folded partitioning and exchange cube network (FDSC n ).

5. The method for constructing an interconnection network dominating set according to claim 4, characterized in that: The method further comprises: If n is greater than 2, let i = 2 and determine whether i is less than or equal to d, where d = log2n; If i is less than or equal to d, use indivual Construct Will As the current transition fold split and exchange cube network, and increase the value of i by 1; Repeat the step of determining whether i is less than or equal to d until i is greater than d.

6. The method for constructing an interconnection network dominating set according to claim 5, characterized in that: The method further comprises: If i is greater than d, the transitional folded split and exchanged cube network is used as the target folded split and exchanged cube network (FDSC n ).

7. A device for constructing an interconnection network dominating set, characterized in that: The device comprises: The network construction module is used to construct the initial folding segmentation and exchange cube network (FDSC2) and obtain the target folding segmentation and exchange cube network (FDSC n ) dimension n, where n = 2 d And d ≥ 1; A network integration module is used to fold, split and exchange cubic networks (FDSC) according to the target n ) dimension n, using several initial folding segmentation and exchange cube networks (FDSC2) to construct the target folding segmentation and exchange cube network (FDSC n ); A collection building module for the target folded partitioning and switching cube network (FDSC n ) contains each of the initial folding partitioning and switching cube networks (FDSC2) to extract the first processor node to form the target folding partitioning and switching cube network (FDSC n )’s dominating set.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the method for constructing an interconnection network dominating set according to any one of claims 1 to 6 is implemented.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method for constructing an interconnection network dominating set according to any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the method for constructing an interconnection network dominating set according to any one of claims 1 to 6 is implemented.

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