Parameterized quantum circuit construction method and device, storage medium and computer equipment

Abstract

According to the parameterized quantum circuit construction method and device, the storage medium and the computer equipment provided by the invention, the depth of the variational circuit and the number of required quantum bits are reduced by using the unitary matrix linear combination, so that any target quantum state is effectively constructed, the training parameter quantity is reduced, the efficiency and accuracy of the variational sub-algorithm are optimized, and the application prospect is wide. The practicability of the algorithm under limited quantum resources is improved; moreover, the method is especially suitable for medium-scale quantum (NISQ) equipment with noise, and can solve the problem that the application of the prior art on the NISQ equipment is limited by proposing a circuit design with lower depth and quantum bit number, for example, the method can efficiently solve VQA problems such as quantum state learning and Hamiltonian ground state solution on the quantum equipment, and can improve the efficiency of the NISQ equipment. And a new way is opened up for practical application in the fields of quantum chemistry and the like.

Description

Technical Field

[0001] The present application relates to the field of quantum computing technology, and in particular to a parameterized quantum circuit construction method, device, storage medium and computer equipment. Background Art

[0002] With the advent of the era of big data and AI, the increasing demand for classical computing resources poses an insurmountable difficulty for existing computing frameworks. When studying problems in physics, chemistry and other disciplines, the computing resources required usually grow exponentially as the scale of the problem increases. Even with the most advanced algorithms and supercomputers, it is difficult to solve such problems. The extremely high computing costs required to simulate large-scale quantum systems or solve large-scale linear algebra problems have become a bottleneck for classical computers. Quantum computing, because it is based on the computing principles of quantum mechanics, has potential acceleration capabilities in computing power compared to classical computing frameworks, and is expected to be a solution to break through the bottleneck of classical computer capabilities.

[0003] At present, noisy intermediate-scale quantum (NISQ) devices are considered to have great application potential. Variational quantum algorithms (VQA) that perform classical-quantum hybrids on such devices have opened up new ways to solve the above problems. VQA refers to a type of algorithm that builds parameterized quantum circuits (PQC) on quantum devices and uses classical computers to optimize the parameters in the circuits to complete tasks such as optimization or machine learning. For example, in the fields of physics and chemistry, the variational quantum eigensolver (VQE) is used to calculate the ground state energy of molecules and then study their physical and chemical properties; in the fields of applied mathematics and theoretical computer science, the quantum approximate optimization algorithm (QAOA) is used to find the optimal object in a finite set.

[0004] Among them, the specific structure of PQC has a decisive influence on the performance of VQA: from the perspective of problem solving, PQC affects both the convergence speed of the algorithm and the accuracy of the output results; from the perspective of quantum hardware execution, deeper circuits are more susceptible to interference from NISQ device noise and errors, and too many parameters are difficult to optimize, and the construction cost of some PQCs is also high. Given the characteristics of the data generated by real physical systems, satisfactory results can be obtained even with simpler models. In addition, in large-scale situations, deeper PQCs will cause barren plateaus (BP), that is, random initialization of PQC will cause exponentially small loss function gradients on large-scale problems, resulting in a sharp decrease in the efficiency of gradient estimation, and gradient descent algorithms are difficult to perform.

[0005] Therefore, designing a PQC with few parameters, shallow circuits, low construction cost, but able to effectively complete common tasks at this stage is of great significance for improving the accuracy and efficiency of VQA and further exploring related issues in various fields. Summary of the invention

[0006] The purpose of this application is to solve at least one of the above-mentioned technical defects, especially the technical defects of the prior art that the PQC has many parameters, deep circuits, and high construction costs, which in turn lead to low accuracy and efficiency of VQA.

[0007] The present application provides a parameterized quantum circuit construction method, the method comprising:

[0008] Determine a blank parameterized quantum circuit of 3N qubits, and determine a first parameterized circuit template, a second parameterized circuit template, and at least one parameterized multi-qubit controlled gate;

[0009] After applying the first parameterized circuit template to the first N quantum bits of the blank parameterized quantum circuit, a first quantum circuit is obtained;

[0010] After at least one of the parameterized multi-qubit controlled gates is applied to the first quantum circuit, a second quantum circuit is obtained, wherein the first N qubits in the first quantum circuit are control circuits and the last 2N qubits are controlled circuits;

[0011] After applying the second parameterized circuit template to the first N quantum bits of the second quantum circuit, an initial quantum circuit is obtained;

[0012] After running the initial quantum circuit, an operation result is obtained, and the initial quantum circuit is optimized according to the operation result until a preset optimization target is reached, thereby obtaining a target quantum circuit.

[0013] Optionally, the step of obtaining an operation result after running the initial quantum circuit and optimizing the initial quantum circuit according to the operation result until a preset optimization target is reached to obtain a target quantum circuit includes:

[0014] After running the initial quantum circuit, calculating the loss function value of the initial quantum circuit;

[0015] Comparing the loss function value with a preset function threshold;

[0016] If the loss function value is less than the preset function threshold, the initial quantum circuit is used as the target quantum circuit;

[0017] If the loss function value is not less than the preset function threshold, the initial quantum circuit continues to be optimized until a preset optimization target is reached, thereby obtaining a target quantum circuit.

[0018] Optionally, the adaptive serial number of the parameterized multi-qubit controlled gate is positively correlated with the number of iterations, and each adaptive serial number corresponds to an activated state of a control bit;

[0019] The step of continuing to optimize the initial quantum circuit until a preset optimization target is reached to obtain a target quantum circuit includes:

[0020] Determine a corresponding adaptive serial number according to the current number of iterations, and determine a corresponding number of parameterized multi-qubit controlled gates according to the adaptive serial number;

[0021] After replacing the blank parameterized quantum circuit with the initial quantum circuit, the first parameterized circuit template, the second parameterized circuit template, and the parameters in each parameterized multi-qubit controlled gate are updated using a preset iterative algorithm, and the first parameterized circuit template is applied to the first N qubits of the blank parameterized quantum circuit to obtain a first quantum circuit and subsequent steps thereof, until the number of the adaptive sequence number reaches a preset sequence number threshold, thereby obtaining a target quantum circuit.

[0022] Optionally, the first parameterized circuit template and the second parameterized circuit template are any one of a direct product parameterized circuit template, an alternating layered circuit template, and a hardware efficient circuit template.

[0023] Optionally, the second parameterized circuit template is a conjugate transpose of the first parameterized circuit template.

[0024] The present application also provides a parameterized quantum circuit construction device, comprising:

[0025] A circuit determination module, used to determine a blank parameterized quantum circuit of 3N quantum bits, and to determine a first parameterized circuit template, a second parameterized circuit template, and at least one parameterized multi-qubit controlled gate;

[0026] A first action module, configured to obtain a first quantum circuit by applying the first parameterized circuit template to the first N quantum bits of the blank parameterized quantum circuit;

[0027] A second action module is used to act on at least one of the parameterized multi-qubit controlled gates on the first quantum circuit to obtain a second quantum circuit, wherein the first N qubits in the first quantum circuit are control circuits and the last 2N qubits are controlled circuits;

[0028] A third action module is used to apply the second parameterized circuit template to the first N quantum bits of the second quantum circuit to obtain an initial quantum circuit;

[0029] The circuit optimization module is used to obtain an operation result after running the initial quantum circuit, and optimize the initial quantum circuit according to the operation result until a preset optimization target is reached, thereby obtaining a target quantum circuit.

[0030] Optionally, the circuit optimization module includes:

[0031] A loss function calculation module, used to calculate the loss function value of the initial quantum circuit after running the initial quantum circuit;

[0032] A function value comparison module, used to compare the loss function value with a preset function threshold;

[0033] A quantum circuit determination module, configured to use the initial quantum circuit as a target quantum circuit if the loss function value is less than the preset function threshold;

[0034] The iterative optimization module is used to continue optimizing the initial quantum circuit if the loss function value is not less than the preset function threshold, until a preset optimization target is reached, thereby obtaining a target quantum circuit.

[0035] Optionally, the adaptive serial number of the parameterized multi-qubit controlled gate is positively correlated with the number of iterations, and each adaptive serial number corresponds to an activated state of a control bit;

[0036] The iterative optimization module comprises:

[0037] An adaptive sequence number updating module, used to determine a corresponding adaptive sequence number according to a current number of iterations, and to determine a corresponding number of parameterized multi-qubit controlled gates according to the adaptive sequence number;

[0038] A parameter updating module is used to replace the blank parameterized quantum circuit with the initial quantum circuit, update the parameters in the first parameterized circuit template, the second parameterized circuit template and each parameterized multi-qubit controlled gate by using a preset iterative algorithm, and return to execute the first parameterized circuit template on the first N qubits of the blank parameterized quantum circuit to obtain a first quantum circuit and subsequent steps, until the number of the adaptive sequence number reaches a preset sequence number threshold, and obtain a target quantum circuit.

[0039] The present application also provides a computer-readable storage medium, in which computer-readable instructions are stored. When the computer-readable instructions are executed by one or more processors, the one or more processors execute the steps of the parameterized quantum circuit construction method as described in any one of the above embodiments.

[0040] The present application also provides a computer device, comprising: one or more processors, and a memory;

[0041] The memory stores computer-readable instructions, and when the computer-readable instructions are executed by the one or more processors, the steps of the parameterized quantum circuit construction method described in any one of the above embodiments are performed.

[0042] It can be seen from the above technical solutions that the embodiments of the present application have the following advantages:

[0043] The parameterized quantum circuit construction method, device, storage medium and computer equipment provided by the present application, after determining a blank parameterized quantum circuit of 3N quantum bits, and determining a first parameterized circuit template, a second parameterized circuit template and at least one parameterized multi-qubit controlled gate, the first parameterized circuit template can be applied to the first N quantum bits of the blank parameterized quantum circuit to obtain a first quantum circuit; then, after applying at least one of the parameterized multi-qubit controlled gates to the first quantum circuit, a second quantum circuit is obtained, wherein the first N quantum bits in the first quantum circuit are control circuits and the last 2N quantum bits are controlled circuits, so that a unitary matrix linear combination, referred to as LCU (Linear Combination of Unitaries) architecture can be constructed; then, after applying the second parameterized circuit template to the first N quantum bits of the second quantum circuit, an initial quantum circuit is obtained, and the initial quantum circuit is run to obtain an operation result, and finally, the initial quantum circuit is optimized according to the operation result until a preset optimization target is reached, thereby obtaining a target quantum circuit. This application utilizes linear combinations of unitary matrices to reduce the depth of variational circuits and the number of quantum bits required, thereby effectively constructing arbitrary target quantum states, reducing the amount of training parameters, and optimizing the efficiency and accuracy of variational quantum algorithms, thereby improving the practicality of the algorithm under limited quantum resources; moreover, this application is particularly suitable for noisy intermediate-scale quantum (NISQ) devices. By proposing a circuit design with low depth and number of quantum bits, the problem of limited application of prior art on NISQ devices can be solved. For example, this application can efficiently solve VQA problems such as quantum state learning and Hamiltonian ground state solution on quantum devices, thereby opening up new avenues for practical applications in fields such as quantum chemistry. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0045] Figure 1 A schematic diagram of a process for constructing a parameterized quantum circuit provided in an embodiment of the present application;

[0046] Figure 2 A schematic diagram of the process of iterative optimization of parameterized quantum circuits provided in an embodiment of the present application;

[0047] Figure 3 A schematic diagram of the structure of a parameterized quantum circuit provided in an embodiment of the present application;

[0048] Figure 4 A schematic diagram of the structure of a three-qubit PQC for learning Bell states constructed according to the construction method of the present application provided in an embodiment of the present application;

[0049] Figure 5 A comparison diagram of the convergence of the target quantum state learning gap using a universal two-qubit PQC and the PQC designed in the present application to learn the Bell state as an example provided in the embodiment of the present application;

[0050] Figure 6 A schematic diagram of the structure of a 6-qubit PQC constructed according to the present application for solving the ground state energy of a 4-qubit Ising model provided in an embodiment of the present application;

[0051] Figure 7 A schematic diagram of the structure of a one-layer linear entanglement circuit provided in an embodiment of the present application;

[0052] Figure 8 A schematic diagram of the structure of a quantum bit layer strong entanglement circuit provided in an embodiment of the present application;

[0053] Fig. 9 A comparison diagram of the convergence of the ground state energy of the Hamiltonian solved by three PQCs provided in the embodiments of the present application;

[0054] Fig.10 A schematic diagram of the structure of a parameterized quantum circuit construction device provided in an embodiment of the present application;

[0055] Fig.11 A schematic diagram of the internal structure of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0056] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0057] In one embodiment, Figure 1 As shown, Figure 1 A flow chart of a parameterized quantum circuit construction method provided in an embodiment of the present application; the present application provides a parameterized quantum circuit construction method, which may include:

[0058] S110: Determine a blank parameterized quantum circuit of 3N quantum bits, and determine a first parameterized circuit template, a second parameterized circuit template, and at least one parameterized multi-qubit controlled gate.

[0059] In this step, when constructing a parameterized quantum circuit, a blank parameterized quantum circuit of 3N quantum bits can be determined first, and then a first parameterized circuit template, a second parameterized circuit template, and at least one parameterized multi-qubit controlled gate can be determined. In this way, the first parameterized circuit template, the second parameterized circuit template, and at least one parameterized multi-qubit controlled gate can be sequentially applied to the blank parameterized quantum circuit to realize a set of linear combinations of arbitrary target quantum states.

[0060] It is understandable that in quantum computing, a quantum circuit is composed of a series of quantum gate operations, which are used to operate quantum bits to achieve specific computing tasks. A parameterized circuit template is a template that can construct a quantum circuit in a parameterized way. Parameterization means that the quantum gate operations in the circuit are controlled by some parameters, which can take values ​​within a certain range. By changing these parameters, the function and output of the quantum circuit can be adjusted.

[0061] Among them, the first parameterized circuit template and the second parameterized circuit template of the present application can be any one of a direct product parameterized circuit template, an alternating layered circuit template, and a hardware efficient circuit template. For the direct product parameterized circuit template, parameterization makes it possible to flexibly construct various quantum circuits. For example, in quantum machine learning applications, by adjusting parameters, quantum circuits can be adapted to different data and computing tasks; when simulating the quantum state of a molecule, by adjusting parameters, the circuit can better match the Hamiltonian structure of the molecule, thereby more accurately simulating the energy level and other properties of the molecule; in the task of quantum image classification, the direct product parameterized circuit template can adjust parameters according to the characteristics of the image data, thereby achieving classification of different image categories. The use of an alternating layered circuit template or a hardware efficient circuit template can make the parameterized quantum circuit adapt to a variety of different application scenarios.

[0062] Furthermore, the second parameterized circuit template of the present application can be the conjugate transpose of the first parameterized circuit template, which can reduce the amount of trainable parameters of the circuit. The controlled gate of the present application involves the control quantum bit and the target quantum bit, and the multi-qubit controlled gate is a quantum gate that performs control operations between multiple quantum bits. The parameterized multi-qubit controlled gate introduces parameterized characteristics into the multi-qubit controlled gate, which means that the present application can not only determine the operation of the target quantum bit according to the state of the control quantum bit, but also this operation can be finely adjusted through parameters.

[0063] For example, the parameterized multi-qubit controlled gate of the present application can be expressed as ,in is the adaptive sequence number, , serial number Indicates the active state of the control bit , The corresponding parameterized circuit template Parameters in arrive The training parameters Initialized to the parameter value optimized in the previous step, and Then it is randomly initialized in the feasible domain. Make continuous adjustments to optimize the constructed quantum circuit.

[0064] S120: After applying the first parameterized circuit template to the first N quantum bits of the blank parameterized quantum circuit, a first quantum circuit is obtained.

[0065] In this step, since the operation of quantum gates on different quantum bits or quantum bit groups is like building a complex machine, each quantum gate is a part. Through reasonable combination and sequence, an algorithm that realizes the advantage of quantum computing can be constructed. Therefore, after the present application determines the blank parameterized quantum circuit of 3N quantum bits and the first parameterized circuit template through S110, the first parameterized circuit template can be applied to the first N quantum bits of the blank parameterized quantum circuit to obtain the first quantum circuit.

[0066] For example, when a quantum gate acts on a single qubit, it is mainly used to change the quantum state of the qubit. For example, a rotation gate can be used to rotate the state of a qubit on the Bloch sphere. When a quantum gate acts on a group of qubits, such as a control-not (CNOT) gate, it is used to create entanglement between qubits. For two qubits, a CNOT gate uses the first qubit as the control bit and the second qubit as the target bit. When the control bit is This causes the two qubits to enter an entangled state, a key resource for quantum computing and quantum information processing that enables quantum systems to exhibit correlation properties that go beyond classical systems.

[0067] S130: After acting on at least one parameterized multi-qubit controlled gate on the first quantum circuit, a second quantum circuit is obtained.

[0068] In this step, after the first parameterized circuit template is applied to the first N quantum bits of the blank parameterized quantum circuit through S120 to obtain the first quantum circuit, the present application can also apply at least one parameterized multi-qubit controlled gate to the first quantum circuit to obtain a second quantum circuit, wherein the first N quantum bits in the first quantum circuit of the present application are the control circuit and the last 2N quantum bits are the controlled circuit.

[0069] It is understandable that when actually building large and complex quantum computing systems or quantum communication systems, the concepts of control bits and target bits can be expanded to control circuits and controlled circuits. This hierarchical architecture helps to better organize and understand the implementation of algorithms. For example, in quantum simulation algorithms, control circuits can be used to selectively activate different controlled circuits according to the stages and requirements of the simulation to simulate different parts of the quantum system, just like controlling the execution of different code blocks through conditional statements in classical computer programming, making the implementation of quantum algorithms more modular and easier to manage.

[0070] In the present application, the first N quantum bits in the first quantum circuit are used as the control circuit, and the last 2N quantum bits are used as the controlled circuit. Since the parameterized multi-qubit controlled gate introduces the parameterized characteristics into the multi-qubit controlled gate, the present application can act on at least one parameterized multi-qubit controlled gate on the first quantum circuit to obtain the second quantum circuit. When the initial quantum circuit is subsequently iteratively optimized, the parameters in the parameterized multi-qubit controlled gate can be updated, and the updated parameterized multi-qubit controlled gate can be applied to the iterated first quantum circuit to optimize the initial quantum circuit and obtain the final target quantum circuit.

[0071] In addition, after the present application applies at least one parameterized multi-qubit controlled gate to the first quantum circuit, an LCU structure can be constructed. The present application has no restrictions on the form of the control circuit gate of the LCU structure part, and other more general parameterized control circuit gates can be used to reduce the number of control bits, thereby optimizing the solution of larger-scale problems.

[0072] S140: After applying the second parameterized circuit template to the first N quantum bits of the second quantum circuit, an initial quantum circuit is obtained.

[0073] In this step, after obtaining the second quantum circuit by applying at least one parameterized multi-qubit controlled gate to the first quantum circuit in S130, the present application can also apply the second parameterized circuit template to the first N qubits of the second quantum circuit to obtain an initial quantum circuit, and then the present application can optimize and iterate the initial quantum circuit to obtain the final target quantum circuit.

[0074] S150: After running the initial quantum circuit, an operation result is obtained, and the initial quantum circuit is optimized according to the operation result until a preset optimization target is reached, thereby obtaining a target quantum circuit.

[0075] In this step, after the second parameterized circuit template is applied to the first N quantum bits of the second quantum circuit through S140, an initial quantum circuit is obtained. Then, the present application can run the initial quantum circuit to obtain an operation result, and optimize the initial quantum circuit according to the operation result until the initial quantum circuit is obtained after the second parameterized circuit template is applied to the first N quantum bits of the second quantum circuit.

[0076] In the above embodiment, after determining a blank parameterized quantum circuit of 3N quantum bits, and determining a first parameterized circuit template, a second parameterized circuit template, and at least one parameterized multi-qubit controlled gate, the first parameterized circuit template can be applied to the first N quantum bits of the blank parameterized quantum circuit to obtain a first quantum circuit; then, after applying at least one of the parameterized multi-qubit controlled gates to the first quantum circuit, a second quantum circuit is obtained, wherein the first N quantum bits in the first quantum circuit are control circuits and the last 2N quantum bits are controlled circuits, so that an LCU architecture can be formed; then, the present application applies a second parameterized circuit template to the first N quantum bits of the second quantum circuit to obtain an initial quantum circuit, and obtains an operation result after running the initial quantum circuit, and finally optimizes the initial quantum circuit according to the operation result until a preset optimization target is reached, thereby obtaining a target quantum circuit. The present application utilizes linear combinations of unitary matrices, namely LCUs, to reduce the depth of variational circuits and the number of required quantum bits, thereby effectively constructing arbitrary target quantum states, reducing the amount of training parameters, and optimizing the efficiency and accuracy of variational quantum algorithms, thereby improving the practicality of the algorithms under limited quantum resources. Moreover, the present application is particularly suitable for noisy intermediate-scale quantum (NISQ) devices. By proposing a circuit design with low depth and number of quantum bits, the problem of limited application of prior art on NISQ devices can be solved. For example, the present application can efficiently solve VQA problems such as quantum state learning and Hamiltonian ground state solution on quantum devices, thereby opening up new avenues for practical applications in fields such as quantum chemistry.

[0077] In one embodiment, in S150, after running the initial quantum circuit, obtaining an operation result, optimizing the initial quantum circuit according to the operation result until a preset optimization target is reached to obtain a target quantum circuit may include:

[0078] S151: After running the initial quantum circuit, calculating the loss function value of the initial quantum circuit.

[0079] S152: Compare the loss function value with a preset function threshold.

[0080] S153: If the loss function value is less than the preset function threshold, the initial quantum circuit is used as a target quantum circuit.

[0081] S154: If the loss function value is not less than the preset function threshold, continue to optimize the initial quantum circuit until a preset optimization target is reached, thereby obtaining a target quantum circuit.

[0082] In this embodiment, when the initial quantum circuit is iteratively optimized, the present application can calculate the loss function value of the initial quantum circuit after running the initial quantum circuit, so that the loss function value can be compared with the preset function threshold to determine the size between the loss function value and the preset function threshold. If the loss function value is less than the preset function threshold, it indicates that the current loss function value has reached the minimum function value. At this time, the entire process can be ended and the initial quantum circuit can be used as the target quantum circuit; and when the loss function value is not less than the preset function threshold, it indicates that the current loss function value has not reached the minimum function value. At this time, the initial quantum circuit can continue to be optimized until the preset optimization target is reached, and the final target quantum circuit can be obtained.

[0083] In one embodiment, the adaptive serial number of the parameterized multi-qubit controlled gate is positively correlated with the number of iterations, and each adaptive serial number corresponds to an activated state of a control bit.

[0084] In S154, the initial quantum circuit is continuously optimized until a preset optimization target is reached to obtain a target quantum circuit, which may include:

[0085] S1541: Determine a corresponding adaptive serial number according to the current number of iterations, and determine a corresponding number of parameterized multi-qubit controlled gates according to the adaptive serial number.

[0086] S1542: After replacing the blank parameterized quantum circuit with the initial quantum circuit, the first parameterized circuit template, the second parameterized circuit template, and the parameters in each parameterized multi-qubit controlled gate are updated using a preset iterative algorithm, and the first parameterized circuit template is applied to the first N qubits of the blank parameterized quantum circuit to obtain a first quantum circuit and subsequent steps thereof, until the number of the adaptive sequence number reaches a preset sequence number threshold, thereby obtaining a target quantum circuit.

[0087] In this embodiment, when the loss function value is not less than the preset function threshold, it indicates that the current loss function value has not reached the minimum function value. At this time, the initial quantum circuit can continue to be optimized until the preset optimization target is reached, and the final target quantum circuit can be obtained.

[0088] Specifically, when the present application continues to optimize the initial quantum circuit, since the parameterized multi-qubit controlled gate of the present application can be expressed as ,in is the adaptive sequence number, , which is positively correlated with the number of iterations. For example, you can set , and when it is the first iteration, you can set , in order to achieve the purpose of iterative optimization. And, since the serial number of this application Indicates the active state of the control bit , The corresponding parameterized circuit template Therefore, this application is to Make continuous adjustments to optimize the constructed quantum circuit.

[0089] In a specific implementation, when continuing to optimize the initial quantum circuit, the present application may first determine the corresponding adaptive serial number according to the current number of iterations, and then determine the corresponding number of parameterized multi-qubit controlled gates according to the adaptive serial number. Then, the present application may replace the blank parameterized quantum circuit during initial training with the current initial quantum circuit, and then use a preset iterative algorithm to update the parameters in the first parameterized circuit template, the second parameterized circuit template, and each parameterized multi-qubit controlled gate. For example, the present application may use a classical gradient descent or non-gradient method to update the parameters in the first parameterized circuit template, the second parameterized circuit template, and each parameterized multi-qubit controlled gate, and continue to execute the first parameterized circuit template on the first N quantum bits of the blank parameterized quantum circuit to obtain A first quantum circuit, after acting on at least one parameterized multi-qubit controlled gate on the first quantum circuit, a second quantum circuit is obtained, and after acting on the first N qubits of the second quantum circuit with a second parameterized circuit template, an initial quantum circuit is obtained, and then after running the initial quantum circuit again, a loss function value of the initial quantum circuit is calculated, and the loss function value is compared with a preset function threshold. If the loss function value is less than the preset function threshold, it indicates that the current loss function value has reached the minimum function value. At this time, the whole process can be ended and the initial quantum circuit can be used as a target quantum circuit; and when the loss function value is not less than the preset function threshold, it indicates that the current loss function value has not reached the minimum function value. At this time, the initial quantum circuit can continue to be optimized until the preset optimization target is reached, and the final target quantum circuit can be obtained.

[0090] Indicatively, if Figure 2 As shown, Figure 2 A schematic diagram of the process of iterative optimization of parameterized quantum circuits provided in an embodiment of the present application; Figure 2 In this application, the preset function threshold is first set to (like ), initialize the adaptive sequence number , construct the complete parameterized LCU structure through the following steps:

[0091] 1. Prepare a Blank PQC of qubits, select parameterized circuit template (like single-qubit rotating gate, etc.) On a quantum bit circuit, the vector Indicates the parameters in the corresponding circuit;

[0092] 2. Act in sequence Parameterized multi-qubit controlled gates corresponding to all adaptive numbers in to the whole In the circuit of quantum bits, The qubits are the control circuit, and the last 2 The qubits are controlled circuits for practical VQA implementation. In particular, for the direct product parameterized circuit template ,have:

[0093]

[0094]

[0095] in, .

[0096] 3. Select a parameterized circuit template And act in front qubits, where the vector Indicates the parameters in the corresponding circuit;

[0097] 4. Run the entire PQC to calculate the loss function and minimize the loss function value using classic gradient descent or non-gradient method until convergence. If , then stop the whole process; otherwise, , and return to step 1; record the current training parameter results ;

[0098] 5. Repeat the above steps until , to complete VQA under the LCU architecture. In special cases, you can set To limit the expressiveness of PQC, thereby increasing trainability;

[0099] 6. Finally, add the above steps after the quantum gate The PQC of the qubit is used as the output of this scheme.

[0100] Through the above method, we can get Figure 3 The parameterized quantum circuit shown, Figure 3 The 4-qubit PQC circuit template based on LCU is constructed with a parameterized controlled gate structure, where It is a parameterized circuit template. This application cleverly combines LCU technology with variational quantum circuits. The present invention can efficiently solve VQA problems such as quantum state learning and Hamiltonian ground state solution on quantum devices, opening up new avenues for practical applications in fields such as quantum chemistry. The core of this idea is to use unitary matrix linear combinations to reduce the depth of variational circuits and the number of quantum bits required, and probabilistically achieve a pure state decomposition of any target quantum state, namely:

[0101]

[0102] The above method can improve the practicality of the algorithm under limited quantum resources. At the same time, it can also introduce a preprocessing process based on classical computing to estimate the coupling strength between different systems of quantum states. According to the prior knowledge of the quantum system, the number of controlled parameterized gates can be reduced to accelerate the convergence of subsequent variational optimization. This method has taken an important step towards the industrial application of quantum computing technology.

[0103] The following will use Figure 3 The PQC constructed in this paper and the conventional parameterized quantum circuit respectively process the same VQA task, and compare the final experimental results to illustrate the effectiveness, versatility and accuracy of the PQC constructed in this scheme. Figure 4-Figure 9 Two typical cases are listed for this application. Figure 4 A schematic diagram of the structure of a three-qubit PQC for learning Bell states constructed according to the construction method of the present application provided in an embodiment of the present application, Figure 5 A comparison diagram of the convergence of the target quantum state learning gap using a universal two-qubit PQC and the PQC designed in this application to learn the Bell state as an example, provided in the embodiment of the present application, Figure 6 A schematic diagram of the structure of a 6-qubit PQC constructed according to the present application for solving the 4-qubit Isingmodel ground state energy provided in an embodiment of the present application, Figure 7 A schematic diagram of the structure of a linear entanglement circuit provided in an embodiment of the present application, Figure 8 This is a schematic diagram of the structure of a quantum bit layer strong entanglement circuit provided in an embodiment of the present application. Fig. 9 A comparison diagram of the convergence of the ground state energy of the Hamiltonian solved by three PQCs provided in the embodiments of the present application.

[0104] Depend on Figure 4 It can be seen that in Bell state As the target state to be learned, the single-qubit rotation gate As , the four universal single-qubit gates U3 are respectively , , , According to this application, a PQC acting on three quantum bits is constructed (a total of 14 parameters, the specific circuit is as follows Figure 4 The PQC is compared with a universal two-qubit PQC (15 parameters in total). The experimental results are shown in Figure 5 As shown, Figure 5 The horizontal axis in the middle represents the number of iterations, the vertical axis represents the gap between the target quantum state and the actual learned state, the blue dotted line represents the ideal gap of 0, the black line represents the result of learning using a universal two-qubit PQC, and the red line represents the learning result of the PQC constructed using the patent solution. It can be seen that the design of this application can achieve the effect of the universal quantum gate accurately learning the target quantum state with a small number of parameters, which shows that the circuit construction scheme designed by this application can not only use small-scale circuits to construct large-scale circuits, but also the constructed circuits are effective and low-cost.

[0105] Depend on Figure 6 It can be seen that this application takes the four-qubit Ising model selected as the Hamiltonian as an example, and transforms 16 single-qubit rotating gates ( ) PQC acting on six quantum bits according to the construction method of this application (a total of 16 parameters, the specific circuit is as follows Figure 6 As shown in the figure, the PQC is compared with the commonly used strongly entangled parameterized quantum circuit (complex entangled layer) and linear entangled template (linear entangled layer) (the two circuit examples are shown in the figure). Figure 7 and Figure 8 As shown in the figure), the number of parameters in the strongly entangled circuit used is 12, and the number of parameters in the linear entangled circuit is 16. The experimental results are shown in Fig. 9 As shown, Fig. 9 The horizontal axis represents the number of iterations, the vertical axis represents the expected value of the Hamiltonian, the blue dotted line represents the ground state energy of the Hamiltonian theory, the black line represents the calculation result using the strongly entangled circuit, the purple line represents the calculation result using the linear entangled circuit, and the red line represents the calculation result using the PQC constructed by the present application. It can be seen that under the premise of approximate parameter quantities, the design scheme of the present application converges faster, is closer to the theoretical value, and has higher accuracy, so the present application is practical.

[0106] The following describes a parameterized quantum circuit construction device provided in an embodiment of the present application. The parameterized quantum circuit construction device described below and the parameterized quantum circuit construction method described above can be referenced to each other.

[0107] In one embodiment, Fig.10 As shown, Fig.10 A schematic diagram of a structure of a parameterized quantum circuit construction device provided in an embodiment of the present application; the present application also provides a parameterized quantum circuit construction device, which may include a circuit determination module 210, a first action module 220, a second action module 230, a third action module 240, and a circuit optimization module 250, specifically including the following:

[0108] The circuit determination module 210 is used to determine a blank parameterized quantum circuit of 3N quantum bits, and to determine a first parameterized circuit template, a second parameterized circuit template, and at least one parameterized multi-qubit controlled gate.

[0109] The first action module 220 is used to obtain a first quantum circuit by applying the first parameterized circuit template to the first N quantum bits of the blank parameterized quantum circuit.

[0110] The second action module 230 is used to act on at least one of the parameterized multi-qubit controlled gates on the first quantum circuit to obtain a second quantum circuit, wherein the first N qubits in the first quantum circuit are control circuits and the last 2N qubits are controlled circuits.

[0111] The third action module 240 is used to apply the second parameterized circuit template to the first N quantum bits of the second quantum circuit to obtain an initial quantum circuit.

[0112] The circuit optimization module 250 is used to run the initial quantum circuit to obtain an operation result, and optimize the initial quantum circuit according to the operation result until a preset optimization target is reached to obtain a target quantum circuit.

[0113] In the above embodiment, after determining a blank parameterized quantum circuit of 3N quantum bits, and determining a first parameterized circuit template, a second parameterized circuit template, and at least one parameterized multi-qubit controlled gate, the first parameterized circuit template can be applied to the first N quantum bits of the blank parameterized quantum circuit to obtain a first quantum circuit; then, after applying at least one of the parameterized multi-qubit controlled gates to the first quantum circuit, a second quantum circuit is obtained, wherein the first N quantum bits in the first quantum circuit are control circuits and the last 2N quantum bits are controlled circuits, so that an LCU architecture can be formed; then, the present application applies a second parameterized circuit template to the first N quantum bits of the second quantum circuit to obtain an initial quantum circuit, and obtains an operation result after running the initial quantum circuit, and finally optimizes the initial quantum circuit according to the operation result until a preset optimization target is reached, thereby obtaining a target quantum circuit. This application utilizes linear combinations of unitary matrices to reduce the depth of variational circuits and the number of quantum bits required, thereby effectively constructing arbitrary target quantum states, reducing the amount of training parameters, and optimizing the efficiency and accuracy of variational quantum algorithms, thereby improving the practicality of the algorithm under limited quantum resources; moreover, this application is particularly suitable for noisy intermediate-scale quantum (NISQ) devices. By proposing a circuit design with low depth and number of quantum bits, the problem of limited application of prior art on NISQ devices can be solved. For example, this application can efficiently solve VQA problems such as quantum state learning and Hamiltonian ground state solution on quantum devices, thereby opening up new avenues for practical applications in fields such as quantum chemistry.

[0114] In one embodiment, the circuit optimization module 250 may include:

[0115] A loss function calculation module is used to calculate the loss function value of the initial quantum circuit after running the initial quantum circuit.

[0116] The function value comparison module is used to compare the loss function value with a preset function threshold.

[0117] The quantum circuit determination module is used to use the initial quantum circuit as a target quantum circuit if the loss function value is less than the preset function threshold.

[0118] The iterative optimization module is used to continue optimizing the initial quantum circuit if the loss function value is not less than the preset function threshold, until a preset optimization target is reached, thereby obtaining a target quantum circuit.

[0119] In one embodiment, the adaptive serial number of the parameterized multi-qubit controlled gate is positively correlated with the number of iterations, and each adaptive serial number corresponds to an activated state of a control bit.

[0120] The iterative optimization module may include:

[0121] The adaptive sequence number updating module is used to determine the corresponding adaptive sequence number according to the current number of iterations, and to determine the corresponding number of parameterized multi-qubit controlled gates according to the adaptive sequence number.

[0122] A parameter updating module is used to replace the blank parameterized quantum circuit with the initial quantum circuit, update the parameters in the first parameterized circuit template, the second parameterized circuit template and each parameterized multi-qubit controlled gate by using a preset iterative algorithm, and return to execute the first parameterized circuit template on the first N qubits of the blank parameterized quantum circuit to obtain a first quantum circuit and subsequent steps, until the number of the adaptive sequence number reaches a preset sequence number threshold, and obtain a target quantum circuit.

[0123] In one embodiment, the present application further provides a computer-readable storage medium, in which computer-readable instructions are stored. When the computer-readable instructions are executed by one or more processors, the one or more processors execute the steps of the parameterized quantum circuit construction method as described in any of the above embodiments.

[0124] In one embodiment, the present application also provides a computer device, including: one or more processors, and a memory.

[0125] The memory stores computer-readable instructions, and when the computer-readable instructions are executed by the one or more processors, the steps of the parameterized quantum circuit construction method described in any one of the above embodiments are performed.

[0126] Indicatively, Fig.11 As shown, Fig.11 This is a schematic diagram of the internal structure of a computer device provided in an embodiment of the present application. The computer device 300 may be provided as a server. Fig.11 The computer device 300 includes a processing component 302, which further includes one or more processors, and a memory resource represented by a memory 301 for storing instructions executable by the processing component 302, such as an application. The application stored in the memory 301 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 302 is configured to execute instructions to perform the parameterized quantum circuit construction method of any of the above embodiments.

[0127] The computer device 300 may further include a power supply component 303 configured to perform power management of the computer device 300, a wired or wireless network interface 304 configured to connect the computer device 300 to a network, and an input / output (I / O) interface 305. The computer device 300 may operate based on an operating system stored in the memory 301, such as Windows Server TM, Mac OS X TM, Unix TM, Linux TM, Free BSD TM, or the like.

[0128] Those skilled in the art will understand that Fig.11 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0129] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0130] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The various embodiments can be combined as needed, and the same or similar parts can refer to each other.

[0131] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for constructing a parameterized quantum circuit, characterized in that: The method comprises: Determine a blank parameterized quantum circuit of 3N qubits, and determine a first parameterized circuit template, a second parameterized circuit template, and at least one parameterized multi-qubit controlled gate; After applying the first parameterized circuit template to the first N quantum bits of the blank parameterized quantum circuit, a first quantum circuit is obtained; After at least one of the parameterized multi-qubit controlled gates is applied to the first quantum circuit, a second quantum circuit is obtained, wherein the first N qubits in the first quantum circuit are control circuits and the last 2N qubits are controlled circuits; After applying the second parameterized circuit template to the first N quantum bits of the second quantum circuit, an initial quantum circuit is obtained; After running the initial quantum circuit, an operation result is obtained, and the initial quantum circuit is optimized according to the operation result until a preset optimization target is reached, thereby obtaining a target quantum circuit.

2. The parameterized quantum circuit construction method according to claim 1, characterized in that: The step of obtaining an operation result after running the initial quantum circuit and optimizing the initial quantum circuit according to the operation result until a preset optimization target is reached to obtain a target quantum circuit includes: After running the initial quantum circuit, calculating the loss function value of the initial quantum circuit; Comparing the loss function value with a preset function threshold; If the loss function value is less than the preset function threshold, the initial quantum circuit is used as the target quantum circuit; If the loss function value is not less than the preset function threshold, the initial quantum circuit continues to be optimized until a preset optimization target is reached, thereby obtaining a target quantum circuit.

3. The parameterized quantum circuit construction method according to claim 2, characterized in that: The adaptive serial number of the parameterized multi-qubit controlled gate is positively correlated with the number of iterations, and each adaptive serial number corresponds to an activated state of a control bit; The step of continuing to optimize the initial quantum circuit until a preset optimization target is reached to obtain a target quantum circuit includes: Determine a corresponding adaptive serial number according to the current number of iterations, and determine a corresponding number of parameterized multi-qubit controlled gates according to the adaptive serial number; After replacing the blank parameterized quantum circuit with the initial quantum circuit, the first parameterized circuit template, the second parameterized circuit template, and the parameters in each parameterized multi-qubit controlled gate are updated using a preset iterative algorithm, and the first parameterized circuit template is applied to the first N qubits of the blank parameterized quantum circuit to obtain a first quantum circuit and subsequent steps thereof, until the number of the adaptive sequence number reaches a preset sequence number threshold, thereby obtaining a target quantum circuit.

4. The method for constructing a parameterized quantum circuit according to claim 1 or 2, characterized in that: The first parameterized circuit template and the second parameterized circuit template are any one of a direct product parameterized circuit template, an alternating layered circuit template, and a hardware efficient circuit template.

5. The method for constructing a parameterized quantum circuit according to claim 1 or 2, characterized in that: The second parameterized circuit template is a conjugate transpose of the first parameterized circuit template.

6. A parameterized quantum circuit construction device, characterized in that: include: A circuit determination module, used to determine a blank parameterized quantum circuit of 3N quantum bits, and to determine a first parameterized circuit template, a second parameterized circuit template, and at least one parameterized multi-qubit controlled gate; A first action module, configured to obtain a first quantum circuit by applying the first parameterized circuit template to the first N quantum bits of the blank parameterized quantum circuit; A second action module is used to act on at least one of the parameterized multi-qubit controlled gates on the first quantum circuit to obtain a second quantum circuit, wherein the first N qubits in the first quantum circuit are control circuits and the last 2N qubits are controlled circuits; A third action module, configured to apply the second parameterized circuit template to the first N quantum bits of the second quantum circuit to obtain an initial quantum circuit; The circuit optimization module is used to obtain an operation result after running the initial quantum circuit, and optimize the initial quantum circuit according to the operation result until a preset optimization target is reached, thereby obtaining a target quantum circuit.

7. The parameterized quantum circuit construction device according to claim 6, characterized in that: The circuit optimization module comprises: A loss function calculation module, used to calculate the loss function value of the initial quantum circuit after running the initial quantum circuit; A function value comparison module, used to compare the loss function value with a preset function threshold; A quantum circuit determination module, configured to use the initial quantum circuit as a target quantum circuit if the loss function value is less than the preset function threshold; The iterative optimization module is used to continue optimizing the initial quantum circuit if the loss function value is not less than the preset function threshold, until a preset optimization target is reached, thereby obtaining a target quantum circuit.

8. The parameterized quantum circuit construction device according to claim 7, characterized in that: The adaptive serial number of the parameterized multi-qubit controlled gate is positively correlated with the number of iterations, and each adaptive serial number corresponds to an activated state of a control bit; The iterative optimization module comprises: An adaptive sequence number updating module, used to determine a corresponding adaptive sequence number according to a current number of iterations, and to determine a corresponding number of parameterized multi-qubit controlled gates according to the adaptive sequence number; A parameter updating module is used to replace the blank parameterized quantum circuit with the initial quantum circuit, update the parameters in the first parameterized circuit template, the second parameterized circuit template and each parameterized multi-qubit controlled gate by using a preset iterative algorithm, and return to execute the first parameterized circuit template on the first N qubits of the blank parameterized quantum circuit to obtain a first quantum circuit and subsequent steps, until the number of the adaptive sequence number reaches a preset sequence number threshold, and obtain a target quantum circuit.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-readable instructions, and when the computer-readable instructions are executed by one or more processors, the one or more processors execute the steps of the parameterized quantum circuit construction method according to any one of claims 1 to 5.

10. A computer device, characterized in that: include: one or more processors, and memory; The memory stores computer-readable instructions, and when the computer-readable instructions are executed by the one or more processors, the steps of the parameterized quantum circuit construction method according to any one of claims 1 to 5 are performed.

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