Off-chip driver, pull-up driver, and pull-down driver

Abstract

The present disclosure provides an off-chip driver (OCD), a pull-up driver of the off-chip driver, and a pull-down driver of the off-chip driver. The pull-up driver comprises a main current source circuit and a main basic circuit. The main current source circuit is connected between the connection pad and the high reference voltage. The main current source circuit provides a main current value in response to a main control signal. The matched resistance value is associated with the main current value. A main base circuit is connected in parallel to the main current source circuit and determines a base value of the matched resistance value.

Description

Technical Field

[0001] The present disclosure relates to an off-chip driver and a driving circuit, and more particularly, to an off-chip driver, a pull-up driver, and a pull-down driver for providing matching resistance values. Background Art

[0002] Generally speaking, a semiconductor device (such as a memory device or a driver) needs to have a set resistance value to determine at least one operating parameter of the semiconductor device. The set resistance value is set by an external matching resistance value provided by an off-chip driver (OCD).

[0003] Figure 1 The figure shows an off-chip driver (OCD) and a semiconductor device. Figure 1 , OCD 10 is connected to semiconductor device SD through connection pad PDIO. OCD 10 includes pull-up drivers 11_1 to 11_3 and pull-down drivers 12_1 to 12_3. In response to control signal SUP1, pull-up driver 11_1 is turned on to provide a first pull-up resistance value. In response to control signal SUP2, pull-up driver 11_2 is turned on to provide a second pull-up resistance value. In response to control signal SUP3, pull-up driver 11_3 is turned on to provide a third pull-up resistance value. In response to control signal SDN1, pull-down driver 12_1 is turned on to provide a first pull-down resistance value. In response to control signal SDN2, pull-down driver 12_2 is turned on to provide a second pull-down resistance value. In response to control signal SDN3, pull-down driver 12_3 is turned on to provide a third pull-down resistance value. Therefore, OCD 10 provides matching resistance value MR on connection pad PDIO according to at least one resistance value from pull-up drivers 11_1 to 11_3 and pull-down drivers 12_1 to 12_3. Matching resistance value MR is set by an external device. Therefore, matching resistance value MR of OCD 10 matches semiconductor device SD or an external device.

[0004] In terms of mass production yield requirements, in order to solve the offset phenomenon in the wafer fabrication (fab) process, the OCD 10 needs to use more pull-up drivers and pull-down drivers in parallel to solve the offset phenomenon in the fab process. Therefore, the capacitance value on the connection pad PDIO will increase. The increased capacitance value can reduce the response speed of the semiconductor device SD. Summary of the invention

[0005] The present disclosure provides an off-chip driver (OCD) and a driving circuit. The OCD and the driving circuit provide matching resistance values ​​with a wide range and provide low capacitance values.

[0006] The present disclosure provides a pull-up driver for an off-chip driver (OCD) for providing a matching resistance value. The pull-up driver includes a main current source circuit and a main basic circuit. The main current source circuit is connected between a connection pad and a high reference voltage. The main current source circuit provides a main current value in response to a main control signal. The matching resistance value is associated with the main current value. The main basic circuit is connected in parallel to the main current source circuit and determines a basic value of the matching resistance value.

[0007] The present disclosure provides a pull-down driver for an off-chip driver (OCD) for providing a matching resistance value. The pull-down driver includes a main current source circuit and a main basic circuit. The main current source circuit is connected between a connection pad and a low reference voltage. The main current source circuit provides a main current value in response to a main control signal. The matching resistance value is associated with the main current value. The main basic circuit is connected in parallel to the main current source circuit and determines a basic value of the matching resistance value.

[0008] The present disclosure provides a driving circuit for providing a matching resistance value. The driving circuit includes an off-chip driver (OCD) and a control circuit. The OCD includes a connection pad and a pull-up driver. The pull-up driver is connected between the connection pad and a high reference voltage. The pull-up driver provides a main pull-up current value and determines a pull-up basic value of the matching resistance value in response to a main pull-up control signal. The matching resistance value is associated with the main pull-up current value. The control circuit is connected to the pull-up driver. The control circuit provides a main pull-up control signal to the pull-up driver in response to a command.

[0009] Based on the above, each of the OCD and the driving circuit provides a matching resistance value. Each of the OCD and the driving circuit adjusts the matching resistance value from a basic value according to the main current value. Therefore, the OCD and the driving circuit provide a matching resistance value with a wide range. The number of parallel connections of the pull-up driver and / or the pull-down circuit can be reduced. Therefore, the OCD and the driving circuit have a low capacitance value on the connection pad.

[0010] In order to make the above contents easier to understand, several embodiments accompanied by the drawings are described in detail below. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in and constitute a part of this specification. The accompanying drawings illustrate exemplary embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure.

[0012] Figure 1 An off-chip driver (OCD) and a semiconductor device are shown;

[0013] Figure 2 A schematic diagram showing a pull-up driver and a semiconductor device of an OCD according to an embodiment of the present disclosure;

[0014] Figure 3 A schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure;

[0015] Figure 4 A trend diagram showing matching resistance values ​​according to an embodiment of the present disclosure;

[0016] FIG. 5A to FIG. 5D A schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure;

[0017] Figure 6 A schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure;

[0018] 7A to 7H A schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure;

[0019] Figure 8 A schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure;

[0020] Fig. 9 A schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure;

[0021] Fig.10 A trend diagram showing matching resistance values ​​according to an embodiment of the present disclosure;

[0022] FIG. 11A to FIG. 11D A schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure;

[0023] Fig.12 A schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure;

[0024] FIG. 13A to FIG. 13H A schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure;

[0025] Fig.14 A schematic diagram of an OCD according to an embodiment of the present disclosure is shown.

[0026] Description of Reference Numerals

[0027] 10, 100, 300, 400, 600, 700: Off-chip drivers

[0028] 11_1, 11_2, 11_3, 110, 210, 310, 310A, 310B, 310C, 310D, 310E, 310F, 310G, 310H, 710: Pull-up driver

[0029] 12_1, 12_2, 12_3, 610A, 610B, 610C, 610D, 610E, 610F, 610G, 610H: Pull-down driver

[0030] 20: Driving circuit

[0031] 111, 411: Main current source circuit

[0032] 112, 412: Main basic circuit

[0033] 313, 613: Auxiliary current source circuit

[0034] 314, 614: Auxiliary basic circuit

[0035] 410, 510: Pull-down circuit / pull-down driver

[0036] 610, 720: Pull-down circuit

[0037] 800: Control circuit

[0038] 810, 820: switch control circuit

[0039] 830: Matching control circuit

[0040] BVN, BVP, BV_M: Basic values

[0041] BV_T: Auxiliary basic value / basic value

[0042] CMD: Command

[0043] DN_M: Main pull-down circuit

[0044] DN_T: Auxiliary pull-down circuit

[0045] PDIO: Connecting pads

[0046] PDN_M, PUP_M: Main switch signal

[0047] PDN_T, PUP_T: Auxiliary switch signal

[0048] PU_M: Main pull-up circuit

[0049] PU_T: Auxiliary pull-up circuit

[0050] MI_M, MI_MN, MI_MP: Main current value

[0051] MI_T: Auxiliary current value

[0052] MN <1> MN <2> ~MN <m>: Main pull-down switch

[0053] MN' <1> : Auxiliary pull-down switch

[0054] MNC, MPC: First main transistor

[0055] MNC', MPC': first auxiliary transistor

[0056] MND, MPD: Second main transistor

[0057] MND', MPD': Second auxiliary transistor

[0058] MP <1> 、MP <2> ~MP <n>: Main pull-up switch

[0059] MP' <1> : Auxiliary pull-up switch

[0060] MR: matching resistance value

[0061] RN, RN0, RN1, RN2, RP, RP0, RP1, RP2: Resistors

[0062] SD: Semiconductor Device

[0063] SDN1, SDN2, SDN3, SUP1, SUP2, SUP3: control signals

[0064] VCN_M, VCP_M: Main control signal

[0065] VCN_T, VCP_T: auxiliary control signal

[0066] VDD: High reference voltage

[0067] VSS: Low reference voltage DETAILED DESCRIPTION

[0068] The present disclosure may be understood by referring to the following detailed description in conjunction with the accompanying drawings set forth below. It should be noted that, for the sake of clarity of illustration and ease of understanding by the reader, the various drawings of the present disclosure illustrate a portion of an electronic device, and certain elements in the various drawings may not be drawn to scale. In addition, the number and size of each device shown in the drawings are merely illustrative and are not intended to limit the scope of the present disclosure.

[0069] Certain terms are used throughout the description and the appended claims to refer to specific components. As will be understood by those skilled in the art, electronic device manufacturers may use different names to refer to components. It is not intended herein to distinguish between components that have different names but the same function. In the following description and in the claims, the terms "include", "comprise", and "have" are used in an open-ended manner and should therefore be interpreted to mean "including but not limited to..." Therefore, when the terms "include", "comprises", and / or "have" are used in the description of the present disclosure, it will indicate the presence of corresponding features, regions, steps, operations, and / or components, but not limited to the presence of one or more corresponding features, regions, steps, operations, and / or components.

[0070] It should be understood that when an element is said to be "coupled to", "connected to" or "conducted to" another element, the element may be directly connected to the other element and a direct electrical connection may be established, or an intermediate element may exist between the element and the other element for relaying the electrical connection (indirect electrical connection). In contrast, when an element is said to be "directly coupled to", "directly conducted to" or "directly connected to" another element, there are no intermediate elements.

[0071] Figure 2 A schematic diagram showing a pull-up driver and a semiconductor device of an off-chip driver (OCD) according to an embodiment of the present disclosure is shown. Figure 2 In the present embodiment, the pull-up driver 110 of the OCD 100 provides a matching resistance value MR. The pull-up driver 110 provides a matching resistance value MR on the connection pad PDIO. The pull-up driver 110 is connected to a semiconductor device SD (e.g., a memory device or a driver) through the connection pad PDIO. The pull-up driver 110 includes a main current source circuit 111 and a main basic circuit 112. The main current source circuit 111 is connected between the connection pad PDIO and the high reference voltage VDD. The main current source circuit 111 provides a main current value MI_M in response to a main control signal VCP_M. The matching resistance value MR is associated with the main current value MI_M. The main basic circuit 112 is connected in parallel to the main current source circuit 111. In other words, the main basic circuit 112 is also connected between the connection pad PDIO and the high reference voltage VDD. The main basic circuit 112 determines the basic value BV_M of the matching resistance value MR.

[0072] In the present embodiment, before adjusting the matching resistance value MR, the matching resistance value MR is equal to the basic value BV_M. When the main current value MI_M is provided, the equivalent resistance value of the main current source circuit 111 decreases as the main current value MI_M increases. Therefore, the matching resistance value MR decreases from the basic value BV_M. The equivalent resistance value of the main current source circuit 111 increases as the main current value MI_M decreases. Therefore, the matching resistance value MR increases. For example, the basic value BV_M is the maximum value of the matching resistance value MR.

[0073] It should be noted that the OCD 100 provides a matching resistance value MR and adjusts the matching resistance value MR from the basic value BV_M according to the main current value MI_M. Therefore, the OCD 100 provides a matching resistance value MR having a wide range. In addition, the OCD provides a matching resistance value MR having a wide range. The number of parallel connections of the pull-up drivers can be reduced. The number of pull-up drivers 110 is less than Figure 1 The number of pull-up drivers 11_1 to 11_3 in the OCD 100 can be reduced. The OCD 100 can provide a matching resistance value MR having a wide range using one pull-up driver 110. Therefore, the OCD 100 has a low capacitance value on the connection pad PDIO.

[0074] Figure 3 A schematic diagram of a pull-up driver of an OCD according to an embodiment of the present disclosure is shown. Figure 3 In the present embodiment, the pull-up driver 110 includes a main current source circuit 111 and a main basic circuit 112. In the present embodiment, the main current source circuit 111 includes a first main transistor MPC. The first terminal of the first main transistor MPC is connected to the high reference voltage VDD. The second terminal of the first main transistor MPC is connected to the connection pad PDIO. The control terminal of the first main transistor MPC receives the main control signal VCP_M. The first main transistor MPC operates in a triode region and a saturation region based on the main control signal VCP_M and the voltage value on the connection pad PDIO. Therefore, the main control signal VCP_M is an analog signal. The first main transistor MPC generates a main current value MI_M in response to the voltage value of the main control signal VCP_M. In the present embodiment, the voltage value of the main control signal VCP_M is between the high reference voltage VDD and the low reference voltage.

[0075] In the present embodiment, the main basic circuit 112 includes a second main transistor MPD. The first terminal of the second main transistor MPD is connected to the first terminal of the first main transistor, and the second terminal of the second main transistor MPD is connected to the control terminal of the second main transistor MPD and the second terminal of the first main transistor MPC. The second main transistor MPD is connected between the connection pad PDIO and the high reference voltage VDD in a diode connection. When the voltage value on the connection pad PDIO is lower than the difference between the high reference voltage VDD and the threshold voltage value of the second main transistor MPD (i.e., "VDD-Vtp"), the second main transistor MPD operates in the saturation region. The second main transistor MPD generates the basic value BV_M.

[0076] In the present embodiment, each of the first main transistor MPC and the second main transistor MPD may be implemented by a P-type field effect transistor (FET), but the present disclosure is not limited thereto.

[0077] Figure 4 The trend diagram of the matching resistance value according to the embodiment of the present disclosure is shown. Figure 3 and Figure 4 , Figure 4 1 shows the relationship between the main control signal VCP_M, the main current value MI_M and the matching resistance value MR. In the present embodiment, the second main transistor MPD generates the basic value BV_M. When the first main transistor MPC is turned off according to the main control signal VCP_M, the matching resistance value MR is equal to the basic value BV_M. When the voltage value of the main control signal VCP_M increases, the main current value MI_M increases. The equivalent resistance value of the main current source circuit 111 will decrease. Therefore, the matching resistance value MR decreases from the basic value BV_M.

[0078] It should be noted that the OCD 100 provides a matching resistance value MR having a wide range based on the voltage value of the main control signal VCP_M through a pull-up driver 110. Therefore, the area of ​​the OCD 100 is smaller than Figure 1 The area of ​​the OCD 10 is shown. In addition, the master basic circuit 112 determines the basic value BV_M. The second master transistor MPD is designed to determine the basic value BV_M based on the design requirements. Therefore, the OCD 100 provides a matching resistance value MR within the design range.

[0079] Figure 5A A schematic diagram of a pull-up driver of an OCD according to an embodiment of the present disclosure is shown. Figure 5A In this embodiment, the pull-up driver 210 includes a main current source circuit 111, a main basic circuit 112 and a main pull-up switch MP <1> In this embodiment, the main current source circuit 111 includes a first main transistor MPC. The main basic circuit 112 includes a second main transistor MPD. The configurations of the main current source circuit 111 and the main basic circuit 112 have been described in detail. Figure 2 and Figure 3 This is clearly explained in the illustrated embodiment and will not be repeated here.

[0080] In this embodiment, the main pull-up switch MP <1> Connected to the main current source circuit 111, the main basic circuit 112 and the connection pad PDIO. Main pull-up switch MP <1> In response to the main switch signal PUP_M, the main current source circuit 111 and the main basic circuit 112 are connected to the connection pad PDIO. <1> The main pull-up switch MP can be implemented by a P-type FET, but the present disclosure is not limited thereto. <1> In response to the high voltage level of the main switch signal PUP_M, the main pull-up switch MP <1> When disconnected, the pull-up driver 210 does not provide the matching resistance value MR to the connection pad PDIO. <1> The main pull-up switch MP is turned on in response to the low voltage level of the main switch signal PUP_M. <1> When turned on, the pull-up driver 210 provides a matching resistance value MR to the connection pad PDIO. In this embodiment, the main switching signal PUP_M is a digital signal.

[0081] Figure 5B A schematic diagram of a pull-up driver of an OCD according to an embodiment of the present disclosure is shown. Figure 5B In this embodiment, the pull-up driver 210 includes a main current source circuit 111, a main basic circuit 112 and a main pull-up switch MP <1> In this embodiment, the main current source circuit 111 includes a first main transistor MPC. The main basic circuit 112 includes a second main transistor MPD. The main current source circuit 111, the main basic circuit 112 and the main pull-up switch MP <1> The configuration is already in Figure 2 , Figure 3 and Figure 5A This is clearly explained in the illustrated embodiment and will not be repeated here.

[0082] In this embodiment, the resistor RP is connected between the connection pad PDIO and the pull-up driver 210. The resistor RP is used to suppress electrostatic discharge in the pull-up driver 210. In addition, when the main pull-up switch MP <1> When turned on, the pull-up driver 210 and the resistor RP together provide a matching resistance value MR.

[0083] Figure 5C A schematic diagram of a pull-up driver of an OCD according to an embodiment of the present disclosure is shown. Figure 5C In this embodiment, the pull-up driver 210 includes a main current source circuit 111, a main basic circuit 112, and a main pull-up switch MP <1> To MP <n>"n" is a positive integer greater than "2". In this embodiment, the main current source circuit 111 includes a first main transistor MPC. The main basic circuit 112 includes a second main transistor MPD. The configurations of the main current source circuit 111 and the main basic circuit 112 are already described in Figure 2 and Figure 3 This is clearly explained in the illustrated embodiment and will not be repeated here.

[0084] In this embodiment, the main pull-up switch MP <1> To MP <n>For example, the main pull-up switch MP <1> To MP <n>Each of the above can be implemented by a P-type FET, but the present disclosure is not limited thereto. <1> To MP <n>In response to the high voltage level of the main switch signal PUP_M, the main pull-up switch MP <1> To MP <n>When disconnected, the pull-up driver 210 does not provide the matching resistance value MR to the connection pad PDIO. <1> To MP <n>The main pull-up switch MP is turned on in response to the low voltage level of the main switch signal PUP_M. <1> To MP <n>When turned on, the pull-up driver 210 provides a matching resistance value MR to the connection pad PDIO. The present disclosure is not limited by the number of series connections of the main pull-up switches.

[0085] Figure 5D A schematic diagram of a pull-up driver of an OCD according to an embodiment of the present disclosure is shown. Figure 5D In this embodiment, the pull-up driver 210 includes a main current source circuit 111, a main basic circuit 112 and a main pull-up switch MP <1> To MP <n>In this embodiment, the main current source circuit 111 includes a first main transistor MPC. The main basic circuit 112 includes a second main transistor MPD. The main current source circuit 111, the main basic circuit 112 and the main pull-up switch MP <1> To MP <n>The configuration is already in Figure 2 , Figure 3 and Figure 5C This is clearly explained in the illustrated embodiment and will not be repeated here.

[0086] In this embodiment, the resistor RP is connected between the connection pad PDIO and the pull-up driver 210. The resistor RP is used to suppress electrostatic discharge in the pull-up driver 210. In addition, when the main pull-up switch MP <1> To MP <n>When turned on, the pull-up driver 210 and the resistor RP together provide a matching resistance value MR.

[0087] Figure 6 A schematic diagram of a pull-up driver of an OCD according to an embodiment of the present disclosure is shown. Figure 6 In this embodiment, the pull-up driver 310 of the OCD 300 includes a main current source circuit 111, a main basic circuit 112, a main pull-up switch MP <1> , auxiliary current source circuit 313, auxiliary basic circuit 314 and auxiliary pull-up switch MP' <1> Main current source circuit 111, main basic circuit 112 and main pull-up switch MP <1> The configuration is already in Figure 2 , Figure 3 and Figure 5A The explanation is clear in the illustrated embodiment, so it will not be repeated here. The auxiliary current source circuit 313 is connected between the connection pad PDIO and the high reference voltage VDD. The auxiliary current source circuit 313 provides an auxiliary current value MI_T in response to the auxiliary control signal VCP_T. The matching resistance value MR is trimmed by the auxiliary current value MI_T.

[0088] In this embodiment, the auxiliary current source circuit 313 includes a first auxiliary transistor MPC'. A first terminal of the first auxiliary transistor MPC' is connected to the high reference voltage VDD. A second terminal of the first auxiliary transistor MPC' is connected to the high reference voltage VDD through an auxiliary pull-up switch MP'. <1> Connected to the connecting pad PDIO. The control terminal of the first auxiliary transistor MPC' receives the auxiliary control signal VCP_T. The first auxiliary transistor MPC' operates in the triode region and the saturation region based on the auxiliary control signal VCP_T and the voltage value on the connecting pad PDIO. The external system voltage is determined by a voltage range (for example, 0.5×VDD to 0.8×VDD). Therefore, based on the external system voltage, the auxiliary control signal VCP_T is adjusted according to the current required by the first auxiliary transistor MPC'. Therefore, the auxiliary control signal VCP_T is an analog signal. The first auxiliary transistor MPC' generates an auxiliary current value MI_T in response to the voltage value of the auxiliary control signal VCP_T. In the present embodiment, the voltage value of the auxiliary control signal VCP_T is between the high reference voltage VDD and the low reference voltage.

[0089] The auxiliary basic circuit 314 includes a second auxiliary transistor MPD'. The first terminal of the second auxiliary transistor MPD' is connected to the first terminal of the first auxiliary transistor MPC'. The second terminal of the second auxiliary transistor MPD' is connected to the control terminal of the second auxiliary transistor MPD' and the second terminal of the first auxiliary transistor MPC'. The second auxiliary transistor MPD' is connected between the connection pad PDIO and the high reference voltage VDD in a diode connection. Therefore, the second auxiliary transistor MPD' operates in the saturation region. The second auxiliary transistor MPD' generates a basic value BV_T. The basic value BV_T is determined by the voltage value on the connection pad PDIO, the auxiliary pull-up switch MP' <1> The voltage value at both ends and the size of the second auxiliary transistor MPD' determine. In this embodiment, each of the first auxiliary transistor MPC' and the second auxiliary transistor MPD' can be implemented by a P-type FET, but the present disclosure is not limited thereto.

[0090] The auxiliary basic circuit 314 is connected in parallel to the auxiliary current source circuit 313. The auxiliary basic circuit 314 determines the auxiliary basic value BV_T of the matching resistance value. The matching resistance value MR is also trimmed by the auxiliary basic value BV_T.

[0091] In some embodiments, the auxiliary base circuit 314 may be omitted.

[0092] In this embodiment, the auxiliary pull-up switch MP' <1> The auxiliary pull-up switch MP' is connected to the auxiliary current source circuit 313, the auxiliary basic circuit 314 and the connection pad PDIO. <1> When turned on in response to the low voltage level of the auxiliary switch signal PUP_T, the auxiliary current source circuit 313 and the auxiliary basic circuit 314 are connected to the connection pad PDIO. Therefore, the matching resistance value MR is trimmed by the auxiliary basic value BV_T and the auxiliary current value MI_T. <1> When disconnected in response to the high voltage level of the auxiliary switch signal PUP_T, the auxiliary current source circuit 313 and the auxiliary basic circuit 314 are not connected to the connection pad PDIO. Therefore, the matching resistance value MR is not trimmed by the auxiliary basic value BV_T and the auxiliary current value MI_T. In this embodiment, the auxiliary switch signal PUP_T is a digital signal.

[0093] Fig. 7A A schematic diagram of a pull-up driver of an OCD according to an embodiment of the present disclosure is shown. Figure 6 and Fig. 7A In this embodiment, in the pull-up driver 310A, the main current source circuit 111, the main basic circuit 112 and the main pull-up switch MP <1> It can act as the main pull-up circuit PU_M. Auxiliary current source circuit 313, auxiliary basic circuit 314 and auxiliary pull-up switch MP' <1> Can act as auxiliary pull-up circuit PU_T.

[0094] Figure 7B FIG. 1 is a schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure. Fig. 7A compared to, Figure 7B The pull-up driver 310B shown further includes a resistor RP1. The resistor RP1 is connected between the connection pad PDIO and the main pull-up circuit PU_M. The resistor RP1 is used to suppress electrostatic discharge in the main pull-up circuit PU_M.

[0095] Figure 7C FIG. 1 is a schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure. Fig. 7A compared to, Figure 7C The pull-up driver 310C shown further includes a resistor RP2. The resistor RP2 is connected between the connection pad PDIO and the auxiliary pull-up circuit PU_T. The resistor RP2 is used to suppress electrostatic discharge in the auxiliary pull-up circuit PU_T.

[0096] Fig.7D FIG. 1 is a schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure. Fig. 7A compared to, Fig.7D The pull-up driver 310D shown also includes resistors RP1 and RP2. The resistor RP1 is connected between the connection pad PDIO and the main pull-up circuit PU_M. The resistor RP1 is used to suppress electrostatic discharge in the main pull-up circuit PU_M. The resistor RP2 is connected between the connection pad PDIO and the auxiliary pull-up circuit PU_T. The resistor RP2 is used to suppress electrostatic discharge in the auxiliary pull-up circuit PU_T.

[0097] Fig. 7E FIG. 1 is a schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure. Fig. 7A compared to, Fig. 7E The pull-up driver 310E shown also includes a resistor RP0. A first terminal of the resistor RP0 is connected to the auxiliary pull-up circuit PU_T and the main pull-up circuit PU_M. A second terminal of the resistor RP0 is connected to the connection pad PDIO. The resistor RP0 is used to suppress electrostatic discharge in the auxiliary pull-up circuit PU_T and the main pull-up circuit PU_M.

[0098] Figure 7F FIG. 1 is a schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure. Figure 7B compared to, Figure 7F The illustrated pull-up driver 310F also includes a resistor RP0.

[0099] Figure 7G FIG. 1 is a schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure. Figure 7C compared to, Figure 7G The illustrated pull-up driver 310G also includes a resistor RP0.

[0100] Figure 7H FIG. 1 is a schematic diagram showing a pull-up driver of an OCD according to an embodiment of the present disclosure. Fig.7D compared to, Figure 7H The illustrated pull-up driver 310H also includes a resistor RP0.

[0101] Figure 8 A schematic diagram of a pull-down driver of an OCD according to an embodiment of the present disclosure is shown. Figure 8 In the present embodiment, the pull-down driver 410 of the OCD 400 provides a matching resistance value MR. The pull-down circuit 410 includes a main current source circuit 411 and a main basic circuit 412. The main current source circuit 411 is connected between the connection pad PDIO and the low reference voltage VSS. The main current source circuit 411 provides a main current value MI_M in response to the main control signal VCN_M. The matching resistance value MR is associated with the main current value MI_M. The main basic circuit 412 is connected in parallel to the main current source circuit 411. In other words, the main basic circuit 412 is also connected between the connection pad PDIO and the low reference voltage VSS. The main basic circuit 412 determines the basic value BV_M of the matching resistance value MR.

[0102] In the present embodiment, before adjusting the matching resistance value MR, the matching resistance value MR is equal to the basic value BV_M. When the main current value MI_M is provided, the equivalent resistance value of the main current source circuit 411 decreases as the main current value MI_M increases. Therefore, the matching resistance value MR decreases from the basic value BV_M. The equivalent resistance value of the main current source circuit 411 increases as the main current value MI_M decreases. Therefore, the matching resistance value MR increases. For example, the basic value BV_M is the maximum value of the matching resistance value MR.

[0103] The pull-down driver 410 provides a matching resistance value MR and adjusts the matching resistance value MR from the basic value BV_M according to the main current value MI_M. Therefore, the pull-down driver 410 provides a matching resistance value MR with a wide range. In addition, the OCD provides a matching resistance value MR with a wide range. The number of parallel connections of the pull-down circuit can be reduced. The pull-down driver 410 can use one pull-down circuit 410 to provide a matching resistance value MR with a wide range. Therefore, the OCD 400 has a low capacitance value on the connection pad PDIO.

[0104] Fig. 9 A schematic diagram of a pull-down driver of an OCD according to an embodiment of the present disclosure is shown. Fig. 9 In the present embodiment, the pull-down circuit 410 includes a main current source circuit 411 and a main basic circuit 412. In the present embodiment, the main current source circuit 411 includes a first main transistor MNC. A first terminal of the first main transistor MNC is connected to a connection pad PDIO. A second terminal of the first main transistor MNC is connected to a low reference voltage VSS. A control terminal of the first main transistor receives a main control signal VCN_M. The first main transistor MNC operates in a triode region and a saturation region based on the main control signal VCN_M and a voltage value on the connection pad PDIO. The external system voltage is determined by a voltage range (e.g., 0.5×VDD to 0.8×VDD). Therefore, based on the external system voltage, the main control signal VCN_M is adjusted according to the current required by the first main transistor MNC. Therefore, the main control signal VCN_M is an analog signal. The first main transistor MNC generates a main current value MI_M in response to the voltage value of the main control signal VCN_M. In the present embodiment, the voltage value of the main control signal VCN_M is between the high reference voltage VDD and the low reference voltage VSS.

[0105] In the present embodiment, the main basic circuit 412 includes a second main transistor MND. The first terminal of the second main transistor MND is connected to the control terminal of the second main transistor MND and the first terminal of the first main transistor MNC. The second terminal of the second main transistor MND is connected to the second terminal of the first main transistor MNC. The second main transistor MND is connected between the connection pad PDIO and the low reference voltage VSS in a diode connection. When the voltage value on the connection pad PDIO is higher than the threshold voltage value of the second main transistor MND, the second main transistor MND operates in the saturation region. The second main transistor MND generates a basic value BV_M.

[0106] In the present embodiment, each of the first main transistor MNC and the second main transistor MND may be implemented by an N-type field effect transistor (FET), but the present disclosure is not limited thereto.

[0107] Fig.10 The trend diagram of the matching resistance value according to the embodiment of the present disclosure is shown. Fig. 9 and Fig.10 , Fig.10 4 shows the relationship between the main control signal VCN_M, the main current value MI_M and the matching resistance value MR. In the present embodiment, the second main transistor MND generates the basic value BV_M. When the first main transistor MNC is turned off according to the main control signal VCN_M, the matching resistance value MR is equal to the basic value BV_M. When the voltage value of the main control signal VCN_M increases, the main current value MI_M increases. The equivalent resistance value of the main current source circuit 411 will decrease. Therefore, the matching resistance value MR decreases from the basic value BV_M.

[0108] Fig.11A A schematic diagram of a pull-down driver of an OCD according to an embodiment of the present disclosure is shown. Fig.11A In this embodiment, the pull-down circuit 510 includes a main current source circuit 411, a main basic circuit 412 and a main pull-down switch MN <1> In this embodiment, the main current source circuit 411 includes a first main transistor MNC. The main basic circuit 412 includes a second main transistor MND. The configurations of the main current source circuit 411 and the main basic circuit 412 have been described in detail. Figure 8 and Fig. 9 This is clearly explained in the illustrated embodiment and will not be repeated here.

[0109] In this embodiment, the main pull-down switch MN <1> Connected to the main current source circuit 411, the main basic circuit 412 and the connection pad PDIO. Main pull-down switch MN <1> In response to the main switch signal PDN_M, the main current source circuit 411 and the main basic circuit 412 are connected to the connection pad PDIO. <1> The main pull-down switch MN may be implemented by an N-type FET, but the present disclosure is not limited thereto. <1> In response to the low voltage level of the main switch signal PDN_M, the main pull-down switch MN is turned off. <1> When disconnected, the pull-down circuit 510 does not provide the matching resistance value MR to the connection pad PDIO. <1> The main pull-down switch MN is turned on in response to the high voltage level of the main switch signal PDN_M. <1> When turned on, the pull-down circuit 510 provides a matching resistance value MR to the connection pad PDIO. In this embodiment, the main switch signal PDN_M is a digital signal.

[0110] Fig. 11B A schematic diagram of a pull-down driver of an OCD according to an embodiment of the present disclosure is shown. Fig. 11B In this embodiment, the pull-down circuit 510 includes a main current source circuit 411, a main basic circuit 412 and a main pull-down switch MN <1> In this embodiment, the main current source circuit 411 includes a first main transistor MNC. The main basic circuit 412 includes a second main transistor MND. The main current source circuit 411, the main basic circuit 412 and the main pull-down switch MN <1> The configuration is already in Figure 8 , Fig. 9 and Fig.11A This is clearly explained in the illustrated embodiment and will not be repeated here.

[0111] In this embodiment, the resistor RN is connected between the connection pad PDIO and the pull-down circuit 510. The resistor RN is used to suppress the electrostatic discharge in the pull-down circuit 510. In addition, when the main pull-down switch MN <1> When turned on, the pull-down driver 410 and the resistor RN together provide a matching resistance value MR.

[0112] Fig. 11C A schematic diagram of a pull-down driver of an OCD according to an embodiment of the present disclosure is shown. Fig. 11C In this embodiment, the pull-down circuit 510 includes a main current source circuit 411, a main basic circuit 412 and a main pull-down switch MN <1> To MN <m>"m" is a positive integer greater than "2". In this embodiment, the main current source circuit 411 includes a first main transistor MNC. The main basic circuit 412 includes a second main transistor MND. The configuration of the main current source circuit 411 and the main basic circuit 412 has been described in detail. Figure 8 and Fig. 9 The explanation is clear in the illustrated embodiment, so it will not be repeated here. The present disclosure is not limited by the number of series connections of the main pull-down switches.

[0113] In this embodiment, the main pull-down switch MN <1> To MN <m>For example, the main pull-down switch MN <1> To MN <m>Each of the above may be implemented by an N-type FET, but the present disclosure is not limited thereto. <1> To MN <m>In response to the low voltage level of the main switch signal PDN_M, the main pull-down switch MN is turned off. <1> To MN <m>When disconnected, the pull-down circuit 510 does not provide the matching resistance value MR to the connection pad PDIO. <1> To MN <m>The main pull-down switch MN is turned on in response to the low voltage level of the main switch signal PDN_M. <1> To MN <m>When turned on, the pull-down circuit 510 provides a matching resistance value MR to the connection pad PDIO.

[0114] Fig.11D A schematic diagram of a pull-down driver of an OCD according to an embodiment of the present disclosure is shown. Fig.11D In this embodiment, the pull-down circuit 510 includes a main current source circuit 411, a main basic circuit 412 and a main pull-down switch MN <1> To MN <m>In this embodiment, the main current source circuit 411 includes a first main transistor MNC. The main basic circuit 412 includes a second main transistor MND. The main current source circuit 411, the main basic circuit 412 and the main pull-down switch MN <1> To MN <m>The configuration is already in Figure 8 , Fig. 9 and Fig. 11C This is clearly explained in the illustrated embodiment and will not be repeated here.

[0115] In this embodiment, the resistor RN is connected between the connection pad PDIO and the pull-down circuit 510. The resistor RN is used to suppress the electrostatic discharge in the pull-down circuit 510. In addition, when the main pull-down switch MN <1> To MN <m>When turned on, the pull-down driver 510 and the resistor RN together provide a matching resistance value MR.

[0116] Fig.12 A schematic diagram of a pull-down driver of an OCD according to an embodiment of the present disclosure is shown. Fig.12 In this embodiment, the pull-down circuit 610 of the OCD 600 includes a main current source circuit 411, a main basic circuit 412, a main pull-down switch MN <1> , auxiliary current source circuit 613, auxiliary basic circuit 614 and auxiliary pull-down switch MN' <1> Main current source circuit 411, main basic circuit 412 and main pull-down switch MN <1> The configuration is already in Figure 8 , Fig. 9 and Fig.11A The explanation is clear in the illustrated embodiment, so it will not be repeated here. The auxiliary current source circuit 613 is connected between the connection pad PDIO and the low reference voltage VSS. The auxiliary current source circuit 613 provides an auxiliary current value MI_T in response to the auxiliary control signal VCN_T. The matching resistance value MR is trimmed by the auxiliary current value MI_T.

[0117] In this embodiment, the auxiliary current source circuit 613 includes a first auxiliary transistor MNC'. The first terminal of the first auxiliary transistor MNC' is connected to the auxiliary pull-down switch MN'. <1> Connected to the connection pad PDIO. The second terminal of the first auxiliary transistor MNC' is connected to the low reference voltage VSS. The control terminal of the first auxiliary transistor MNC' receives the auxiliary control signal VCN_T. The first auxiliary transistor MNC' operates in the triode region and the saturation region based on the auxiliary control signal VCN_T and the voltage value on the connection pad PDIO. The external system voltage is determined by a voltage range (for example, 0.5×VDD to 0.8×VDD). Therefore, based on the external system voltage, the auxiliary control signal VCN_T is adjusted according to the current required by the first auxiliary transistor MNC'. Therefore, the auxiliary control signal VCN_T is an analog signal. The first auxiliary transistor MNC' generates an auxiliary current value MI_T in response to the voltage value of the auxiliary control signal VCN_T. In the present embodiment, the voltage value of the auxiliary control signal VCN_T is between the high reference voltage VDD and the low reference voltage VSS.

[0118] The auxiliary basic circuit 614 includes a second auxiliary transistor MND'. The first terminal of the second auxiliary transistor MND' is connected to the control terminal of the second auxiliary transistor MND' and the first terminal of the first auxiliary transistor MNC'. The second terminal of the second auxiliary transistor MND' is connected to the second terminal of the first auxiliary transistor MNC'. The second auxiliary transistor MND' is connected between the connecting pad PDIO and the low reference voltage VSS in a diode connection. When the voltage value on the connecting pad PDIO is higher than the threshold voltage value of the second auxiliary transistor MND', the second auxiliary transistor MND' operates in the saturation region. The second auxiliary transistor MND' generates a basic value BV_T. In the present embodiment, each of the first auxiliary transistor MNC' and the second auxiliary transistor MND' can be implemented by an N-type FET, but the present disclosure is not limited to this.

[0119] The auxiliary basic circuit 614 is connected in parallel to the auxiliary current source circuit 613. The auxiliary basic circuit 614 determines the auxiliary basic value BV_T of the matching resistance value. The matching resistance value MR is also trimmed by the auxiliary basic value BV_T.

[0120] In some embodiments, the auxiliary base circuit 614 may be omitted.

[0121] In this embodiment, the auxiliary pull-down switch MN' <1> The auxiliary pull-down switch MN′ is connected to the auxiliary current source circuit 613, the auxiliary basic circuit 614 and the connection pad PDIO. <1> When turned on in response to the high voltage level of the auxiliary switch signal PDN_T, the auxiliary current source circuit 613 and the auxiliary basic circuit 614 are connected to the connection pad PDIO. Therefore, the matching resistance value MR is trimmed by the auxiliary basic value BV_T and the auxiliary current value MI_T. <1> When disconnected in response to the low voltage level of the auxiliary switch signal PDN_T, the auxiliary current source circuit 613 and the auxiliary basic circuit 614 are not connected to the connection pad PDIO. Therefore, the matching resistance value MR is not trimmed by the auxiliary basic value BV_T and the auxiliary current value MI_T. In this embodiment, the auxiliary switch signal PDN_T is a digital signal.

[0122] Fig.13A A schematic diagram of a pull-down driver of an OCD according to an embodiment of the present disclosure is shown. Fig.12 and Fig.13A In this embodiment, in the pull-down driver 610A, the main current source circuit 411, the main basic circuit 412 and the main pull-down switch MN <1> It can act as the main pull-down circuit DN_M. Auxiliary current source circuit 613, auxiliary basic circuit 614 and auxiliary pull-down switch MN' <1> Can act as an auxiliary pull-down circuit DN_T.

[0123] Fig. 13B FIG. 1 is a schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure. Fig.13A compared to, Fig. 13B The pull-down driver 610B shown further includes a resistor RN1. The resistor RN1 is connected between the connection pad PDIO and the main pull-down circuit DN_M. The resistor RN1 is used to suppress electrostatic discharge in the main pull-down circuit DN_M.

[0124] Fig. 13C FIG. 1 is a schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure. Fig.13A compared to, Fig. 13C The pull-down driver 610C shown further includes a resistor RN2. The resistor RN2 is connected between the connection pad PDIO and the auxiliary pull-down circuit DN_T. The resistor RN2 is used to suppress electrostatic discharge in the auxiliary pull-down circuit DN_T.

[0125] Fig.13D FIG. 1 is a schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure. Fig.13A compared to, Fig.13D The pull-down driver 610D shown also includes resistors RN1 and RP2. Resistor RN1 is connected between the connection pad PDIO and the main pull-down circuit DN_M. Resistor RN1 is used to suppress electrostatic discharge in the main pull-down circuit DN_M. Resistor RN2 is connected between the connection pad PDIO and the auxiliary pull-down circuit DN_T. Resistor RN2 is used to suppress electrostatic discharge in the auxiliary pull-down circuit DN_T.

[0126] Fig.13E FIG. 1 is a schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure. Fig.13A compared to, Fig.13E The pull-down driver 610E shown also includes a resistor RN0. A first terminal of the resistor RN0 is connected to the auxiliary pull-down circuit DN_T and the main pull-down circuit DN_M. A second terminal of the resistor RN0 is connected to the connection pad PDIO. The resistor RN0 is used to suppress electrostatic discharge in the auxiliary pull-down circuit DN_T and the main pull-down circuit DN_M.

[0127] Fig.13F FIG. 1 is a schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure. Fig. 13B compared to, Fig.13F The illustrated pull-down driver 610F also includes a resistor RN0.

[0128] Figure 13G FIG. 1 is a schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure. Fig. 13C compared to, Figure 13G The illustrated pull-down driver 610G also includes a resistor RN0.

[0129] Fig.13H FIG. 1 is a schematic diagram showing a pull-down driver of an OCD according to an embodiment of the present disclosure. Fig.13D compared to, Fig.13H The illustrated pull-down driver 610H also includes a resistor RN0.

[0130] Fig.14 FIG. 1 is a schematic diagram showing a driving circuit according to an embodiment of the present disclosure. Fig.14 In this embodiment, the driving circuit 20 includes an OCD 700 and a control circuit 800. The OCD 700 includes a connection pad PDIO and a pull-up driver 710. The pull-up driver 710 is connected between the connection pad PDIO and the high reference voltage VDD. The pull-up driver 710 provides a main current value MI_MP (i.e., a main pull-up current value) and determines a basic value BV_MP (i.e., a pull-up basic value) of a matching resistance value MR in response to a main control signal VCP_M (i.e., a main pull-up control signal), wherein the matching resistance value MR is associated with the main current value MI_MP. In this embodiment, the pull-up driver 710 can be Figure 2 The pull-up driver 110 shown, FIG. 5A to FIG. 5D The pull-up driver 210 shown, Figure 6 The pull-up driver 310 and 7A to 7H The pull-up driver 710 is implemented by one of the pull-up drivers 310A to 310H shown, so the pull-up driver 710 will not be repeated here. In this embodiment, the control circuit 800 is connected to the pull-up driver 710. The control circuit 800 provides a main control signal VCP_M to the pull-up driver 710 in response to the command CMD. The main control signal VCP_M is an analog signal.

[0131] OCD 700 further includes a pull-down circuit 720. Pull-down circuit 720 is connected between connection pad PDIO and low reference voltage VSS. Pull-down circuit 720 provides main current value MI_MN (i.e., main pull-down current value) and determines basic value BV_MN (i.e., pull-down basic value) of matching resistance value MR in response to main control signal VCN_M (i.e., main pull-down control signal). In the present embodiment, pull-down circuit 720 may be composed of Figure 8 The pull-down circuit 410 shown, FIG. 11A to FIG. 11D The pull-down circuit 510 shown, Fig.12 The pull-down circuit 610 and 7A to 7H The pull-down circuit 720 is implemented by one of the pull-down drivers 610A to 610H shown, so the pull-down circuit 720 will not be repeated here. In this embodiment, the control circuit 800 is connected to the pull-down circuit 720. The control circuit 800 provides the main control signal VCN_M to the pull-down circuit 720 in response to the command CMD. The main control signal VCN_M is an analog signal.

[0132] In this embodiment, the basic value BV_M is determined by the basic values ​​BVP and BVN. The matching resistance value MR is adjusted from the basic value BV_M according to the main current values ​​MI_MP and MI_MN.

[0133] For example, the pull-up driver 710 may be Figure 5A The pull-up driver 210 shown is implemented. The pull-down circuit 720 can be implemented by Fig.11A The pull-down circuit 510 shown is implemented. Therefore, the control circuit 800 provides the main switch signal PUP_M to the pull-up driver 710, and provides the main switch signal PDN_M to the pull-down circuit 720. Each of the main switch signals PUP_M, PDN_M is a digital signal.

[0134] In the present embodiment, the control circuit 800 includes switch control circuits 810, 820 and a matching control circuit 830. When the command CMD is an adjustment command (e.g., a zero quotient (ZQ) calibration command, a slew rate adjustment command or a duty cycle adjustment command), the matching control circuit 830 provides a main control signal VCP_M to the pull-up driver 710 and provides a main control signal VCN_M to the pull-down circuit 720. Therefore, the pull-up driver 710 generates a first equivalent resistance value, a main current value MI_MP and a basic value BV_MP. The pull-down circuit 720 generates a second equivalent resistance value according to the main current value MI_MN and the basic value BV_MN. In addition, the switch control circuit 810 provides a main switch signal PUP_M to the pull-up driver 710. The switch control circuit 820 provides a main switch signal PUP_M to the pull-down circuit 720. Therefore, the first equivalent resistance value and the second equivalent resistance value are provided to the connection pad PDIO. The matching resistance value MR on the connection pad PDIO is determined.

[0135] In some embodiments, one of the pull-up driver 710 and the pull-down circuit 720 may be omitted based on requirements. For example, if the pull-down circuit 720 is omitted, the OCD 700 provides a matching resistance value MR and adjusts the matching resistance value MR from the base value BV_MP according to the main current value MI_MP. For example, if the pull-up driver 710 is omitted, the OCD 700 provides a matching resistance value MR and adjusts the matching resistance value MR from the base value BV_MN according to the main current value MI_MN.

[0136] In summary, the OCD provides a matching resistance value and adjusts the matching resistance value from a basic value according to the main current value. Therefore, the OCD and the driving circuit provide a matching resistance value with a wide range. In addition, the OCD and the driving circuit provide a matching resistance value with a wide range. The number of parallel connections of the pull-up driver and / or the pull-down circuit can be reduced. Therefore, the OCD and the driving circuit have a low capacitance value on the connection pad.

[0137] It will be apparent to those skilled in the art that various modifications and variations may be made to the disclosed embodiments without departing from the scope or spirit of the present disclosure. In summary, the present disclosure is intended to cover various modifications and variations as long as they fall within the scope of the appended claims and their equivalents.< / m> < / m> < / m> < / m> < / m> < / m> < / m> < / m> < / m> < / m> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / m>

Claims

1. A pull-up driver for providing an off-chip driver with matched resistance values, comprising: a main current source circuit connected between the connection pad and a high reference voltage and configured to provide a main current value in response to a main control signal, wherein the matching resistance value is associated with the main current value; as well as A main basic circuit is connected in parallel to the main current source circuit and is configured to determine a basic value of the matching resistance value.

2. The pull-up driver according to claim 1, wherein the main current source circuit comprises: A first main transistor, a first terminal of the first main transistor is connected to the high reference voltage, a second terminal of the first main transistor is connected to the connection pad, and a control terminal of the first main transistor receives the main control signal.

3. The pull-up driver according to claim 2, wherein the main basic circuit comprises: A second main transistor, wherein a first terminal of the second main transistor is connected to the first terminal of the first main transistor, and a second terminal of the second main transistor is connected to the control terminal of the second main transistor and the second terminal of the sub-first main transistor. The pull-up driver according to claim 3 , wherein the second main transistor operates in a saturation region.

5. The pull-up driver according to claim 2, wherein the first main transistor operates in a triode region.

6. The pull-up driver according to claim 1, further comprising: A main pull-up switch is connected to the main current source circuit, the main basic circuit, and the connection pad, and is configured to connect the main current source circuit and the main basic circuit to the connection pad in response to a main switch signal.

7. The pull-up driver according to claim 1, further comprising: A resistor, wherein the pull-up driver is connected to the connection pad through the resistor to suppress electrostatic discharge in the pull-up driver.

8. The pull-up driver according to claim 1, wherein the pull-up driver further comprises: An auxiliary current source circuit, connected between the connection pad and the high reference voltage, is configured to provide an auxiliary current value in response to an auxiliary control signal, wherein the matching resistance value is trimmed by the auxiliary current value.

9. A pull-down driver for providing an off-chip driver with matched resistance values, comprising: a main current source circuit connected between the connection pad and a low reference voltage and configured to provide a main current value in response to a main control signal, wherein the matching resistance value is associated with the main current value; as well as A main basic circuit is connected in parallel to the main current source circuit and is configured to determine a basic value of the matching resistance value.

10. The pull-down driver according to claim 9, wherein the main current source circuit comprises: A first main transistor, a first terminal of the first main transistor is connected to the connection pad, a second terminal of the first main transistor is connected to the low reference voltage, and a control terminal of the first main transistor receives the main control signal.

11. The pull-down driver according to claim 10, wherein the main basic circuit comprises: A second main transistor, a first terminal of the second main transistor is connected to the control terminal of the second main transistor and the first terminal of the first main transistor, and a second terminal of the second main transistor is connected to the second terminal of the first main transistor. 12 . The pull-down driver according to claim 11 , wherein the second main transistor operates in a saturation region.

13. The pull-down driver according to claim 10, wherein the first main transistor operates in one of a saturation region and a triode region.

14. The pull-down driver according to claim 9, further comprising: A main pull-down switch is connected to the main current source circuit, the main basic circuit, and the connection pad, and is configured to connect the main current source circuit and the main basic circuit to the connection pad in response to a main switch signal.

15. The pull-down driver according to claim 9, further comprising: A resistor, wherein the pull-down driver is connected to the connection pad through the resistor to suppress electrostatic discharge in the pull-down driver.

16. The pull-down driver according to claim 9, further comprising: An auxiliary current source circuit is connected between the connection pad and the low reference voltage and is configured to provide an auxiliary current value in response to an auxiliary control signal, wherein the matching resistance value is trimmed by the auxiliary current value.

17. An off-chip driver for providing matching resistance values, comprising: Connect the pads; as well as a pull-up driver connected between the connection pad and a high reference voltage and configured to provide a main pull-up current value and determine a pull-up base value of the matching resistance value in response to a main pull-up control signal, wherein the matching resistance value is associated with the main pull-up current value; as well as A control circuit is connected to the pull-up driver and is configured to provide the main pull-up control signal to the pull-up driver in response to a command.

18. The off-chip driver according to claim 17, wherein the pull-up driver comprises: a main current source circuit connected between the connection pad and a high reference voltage and configured to provide a main pull-up current value in response to the main pull-up control signal; as well as A main base circuit is connected in parallel to the main current source circuit and is configured to determine the pull-up base value of the matching resistance value.

19. The off-chip driver according to claim 17, wherein the pull-up driver further comprises: An auxiliary current source circuit is connected between the connection pad and the high reference voltage and is configured to provide an auxiliary current value in response to an auxiliary control signal provided by the control circuit, wherein the matching resistance value is trimmed by the auxiliary current value.

20. The off-chip driver according to claim 17, further comprising: Pull-down drivers, including: a main current source circuit connected between the connection pad and a low reference voltage and configured to provide a main pull-down current value in response to a main pull-down control signal provided by the control circuit; and A main base circuit is connected in parallel to the main current source circuit and is configured to determine a pull-down base value of the matching resistance value.

21. The off-chip driver of claim 20, wherein each of the main pull-up control signal and the main pull-down control signal is an analog signal.

22. The off-chip driver according to claim 18, wherein the pull-up driver further comprises: A main switch is connected to the main current source circuit and the connection pad and is configured to connect the main current source circuit and the main basic circuit to the connection pad in response to a main switch signal provided by the control circuit.

23. The off-chip driver according to claim 22, wherein the main switching signal is a digital signal.

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