Programming method for relieving conductance relaxation effect of nonvolatile memristor
By introducing the conductance consolidation operation of subthreshold pulses in the programming process of nonvolatile memristors, the problem of conductance relaxation of memristors is solved, the accuracy and stability of the conductance state is improved, and it is suitable for the relief of bidirectional relaxation.
Patent Information
- Application Number
- CN202411964769.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2044-12-30
AI Technical Summary
The nonvolatile memristor will experience conductivity relaxation in a short time after programming, causing the conductivity state to deviate from the target conductivity, affecting the stability of the calculation results and the computing performance of the system.
By introducing conductance consolidation operations of forward and reverse subthreshold pulses during the write verification process, the conductance state is ensured to be stable within the target interval and reduce conductance drift.
It effectively alleviates the conductivity relaxation effect of nonvolatile memristors, improves the accuracy and stability of the conductivity state, simplifies the programming process, and is suitable for the relief of bidirectional relaxation.
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Figure CN119889393A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of resistive memory, relates to a non-volatile memristor programming method, and specifically relates to a programming method for alleviating a conductivity relaxation effect of a non-volatile memristor. Background Art
[0002] The traditional von Neumann computing architecture, with its separate storage unit and computing unit, faces the problems of large computing delay and low energy efficiency when performing data-intensive computing tasks such as artificial intelligence computing and scientific numerical computing. The brain-inspired integrated storage and computing architecture completes the calculation locally, with high parallelism, thus greatly improving the computing speed and energy efficiency. Among the many integrated storage and computing units, non-volatile memristors have the advantages of high integration density, CMOS process compatibility, fast operation speed, and non-volatility, making them a strong candidate device for realizing efficient integrated storage and computing architecture.
[0003] The conductance state of a non-volatile memristor can change under the stimulation of an external superthreshold voltage, and ideally, the new conductance state can be maintained for a long time after the voltage stimulus is removed. If the conductance of the memristor needs to be increased, a set operation (SET) is required; if the conductance of the memristor needs to be reduced, a reset operation (RESET) is required. For the programming of multi-value or analog conductance values of non-volatile memristors, the commonly used programming method is the write verification method, which changes the conductance of the memristor by repeatedly applying SET or RESET write pulses, and reads the current conductance with a very small verification voltage to determine whether it has reached the target conductance. Among them, during the writing process, if it is determined that the current operation type (SET or RESET) should be the same as the previous operation type, the current write pulse has the same pulse width and an increased amplitude. Although the memristor can be well programmed to the target conductance under this programming method, the conductance will relax in a short time after programming, drift randomly and deviate from the target conductance. This is due to the working mechanism of the memristor itself. After the programming operation is completed, the spontaneous generation and migration of unstable conductive filaments and oxygen vacancies will change the conductivity state. For many application scenarios that require the stored information to be very stable and accurate, such as scientific numerical calculations, pulse neural network calculations based on efficient time coding, etc., conductivity relaxation will lead to distortion of calculation results, information loss, and degradation of system computing performance. Therefore, the conductivity relaxation effect of memristors is a challenge that needs to be overcome urgently.
[0004] The programming strategies that have been reported to alleviate the conductivity relaxation effect include write-delay-verify, repeated write, large pulse width write, peripheral read circuit reference voltage calibration, etc. However, the ability of these technologies to alleviate conductivity relaxation is still limited, including the problem that the conductivity distribution is still large after relaxation and the strategy is only effective for conductivity drift in a single direction. In addition, some of these strategies will introduce longer programming time, while others require more complex hardware circuit support, which is not conducive to the realization of large-scale memristor storage and computing integrated systems. At present, a low-cost non-volatile memristor programming method that can effectively alleviate the bidirectional relaxation effect of conductivity has not been reported. Summary of the invention
[0005] In order to overcome the above-mentioned problem of conductivity relaxation of non-volatile memristors, the present invention proposes a programming method that can alleviate the conductivity relaxation effect of non-volatile memristors, thereby greatly improving the accuracy of the stored conductivity state.
[0006] The technical solution provided by the present invention is as follows:
[0007] A programming method for alleviating the conductivity relaxation effect of a nonvolatile memristor, wherein the conductivity value obtained by performing a read operation on the memristor, the target conductivity value, and the allowable programming conductivity error are respectively denoted as G read , G T and G e , the difference between the conductivity value obtained by the read operation and the target conductivity value is recorded as ΔG, that is, ΔG = G read -G T , the total number of cycles is recorded as n, the number of conductivity consolidation cycles is recorded as m, and the number of consecutive applications of SET or RESET write pulses is recorded as i. The specific steps include the following:
[0008] 1) Programming starts, reading the current conductance G of the memristor read ;
[0009] 2) If G read In the target conductance range [G T -G e ,G T +G e ], that is, |ΔG| <G e , it directly enters the conductance consolidation stage; otherwise, it performs write verification; the conductance consolidation stage specifically includes judging m, if m==m max , the programming is successful; otherwise, the conductance consolidation subprocess is run; that is, a subthreshold pulse in the SET direction is applied, and then the conductance is read; if |ΔG| is not satisfied at this time <G e , the conductance consolidation subprocess is terminated directly; otherwise, a subthreshold pulse in the RESET direction is applied, and then the conductance is read to terminate the conductance consolidation subprocess. After the conductance consolidation subprocess is terminated, m becomes m+1, and the G obtained in the conductance consolidation subprocess is readMake further judgments;
[0010] 3) If it is determined in step 2) to perform write verification, n is judged, and if n == n max , the programming fails; otherwise, continue to read Make a judgment; if G read Below the target conductivity range [G T -G e ,G T +G e ], that is, ΔG<-G e , then apply a set (SET) pulse sequence; if G read Higher than the target conductivity range, that is, ΔG>G e , a reset (RESET) pulse sequence is applied.
[0011] Further, the RESET pulse sequence is specifically as follows: applying a RESET pulse, i becomes i+1, and then reading the conductance; if ΔG>G is still satisfied at this time e And i≠i max , then increase the RESET pulse amplitude, and repeat the RESET pulse and judgment; otherwise, end the RESET sub-process, and n becomes n+1, and repeat steps 2)-3).
[0012] Further, the SET pulse sequence is specifically as follows: applying a SET pulse, i becomes i+1, and then reading the conductance; if ΔG<-G is still satisfied at this time e And i≠i max , then increase the SET pulse amplitude, and repeat the SET pulse application and judgment; otherwise, end the SET sub-process, and n becomes n+1, and repeat steps 2)-3).
[0013] The present invention provides a programming method capable of alleviating the conductivity relaxation effect of a non-volatile memristor. When the device is successfully written into a target conductivity interval, the conductivity state is stabilized by applying a subthreshold forward / reverse pulse pair. If the device conductivity is still within the target conductivity interval after applying multiple subthreshold pulse pairs, the device programming is successful. Compared with the existing programming scheme for alleviating conductivity relaxation, the programming method of the present invention is simpler to operate, has a faster programming speed, is suitable for alleviating the conductivity bidirectional relaxation effect, and has a better effect. It has great value for applications that require accurate data storage, such as robust neural network calculations, numerical calculations, etc. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Figure 1The present invention is a flow chart of a programming method capable of alleviating the conductivity relaxation effect of a non-volatile memristor, wherein a) to d) are respectively a main process of memristor programming, a sub-process of applying a SET pulse sequence in the main process, a sub-process of applying a RESET pulse sequence in the main process, and a sub-process of applying a conductivity consolidation pulse sequence in the main process.
[0015] Figure 2 This is a flow chart of a commonly used non-volatile memristor programming method without conductance consolidation operation, wherein a) to c) are respectively the main process of memristor programming, the sub-process of applying a SET pulse sequence in the main process, and the sub-process of applying a RESET pulse sequence in the main process.
[0016] Figure 3 A schematic diagram of a resistive memory unit based on a nonvolatile memristor provided by an embodiment of the present invention.
[0017] Figure 4 The static IV characteristic curve of the nonvolatile memristor provided by the embodiment of the present invention.
[0018] Figure 5 Cumulative distribution diagrams of conductivity state relaxation under different programming methods provided by the embodiments of the present invention, wherein a) and b) correspond to the existing programming method without conductivity consolidation operation and the programming method with conductivity consolidation operation of the present invention, respectively.
[0019] Figure 6 The embodiments of the present invention provide the standard deviation of the distribution of the conductivity state after relaxation under the two programming methods of the prior art without conductivity consolidation operation and the present invention with conductivity consolidation operation. DETAILED DESCRIPTION
[0020] In order to more clearly illustrate the purpose, technical solutions and advantages of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings. The description here is only used to explain the present invention and is not used to limit the present invention.
[0021] The present invention proposes a programming method capable of alleviating the conductivity relaxation effect of a nonvolatile memristor. After the memristor is written into a target conductivity interval, forward and reverse subthreshold pulses are applied to consolidate the conductivity state, thereby reducing the drift degree of the conductivity after programming and reducing the temporal spread of the conductivity state distribution, that is, the accuracy of the conductivity is maintained over time. Different from other reported programming methods, the programming method of the present invention introduces the operation of applying forward and reverse subthreshold consolidation pulses on the basis of a write verification strategy, and can effectively suppress the relaxation effect without significantly increasing programming time or hardware overhead.
[0022] Figure 1 The flowchart of the programming method of the present invention capable of alleviating the conductivity relaxation effect of the non-volatile memristor is shown in FIG.
[0023] 1) For each memristor, at the beginning of programming, first read its current conductance G read .
[0024] 2) For G read Make a judgment. If G read In the target conductance interval [G T -G e ,G T +G e ], that is, |ΔG| <G e , then a conductance consolidation operation is performed; otherwise a write verification operation is performed.
[0025] 3) If it is determined in step 2) that a write verification operation is to be performed, m is first set to 0, that is, if the previous operation is conductivity consolidation, but the conductivity state is no longer within the target conductivity range, then a write verification is required again. At the same time, n is determined. If n == n max , that is, the preset maximum number of cycles has been reached, the device is still not within the target conductance range and is judged as programming failure; otherwise, continue to program G read Make a judgment. If G read Below the target conductance range, ΔG<-G e , then apply the SET pulse sequence; if G read Higher than the target conductivity range, that is, ΔG>G e , then apply the RESET pulse sequence.
[0026] 4) If it is determined in step 3) that a RESET pulse sequence is applied, the RESET sub-process is executed. A RESET pulse is applied, i becomes i+1, and then the conductance G is read. read If ΔG>G is still satisfied at this time e And i≠i max , then increase the RESET pulse amplitude and repeat; otherwise, end the RESET sub-process. This means that a write verification cycle is completed, n becomes n+1, and return to step 2) to continue to write G read Judge and repeat.
[0027] 5) If it is determined in step 3) that a SET pulse sequence is applied, the SET sub-process is run. Apply a SET pulse, i becomes i+1, and then read the conductivity G read If ΔG<-G is still satisfied at this time e And i≠i max , then increase the SET pulse amplitude and repeat; otherwise, end the SET sub-process. This means that a write verification cycle is completed, n becomes n+1, and return to step 2) to continue to write G read Judge and repeat.
[0028] 6) If it is determined in step 2) to perform conductivity consolidation, determine m. If m == m max , that is, the preset number of conductivity consolidation cycles has been reached, then the programming is successful; otherwise, the conductivity consolidation sub-process is run. Apply a positive (SET direction) subthreshold pulse, and then read the conductivity G read If |ΔG| is not satisfied at this time <G e , the conductance consolidation subprocess is terminated directly; otherwise, a reverse (RESET direction) subthreshold pulse is applied, and then the conductance G is read. read , and the conductance consolidation sub-process ends. The end of the conductance consolidation sub-process means that a conductance consolidation cycle has been completed, m becomes m+1, and returns to step 2) to continue G read Judge and repeat.
[0029] Figure 2 This is a flowchart of a commonly used non-volatile memristor programming method without conductance consolidation operation, which provides a comparable object for the programming method of the present invention and provides data support for the embodiments of the present invention. Specifically, in the second step above, if G read is within the target conductance range, i.e., |ΔG| <G e , it is directly judged as programming success.
[0030] Figure 3 This is a typical structure of a non-volatile memristor. The embodiment of the present invention is based on this structure and provides data basis for the programming method of the present invention. Furthermore, the resistive switching layer material of the memristor can be metal oxides such as Ta2O5 and HfO2. The memristor can have a functional layer, and the material can be TaO x 、TiO x 、AlO x 、SiO x , HfO x The materials of the top electrode and the bottom electrode can be TiN, TaN, Ta, Ti, W, Al, Cu, Ag, Pt, Ir, etc.
[0031] Specifically, TiN / HfO2 / TaO x / TiN memristor as an example, Figure 4 is the static IV curve of the memristor, from which the threshold voltage range of the memristor in the SET direction and the RESET direction can be determined. In this example, the minimum threshold voltage in the SET and RESET directions is about 0.8V. If the amplitude of the conductivity consolidation pulse is greater than this value, the conductivity will change significantly. On the contrary, if the amplitude of the conductivity consolidation pulse is too small, there will be no significant conductivity consolidation effect. Therefore, in this example, the subthreshold pulse amplitude in the conductivity consolidation process of the present invention should be slightly smaller than the threshold, that is, the range can be greater than 0.4V and less than 0.8V.
[0032] Furthermore, TiN / HfO2 / TaO x / TiN memristor as an example, Figure 5 The present invention is a cumulative distribution diagram of 8 conductance states after the relaxation process of the memristor under the existing programming method without conductance consolidation operation and the programming method with conductance consolidation operation of the present invention. The 8 target conductance states are 2μS, 8μS, 14μS, 20μS, 26μS, 32μS, 38μS and 44μS, and the conductance state range covers the high resistance state (HRS) and low resistance state (LRS) of the memristor. It can be seen that the present invention introduces the conductance consolidation operation, and the difference between the conductance state of the memristor and the target conductance state after the relaxation process is significantly reduced. At the same time, it can be seen that the relaxation effect is manifested as the distribution of the conductance state is almost centered on the target conductance, drifting in two directions of greater conductance and smaller conductance. The present invention introduces the conductance consolidation operation, and the drift amplitude in the two directions is reduced, that is, the programming method of the present invention can suppress the conductance drift in these two directions.
[0033] Furthermore, TiN / HfO2 / TaO x / TiN memristor as an example, Figure 6 is the standard deviation of the distribution of the eight conductance states of the memristor after the relaxation process under two different programming methods, which corresponds to Figure 5 The cumulative distribution diagram in FIG. 1 shows that the two programming methods are the existing write verification method without conductance consolidation operation and the write verification method with conductance consolidation operation of the present invention. It can be seen that the present invention introduces conductance consolidation operation, and the standard deviation of the distribution of the memristor after relaxation in all conductance states is significantly reduced, which means that the range of conductance distribution after relaxation is reduced.
[0034] The above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit the same. A person skilled in the art may modify or make equivalent substitutions for the technical solutions of the present invention without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be subject to the claims.
Claims
1. A programming method for alleviating the conductivity relaxation effect of a nonvolatile memristor, wherein the conductivity value obtained by reading the memristor, the target conductivity value, and the allowable programming conductivity error are respectively recorded as G read , G T and G e , the difference between the conductivity value obtained by the read operation and the target conductivity value is recorded as ΔG, that is, ΔG = G read -G T , the total number of cycles is recorded as n, the number of conductivity consolidation cycles is recorded as m, and the number of consecutive applications of SET or RESET write pulses is recorded as i. The specific steps include the following: 1) Programming starts, reading the current conductance G of the memristor read ; 2) If G read In the target conductance range [G T -G e ,G T +G e ], that is, |ΔG| <G e , then directly enter the conductance consolidation stage; otherwise, write verification is performed; the conductance consolidation stage is specifically to judge m, if m==m max , the programming is successful; otherwise, the conductance consolidation subprocess is run; that is, a subthreshold pulse in the SET direction is applied, and then the conductance is read; if |ΔG| is not satisfied at this time <G e , the conductance consolidation subprocess is terminated directly; otherwise, a subthreshold pulse in the RESET direction is applied, and then the conductance is read to terminate the conductance consolidation subprocess. After the conductance consolidation subprocess is terminated, m becomes m+1, and the G obtained in the conductance consolidation subprocess is read Make further judgments; 3) If it is determined in step 2) to perform write verification, n is judged, and if n == n max , the programming fails; otherwise, continue to read Make a judgment; if G read Below the target conductivity range [G T -G e ,G T +G e ], that is, ΔG<-G e , then apply the SET pulse sequence; if G read Higher than the target conductivity range, that is, ΔG>G e , a reset RESET pulse sequence is applied.
2. The programming method for alleviating the conductivity relaxation effect of a non-volatile memristor as claimed in claim 1, characterized in that: The RESET pulse sequence is specifically as follows: applying a RESET pulse, i becomes i+1, and then reading the conductance; If ΔG>G is still satisfied at this time e And i≠i max , then increase the RESET pulse amplitude, and repeat the RESET pulse and judgment; otherwise, end the RESET sub-process, and n becomes n+1, and repeat steps 2)-3).
3. The programming method for alleviating the conductivity relaxation effect of a non-volatile memristor as claimed in claim 1, characterized in that: The SET pulse sequence is specifically as follows: applying a SET pulse, i becomes i+1, and then reading the conductance; If ΔG<-G is still satisfied at this time e And i≠i max , then increase the SET pulse amplitude, and repeat the SET pulse application and judgment; otherwise, end the SET sub-process, and n becomes n+1, and repeat steps 2)-3).
4. The programming method for alleviating the conductivity relaxation effect of a non-volatile memristor as claimed in claim 1, characterized in that: The memristor comprises a top electrode layer, a resistive switching layer and a bottom electrode layer stacked from top to bottom, wherein the resistive switching layer is made of Ta2O5 or HfO2 metal oxide.
5. The programming method for alleviating the conductivity relaxation effect of a non-volatile memristor as claimed in claim 4, characterized in that: In the memristor, a functional layer is arranged on the resistive layer, and the material of the functional layer is TaO x 、TiO x 、AlO x 、SiO x , HfO x Metal oxides.
6. The programming method for alleviating the conductivity relaxation effect of a non-volatile memristor as claimed in claim 4, characterized in that: Place The materials of the top electrode and the bottom electrode in the memristor are TiN, TaN, Ta, Ti, W, Al, Cu, Ag, Pt, and Ir metals.
Citation Information
Patent Citations
Memristor-based neural network training method and memristor-based neural network training device
CN110796241A
Method for extracting conductivity relaxation effect characteristic parameters of resistive random access memory
CN112382331A
Preparation method of bidirectional threshold switching gate tube unit with low threshold voltage drift and product
CN114005933A
Multilevel Nonvolatile Memory via Dual Polarity Programming
US20100284211A1
Stabilization of resistive memory
US20130094275A1