Method and device for optimizing threshold distribution offset of flash memory and storage medium

Abstract

The invention discloses a flash memory threshold distribution offset optimization method and device and a storage medium, and relates to the technical field of memorizers, and the method comprises the following steps: obtaining working environment information of a storage unit of a flash memory device; inputting the working environment information into a preset target threshold offset prediction model to obtain a first threshold offset of the storage unit; and adjusting the initial threshold voltage range of the storage unit according to the first threshold offset to obtain a target threshold voltage range. The reliability and integrity of data can be improved, and the overall service life of the flash memory device is prolonged.

Description

Technical Field

[0001] The present application relates to the field of memory technology, and in particular to a flash memory threshold distribution offset optimization method, device and storage medium. Background Art

[0002] During long-term use of flash storage systems, the threshold voltage distribution for reading correct data will gradually change due to the cumulative effects of programming and erasing, temperature, humidity, the number of erase and write times of flash physical blocks, flash operating voltage, flash type, external electronic magnetic field interference and other factors, resulting in a decrease in data reliability and performance.

[0003] In order to solve the impact of threshold voltage changes, currently, a specific and fixed threshold distribution offset is usually set in the flash firmware. When a data error is detected, all threshold distribution offsets are looped through. For each offset, the firmware will try to apply it to adjust or interpret the stored data. If the data can be successfully corrected and verified at a certain offset, then the offset is considered valid and the firmware will use it to update the stored data. This method relies on the accuracy and comprehensiveness of the preset offset. If the offset is set improperly, the effect of data correction may be affected.

[0004] The above contents are only used to assist in understanding the technical solution of the present application and do not constitute an admission that the above contents are prior art. Summary of the invention

[0005] The main purpose of this application is to provide a flash memory threshold distribution offset optimization method, device and storage medium, aiming to solve the technical problem of how to detect and dynamically adjust the threshold voltage of the flash memory in real time and improve data reliability.

[0006] To achieve the above object, the present application proposes a method for optimizing the flash memory threshold distribution offset, the method comprising:

[0007] Obtaining working environment information of a storage unit of a flash memory device;

[0008] Inputting the working environment information into a preset target threshold offset prediction model to obtain a first threshold offset of the storage unit;

[0009] According to the first threshold offset, the initial threshold voltage range of the memory cell is adjusted to obtain a target threshold voltage range.

[0010] In one embodiment, before the step of obtaining the working environment information of the storage unit of the flash memory device, the method further includes:

[0011] After the flash memory device enters the initialization operation, the storage unit is erased and written and read;

[0012] According to the results of the erase and write operations and the read operations, the initial threshold voltage range of the memory cell is determined.

[0013] In one embodiment, the step of determining the initial threshold voltage range of the memory cell according to the results of the erase operation and the read operation includes:

[0014] Performing an erase operation on the memory cell to reset the threshold voltage of the memory cell to a highest state;

[0015] Performing a read operation on the erased storage cell to obtain an upper threshold voltage value;

[0016] Under a preset working environment, performing at least one set of programming operations and reading operations on the storage unit according to the test data sequence to obtain a threshold voltage lower limit value;

[0017] An initial threshold voltage range is determined according to the threshold voltage upper limit value and the threshold voltage lower limit value.

[0018] In one embodiment, the method further comprises:

[0019] When the initialization operation is detected to be completed, the storage unit is subjected to an erase test and a read test according to the working environment information;

[0020] Obtain information about each working environment and read the real-time threshold voltage corresponding to the test;

[0021] An initial threshold shift prediction model is determined, and the initial threshold shift prediction model is trained according to the real-time threshold voltage and working environment information to obtain a target threshold shift prediction model.

[0022] In one embodiment, the target threshold offset prediction model is a time series analysis model, and the step of inputting the working environment information into a preset target threshold offset prediction model to obtain the first threshold offset of the storage unit includes:

[0023] Input the work environment information into the time series analysis model;

[0024] According to the time series analysis model, a first threshold voltage shift of the memory cell at a preset time is determined.

[0025] In one embodiment, after the step of determining the first threshold voltage shift of the memory cell at a preset time, the method further includes:

[0026] Determining whether to trigger an adjustment operation according to the first threshold voltage offset;

[0027] If the first threshold voltage offset is greater than or equal to a preset voltage offset threshold, an adjustment operation is triggered;

[0028] The initial threshold voltage range is adjusted according to the first threshold voltage offset to obtain a target threshold voltage range.

[0029] In one embodiment, the method further comprises:

[0030] Acquire and identify storage areas with abnormal threshold voltage shifts based on threshold voltage shifts of respective storage cells;

[0031] Confirming the storage area with abnormal threshold voltage offset as the first storage area, and confirming the other storage areas as the second storage areas;

[0032] Migrate data from the first storage area to the second storage area.

[0033] In one embodiment, the step of identifying the storage area with abnormal threshold voltage shift as the first storage area and the other storage areas as the second storage area includes:

[0034] Calculate the average value of the threshold voltage shift;

[0035] If the threshold voltage offset is greater than or less than the average value, determining that the storage unit corresponding to the threshold voltage offset is the first storage area;

[0036] If the threshold voltage shift is equal to the average value, it is determined that the storage unit corresponding to the threshold voltage shift is the second storage area.

[0037] In addition, to achieve the above-mentioned purpose, the present application also proposes a flash memory device, which includes: a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the computer program is configured to implement the steps of the flash memory threshold distribution offset optimization method as described above.

[0038] In addition, to achieve the above-mentioned purpose, the present application also proposes a storage medium, which is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by the processor, the steps of the flash memory threshold distribution offset optimization method as described above are implemented.

[0039] The present application provides a method for optimizing the offset of the threshold distribution of flash memory, which obtains and inputs the working environment information of the storage unit of the flash memory device into a preset target threshold offset prediction model to obtain the first threshold offset of the storage unit; the threshold offset is predicted by the target threshold offset prediction model, and the influence of multiple factors such as the number of erase and write times, temperature, humidity, flash working voltage, flash type, and external electronic magnetic field interference on the threshold offset can be comprehensively considered to improve the accuracy and reliability of the prediction. According to the first threshold offset, the initial threshold voltage range of the storage unit is adjusted to obtain the target threshold voltage range; by adjusting the threshold voltage range, it is helpful to reduce read and write errors caused by voltage fluctuations, improve the reliability and integrity of data, and extend the overall life of the flash memory device. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0041] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0042] Figure 1 A flow chart of the first embodiment of the method for optimizing the flash memory threshold distribution offset of the present application;

[0043] Figure 2 A detailed flow chart of the first embodiment of the method for optimizing the flash memory threshold distribution offset of the present application;

[0044] Figure 3 A flow chart of Embodiment 2 of the method for optimizing the flash memory threshold distribution offset of the present application;

[0045] Figure 4 A flowchart diagram of Embodiment 4 of the method for optimizing the flash memory threshold distribution offset of the present application is provided;

[0046] Figure 5 Schematic diagram of the device structure of the hardware operating environment involved in the flash memory threshold distribution offset optimization method in the embodiment of the present application.

[0047] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0048] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.

[0049] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0050] The main solution of the embodiment of the present application is: obtaining the working environment information of the storage unit of the flash memory device, the working environment information including the number of erase and write times, temperature and humidity; inputting the working environment information into a preset target threshold offset prediction model to obtain the first threshold offset of the storage unit; according to the first threshold offset, adjusting the initial threshold voltage range of the storage unit to obtain the target threshold voltage range.

[0051] Currently, the impact of threshold voltage changes is usually addressed by setting specific and fixed threshold distribution offsets in the flash firmware. When a data error is detected, all threshold distribution offsets are looped through. For each offset, the firmware attempts to apply it to adjust or interpret the stored data. If the data can be successfully corrected and verified at a certain offset, then the offset is considered valid and the firmware uses it to update the stored data. This approach relies on the accuracy and comprehensiveness of the preset offsets. If the offset is set improperly or fails to cover all possible deviations, the effect of data correction may be affected.

[0052] The present application provides a method for optimizing the offset of the threshold distribution of flash memory, which obtains and inputs the working environment information of the storage unit of the flash memory device into a preset target threshold offset prediction model to obtain the first threshold offset of the storage unit; the threshold offset is predicted by the target threshold offset prediction model, and the influence of multiple factors such as the number of erase and write times, temperature, humidity, flash working voltage, flash type, and external electronic magnetic field interference on the threshold offset can be comprehensively considered to improve the accuracy and reliability of the prediction. According to the first threshold offset, the initial threshold voltage range of the storage unit is adjusted to obtain the target threshold voltage range; by adjusting the threshold voltage range, it is helpful to reduce read and write errors caused by voltage fluctuations, improve the reliability and integrity of data, and extend the overall life of the flash memory device.

[0053] It should be noted that the execution subject of this embodiment can be a computing service device with network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, Nandflash and its corresponding controller, SSD and its corresponding controller, etc., or an electronic device capable of realizing the above functions, a program process abnormality monitoring device, etc. The following takes a flash memory storage device as an example to illustrate this embodiment and the following embodiments.

[0054] Based on this, the embodiment of the present application provides a method for optimizing the flash memory threshold distribution offset, referring to Figure 1 , Figure 1 This is a flow chart of a first embodiment of a method for optimizing a flash memory threshold distribution offset in the present application.

[0055] In this embodiment, the method for optimizing the flash memory threshold distribution offset includes steps S100 to S300:

[0056] Step S100, obtaining working environment information of a storage unit of a flash memory device.

[0057] It should be noted that Flash Memory, also known as flash storage or read-only memory, is a non-volatile electronic memory. It can maintain stored data without external power supply, and has the characteristics of high information density, large-scale reading and writing, and short random access time. Flash memory changes the charge state in the floating gate by controlling the gate voltage, thereby realizing data reading and writing. The number of erase and write times refers to the number of times a flash memory cell undergoes a programming and an erase operation. The complete process of a flash memory cell undergoing a programming and an erase operation is called a P / E (Program / Erase, programming operation and erase operation) cycle.

[0058] In this embodiment, the working environment information includes temperature, humidity, the number of erasures and writes of the flash physical block, the flash working voltage, the flash type, external electronic magnetic field interference, etc. The working environment information of the flash memory device is obtained and analyzed to adjust the threshold voltage range of the storage unit. After the information is obtained, the collected data is organized into a format suitable for input into the prediction model, which usually includes fields such as timestamp, temperature, humidity, and the number of erasures and writes.

[0059] Step S200: inputting the working environment information into a preset target threshold offset prediction model to obtain a first threshold offset of the storage unit.

[0060] In this embodiment, the current working environment information is input into the target threshold offset prediction model to obtain the first threshold offset of each storage unit.

[0061] In one possible implementation, please refer to Figure 2 , the target threshold offset prediction model is a time series analysis model, and step S200 may include steps S210 to S220:

[0062] Step S210: inputting the working environment information into the time series analysis model.

[0063] Step S220 , determining a first threshold voltage offset of a memory cell at a preset time according to a time series analysis model.

[0064] In this embodiment, simple exponential smoothing is used to fit the drift trend of the threshold voltage. First, data collection is performed to obtain a series of threshold distribution offsets arranged in chronological order. The collected threshold distribution offsets should cover a sufficient time range so that the potential trend of the voltage can be captured. After collection, check and remove outliers in the data, which may be caused by measurement errors, hardware failures, or extreme operating conditions. Secondly, select a smoothing parameter α. In simple exponential smoothing, α is a parameter between 0 and 1 that is used to control the degree of influence of historical observations on the current predicted values. The closer the value of α is to 1, the greater the influence of the most recent observations on the prediction; the closer the value of α is to 0, the smaller the influence of the most recent observations on the prediction, and the greater the influence of historical data. The value of α can be selected by experiment or experience, or by trial and error, by trying different α values ​​and comparing the prediction errors to find the optimal value. Then, select an initial smoothing value S 0 , the initial smoothing value represents the predicted value or smoothing value at the first time point, which can be the first observed value of the data series or the average value of the data series. Using the selected α value and the initial smoothing value, the smoothing value (i.e. predicted value) of each time point is calculated according to the recursive formula of simple exponential smoothing. The recursive formula is as follows: St = αYt + (1-α)St-1; where St is the smoothing value (also the predicted value) at time t, Yt is the actual observed value at time t, and St-1 is the smoothing value at time t-1. After obtaining the smoothing value of the entire data series, the smoothing value of the last time point is used as the starting point for the prediction of future time points.

[0065] In this embodiment, the holdout method or cross validation can also be used to evaluate the performance of the prediction. The data set is divided into a training set and a test set, the training set is used to fit the model, and the test set is used to evaluate the accuracy of the prediction. The prediction error is calculated, and the smoothing parameter is adjusted as needed.

[0066] In another feasible implementation, the drift trend of the threshold voltage offset can be analyzed and predicted based on a machine learning model (such as random forest, gradient boosting tree GBDT, neural network, etc.). First, a large amount of data on the change of threshold voltage over time needs to be collected. These data can come from storage devices that are actually running, including data under different temperatures, usage frequencies, write / erase cycles, etc. Secondly, feature extraction is performed: key features such as temperature, write / erase times, storage time, etc. are extracted from the collected data, and these features may be directly related to the drift of the threshold voltage. According to the characteristics of the data and the prediction requirements, a suitable prediction model is selected, such as random forest, gradient boosting tree GBDT, neural network, etc. Then, model training and verification are performed: the model is trained using historical data, and the accuracy and generalization ability of the model are evaluated by methods such as cross-validation. Finally, the trained model is used to predict the drift trend of the future threshold voltage based on current and future conditions (such as the expected number of write / erase times, temperature, etc.).

[0067] Step S300: adjusting the initial threshold voltage range of the memory cell according to the first threshold offset to obtain a target threshold voltage range.

[0068] In this implementation, the initial threshold voltage range of the storage unit is adjusted according to the predicted first threshold offset. The upper and lower limits of the threshold voltage are offset accordingly to compensate for the aging effect. The adjusted threshold voltage range is applied to the flash memory device, and all related firmware and drivers are ensured to be updated. After the adjustment, the performance of the flash memory device is continuously monitored, including the number of erase and write times, temperature, and threshold voltage offset, etc., to ensure that the adjusted settings are effective.

[0069] In this embodiment, the collected threshold voltage offset data measured under different conditions (such as different temperatures, different voltage biases, different stress conditions, etc.) are statistically analyzed to find out the relationship between the threshold voltage offset and various influencing factors. A target threshold offset prediction model is established using regression analysis and other methods, and the expected operating conditions (such as temperature range, erase and write times range, etc.) are input to predict the drift of the threshold voltage under these conditions. The impact of the drift trend on the device performance is evaluated to determine whether the initial threshold voltage range needs to be adjusted. The initial threshold voltage range is adjusted according to the predicted threshold voltage drift. By predicting and adjusting the threshold voltage range, it is possible to ensure that the flash memory maintains stable performance under different operating conditions, reduce performance fluctuations caused by threshold voltage drift, and extend its service life.

[0070] In this embodiment, by real-time monitoring and adjusting the threshold voltage range, it is possible to ensure that the storage unit maintains a stable voltage state during the read and write process, thereby reducing the risk of data errors and loss and improving data reliability. A reasonable threshold voltage range can improve the read and write speed and efficiency of the flash memory device, reduce the read and write delays and errors caused by voltage mismatch, and optimize the read and write performance. By predicting and compensating for the drift trend of the threshold voltage, the damage to the storage unit caused by excessively high or low voltage can be reduced, and the service life of the flash memory device can be extended. In addition, different working environments (such as temperature, humidity, external electronic magnetic field interference, etc.) may affect the threshold voltage of the flash memory device. By real-time monitoring and adjusting the threshold voltage range, the flash memory device can be better adapted to different working environments.

[0071] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the above-mentioned embodiment 1 can be referred to the above introduction, and will not be repeated in the following. Figure 3 , before step S100, steps S01 to S02 may also be included:

[0072] Step S01, after the flash memory device enters the initialization operation, the storage unit is erased and written and read.

[0073] Step S02, determining an initial threshold voltage range of the memory cell according to the results of the erase and write operations and the read operations.

[0074] In this embodiment, during the initialization phase of the flash memory device, performing erase and read operations on the memory cell to determine its initial threshold voltage range is an important step, which helps to understand the basic performance characteristics of the memory cell and provides a basis for subsequent data writing, reading and error correction operations.

[0075] In this embodiment, after the flash memory device enters the initialization phase, first, a set of storage cells to be initialized and the initial threshold voltage range is determined, which can be all blocks, pages or single storage cells of the entire flash memory chip. Secondly, an erase operation is performed on the selected storage cells. In flash memory, the erase operation usually resets the state of all storage cells to the "1" state (or the highest threshold voltage state). After the erase operation is completed, a read operation is performed on the erased storage cells. The read operation can be completed by sending a read command to the flash memory controller and specifying the block, page or storage cell to be read. During the reading process, the flash memory controller determines the state of the storage cell (i.e., whether it is stored as "0" or "1") according to the configured read voltage threshold, and gradually changes the read voltage threshold, and records the state transition points of the storage cell at different voltages, thereby inferring the distribution of the threshold voltage.

[0076] Exemplarily, an erase operation is performed to reset the threshold voltage of all memory cells to below 1V. 0.5V is selected as the initial read reference voltage, and a read operation is performed. Since the threshold voltages of all memory cells are below 1V, they can all be successfully read as logic "1". Gradually increase the read reference voltage: Next, gradually increase the read reference voltage, such as from 0.6V to 0.7V, 0.8V, etc., and repeat the read operation. At a certain read reference voltage (such as 0.9V), some memory cells will no longer turn on, indicating that their threshold voltage is higher than this voltage.

[0077] In a feasible implementation manner, step S02 may include the following steps:

[0078] Perform an erase / write operation on the memory cell to reset the threshold voltage of the memory cell to the highest state.

[0079] A read operation is performed on the erased memory cell to obtain an upper threshold voltage value.

[0080] Under a preset working environment, at least one set of programming operation and reading operation is performed on the storage unit according to the test data sequence to obtain the lower limit value of the threshold voltage.

[0081] An initial threshold voltage range is determined according to the threshold voltage upper limit value and the threshold voltage lower limit value.

[0082] In this embodiment, an erase command is sent to the flash memory controller, and the storage block or page to be erased is specified to confirm that the erase operation has been successfully completed and all selected storage cells have been reset to the erased state (i.e., the logical "1" state). Since the erase operation resets the threshold voltage of the storage cell to the highest state, the threshold voltage of the erased state can be regarded as the upper limit of the initial threshold voltage range.

[0083] After the erase and write operation is completed, a read reference voltage range is selected. The read reference voltage range can be selected based on the flash memory specifications and past experience. A reasonable read reference voltage range should be selected. This range should be able to cover the threshold voltage distribution of the storage cell after the erase state. Within the selected range, a series of read reference voltages are set. The intervals (steps) between these voltages should be small enough to accurately depict the distribution of the threshold voltage. A read operation is performed on the storage cell according to each read reference voltage. For each read reference voltage, a read command is sent to the flash memory controller, and the storage block or page to be read and the read reference voltage value are specified. The flash memory controller reads the storage cell according to the provided read reference voltage and returns the state of each storage cell (usually logic "0" or "1"). For each read reference voltage, the voltage point at which the storage cell changes from logic "1" to logic "0" is recorded. This transition point is an estimated value of the threshold voltage of the storage cell. By collecting all the state transition points of the storage cells under different read reference voltages, an estimated diagram of the threshold voltage distribution can be generated. Finally, the initial threshold voltage range is determined based on the first threshold voltage and multiple second threshold voltages. The second threshold voltage obtained by the read operation is combined with the upper threshold voltage limit of the erased state to determine the initial threshold voltage range of the memory cell after erasure. This range can be a continuous interval starting from the upper threshold voltage limit of the erased state and ending at the lowest second threshold voltage.

[0084] In a feasible implementation manner, after step S02, the flash memory threshold distribution offset optimization method may further include steps S03 to S05:

[0085] Step S03, when it is detected that the initialization operation is completed, the storage unit is subjected to an erase test and a read test according to the working environment information.

[0086] In this embodiment, the flash memory controller can monitor the initialization process of the flash memory chip. When the internal status register of the flash memory chip changes, or an interrupt signal from the flash memory chip is received, the initialization operation is completed.

[0087] Optionally, the progress of the initialization operation can be monitored by polling the status register. First, define a status register address, which is specified in the flash chip specification sheet and is used to store the current status information of the chip. Second, write a loop (polling) function in the flash controller to periodically read the value of the status register. In the polling function, the read status register value is compared with the preset initialization completion flag (or a series of status codes). If the value of the status register indicates that the initialization is complete (that is, the initialization completion flag is matched or the expected status code sequence is reached), the polling loop is exited and an internal operation completion signal is generated or the corresponding interrupt service routine is triggered.

[0088] Optionally, the initialization operation is completed when an interrupt signal is received from the flash memory chip. First, make sure that both the flash memory controller and the flash memory chip support the interrupt function and that their interrupt interfaces (such as GPIO pins) are correctly connected. Second, configure an interrupt service routine in the flash memory controller, which is used to handle the interrupt signal from the flash memory chip. During the initialization process of the flash memory chip, send a command requesting an interrupt or set the corresponding register to generate an interrupt signal when the initialization is completed. When the flash memory chip completes the initialization and sends an interrupt signal, the interrupt controller of the flash memory controller captures this signal and calls the pre-configured interrupt service routine.

[0089] In this embodiment, when the initialization operation of the flash memory chip is completed, the real-time threshold voltage detection process is triggered to perform erase and write tests and read tests on the flash memory device. The flash memory controller sends a series of read and write commands to the flash memory chip, which are targeted at specific storage cells or blocks and set different voltage thresholds for attempts.

[0090] In this embodiment, when the threshold voltage range of the storage unit is inferred by the read and write operation, the real-time threshold voltage is obtained by the method of "read retry" or "voltage threshold adjustment". First, determine the specific object to be tested and prepare test data, which is used to verify the correctness of the read operation. The object to be tested can be the entire flash memory chip, a specific physical block (Block), a page (Page) or a single storage unit (Cell). Secondly, send a write command to the flash memory chip to write the prepared test data to the target storage unit or block. When the write operation is completed, check the status of the write operation to ensure that the data has been successfully written. Then, perform a read retry. Set the initial read voltage threshold, which can be the default read voltage value of the flash memory chip or a preset starting value. Send a read command to the flash memory chip to try to read the data in the target storage unit or block with the currently set voltage threshold. Check the result of the read operation. If the read fails or the data is incorrect, adjust the read voltage threshold according to the specifications and algorithms of the flash memory chip, and gradually increase or decrease the read voltage until a voltage threshold range that can successfully and correctly read the data is found.

[0091] Step S04, obtaining each working environment information and reading the real-time threshold voltage corresponding to the test.

[0092] In this embodiment, after the flash memory device is powered on, a special detection circuit or software tool is used to traverse each storage unit of the flash memory device to obtain and record its real-time threshold voltage. After ensuring that the flash memory device has been correctly connected to the test system or computer and the power supply is stable, a suitable detection tool is selected according to the type and specification of the flash memory device, and appropriate detection parameters such as voltage range, step length, detection speed, etc. are set in the detection tool. These parameters can be set according to the specifications and test requirements of the flash memory device. Each storage unit of the flash memory device is traversed using the detection tool. This usually involves sending a series of read commands to the flash memory device and receiving response data from the storage unit. During the traversal process, the detection tool measures and records the real-time threshold voltage of each storage unit. After the measurement is completed, the measured real-time threshold voltage data is recorded and saved in an appropriate storage medium, such as a hard disk, a database or a cloud storage.

[0093] Optionally, in the process of traversing the flash memory device and measuring the real-time threshold voltage of each storage cell, first, the flash memory device is connected to the storage device through an appropriate interface (such as SPI or I 2 C interface) is connected to the detection tool. And the parameters required for detection are configured in the detection tool, including voltage range, step size, detection speed, scanning mode (such as sequential scanning or random access), etc. Secondly, an address sequence is generated inside the detection tool to access each storage unit in the flash memory device in turn. The address generation algorithm ensures that all storage units can be traversed without omission or duplication. Then, according to the generated address, the detection tool sends a read command or a specific detection command to the flash memory device, which requests the flash memory device to provide voltage information of the specified storage unit. The detection tool contains a high-precision voltage detection circuit inside to measure the real-time threshold voltage of the storage unit in the flash memory device. These circuits usually have the characteristics of low noise, high stability and high resolution to ensure the accuracy of the measurement results. After sending the command, the detection tool reads the voltage data returned by the flash memory device, which reflects the voltage characteristics of the storage unit in a specific state. Finally, the detection tool records the real-time threshold voltage data of each storage unit read and stores it in the internal memory or external storage medium. The recorded data may include information such as the address of the storage unit, the measured voltage value, and the timestamp.

[0094] Optionally, considering the capacity and detection speed limitations of the flash memory device, the entire traversal process may take a long time. Therefore, parallel processing or multi-threading technology can be used to improve the detection efficiency. First, a parallel processing strategy is designed to divide the flash memory device into multiple logical areas or partitions according to the capacity of the flash memory device and the parallel capability of the system. Each partition can perform voltage detection independently, thereby realizing parallel processing. An independent thread or processing unit is assigned to each partition to be responsible for the voltage detection task of the partition. Secondly, a thread pool containing multiple threads is created, and the threads in the thread pool can be reused as needed to reduce the overhead of thread creation and destruction. The voltage detection task of each partition is assigned to a thread in the thread pool. The thread obtains the task from the thread pool, performs voltage detection, and returns the result to the main thread or stores it in shared memory. In order to ensure the consistency and accuracy of the data, a synchronization mechanism is set. For example, a mutex, a semaphore, or a condition variable can be used to synchronize the operations between threads. Communication mechanisms such as shared memory, message queues, or sockets can be used between threads to achieve inter-thread communication. During the entire traversal process, real-time monitoring of CPU usage, memory occupancy, I / O bandwidth and other performance indicators are performed, and the thread pool size, partition strategy or synchronization mechanism are dynamically adjusted according to resource usage and performance monitoring results to optimize detection efficiency. Through the above steps and strategies, parallel processing or multi-threading technology can be effectively used to improve the detection efficiency during the flash device traversal process. This can not only shorten the detection time, but also improve the overall performance and reliability of the system.

[0095] Optionally, the detection tool can be a dedicated test chip that integrates the necessary circuits and interfaces for connecting to the flash memory device and performing voltage detection. It can also be connected to the flash memory device through an external circuit (such as a voltmeter, oscilloscope, etc.) to measure its voltage output in different states. AndroBench can also be used to trigger the read and write operations of the flash memory device to record and observe the voltage changes.

[0096] For example, for a NAND flash memory device with a capacity of 1GB, the following parameters are set during the real-time threshold voltage acquisition process: voltage range: 2.0V to 4.0V; step size: 0.01V; detection speed: detect 10,000 storage cells per second. During the traversal process, the detection tool will measure the voltage of each storage cell according to the set parameters. When the 100,000th storage cell is detected, its real-time threshold voltage is 3.25V.

[0097] In this embodiment, the threshold voltage offset can be calculated according to the average value of the initial threshold voltage and the real-time threshold voltage. For example, the real-time threshold voltage Vt_real = 2.5V, the initial threshold voltage range Vinit_min = 2.0V, Vinit_max = 2.4V, then Vt_init_avg = (2.0V + 2.4V) / 2 = 2.2V. Therefore, the threshold voltage offset ΔVt = 2.5V - 2.2V = 0.3V.

[0098] Step S05, determining an initial threshold shift prediction model, and training the initial threshold shift prediction model according to the real-time threshold voltage and working environment information to obtain a target threshold shift prediction model.

[0099] In this embodiment, after data acquisition, the real-time threshold voltage, the number of erase and write tests, and the test temperature data are preprocessed, outliers and missing values ​​are cleaned, and the data is standardized or normalized to generate a data set. The data set is divided into a training set, a validation set, and a test set, illustratively, in a ratio of 70%, 15%, and 15%. It is suitable to select a regression model to predict the threshold offset, such as linear regression, polynomial regression, and neural network. The selected model is trained using the training set data, and the model hyperparameters are adjusted through cross-validation and other techniques. After the training is completed, the model performance is evaluated through the validation set, including accuracy and generalization ability. And the model structure and parameters are adjusted or a new model is selected according to the verification results, and finally the target threshold offset prediction model is obtained.

[0100] In this embodiment, by establishing a target threshold shift prediction model based on real-time threshold voltage, erase and write test times and test temperature, the threshold shift of the storage device can be predicted more accurately, providing strong support for device maintenance and optimization.

[0101] Based on the first embodiment of the present application, in the third embodiment of the present application, the same or similar contents as those in the first embodiment can be referred to the above description, and will not be described in detail later. On this basis, the following steps can be further included after step S200:

[0102] Whether to trigger the adjustment operation is determined according to the first threshold voltage offset.

[0103] If the first threshold voltage offset is greater than or equal to a preset voltage offset threshold, an adjustment operation is triggered.

[0104] The initial threshold voltage range is adjusted according to the first threshold voltage offset to obtain a target threshold voltage range.

[0105] In this embodiment, a voltage offset threshold is set, and when the first threshold voltage offset exceeds the preset first threshold voltage, the adjustment operation is triggered. If it is predicted that the threshold voltage will drift toward a low voltage, the lower limit of the threshold range of the read voltage is appropriately lowered to prevent misreading. If it is predicted that the threshold voltage will drift toward a high voltage, the upper limit of the threshold range of the read voltage is increased.

[0106] In this embodiment, whether to trigger an adjustment operation is determined based on the first threshold voltage offset, and the initial threshold range is adjusted when necessary. By setting the threshold, unnecessary adjustments can be reduced, resource allocation of the flash memory device can be optimized, resource utilization can be improved, and the life of the flash memory can be extended.

[0107] Based on the first embodiment of the present application, in the fourth embodiment of the present application, the same or similar contents as those in the above-mentioned embodiment 1 can be referred to the above introduction, and will not be repeated in the following. Figure 4 After step S30, the flash memory threshold distribution offset optimization method further includes steps B10 to B30:

[0108] Step B10, obtaining and identifying storage areas with abnormal threshold voltage shifts according to the threshold voltage shifts of the respective storage cells.

[0109] Step B20: confirming the storage area with abnormal threshold voltage shift as the first storage area, and confirming the other storage areas as the second storage areas.

[0110] Step B30: Migrate data in the first storage area to the second storage area.

[0111] In this embodiment, first, the threshold offset data of the storage block is collected and statistically analyzed. A hardware monitoring tool or software agent is used to regularly read the threshold offset data of each storage block in the storage system. The threshold offset data contains a unique identifier of each storage block, a current threshold offset value, and possible other performance indicators (such as the number of reads and writes, error rate, etc.). The collected data is classified and sorted, and grouped by storage blocks or regions. Secondly, statistical indicators such as the threshold offset average value, standard deviation, maximum value and minimum value of each storage block or region are calculated. Storage blocks or regions with abnormal threshold offsets (such as far higher or lower than the average value) are identified. According to the characteristics and requirements of the storage system, a reasonable threshold offset range is set as a judgment standard. This range can be determined based on the historical performance of the storage block, the manufacturer's recommendations, or the actual operation of the system. The statistical analysis results are compared with the set threshold range. The region where the storage unit whose threshold voltage offset exceeds the abnormal threshold is located is identified as the first storage region, and the region where all storage units that are not identified as the first storage region are located is confirmed as the second storage region. The data in the first storage region is backed up to prevent data loss during the migration process. All data in the first storage area is migrated to the second storage area.

[0112] After the migration is completed, evaluate the performance of the storage system after the migration, including indicators such as read and write speed, latency, and error rate, and compare the performance data before and after the migration to confirm whether the migration has brought performance improvement. After the data migration, use data consistency verification tools or scripts to check whether the migrated data is consistent with the original data to verify the integrity and accuracy of the data and ensure that there is no data loss or damage. Finally, based on the migration results and performance evaluation feedback, further adjust and optimize the layout and configuration of the storage system. Minimize the risks and problems during the migration process.

[0113] In this implementation, a load balancing strategy is adopted to dynamically adjust the data layout according to the threshold offset and current load of the storage block. Avoid concentrating too much data on a few storage blocks with degraded performance to reduce read-write conflicts and wear of these blocks. When adjusting the data layout, the remaining life and erase-write times of the storage block can also be considered. Through data migration and rearrangement, the wear degree of all storage blocks is ensured to be as consistent as possible, thereby extending the overall life.

[0114] In a feasible implementation manner, step B20 may further include the following steps:

[0115] Calculate the average value of the threshold voltage shifts.

[0116] If the threshold voltage shift is greater than or less than the average value, it is determined that the storage unit corresponding to the threshold voltage shift is the first storage area.

[0117] If the threshold voltage shift is equal to the average value, it is determined that the storage unit corresponding to the threshold voltage shift is the second storage area.

[0118] In this embodiment, the average value of the threshold voltage offset is calculated, and a conditional judgment is performed on the threshold voltage offset of each storage cell. If the threshold voltage offset of a certain storage cell is greater than or less than the average value of the threshold voltage offset, the storage cell is determined as the first storage area. If the threshold voltage offset of a certain storage cell is equal to the average value of the threshold voltage offset, the storage cell is determined as the second storage area. Finally, the classification result of each storage cell is recorded and applied to actual storage management, data access optimization or error correction strategy as needed.

[0119] In this embodiment, after dynamically adjusting the threshold range of the storage unit according to the real-time monitored threshold distribution offset data and analysis results, the data writing strategy can also be optimized, such as adjusting programming parameters, erasing strategy and FTL (Flash Translation Layer) application layer algorithm.

[0120] When adjusting programming parameters, adjust the programming voltage level according to the new threshold range to ensure that data can be accurately written to the correct storage state. Optimize the width and number of programming pulses to reduce programming errors and increase programming speed. Add a verification read step to ensure that the written data is accurate.

[0121] When optimizing the erase strategy, the voltage threshold of the erase operation is dynamically adjusted according to the change of the threshold offset to ensure that the old data is completely erased. Prioritize erasing those storage blocks with large threshold offsets or close to the life limit to balance the wear of the storage blocks. Perform a verification step after the erase operation to ensure that the storage block is completely cleared to avoid data residue.

[0122] When adjusting the FTL application layer algorithm, the garbage collection strategy is optimized according to the new threshold range and storage block status to reduce the impact of invalid data on performance. The wear leveling algorithm is strengthened to ensure that the wear level of all storage blocks is as consistent as possible to extend the overall life. According to the change of threshold offset, the layout of data in the storage block is adjusted to reduce read and write conflicts and improve performance.

[0123] In this embodiment, by monitoring the threshold distribution offset data and analysis results in real time, dynamically adjusting the threshold range of the storage unit and optimizing the data writing strategy, the reliability of the data and the performance of the storage system can be ensured.

[0124] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the optimization method of the flash memory threshold distribution offset of the present application. More forms of simple transformations based on this technical concept are all within the scope of protection of the present application.

[0125] The present application provides a flash memory threshold distribution offset optimization device, the flash memory threshold distribution offset optimization device includes: at least one processor; and a memory connected to the at least one processor; wherein the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the flash memory threshold distribution offset optimization method in the above-mentioned embodiment one.

[0126] Reference below Figure 5 , which shows a schematic diagram of a structure of a flash memory threshold distribution offset optimization device suitable for implementing the embodiment of the present application. The flash memory threshold distribution offset optimization device in the embodiment of the present application may include but is not limited to mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, products with embedded electronic storage functions, etc. Figure 5 The flash memory threshold distribution offset optimization device shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0127] like Figure 5As shown, the optimization device for the flash threshold distribution offset may include a processing device 1001 (e.g., a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM) 1004. Various programs and data required for the operation of the optimization device for the flash threshold distribution offset are also stored in the RAM 1004. The processing device 1001, the ROM 1002, and the RAM 1004 are connected to each other via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems may be connected to the I / O interface 1006: an input device 1007 including, for example, a touch screen, a touchpad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; an output device 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; a storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 may allow the optimization device for the flash threshold distribution offset to communicate wirelessly or wired with other devices to exchange data. Although the figure shows an optimization device for the flash threshold distribution offset with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems may be implemented or have instead.

[0128] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0129] The flash memory threshold distribution offset optimization device provided by the present application adopts the flash memory threshold distribution offset optimization method in the above embodiment, which can solve the technical problem of how to detect and dynamically adjust the threshold voltage of the flash memory in real time and improve data reliability. Compared with the prior art, the beneficial effects of the flash memory threshold distribution offset optimization device provided by the present application are the same as the beneficial effects of the flash memory threshold distribution offset optimization method provided by the above embodiment, and the other technical features in the flash memory threshold distribution offset optimization device are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0130] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0131] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0132] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the method for optimizing the flash memory threshold distribution offset in the above-mentioned embodiment.

[0133] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination of the above.

[0134] The computer-readable storage medium may be included in the device for optimizing the flash memory threshold distribution offset; or may exist independently without being assembled into the device for optimizing the flash memory threshold distribution offset.

[0135] The above-mentioned computer-readable storage medium carries one or more programs. When the above-mentioned one or more programs are executed by a flash memory threshold distribution offset optimization device, the flash memory threshold distribution offset optimization device: obtains the working environment information of the storage unit of the flash memory device, the working environment information includes the number of erase and write times, temperature and humidity; inputs the working environment information into a preset target threshold offset prediction model to obtain a first threshold offset of the storage unit; and adjusts the initial threshold voltage range of the storage unit according to the first threshold offset to obtain a target threshold voltage range.

[0136] Computer program code for performing the operations of the present application may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0137] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0138] The modules involved in the embodiments described in this application may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.

[0139] The readable storage medium provided in the present application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned flash memory threshold distribution offset optimization method, and can solve the technical problem of how to detect and dynamically adjust the threshold voltage of the flash memory in real time and improve data reliability. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in the present application are the same as the beneficial effects of the flash memory threshold distribution offset optimization method provided in the above-mentioned embodiment, and will not be repeated here.

[0140] The above descriptions are only some embodiments of the present application, and are not intended to limit the patent scope of the present application. All equivalent structural changes made using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect applications in other related technical fields are included in the patent protection scope of the present application.

Claims

1. A method for optimizing a flash memory threshold distribution offset, characterized in that: The method includes: Obtaining working environment information of a storage unit of a flash memory device; Inputting the working environment information into a preset target threshold offset prediction model to obtain a first threshold offset of the storage unit; According to the first threshold offset, the initial threshold voltage range of the memory cell is adjusted to obtain a target threshold voltage range.

2. The method according to claim 1, characterized in that Before the step of obtaining the working environment information of the storage unit of the flash memory device, the method further includes: After the flash memory device enters an initialization operation, performing an erase and write operation and a read operation on the storage unit; The initial threshold voltage range of the memory cell is determined according to the results of the erase operation and the read operation.

3. The method according to claim 2, characterized in that The step of determining the initial threshold voltage range of the memory cell according to the results of the erase operation and the read operation comprises: Performing an erase and write operation on the storage unit to reset the threshold voltage of the storage unit to a highest state; Performing a read operation on the erased storage unit to obtain an upper threshold voltage value; Under a preset working environment, performing at least one set of programming operations and reading operations on the storage unit according to a test data sequence to obtain a threshold voltage lower limit value; The initial threshold voltage range is determined according to the threshold voltage upper limit value and the threshold voltage lower limit value.

4. The method according to claim 2, characterized in that The method further comprises: When it is detected that the initialization operation is completed, performing an erase test and a read test on the storage unit according to the working environment information; Obtaining the real-time threshold voltage corresponding to the read test under each of the working environment information; An initial threshold shift prediction model is determined, and the initial threshold shift prediction model is trained according to the real-time threshold voltage and the working environment information to obtain the target threshold shift prediction model.

5. The method according to claim 1, characterized in that The target threshold offset prediction model is a time series analysis model, and the step of inputting the working environment information into a preset target threshold offset prediction model to obtain the first threshold offset of the storage unit includes: Inputting the working environment information into the time series analysis model; According to the time series analysis model, a first threshold voltage offset of the storage unit at a preset time is determined.

6. The method according to claim 5, characterized in that After the step of determining the first threshold voltage shift of the storage unit at a preset time, the method further includes: Determining whether to trigger an adjustment operation according to the first threshold voltage offset; If the first threshold voltage offset is greater than or equal to a preset voltage offset threshold, an adjustment operation is triggered; The initial threshold voltage range is adjusted according to the first threshold voltage offset to obtain the target threshold voltage range.

7. The method according to claim 1, characterized in that The method further comprises: Acquire and identify storage areas with abnormal threshold voltage shifts according to the threshold voltage shifts of the storage cells; Confirming the storage area with abnormal threshold voltage offset as the first storage area, and confirming the other storage areas as the second storage areas; Migrate data in the first storage area to the second storage area.

8. The method according to claim 7, characterized in that The step of confirming the storage area with abnormal threshold voltage offset as the first storage area and confirming other storage areas as the second storage area comprises: Calculating an average value of the threshold voltage offset; If the threshold voltage offset is greater than or less than the average value, determining that the storage unit corresponding to the threshold voltage offset is the first storage area; If the threshold voltage shift is equal to the average value, it is determined that the storage unit corresponding to the threshold voltage shift is the second storage area.

9. A flash memory device, characterized in that: The device comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the method for optimizing the flash memory threshold distribution offset according to any one of claims 1 to 8.

10. A storage medium, characterized in that: The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the method for optimizing the flash memory threshold distribution offset according to any one of claims 1 to 8 are implemented.

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