High-conversion-ratio dual-channel DC-DC converter

Abstract

The invention provides a dual-channel DC-DC converter. The dual-channel DC-DC converter comprises an input stage and an output stage, the input stage adopts a multi-stage Fibonacci switched capacitor topology circuit structure; the output stage is connected with the input stage and adopts a dual-channel topological circuit structure in which an inductor and a switched capacitor are connected in parallel; wherein the flying capacitor in the output stage is charged and discharged and the inductor is magnetized and demagnetized by controlling the linkage on-off of the switches in the input stage and the output stage, so that the full-period parallel shunting of the capacitor and the inductor in the output stage is realized, and the voltage conversion ratio is improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of circuit design, and in particular to a high conversion ratio dual-path DC-DC converter. Background Art

[0002] High conversion ratio DC-DC converters are widely used in data centers, 5G communication base stations, and automotive electronics. However, in such converters, power inductors often become the key bottleneck that limits system efficiency and power density. In order to improve system efficiency, it is usually necessary to use larger inductors with excellent performance, but this also poses challenges to the miniaturization and power density of the system. Therefore, achieving high efficiency and high power density of high conversion ratio DC-DC converters has become a core design problem for optimizing the energy efficiency ratio of the power supply unit.

[0003] In high conversion ratio applications, traditional Buck DC-DC converters usually face problems such as short conduction time, low efficiency and insufficient power density. In recent years, the dual-channel DC-DC converter proposed by the academic community has introduced flying capacitor technology to reduce the voltage and reduce the average current of the inductor, thereby improving the voltage conversion ratio and reducing the dependence on large-size high-performance inductors. However, the current related architecture has insufficient utilization of flying capacitors, and there are redundant flying capacitors at the step-down level. The capacitors will also occupy a large motherboard area, limiting the space for further improvement of power density. Summary of the invention

[0004] In view of this, in order to at least partially solve at least one of the above-mentioned technical problems, the present disclosure provides a dual-channel DC-DC converter.

[0005] In order to achieve the above purpose, the technical solution of the present invention is as follows:

[0006] According to an embodiment of the present disclosure, a dual-path DC-DC converter is provided, comprising an input stage and an output stage; the input stage adopts a multi-stage Fibonacci switched capacitor topology circuit structure; the output stage is connected to the input stage, and adopts a dual-path topology circuit structure in which an inductor and a switched capacitor are connected in parallel; wherein, by controlling the linkage on and off of switches in the input stage and the output stage, the flying capacitor in the output stage is charged and discharged, and the inductor is magnetized and demagnetized, thereby achieving full-cycle parallel shunting of the capacitor and the inductor in the output stage and improving the voltage conversion ratio.

[0007] According to the embodiment of the present disclosure, the output stage includes an inductor L, a capacitor C4, a switch S9, a switch S 10 , switch S 11One end of the inductor L is connected to an output end of the input stage, and the other end is connected to the load through the output node; one end of the capacitor C4 is connected to the other output end of the input stage through the node SW7, and the other end of the capacitor C4 is connected to the switch S 11 After grounding, flying capacitor C4 and switch S 11 A node SW8 is provided between the nodes SW7 and SW8, and the nodes SW7 and SW8 are connected through switches S9 and S 10 Connect to the output node.

[0008] According to the embodiment of the present disclosure, the input stage adopts a modified Fibonacci switched capacitor topology circuit structure with three-level connection point shifting.

[0009] The input stage includes a switch S0, a switch S1, a switch S2, a switch S3, a switch S4, a switch S5, a switch S6, a switch S7, a switch S8, a flying capacitor C1, a flying capacitor C2, and a flying capacitor C3. Among them, switch S0, switch S1, switch S4, and switch S7 are connected in series in sequence, a node SW1 is set between switch S0 and switch S1, a node SW3 is set between switch S1 and switch S4, a node SW5 is set between switch S4 and switch S7, switch S7 is connected to switch S9 via node SW7, node SW1 is connected to flying capacitor C1 and switch S3 and then grounded, a node SW2 is set between flying capacitor C1 and switch S3, and node SW2 is connected to the node SW5 through switch S2; node SW3 is connected to flying capacitor C2 and switch S6 and then grounded, a node SW4 is set between flying capacitor C2 and switch S6, and node SW4 is connected to the node SW7 through switch S5; node SW5 is connected to flying capacitor C3 and switch S8 and then grounded, and a node SW6 is set between flying capacitor C3 and switch S8; the switch S0 is connected to the input end in front, and connected to the output stage in the back of switch S7.

[0010] According to an embodiment of the present disclosure, the dual-path DC-DC converter includes a first working phase state and a second working phase state; in the first working phase state, the capacitor C4 in the output stage is discharged, the inductor L is magnetized, and the load simultaneously receives the discharged charge from the capacitor C4 and the inductor charge. In the second working phase state, the capacitor C4 in the output stage is charged, the inductor L is demagnetized, and the load simultaneously receives the charged charge from the capacitor C4 and the inductor charge.

[0011] According to the embodiment of the present disclosure, in the first working phase state, switches S0, S2, S4, S6, S9, and S 11 On, switch S1, switch S3, switch S5, switch S7, switch S8, switch S 10 Turn off, at this time, the flying capacitors C1 and C3 are charged, the flying capacitors C2 and C4 are discharged, the inductor L is magnetized, and the inductor current rises; the flying capacitor C1 is charged by the power supply V INDirect charging, the sum of the charging charge of the flying capacitor C1 and the discharging charge of the flying capacitor C2 constitutes the charging charge of the flying capacitor C3 and the charge amount transmitted by the inductor L to the output node, and the flying capacitor C4 directly supplies power to the load through the output node.

[0012] According to the embodiment of the present disclosure, in the second working phase state, switches S0, S2, S4, S6, S9, and S 11 Turn off, switch S1, switch S3, switch S5, switch S7, switch S8, switch S 10 The flying capacitors C1 and C3 are turned on, and the flying capacitors C2 and C4 are charged. The inductor L is demagnetized, and the inductor current decreases. The series charge path of the flying capacitors C1 and C2 is connected in parallel with the discharge path of the flying capacitor C3 to charge the flying capacitor C4. At this time, the load receives the charge from the flying capacitor C4 and the charge from the inductor at the same time.

[0013] According to the embodiment of the present disclosure, when the dual-channel DC-DC converter is working, the steady-state voltage of the flying capacitor C1 is for: ; Steady-state voltage of flying capacitor C2 for: ; Steady-state voltage of flying capacitor C3 for: ; Steady-state voltage of flying capacitor C4 for: ; According to the volt-second balance of the inductor magnetizing and demagnetizing states, we can get:

[0014] ;

[0015] but:

[0016] ;

[0017] Then the voltage conversion ratio M of the DC-DC converter is:

[0018] ;

[0019] Where D represents the duty cycle of the switch control signal, 0 <D<1, is the input voltage supply voltage, is the output voltage.

[0020] According to the embodiment of the present disclosure, the ratio of the inductor mean current to the load current can be obtained according to the charge conservation of the capacitor:

[0021] ;

[0022] in, is the mean inductor current, is the load current. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0024] Figure 1 Schematic diagram of a dual-channel hybrid Dickson DC-DC converter in the prior art.

[0025] Figure 2 Schematic diagram of the composition of a high conversion ratio dual-channel DC-DC converter according to an embodiment of the present disclosure.

[0026] Figure 3 FIG. 1 is a schematic diagram of a high conversion ratio dual-channel DC-DC converter including three flying capacitors at the input stage according to an embodiment of the present disclosure.

[0027] Figure 4 Schematic diagram of different working phase states of a high conversion ratio dual-channel DC-DC converter according to an embodiment of the present disclosure.

[0028] Figure 5 Schematic diagram of key waveforms in the first working phase state and the second working phase state of an embodiment of the present disclosure.

[0029] Figure 6 For traditional structure converters and Figure 3 The inductor current ratio comparison diagram of the converter shown is shown.

[0030] Figure 7 Schematic diagram of a high conversion ratio dual-channel DC-DC converter using MOS tubes to implement switching functions according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0031] The present disclosure provides a high conversion ratio dual-channel DC-DC converter, which maximizes the use of flying capacitors based on the Fibonacci switched capacitor topology, achieves the highest achievable conversion ratio under the condition of a given number of flying capacitors, extends the equivalent conduction time, and can also evaluate the minimum number of flying capacitors required to achieve a specific conversion ratio based on the architecture, which is conducive to improving power density. The dual-channel structure reduces the inductor mean current through full-cycle parallel shunting of the switched capacitor and the inductor, thereby reducing the direct current resistance (DCR) conduction loss of the inductor, improving system efficiency, and also relaxing the demand for large-size, small DCR, and high saturation current inductors. On the basis of maintaining high system efficiency, small-size, large DCR, and low saturation current inductors can be used to achieve system miniaturization, improve power density, and reduce costs.

[0032] High conversion ratio DC-DC converters are widely used in data centers, 5G communication base stations, automotive electronics and other fields. In order to achieve higher system efficiency, large-size, high-performance inductors are the best choice, but this restricts the miniaturization of the system and the improvement of power density. System miniaturization is the main demand of power management units today. Due to the limitations of magnetic materials and processes, the energy density of power inductors in inductive DC-DC converters is low, and inductors in the μH range often occupy a larger motherboard area, which has become the main factor restricting miniaturization and also limits the improvement of power density.

[0033] For traditional Buck DC-DC converters, there are two main problems in high conversion ratio applications: 1. The high-side tube conduction time is only 1 / M of the switching period, where M is the voltage conversion ratio of the converter (the ratio of input voltage to output voltage: V IN / V O ), the extremely short conduction time poses a design challenge to the control and drive circuits; 2. The inductor is the main passive component of the power stage, and its average current is the load current. The inductor has a large DCR conduction loss, so a large high-performance inductor is often required to reduce this part of the loss, but this in turn affects the power density of the system. Generally speaking, large-size inductors have better performance: small DCR and large saturation current. For DC-DC converters with rated load current, the selected inductor should first ensure that it has sufficient saturation current to ensure the reliability of the system when operating at maximum load, and secondly, small DCR can ensure high system efficiency. In order to further improve the power density, reducing the size of the inductor is a relatively direct way. In order to maintain a high efficiency of the system, the dual-channel DC-DC converter that reduces the inductor average current reduces the dependence on large-size inductors such as small DCR and large saturation current, and can achieve high efficiency and high power density at the same time.

[0034] In order to address the above-mentioned problems of traditional Buck DC-DC converters, in recent years, dual-channel DC-DC converters, as a hybrid DC-DC converter that uses a combination of capacitors and inductors, have been widely used in power supply scenarios with high conversion ratios and are favored by industry and academia. This type of DC-DC converter is based on the traditional Buck DC-DC converter, introduces additional flying capacitors in the power stage, reduces the inductor charging / demagnetizing voltage based on the series voltage division idea to extend the conduction time, and reduces the inductor average current based on the parallel current shunting idea by connecting in parallel with the inductor to supply power to the output.

[0035] A research team proposed a dual-path hybrid Dickson DC-DC converter for high conversion ratio applications such as 48V to 1V [reference paper: C. Chen, J. Liu, and H. Lee, “A 92.7%-Efficiency 30A48V-to-1V Dual-Path Hybrid Dickson Converter for PoL Applications,” in 2021IEEE Energy Conversion Congress and Exposition (ECCE), Oct. 2021, pp. 1989–1994.], such as Figure 1 As shown. In addition to the output capacitor, the passive components of this architecture include 1 inductor and 6 flying capacitors. The voltage conversion ratio M and the ratio of the inductor current to the load current are given by the following equations (1) and (2), respectively:

[0036] (1);

[0037] (2);

[0038] Where D represents the duty cycle of the power switch control signal (0 <D<1),I L is the mean inductor current, I O is the load current. According to formula (1), the voltage conversion ratio M of the converter can be as low as 7, and the equivalent on-time is approximately increased by 7 times compared with the traditional Buck. At the same time, the ratio of the average inductor current to the load current of the converter is in the range of ( ~1), compared with the traditional Buck, the maximum inductor current can be reduced by 57%, which reduces the conduction loss of the inductor and improves the system efficiency.

[0039] However, the converter requires more passive components, and uses a total of 6 flying capacitors to achieve a 7-fold increase in conversion ratio. The capacitor utilization rate is low, and it occupies a large motherboard area, limiting the improvement of power density. In addition, the reduction of inductor current is limited.

[0040] Traditional Buck DC-DC converters have the disadvantages of low system efficiency, low power density and short conduction time when applied to high conversion ratio scenarios. Existing dual-channel DC-DC converters effectively improve efficiency or power density by introducing flying capacitors to increase conversion ratio and reduce inductor average current. However, the utilization rate of flying capacitors is low, and a large number of flying capacitors are often required to achieve a significant increase in conversion ratio and reduction in inductor current, but this means more passive components on the motherboard, which in turn limits the improvement in power density.

[0041] Based on the above shortcomings, the present invention provides a dual-channel DC-DC converter that simultaneously achieves high conversion ratio, high efficiency and high power density. The Fibonacci switched capacitor topology is used to maximize the use of flying capacitors to achieve high conversion ratio (8 times) voltage output, and the equivalent on-time is improved, avoiding the design challenges posed by extremely short on-time to the control and drive circuits; and the minimum number of flying capacitors required to achieve a specific conversion ratio can also be evaluated based on the architecture, which is conducive to the improvement of power density. At the same time, the dual-channel structure effectively reduces the inductor mean current through the parallel shunting of the switched capacitor and the inductor, thereby reducing the DCR conduction loss of the inductor and improving the system efficiency. At the same time, it also relaxes the demand for large-size inductors. On the basis of maintaining high system efficiency, small-size, large DCR, and low saturation current inductors can be used to achieve system miniaturization, improve power density, and reduce costs.

[0042] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0043] In an embodiment of the present disclosure, a dual-channel DC-DC converter suitable for converting 48V to 2-5V is provided. Figure 2 As shown, the converter comprises:

[0044] The input stage adopts a multi-stage Fibonacci switched capacitor topology circuit structure;

[0045] The output stage is connected to the input stage and adopts a dual-path topology circuit structure in which an inductor L and a switch capacitor C are connected in parallel;

[0046] Among them, by controlling the linkage on and off of the switches in the input stage and the output stage, the flying capacitor C in the output stage is charged and discharged, and the inductor L is magnetized and demagnetized, so as to realize the full-cycle parallel shunting of the capacitor and the inductor in the output stage and improve the voltage conversion ratio.

[0047] According to the embodiment of the present disclosure, Figure 3 As shown, the input stage of the dual-channel DC-DC converter adopts a modified Fibonacci switched capacitor topology circuit structure with a 3-level connection point shift.

[0048] like Figure 3As shown, the input stage includes a switch S0, a switch S1, a switch S2, a switch S3, a switch S4, a switch S5, a switch S6, a switch S7, a switch S8, a flying capacitor C1, a flying capacitor C2, and a flying capacitor C3. Among them, switch S0, switch S1, switch S4, and switch S7 are connected in series in sequence, a node SW1 is set between switch S0 and switch S1, a node SW3 is set between switch S1 and switch S4, a node SW5 is set between switch S4 and switch S7, switch S7 is connected to switch S9 via node SW7, node SW1 is connected to flying capacitor C1 and switch S3 and then grounded, a node SW2 is set between flying capacitor C1 and switch S3, and node SW2 is connected to the node SW5 through switch S2; node SW3 is connected to flying capacitor C2 and switch S6 and then grounded, a node SW4 is set between flying capacitor C2 and switch S6, and node SW4 is connected to the node SW7 through switch S5; node SW5 is connected to flying capacitor C3 and switch S8 and then grounded, and a node SW6 is set between flying capacitor C3 and switch S8; the switch S0 is connected to the input end in front, and connected to the output stage in the back of switch S7.

[0049] According to the embodiment of the present disclosure, Figure 3 As shown, the output stage includes an inductor L, a capacitor C4, a switch S9, a switch S 10 , switch S 11 Among them: one end of the inductor L is connected to an output end of the input stage, and the other end is connected to the load through the output node; one end of the capacitor C4 is connected to the other output end of the input stage through the node SW7, and the other end of the capacitor C4 is connected to the switch S 11 After grounding, flying capacitor C4 and switch S 11 A node SW8 is provided between the nodes SW7 and SW8, and the nodes SW7 and SW8 are connected through switches S9 and S 10 Connect to the output node.

[0050] According to the embodiment of the present disclosure, Figure 3 and Figure 4 As shown, the dual-channel DC-DC converter includes a first working phase state (Phase 1 or φ1) and a second working phase state Phase 2 (Phase 2 or φ2). In the first working phase state, the capacitor C4 in the output stage is discharged, the inductor L is magnetized, and the load simultaneously receives the discharged charge from the capacitor C4 and the inductor charge. In the second working phase state, the capacitor C4 in the output stage is charged, the inductor L is demagnetized, and the load simultaneously receives the charged charge from the capacitor C4 and the inductor charge.

[0051] Specifically, in the first working phase state, if Figure 4 As shown in part (a), switch S0, switch S2, switch S4, switch S6, switch S9, switch S 11On, switch S1, switch S3, switch S5, switch S7, switch S8, switch S 10 Turn off, at this time, the flying capacitors C1 and C3 are charged, the flying capacitors C2 and C4 are discharged, the inductor L is magnetized, and the inductor current rises; the flying capacitor C1 is charged by the power supply V IN Direct charging, the sum of the charging charge of the flying capacitor C1 and the discharging charge of the flying capacitor C2 constitutes the charging charge of the flying capacitor C3 and the charge amount transmitted by the inductor L to the output node, and the flying capacitor C4 directly supplies power to the load through the output node. In the second working phase state, Figure 4 As shown in (b), switch S0, switch S2, switch S4, switch S6, switch S9, switch S 11 Turn off, switch S1, switch S3, switch S5, switch S7, switch S8, switch S 10 The flying capacitors C1 and C3 are turned on, and the flying capacitors C2 and C4 are charged. The inductor L is demagnetized, and the inductor current decreases. The series charge path of the flying capacitors C1 and C2 is connected in parallel with the discharge path of the flying capacitor C3 to charge the flying capacitor C4. At this time, the load receives the charge from the flying capacitor C4 and the charge from the inductor at the same time.

[0052] The above inductor magnetization timing corresponds to Phase 1, and its working time is DT. The inductor demagnetization corresponds to Phase 2, and its working time is (1-D)T. However, it is not limited to this definition method, and the opposite working time setting can also be used.

[0053] According to the embodiment of the present disclosure, Figure 4 and Figure 5 As shown in the figure, when the dual-channel DC-DC converter works in the above two working phase states, it is easy to solve the steady-state voltage of each flying capacitor:

[0054] Steady-state voltage of flying capacitor C1 for:

[0055] (3-1);

[0056] Steady-state voltage of flying capacitor C2 for: (3-2);

[0057] Steady-state voltage of flying capacitor C3 for: (3-3);

[0058] Steady-state voltage of flying capacitor C4 for: (3-4);

[0059] According to the volt-second balance of the inductor magnetizing and demagnetizing states, we can get:

[0060] (4);

[0061] but:

[0062] (5);

[0063] Then the voltage conversion ratio M of the DC-DC converter is:

[0064] (6);

[0065] Where D represents the duty cycle of the switch control signal, 0 <D<1, is the input voltage supply voltage, is the output voltage.

[0066] The switched capacitor in the output stage can be used as part of the Fibonacci switched capacitor, which is equivalent to using a 4-stage Fibonacci switched capacitor structure. Therefore, the minimum achievable conversion ratio under the condition of using a Fibonacci switched capacitor circuit structure with a total of k flying capacitors can be given. for:

[0067] (7);

[0068] F represents the Fibonacci sequence {1(F0), 1(F1), 2(F2), 3(F3), 5(F4), 8(F5), ...}, then the minimum conversion ratio when k (k=4) flying capacitors are used is The value of F5=8, the equivalent on-time is approximately increased to 8 times compared with the traditional Buck. Figure 1 The existing converter structure shown uses 6 flying capacitors to achieve a 7-fold improvement. The converter disclosed in the present invention has a higher conversion ratio and avoids the design challenges posed by extremely short on-times to control and drive circuits.

[0069] The above scheme can be applied to designs targeting voltage conversion ratio to evaluate the minimum number of flying capacitors required to achieve a specific conversion ratio range, thereby avoiding waste of flying capacitors and facilitating improvement of power density.

[0070] According to the embodiment of the present disclosure, the ratio of the inductor mean current to the load current can be obtained according to the charge conservation of the capacitor:

[0071] (8);

[0072] in, is the mean inductor current, is the load current.

[0073] Recombination Figure 6As shown in FIG. 1 , the converter of the present invention uses only four flying capacitors to achieve a lower inductor current within the full duty cycle range, compared with FIG. Figure 1 The converter using 6 flying capacitors can achieve an additional 18% inductor current reduction. Since the inductor mean current is fully reduced, the DCR conduction loss is further reduced, so the present invention can achieve higher system efficiency, remove the restrictions on the inductor DCR and saturation current, and can use a small-sized inductor with a large DCR and a small saturation current to achieve volume reduction while maintaining high efficiency, thereby improving power density and being more suitable for high conversion ratio voltage conversion application scenarios.

[0074] According to the embodiment of the present disclosure, Figure 7 As shown, all switches of the high conversion ratio DC-DC converter can also be implemented by NMOS tubes, and the gate end of the NMOS tube is controlled by a bootstrap circuit, a level conversion circuit, and a driving circuit (for example, the generation method of the driving bootstrap voltage acting on the NMOS tube S10 in the figure), and the loop control is performed in conjunction with the PWM control method. The PWM generator generates a PWM signal and generates two non-overlapping complementary signals PWM_P and PWM_N through a dead time generation circuit as control signals for each power switch. There are many possible implementation methods of the switches in the present invention, and there are many implementation methods, including but not limited to various withstand voltage NMOS, PMOS, and some switches can even use diodes.

[0075] From the above, it can be seen that the input stage of the present invention adopts the Fibonacci switched capacitor topology circuit structure, which can maximize the use of flying capacitors to reduce the output voltage. Compared with the traditional Buck DC-DC converter, the present invention extends the equivalent conduction time, and compared with the existing work using the same number of capacitors, the present invention can achieve a higher conversion ratio, so it is more suitable for high conversion ratio application scenarios. The output stage adopts a dual-channel topology in which an inductor and a switched capacitor are connected in parallel. The output voltage is modulated by the inductor, and the capacitor is connected in parallel with the inductor in all working states to supply power to the output load, which effectively reduces the inductor mean current, reduces the DCR conduction loss of the inductor, and improves the system efficiency; at the same time, the reduction of the inductor current eliminates the dependence on large-size, high-performance inductors, and facilitates the system to adopt small-size, large DCR, and low saturation current inductors, realizing system miniaturization, improving power density, and reducing costs. The above technical solution can be applied to designs with voltage conversion ratio as the target, and is used to evaluate the minimum number of flying capacitors required to achieve a specific conversion ratio range, avoiding the waste of flying capacitors, and is conducive to the improvement of power density.

[0076] So far, the embodiments of the present disclosure have been described in detail in conjunction with the accompanying drawings. It should be noted that the implementation methods not shown or described in the drawings or the body of the specification are all forms known to ordinary technicians in the relevant technical field and are not described in detail. In addition, the above definitions of each element and method are not limited to the various specific structures, shapes or methods mentioned in the embodiments, and ordinary technicians in the field can simply change or replace them.

[0077] In summary, the present disclosure provides a high conversion ratio dual-path DC-DC converter, the input stage adopts the Fibonacci switch capacitor topology to maximize the use of flying capacitors to improve the voltage conversion ratio, and the output stage adopts a dual-path topology in which the inductor and the switch capacitor are connected in parallel for output voltage modulation. Compared with the existing architecture, the present invention improves the utilization rate of flying capacitors, achieves a higher conversion ratio output, extends the equivalent conduction time, and avoids the design challenges brought by the too narrow duty cycle to the control and drive circuits; in addition, the present invention always has a flying capacitor path connected in parallel with the inductor to supply power to the output, realizes the reduction of the inductor mean current, reduces the DCR conduction loss of the inductor, and improves the system efficiency; relaxes the demand for large size, small DCR, and high saturation current inductors, and can use small size, large DCR, and low saturation current inductors on the basis of maintaining high system efficiency to achieve system miniaturization, improve power density, and reduce costs. The present invention can also be used to evaluate the minimum number of flying capacitors required to achieve a specific conversion ratio range, avoid the waste of flying capacitors, and is conducive to the improvement of power density.

[0078] It should be noted that, in this document, unless otherwise specified, “a” element is not limited to a single element, but may include one or more elements.

[0079] In addition, in this document, unless otherwise specified, ordinal numbers such as "first" and "second" are only used to distinguish multiple components with the same name, and do not indicate that there is a hierarchy, level, execution order, or process order between them. A "first" component and a "second" component may appear together in the same component, or appear in different components. The presence of a component with a larger ordinal number does not necessarily indicate the presence of another component with a smaller ordinal number.

[0080] In this document, unless otherwise specified, the so-called feature A "or" or "and / or" (and / or) feature B means that A exists alone, B exists alone, or A and B exist at the same time; the so-called feature A "and" (and) or "and" (and) or "and" (and) feature B means that A and B exist at the same time; the so-called "include", "comprise", "have" and "contain" mean including but not limited to these.

[0081] In addition, in this document, the terms "upper", "lower", "left", "right", "front", "back", or "between" are only used to describe the relative positions between multiple elements, and can be extended to include translation, rotation, or mirroring. In addition, in this document, unless otherwise specified, "an element is on another element" or similar descriptions do not necessarily mean that the element contacts the other element.

[0082] In addition, unless the steps are specifically described or must occur in sequence, the order of the above steps is not limited to the above list, and can be changed or rearranged according to the required design. And the above embodiments can be mixed and matched with each other or with other embodiments based on design and reliability considerations, that is, the technical features in different embodiments can be freely combined to form more embodiments.

[0083] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present disclosure. It should be understood that the above description is only a specific embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the protection scope of the present disclosure.

Claims

1. A dual-channel DC-DC converter, comprising: The input stage adopts a multi-stage Fibonacci switched capacitor topology circuit structure; The output stage is connected to the input stage and adopts a dual-path topology circuit structure in which an inductor and a switch capacitor are connected in parallel; Among them, by controlling the linkage on and off of the switches in the input stage and the output stage, the flying capacitor in the output stage is charged and discharged, and the inductor is magnetized and demagnetized, so as to realize the full-cycle parallel shunting of the capacitor and the inductor in the output stage and improve the voltage conversion ratio.

2. The dual-channel DC-DC converter according to claim 1, wherein the output stage comprises: An inductor L, one end of which is connected to an output terminal of the input stage, and the other end of which is connected to the load through an output node; Capacitor C4, one end of which is connected to the other output end of the input stage through node SW7, and the other end of capacitor C4 is connected to switch S 11 After grounding, flying capacitor C4 and switch S 11 A node SW8 is provided between the nodes SW7 and SW8, and the nodes SW7 and SW8 are connected through switches S9 and S 10 Connect to the output node.

3. The dual-channel DC-DC converter according to claim 1 or 2, wherein the input stage adopts a modified Fibonacci switched capacitor topology circuit structure with three-level connection point shifting.

4. The dual-channel DC-DC converter according to claim 3, wherein the input stage comprises a switch S0, a switch S1, a switch S4, and a switch S7 connected in sequence; A node SW1 is provided between the switch S0 and the switch S1, a node SW3 is provided between the switch S1 and the switch S4, a node SW5 is provided between the switch S4 and the switch S7, the switch S7 is connected to the switch S9 via the node SW7, the node SW1 is connected to the flying capacitor C1 and the switch S3 and then grounded, a node SW2 is provided between the flying capacitor C1 and the switch S3, and the node SW2 is connected to the node SW5 via the switch S2; The node SW3 is connected to the flying capacitor C2 and the switch S6 and then grounded. A node SW4 is provided between the flying capacitor C2 and the switch S6. The node SW4 is connected to the node SW7 through the switch S5. The node SW5 is connected to the flying capacitor C3 and the switch S8 and then grounded, and a node SW6 is provided between the flying capacitor C3 and the switch S8; The switch S0 is connected to the input terminal before and the switch S7 is connected to the output stage after.

5. The dual-path DC-DC converter according to claim 4 comprises a first working phase state, in which the capacitor C4 in the output stage is discharged, the inductor L is magnetized, and the load receives the discharged charge from the capacitor C4 and the inductor charge at the same time.

6. The dual-channel DC-DC converter according to claim 4 comprises a second working phase state, in which the capacitor C4 in the output stage is charged, the inductor L is demagnetized, and the load receives the charge from the capacitor C4 and the charge from the inductor at the same time.

7. The dual-channel DC-DC converter according to claim 5, in the first working phase state, the switches S0, S2, S4, S6, S9, and S 11 On, switch S1, switch S3, switch S5, switch S7, switch S8, switch S 10 Turn off, at this time, the flying capacitors C1 and C3 are charged, the flying capacitors C2 and C4 are discharged, the inductor L is magnetized, and the inductor current rises; the flying capacitor C1 is charged by the power supply V IN Direct charging, the sum of the charging charge of the flying capacitor C1 and the discharging charge of the flying capacitor C2 constitutes the charging charge of the flying capacitor C3 and the charge amount transmitted by the inductor L to the output node, and the flying capacitor C4 directly supplies power to the load through the output node.

8. The dual-channel DC-DC converter according to claim 5, in the second working phase state, the switches S0, S2, S4, S6, S9, and S 11 Turn off, switch S1, switch S3, switch S5, switch S7, switch S8, switch S 10 The flying capacitors C1 and C3 are turned on, and the flying capacitors C2 and C4 are charged. The inductor L is demagnetized, and the inductor current decreases. The series charge path of the flying capacitors C1 and C2 is connected in parallel with the discharge path of the flying capacitor C3 to charge the flying capacitor C4. At this time, the load receives the charge from the flying capacitor C4 and the charge from the inductor at the same time.

9. The dual-channel DC-DC converter according to claim 7 or 8, wherein: Steady-state voltage of flying capacitor C1 for: ; Steady-state voltage of flying capacitor C2 for: ; Steady-state voltage of flying capacitor C3 for: ; Steady-state voltage of flying capacitor C4 for: ; According to the volt-second balance of the inductor magnetizing and demagnetizing states, we can get: ； but: ； Then the voltage conversion ratio M of the DC-DC converter is: ； Where D represents the duty cycle of the switch control signal, 0 <D<1, is the input voltage supply voltage, is the output voltage.

10. According to the dual-channel DC-DC converter of claim 9, the ratio of the inductor mean current to the load current can be obtained according to the charge conservation of the capacitor: ； in, is the mean inductor current, is the load current.

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