Signal conversion device and image sensor

Abstract

The invention discloses a signal conversion device and an image sensor, and the device comprises a signal control unit which is used for controlling a signal conversion unit to access a charge signal or disconnecting the charge signal input of the signal conversion unit; the signal conversion unit is used for carrying out integral amplification on the accessed charge signal to obtain a voltage signal, and the signal conversion unit comprises an isolation subunit used for filtering a direct current voltage component; and the first reset unit is used for resetting the signal conversion unit when the pre-stage circuit is reset or after the signal conversion unit completes signal conversion. By introducing the isolation subunit, the interference of a direct-current voltage component on the normal work of the core circuit is effectively avoided, and the risk that a signal cannot be processed due to the incompatibility of a pre-stage system and a power supply system of a system where the circuit is located is greatly reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of image sensors, and in particular to a signal conversion device and an image sensor. Background Art

[0002] In recent years, integrating charge coupled device (CCD) pixels and CMOS readout circuits into one image sensor chip to form a fusion image sensor product has become a major research and development direction for image sensors. Fusion image sensors combine the superior imaging quality of CCD pixels with the high imaging system integration brought by CMOS readout circuits, and have broad development prospects in high-end image sensing application fields such as remote sensing and machine vision.

[0003] One of the difficulties in the development of fusion image sensors is the incompatibility of the power supply system of CCD pixels and CMOS readout circuits. Usually, the voltage drop of the power supply ground of CCD pixels can reach 18V, while the voltage drop of the CMOS readout circuit is only 3.3V to 5V, which may cause the DC voltage component of the CCD pixel output signal to exceed the voltage coverage range of the power supply ground of the CMOS readout circuit, thereby causing the readout circuit to be unable to process the pixel signal. To solve this problem, on the one hand, the CCD pixel needs to improve the corresponding process and voltage supply system so that the DC voltage component of the pixel output end is at an acceptable level for the input end of the CMOS readout circuit; on the other hand, the pixel signal input end circuit of the CMOS readout circuit (hereinafter referred to as the CMOS interface circuit) needs to adopt a specific architecture to expand the range of the DC voltage component of the CCD pixel signal output that is acceptable to the input end as much as possible. Summary of the invention

[0004] In view of the above-mentioned deficiencies in the prior art, the technical problem to be solved by the present invention is to provide a signal conversion device and an image sensor that can solve the incompatibility problem between the pixel circuit and the CMOS readout circuit.

[0005] In order to solve the above technical problems, a technical solution adopted by the present invention is: to provide a signal conversion device, comprising:

[0006] A signal control unit, used to control the signal conversion unit to access the charge signal or disconnect the charge signal input of the signal conversion unit;

[0007] A signal conversion unit, used for integrating and amplifying the connected charge signal to obtain a voltage signal, wherein the signal conversion unit includes an isolation subunit for filtering a DC voltage component;

[0008] The first reset unit is used to reset the signal conversion unit when resetting the previous stage circuit or after the signal conversion unit completes signal conversion.

[0009] Furthermore, the signal conversion unit includes an integrating capacitor for integrating the connected charge signal and an amplifier for amplifying the integrated signal to obtain a final voltage signal; the first plate of the integrating capacitor and the input end of the amplifier are electrically connected to the signal output end of the signal control unit to connect the charge signal, and the second plate of the integrating capacitor is electrically connected to the output end of the amplifier as the output end of the signal conversion unit, outputting the integrated and amplified voltage signal.

[0010] Furthermore, the isolation sub-unit is defined as a first capacitor, and the input end of the amplifier is electrically connected to the signal output end of the signal control unit through the first capacitor; the first plate of the first capacitor is electrically connected to the signal output end of the signal control unit, and the second plate of the first capacitor is electrically connected to the input end of the amplifier.

[0011] Further, the signal control unit is defined as a first switch, the first end of the first switch serves as the input end of the signal control unit for accessing the charge signal, and the second end of the first switch serves as the output end of the signal control unit and is electrically connected to the input end of the amplifier; the first reset unit is defined as a second switch, the first end of the second switch serves as the first end of the first reset unit and is electrically connected to the input end of the amplifier, and the second end of the second switch serves as the second end of the first reset unit and is electrically connected to the output end of the amplifier.

[0012] Furthermore, the signal conversion device also includes:

[0013] a second resetting unit, configured to reset the preceding circuit when the first resetting unit resets the signal conversion unit, and to terminate the resetting of the preceding circuit after the first resetting unit terminates the resetting of the signal conversion unit; and

[0014] The voltage boost unit is used to boost the reset voltage of the previous circuit.

[0015] Furthermore, the second reset unit is defined as a third switch, a first end of the third switch is electrically connected to the signal output end of the signal control unit, and a second end of the third switch is used to access a first DC voltage; the voltage boosting unit is defined as a second capacitor, a first plate of the second capacitor is electrically connected to the signal output end of the signal control unit, and a second plate of the second capacitor is used to access a second DC voltage, and the second DC voltage is a fixed voltage or an adjustable voltage.

[0016] Furthermore, the output end of the amplifier is electrically connected to the secondary circuit, and the signal conversion unit also includes a third capacitor, which is used to isolate the DC voltage component of the secondary circuit, and the first plate of the third capacitor is electrically connected to the output end of the amplifier, and the second plate of the third capacitor is electrically connected to the second plate of the integrating capacitor.

[0017] Furthermore, the signal conversion device also includes:

[0018] a test unit, configured to provide a test signal to the signal conversion unit when the signal control unit disconnects the charge signal provided by the preceding circuit; and

[0019] The third resetting unit is used to reset the test unit.

[0020] Further, the test unit is defined as a first current source, an input end of the first current source is electrically connected to a signal output end of the signal control unit, and an output end of the first current source is connected to a circuit system ground; the first current source has a first control end, and the first control end is used to control disconnection of the first current source when resetting the first current source and to control connection of the first current source when the signal conversion unit is working; the third reset unit is defined as a fourth switch, a first end of the fourth switch is electrically connected to an input end of the first current source, a second end of the fourth switch is used to access a third DC voltage, and the fourth switch is closed when resetting the first current source and is opened when the first current source is not reset; or

[0021] The test unit is defined as a second current source, an input end of the second current source is connected to a circuit system power supply, and an output end of the second current source is electrically connected to a signal output end of the signal control unit; the second current source has a second control end, and the second control end is used to control the disconnection of the second current source when the current source is reset and to control the connection of the second current source when the signal conversion unit is working; the third reset unit is defined as a fifth switch, a first end of the fifth switch is electrically connected to the output end of the second current source, a second end of the fifth switch is used to access a fourth DC voltage, and the fifth switch is closed when the second current source is reset and is opened when the second current source is not reset.

[0022] In order to solve the above problem, another technical solution adopted by the present invention is: to provide an image sensor, comprising the signal conversion device for converting a charge signal into a voltage signal as described above.

[0023] The signal conversion device and image sensor of the present invention have at least the following beneficial effects: the present invention realizes the voltage system of the input end and the core circuit to be independent of each other by introducing an isolation capacitor (i.e., the first capacitor), effectively avoiding the interference of the DC voltage component of the input end with the normal operation of the core circuit, and greatly reducing the risk of signal processing failure caused by the incompatibility of the power supply system between the previous system and the system where the circuit is located; by adding a reset unit to the pixel circuit, the pixel circuit does not need to design a reset function, thereby simplifying the design process of the pixel circuit; by adding an isolation capacitor (i.e., the third capacitor) at the output end of the amplifier to isolate the DC voltage component of the signal conversion device and the secondary signal processing circuit, the signal conversion device and the secondary circuit are allowed to use independent voltage systems, which is convenient for adjusting the working state of the secondary circuit, and further improving The flexibility and stability of signal processing are improved; by introducing a current source for testing (i.e., a first current source and a second current source), the timing of the current source passing the current is controlled to simulate the situation where a real charge signal is input into the circuit, which is not only convenient for debugging the circuit body, but also can effectively test the secondary signal processing circuit in the system, thereby improving the reliability and stability of the entire system; by designing a first reset unit and a second reset unit to achieve independent reset of the previous circuit and the signal conversion unit, it is ensured that the circuit can quickly return to the initial state during the reset process and prepare for the next signal conversion, thereby improving the efficiency and accuracy of the signal conversion; by designing a voltage boost unit, the reset voltage of the previous circuit can be boosted, thereby enhancing the circuit's adaptability to voltage changes and further improving the circuit's stability and reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0025] Figure 1 FIG. 4 is a circuit diagram of a signal conversion device according to an embodiment of the present invention.

[0026] Figure 2 FIG. 4 is a circuit diagram of another embodiment of the signal conversion device of the present invention.

[0027] Figure 3 This is a circuit diagram of another embodiment of the signal conversion device of the present invention.

[0028] Figure 4 This is a circuit diagram of another embodiment of the signal conversion device of the present invention.

[0029] Figure 5 This is a circuit diagram of another embodiment of the signal conversion device of the present invention.

[0030] Figure 6 A circuit diagram of an image processor according to an embodiment of the present invention.

[0031] Figure 7 for Figure 6 An example of the waveform of the image sensor input and output.

[0032] Figure 8 FIG. 4 is a circuit diagram of another embodiment of an image sensor according to the present invention.

[0033] Fig. 9 for Figure 8 An example of the waveform of the image sensor input and output.

[0034] Fig.10 This is a circuit diagram of another embodiment of the image sensor of the present invention.

[0035] Fig.11 for Fig.10 An example of the waveform of the image sensor input and output. DETAILED DESCRIPTION

[0036] The present invention will be further described below in conjunction with the accompanying drawings.

[0037] See also Figure 1 The signal conversion device of the present invention includes a signal control unit 1 for controlling the signal conversion unit 2 to access the charge signal or disconnect the charge signal input of the signal conversion unit 2, a signal conversion unit 2 for integrating and amplifying the accessed charge signal to obtain a voltage signal, and a first reset unit 3 for resetting the signal conversion unit 2 when resetting the previous stage circuit or after the signal conversion unit 2 completes the signal conversion. In order to make the voltage system of the input end of the signal conversion unit 2 and the core circuit of the signal conversion unit 2 independent of each other, to ensure that the DC voltage component of the input end does not interfere with the normal operation of the core circuit, thereby reducing or even eliminating the risk of being unable to process the signal due to the incompatibility of the power supply system of the previous stage circuit with the system where the signal conversion device is located, the signal conversion unit 2 includes an isolation subunit for filtering the DC voltage component. In this embodiment, the previous stage circuit is a pixel circuit, which is sensitive to light and converts the light signal into a charge signal in the form of a current pulse.

[0038] The signal conversion unit 2 includes an integrating capacitor 201 for integrating the connected charge signal and an amplifier 202 for amplifying the integrated signal to obtain a final voltage signal; the first plate of the integrating capacitor 201 and the input end of the amplifier 202 are both electrically connected to the signal output end of the signal control unit 1 to connect the charge signal, and the second plate of the integrating capacitor 201 is electrically connected to the output end of the amplifier 202 as the output end of the signal conversion unit 2, outputting the integrated and amplified voltage signal. It should be understood that the amplifier 202 can also adopt a differential input and single-ended output structure. In this case, the in-phase input end of the amplifier 202 is connected to a DC voltage as its reference common mode level, the reverse input end of the amplifier 202 is electrically connected to the signal output end of the signal control unit 1, and the output end of the amplifier 202 is electrically connected to the second plate of the integrating capacitor 201. In this embodiment, the isolation subunit is defined as the first capacitor 203. The input end of the amplifier 202 is electrically connected to the signal output end of the signal control unit 1 through the first capacitor 203; specifically, the first plate of the first capacitor 203 is electrically connected to the signal output end of the signal control unit 1, and the second plate of the first capacitor 203 is electrically connected to the input end of the amplifier 202.

[0039] The signal control unit 1 is defined as a first switch 101, a first end of the first switch 101 is used as an input end of the signal control unit 1 for receiving a charge signal, and a second end of the first switch 101 is electrically connected to an input end of the amplifier 202 as an output end of the signal control unit 1. In this embodiment, the first reset unit 3 is defined as a second switch 301, a first end of the second switch 301 is electrically connected to an input end of the amplifier 202 as a first end of the first reset unit 3, and a second end of the second switch 301 is electrically connected to an output end of the amplifier 202 as a second end of the first reset unit 3.

[0040] In this embodiment, the working principle of the signal conversion device is as follows:

[0041] First, while the previous stage circuit is being reset, the second switch 301 is closed to reset the amplifier 202, and the reset is continued for a period of time to ensure that the amplifier 202 is completely reset. After that, the second switch 301 is opened to end the reset of the amplifier 202, and then the reset of the previous stage circuit is ended. At this time, the voltage at the output end of the signal conversion unit 2 is at the lowest value.

[0042] The front stage circuit inputs a charge signal to the signal control unit 1, and the first switch 101 remains closed throughout the process, so that the charge enters the integral capacitor 201 for integration, so that the output end of the signal conversion unit 2 generates a voltage signal from low to high under the premise that the output end of the signal conversion unit 2 is connected to a capacitive load. When the front stage circuit no longer inputs a charge signal to the input end of the signal control unit 1, the voltage signal at the output end of the signal conversion unit 2 no longer increases but remains at a certain value, that is, the highest value. At this time, the difference between the highest and lowest values ​​of the voltage can be regarded as the voltage conversion result of the signal value output by the front stage circuit.

[0043] Finally, reset is performed before the next signal conversion. While the previous stage circuit is being reset, the second switch 301 is closed for a period of time to reset the amplifier 202, and then the second switch 301 is opened, and then the reset of the previous stage circuit is completed. At this time, the voltage value at the output end of the signal conversion unit 2 is reset to the lowest value. The above process is repeated cyclically, and the number of repetitions is determined as needed.

[0044] See also Figure 2 In order to reset the previous stage circuit, as a preferred embodiment, the signal conversion device is also provided with a second reset unit 4 for resetting the previous stage circuit when the first reset unit 3 resets the signal conversion unit 2, and a voltage boosting unit 5 for boosting the reset voltage of the previous stage circuit. The second reset unit 4 ends the resetting of the previous stage circuit after the first reset unit 3 ends the resetting of the signal conversion unit 2. The second reset unit 4 is defined as a third switch 401, the first end of the third switch 401 is electrically connected to the signal output end of the signal control unit 1, and the second end of the third switch 401 is used to access the first DC voltage. The voltage boosting unit 5 is defined as a second capacitor 501, the first plate of the second capacitor 501 is electrically connected to the signal output end of the signal control unit 1, and the second plate of the second capacitor 501 is used to access the second DC voltage, and the second DC voltage is a fixed voltage or an adjustable voltage.

[0045] In this embodiment, when the second DC voltage is a fixed voltage, the working principle of the signal conversion device is as follows:

[0046] The first switch 101 remains closed throughout the whole process. Before the conversion starts, a first DC voltage is input to the second end of the third switch 401, and a second DC voltage is input to the second plate of the second capacitor 501. The first DC voltage and the second DC voltage may be the same or different.

[0047] When the conversion starts, a reset is first performed: the second switch 301 and the third switch 401 are closed to reset the previous stage circuit and the amplifier 202 for a certain period of time.

[0048] After that, the reset is ended: the second switch 301 is turned off first, and then the third switch 401 is turned off. At this time, the voltage at the output end of the signal conversion unit 2 is at the lowest value.

[0049] Afterwards, the front-stage circuit inputs a charge signal to the signal control unit 1, so that the charge enters the integration capacitor 201 for integration. The integration process is the same as the corresponding content in the aforementioned embodiment, and will not be described in detail here.

[0050] Finally, reset is performed before the next signal conversion, and the second switch 301 and the third switch 401 are closed at the same time and kept for a certain period of time, and then the second switch 301 is opened first, and then the third switch 401 is opened to complete the reset process. At this time, the voltage at the output end of the signal conversion unit 2 is reset to the lowest value. The above process is repeated cyclically, and the number of repetitions is determined as needed.

[0051] When the second DC voltage is an adjustable voltage, the working principle of the signal conversion device is as follows:

[0052] The first switch 101 remains closed throughout the whole process. Before the conversion starts, the first DC voltage is input to the second end of the third switch 401, and a second DC voltage that can be adjusted at any time is input to the second plate of the second capacitor 501. At this time, the voltage value of the second DC voltage is relatively low.

[0053] When the conversion starts, a reset is performed first, and the second switch 301 and the third switch 401 are closed at the same time to reset the front-stage circuit and the amplifier 202, and the reset lasts for a certain period of time. At this time, the voltage value of the first end of the first switch 101 is the same as the voltage value of the second end of the third switch 401.

[0054] Then the third switch 401 is disconnected, and the second DC voltage input to the second plate of the second capacitor 501 is increased to a higher value. At this time, due to the conservation of charge, the voltage value at the first end of the first switch 101 will be higher than the voltage value at the second end of the third switch 401, and the reset of the previous stage circuit is completed.

[0055] Finally, the second switch 301 is turned off to end the resetting of the amplifier 202. At this time, the voltage at the output end of the signal conversion unit 2 is at the lowest value. The front-stage circuit inputs a charge signal to the signal control unit 1, so that the charge enters the integration capacitor 201 for integration. The integration process is the same as the corresponding content in the above-mentioned embodiment, and will not be repeated here.

[0056] Finally, reset is performed before the next signal conversion, the second switch 301 and the third switch 401 are closed, and the second DC voltage input to the second plate of the second capacitor 501 is adjusted to a lower value. After a certain period of time, the voltage value of the first end of the first switch 101 is the same as the voltage value of the second end of the third switch 401. At this time, the third switch 401 is disconnected, and the second DC voltage input to the second plate of the second capacitor 501 is increased to a higher value, and the reset of the previous stage circuit is completed. Finally, the second switch 301 is disconnected to end the reset of the amplifier 202, and the voltage at the output end of the signal conversion unit 2 is reset to the lowest value. The above process is repeated cyclically, and the number of repetitions depends on the needs.

[0057] See also Figure 3 In order to allow the signal conversion device and the secondary circuit to use independent voltage systems, facilitate adjustment of the working state of the secondary circuit, and reduce or eliminate the risk that the secondary circuit cannot process the output signal of the signal conversion device, as a preferred embodiment, the signal conversion unit 2 also includes a third capacitor 204, the third capacitor 204 is used to isolate the DC voltage component of the secondary circuit, the first plate of the third capacitor 204 is electrically connected to the output end of the amplifier 202, and the second plate of the third capacitor 204 is electrically connected to the second plate of the integrating capacitor 201. In this embodiment, the secondary circuit is a sampling circuit for sampling the voltage signal generated by the signal conversion device.

[0058] In this embodiment, the working principle of the signal conversion device is as follows:

[0059] The output end of the signal conversion unit 2 of the present circuit is connected to the input end of the secondary circuit, and the secondary circuit has the ability to reset the output end of the signal conversion unit 2. The first switch 101 is kept closed throughout the whole process, and is reset first. While the previous circuit performs the reset operation, the second switch 301 is closed to reset the amplifier 202, and the reset function of the secondary circuit is used to reset the output end of the signal conversion unit 2 for a period of time.

[0060] End the reset, first end the reset of the output end of the signal conversion unit 2 by the secondary circuit, then disconnect the second switch 301, and finally end the reset of the previous circuit. At this time, the voltage of the output end of the signal conversion unit 2 is at the lowest value.

[0061] The front-stage circuit inputs a charge signal to the signal control unit 1, so that the charge enters the integration capacitor 201 for integration. The integration process is the same as the corresponding content in the aforementioned embodiment, and will not be repeated here.

[0062] Finally, reset is performed before the next signal conversion. While the previous stage circuit is reset, the second switch 301 is closed for a certain period of time to reset the amplifier 202, and the output end of the signal conversion unit 2 is reset by using the reset function of the secondary circuit. When the reset is completed, the secondary circuit first completes the reset of the output end of the signal conversion unit 2, then opens the second switch 301 to complete the reset of the amplifier 202, and finally completes the reset of the previous stage circuit. At this time, the voltage value of the output end of the signal conversion unit 2 is reset to the lowest value. The above process is repeated cyclically, and the number of repetitions is determined as needed.

[0063] See also Figure 4 In order to test the circuit, as a preferred embodiment, the signal conversion device is also provided with a test unit 6 and a third reset unit 7. The test unit 6 is used to provide a test signal to the signal conversion unit 2 when the signal control unit 1 disconnects the charge signal provided by the previous stage circuit, and the third reset unit 7 is used to reset the test unit 6.

[0064] The test unit 6 is defined as a first current source 601, the input end of the first current source 601 is electrically connected to the signal output end of the signal control unit 1, and the output end of the first current source 601 is connected to the circuit system ground 602; the first current source 601 has a first control end, and the first control end is used to control the disconnection of the first current source 601 when the first current source 601 is reset, and to control the connection of the first current source 601 when the signal conversion unit 2 is working; the third reset unit 7 is defined as a fourth switch 701, the first end of the fourth switch 701 is electrically connected to the input end of the first current source 601, the second end of the fourth switch 701 is used to access the third DC voltage, and the fourth switch 701 is closed when the first current source 601 is reset, and is disconnected when the first current source 601 is not reset.

[0065] In this embodiment, the working principle of the signal conversion device is as follows:

[0066] The first switch 101 remains open throughout the process to disconnect the signal conversion unit 2 from the previous stage circuit, and the third DC voltage is connected to the second end of the fourth switch 701 for resetting the first current source 601. Resetting begins, the second switch 301 and the fourth switch 701 are closed at the same time, and the first control end is controlled to disconnect the first current source 601, and this process lasts for a period of time.

[0067] After the reset is finished, the second switch 301 is turned off first, and then the fourth switch 701 is turned off. At this time, the output voltage of the signal conversion unit 2 is at the lowest value.

[0068] The test signal (ie, the signal output by the test unit 6 ) starts to be integrated, the first control terminal is controlled to connect to the first current source 601 , and the charge starts to be integrated on the integration capacitor 201 , causing the output terminal voltage of the signal conversion unit 2 to start to increase.

[0069] When the test signal integration is completed, the first control terminal is controlled to disconnect the first current source 601, the test signal integration process is stopped, and the output voltage of the signal conversion unit 2 reaches the maximum value. At this time, the difference between the maximum and minimum values ​​of the visible voltage is the voltage conversion result of the test signal value.

[0070] Finally, the circuit is reset before the next conversion process, and the second switch 301 and the fourth switch 701 are closed at the same time, and the first control terminal is controlled to disconnect the first current source 601. After a period of time, the second switch 301 is disconnected first, and then the fourth switch 701 is disconnected, and the reset is ended, and the output voltage of the signal conversion unit 2 is reset to the lowest value. The above process is repeated cyclically, and the number of repetitions is determined as needed.

[0071] Usually, the magnitude of the DC current passing through the first current source 601 can be adjusted. Therefore, by observing the output response of the circuit in this embodiment under current inputs of different magnitudes without being affected by the output signal of the previous circuit, it is possible to further determine whether the signal conversion device operates normally in actual work, which is helpful for debugging the circuit system and finding the crux of the circuit when a fault occurs.

[0072] The structures of the test unit 6 and the third reset unit 7 are not limited to the above-mentioned embodiments. Figure 5 In another embodiment, the test unit 6 is defined as a second current source 603, the input end of the second current source 603 is connected to the circuit system power supply 604, and the output end of the second current source 603 is electrically connected to the signal output end of the signal control unit 1. The second current source 603 has a second control end, and the second control end is used to control the disconnection of the second current source 603 when the current source is reset and to control the connection of the second current source 603 when the signal conversion unit 2 is working. The third reset unit 7 is defined as a fifth switch, the first end of the fifth switch is electrically connected to the output end of the second current source 603, the second end of the fifth switch is used to access the fourth DC voltage, and the fifth switch is closed when the second current source 603 is reset, and is opened when the second current source 603 is not reset.

[0073] In this embodiment, the working principle of the signal conversion device is as follows:

[0074] The first switch 101 remains open throughout the process to disconnect the signal conversion unit 2 from the previous stage circuit, and the fourth DC voltage is connected to the second end of the fifth switch for resetting the second current source 603. The reset begins, the second switch 301 and the fifth switch are closed at the same time, and the second control end is controlled to disconnect the second current source 603, and this process lasts for a period of time.

[0075] After the reset is finished, the second switch 301 is turned off first, and then the fifth switch is turned off. At this time, the output voltage of the signal conversion unit 2 is at the highest value.

[0076] When the test signal integration starts, the second control terminal is controlled to connect to the second current source 603, and the integral capacitor 201 starts to lose charge, causing the output voltage of the signal conversion unit 2 to start to decrease. When the test signal integration ends, the second control terminal is controlled to disconnect the second current source 603, and the integration process is stopped. The output voltage of the signal conversion unit 2 reaches the lowest value. At this time, the difference between the highest and lowest values ​​of the visible voltage is the voltage conversion result of the test signal value.

[0077] Finally, the circuit is reset before the next conversion process, and the second switch 301 and the fifth switch are closed at the same time, and the second control terminal is controlled to disconnect the second current source 603. After a period of time, the second switch 301 is disconnected first, and then the fifth switch is disconnected, and the reset is ended, and the output voltage of the signal conversion unit 2 is reset to the highest value. The above process is repeated cyclically, and the number of repetitions is determined as needed.

[0078] The present invention also provides an image sensor, comprising the signal conversion device for converting a charge signal into a voltage signal as described above. Of course, the image sensor also includes a pixel circuit for sensing light and converting the light signal into a charge signal in the form of a current pulse, and a sampling circuit for sampling the voltage signal generated by the signal conversion device, and other necessary structures of the image sensor.

[0079] See also Figure 6 , is a circuit diagram of an image sensor of one embodiment of the present invention, comprising Figure 1 The signal conversion device shown in FIG. 1 is a schematic diagram of the input and output waveforms of the image sensor. Figure 7 . Figure 7 The figure shows two signal conversion processes, each of which has a cycle of 45 unit time. First, the second switch 301 and the switch 816 (RST_PX) are closed for a period of time and then disconnected to perform a reset operation. The voltage at the output of the amplifier 202 is reset to the reset level (i.e., the common mode voltage of the amplifier 202) V rst1 After that, the sampling circuit collects the reset level, closes the switch 820 (SP_RST) for a period of time and then opens it, so that V rst1The voltage is stored in capacitor 822, and its voltage value is also reflected on the sampling circuit output terminal 824. After completing the reset level sampling, the photodiode 817 in the pixel starts to sense light, generating a current pulse flowing to the ground line of the pixel circuit, and the signal conversion device starts to integrate the current signal, causing the output voltage of the amplifier 202 to rise; after the light sensing process is completed, no current flows through the photodiode 817, so the integration stops, and the output voltage of the amplifier 202 reaches the highest point V sig1 , as the effective signal level of this conversion. Finally, the effective signal level is sampled, and the switch 821 (SP_S IG) is closed for a period of time and then opened, so that V sig1 The voltage value is stored in capacitor 823, and is also reflected on the sampling circuit output terminal 825. Thus, the voltage value representation of the pixel light-sensing signal is obtained and stored. Then, the pixel and circuit are reset, and the second signal conversion is performed. The sampling circuit output terminals 824 and 825 can be connected to the correlated double sampling signal processing circuit, which can further obtain V sig1 With V rst1 The difference between the two signals can be calculated and the fixed pattern noise contained in the signal can be removed to improve the signal quality.

[0080] During the signal conversion process, the voltage value of the line network A is always maintained at the common mode voltage value V of the amplifier 202 after the signal conversion device is reset. rst1 、V rst2 The voltage value of line B is always kept at the pixel reset voltage V rst_px When the voltages of the two are not equal, the signal conversion process of the signal conversion device can still proceed smoothly, thus achieving the design goal that the voltage systems of the input end of the signal conversion device and the amplifier circuit are independent of each other and can perform signal conversion normally.

[0081] See also Figure 8 , is a circuit diagram of another embodiment of the image sensor of the present invention, comprising Figure 2 The signal conversion device shown in FIG. 1 is a schematic diagram of the input and output waveforms of the image sensor. Fig. 9 . Fig. 9 The figure shows two signal conversion processes, each of which has a cycle of 45 unit time. First, the second switch 301 (RST) and the third switch 401 (RST_PXOUT) are closed; then the fourth switch 701 is opened, and the voltage of line B is first reset to V rst_px_lo , and then the voltage of the second plate of the second capacitor 501 is increased from the original V boost_lo Raised to V boost_hi At this time, due to charge conservation, the voltage of line B is increased to V rst_px_hi , thereby increasing the reset voltage of the pixel. Due to the participation of other capacitors, V boost_hi With V boost_loThe difference will be greater than V rst_px_hi With V rst_px_lo Finally, the second switch 301 is turned off to end the reset. The subsequent signal sampling and conversion process is substantially the same as described in Example 1. When performing the reset before the second sampling, the voltage of the second plate of the second capacitor 501 needs to be reduced to V boost_lo , prepare for pixel reset.

[0082] Generally speaking, the reset voltage required by CCD pixels is relatively high. In this embodiment, a relatively high reset voltage is provided to the pixels in the form of a charge pump, so the reset circuit design can be removed from the pixel circuit design to reduce the design complexity and power consumption. On the other hand, during the signal conversion process, the voltage of the wire network B changes with time, while the voltage of the wire network A can be basically regarded as a DC level (amplifier common mode level), which is a further application of the characteristic that the voltage systems of the input end of the signal conversion device and the amplifier circuit are independent of each other.

[0083] See also Fig.10 , is a circuit diagram of another embodiment of the image sensor of the present invention, comprising Figure 3 The signal conversion device shown in FIG. 1 is connected between the output of the signal conversion device and the input of the sampling circuit, and the polarity of the output of the PGA is consistent with that of the input (using a simplified structure). For an example of the input and output waveforms of the image sensor, see Fig.11 . Fig.11 The figure shows two signal conversion processes, each of which has a cycle of 45 unit time. First, the second switch 301 (RST), switch 1028, switch 1029 and switch 1016 (RST_PX) are closed for a period of time and then disconnected to perform a reset operation. The voltage at the output of the amplifier 202 is reset to the reset level V rst1 The voltage at the output terminal 1033 changes with the change of the voltage at the output terminal of the amplifier 202. The output voltage value at this moment is V rst1 '. Then the sampling circuit collects the reset level, closes the switch 1020 (SP_RST) for a period of time and then opens it, so that V rst1 ' is stored in capacitor 1022, and its voltage value is also reflected on the sampling circuit output terminal 1024. After completing the reset level sampling, the photodiode 1017 in the pixel starts to sense light, generating a current pulse flowing to the ground line of the pixel circuit, and the signal conversion device starts to integrate the current signal, causing the voltage at the output end of the amplifier 202 to rise; after the light-sensing process is over, no current flows through the photodiode 1017, so the signal conversion device stops integrating, and the voltage at the output end of the amplifier 202 reaches the highest point V sig1As the effective signal level of this conversion, the voltage of the output terminal 1033 changes with the change of the voltage of the output terminal of the amplifier 202. At this moment, the output voltage value is V sig1 '. Finally, the effective signal level is sampled, and the switch 1021 (SP_S IG) is closed for a period of time and then disconnected, so that V sig1 ' is stored in capacitor 1023, and its voltage value is also reflected on the sampling circuit output terminal 1025, so that the voltage value representation of the pixel light-sensing signal is obtained and stored. Then, starting from resetting the pixel and the circuit, the second signal conversion is performed.

[0084] In this embodiment, the circuit structure of the PGA makes the polarity of the signal output end consistent with the polarity of the input end, and the structure requires the wire connected to the negative pole of the amplifier in the PGA to be reset. The reset method in this embodiment resets the signal input end and the amplifier output end of the PGA at the same time, achieving the basic purpose of the reset operation, and at the same time fully utilizing the characteristic that the DC voltage of the amplifier core and the DC voltage of the output end in the signal conversion device are isolated from each other. It is possible to consider setting the DC operating point of the PGA so that the level output by it when the circuit is reset as a whole is lower than the reset level output by the signal conversion device, so that the PGA and the circuit as a whole can achieve a larger input or output swing.

[0085] The present invention realizes the voltage system of the input end and the core circuit to be independent of each other by introducing an isolation capacitor (i.e., the first capacitor 203), effectively avoiding the interference of the DC voltage component of the input end on the normal operation of the core circuit, and greatly reducing the risk of the signal being unable to be processed due to the incompatibility of the power supply system of the previous system and the system where the circuit is located. By adding a second reset unit 4 for resetting the pixel circuit, the pixel circuit does not need to design a reset function, thereby simplifying the design process of the pixel circuit; by adding an isolation capacitor (i.e., the third capacitor 204) at the output end of the amplifier 202 to isolate the DC voltage component of the signal conversion device and the secondary signal processing circuit, the signal conversion device and the secondary circuit are allowed to use independent voltage systems, which is convenient for adjusting the working state of the secondary circuit, and further improves the flexibility and stability of signal processing. By introducing a current source for testing (i.e., the first current source 601 and the second current source 603), and controlling the timing of the current source passing the current to simulate the input of the real charge signal into the circuit, it is not only convenient to debug the circuit body, but also possible to effectively test the secondary signal processing circuit in the system, thereby improving the reliability and stability of the entire system; by designing the first reset unit 3 and the second reset unit 4, to achieve independent reset of the front-stage circuit and the signal conversion unit 2, it is ensured that the circuit can quickly return to the initial state during the reset process, prepare for the next signal conversion, and improve the efficiency and accuracy of the signal conversion. By designing the voltage boost unit, the reset voltage of the front-stage circuit can be boosted, thereby enhancing the circuit's adaptability to voltage changes and further improving the circuit's stability and reliability.

Claims

1. A signal conversion device, characterized in that: include: A signal control unit, used to control the signal conversion unit to access the charge signal or disconnect the charge signal input of the signal conversion unit; A signal conversion unit, used for integrating and amplifying the connected charge signal to obtain a voltage signal, wherein the signal conversion unit includes an isolation subunit for filtering a DC voltage component; The first reset unit is used to reset the signal conversion unit when resetting the previous stage circuit or after the signal conversion unit completes signal conversion.

2. The signal conversion device according to claim 1, characterized in that: The signal conversion unit includes an integrating capacitor for integrating the connected charge signal and an amplifier for amplifying the integrated signal; the first plate of the integrating capacitor and the input end of the amplifier are electrically connected to the signal output end of the signal control unit to connect the charge signal, and the second plate of the integrating capacitor is electrically connected to the output end of the amplifier as the output end of the signal conversion unit, outputting the integrated and amplified voltage signal.

3. The signal conversion device according to claim 2, characterized in that: The isolation sub-unit is defined as a first capacitor, and the input end of the amplifier is electrically connected to the signal output end of the signal control unit through the first capacitor; the first plate of the first capacitor is electrically connected to the signal output end of the signal control unit, and the second plate of the first capacitor is electrically connected to the input end of the amplifier.

4. The signal conversion device according to claim 2, characterized in that: The signal control unit is defined as a first switch, the first end of the first switch serves as the input end of the signal control unit for accessing the charge signal, and the second end of the first switch serves as the output end of the signal control unit and is electrically connected to the input end of the amplifier; the first reset unit is defined as a second switch, the first end of the second switch serves as the first end of the first reset unit and is electrically connected to the input end of the amplifier, and the second end of the second switch serves as the second end of the first reset unit and is electrically connected to the output end of the amplifier.

5. The signal conversion device according to claim 1, characterized in that: Also includes: a second resetting unit, configured to reset the preceding circuit when the first resetting unit resets the signal conversion unit, and to terminate the resetting of the preceding circuit after the first resetting unit terminates the resetting of the signal conversion unit; and The voltage boost unit is used to boost the reset voltage of the previous circuit.

6. The signal conversion device according to claim 5, characterized in that: The second reset unit is defined as a third switch, a first end of the third switch is electrically connected to the signal output end of the signal control unit, and a second end of the third switch is used to access a first DC voltage; the voltage boosting unit is defined as a second capacitor, a first plate of the second capacitor is electrically connected to the signal output end of the signal control unit, and a second plate of the second capacitor is used to access a second DC voltage, and the second DC voltage is a fixed voltage or an adjustable voltage.

7. The signal conversion device according to claim 2, characterized in that: The output end of the amplifier is electrically connected to the secondary circuit. The signal conversion unit also includes a third capacitor, which is used to isolate the DC voltage component of the secondary circuit. The first plate of the third capacitor is electrically connected to the output end of the amplifier, and the second plate of the third capacitor is electrically connected to the second plate of the integrating capacitor.

8. The signal conversion device according to claim 1, characterized in that: Also includes: A test unit, used for providing a test signal to the signal conversion unit when the signal control unit disconnects the charge signal provided by the previous stage circuit; as well as The third resetting unit is used to reset the test unit.

9. The signal conversion device according to claim 8, characterized in that: The test unit is defined as a first current source, the input end of the first current source is electrically connected to the signal output end of the signal control unit, and the output end of the first current source is connected to the circuit system ground line; the first current source has a first control end, and the first control end is used to control the first current source to be disconnected when the first current source is reset and to control the first current source to be connected when the signal conversion unit is working; the third reset unit is defined as a fourth switch, the first end of the fourth switch is electrically connected to the input end of the first current source, the second end of the fourth switch is used to access a third DC voltage, and the fourth switch is closed when the first current source is reset, and is opened when the first current source is not reset; or The test unit is defined as a second current source, an input end of the second current source is connected to a circuit system power supply, and an output end of the second current source is electrically connected to a signal output end of the signal control unit; the second current source has a second control end, and the second control end is used to control the disconnection of the second current source when the current source is reset and to control the connection of the second current source when the signal conversion unit is working; the third reset unit is defined as a fifth switch, a first end of the fifth switch is electrically connected to the output end of the second current source, a second end of the fifth switch is used to access a fourth DC voltage, and the fifth switch is closed when the second current source is reset and is opened when the second current source is not reset.

10. An image sensor, characterized in that: The invention comprises a signal conversion device for converting a charge signal into a voltage signal as claimed in any one of claims 1 to 9.

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