Wiring substrate and display device

Abstract

An adverse effect caused by an electric field from a first wiring is reduced. A wiring board (21) is provided with: a first wiring (27) extending in a first direction; a second wiring (40) extending in the first direction; a first electrode (29) connected to the second wiring (40); a third wiring (42) extending in a second direction intersecting the first direction; and a signal supply unit (12) which is connected to the first wires (27) and is not connected to the second wires (40) and the third wires (42), in which two first wires (27) are disposed at a distance from each other in the second direction, and in which two second wires (40) are disposed so as to overlap the two first wires (27) with insulating films (35, 36) therebetween at positions spaced apart from each other in the second direction. The signal supply unit (12) supplies a first signal to one of the two first wirings (27) and supplies a second signal to the other of the two first wirings (27), the polarity of the second signal is opposite to the polarity of the first signal, and the third wiring (42) is connected to the two second wirings (40).

Description

Technical Field

[0001] The technology disclosed in this specification relates to a wiring substrate and a display device. Background Art

[0002] In the past, as an example of a wiring substrate provided by a display device, a wiring substrate described in the following patent document 1 is known. In patent document 1, as a wiring substrate, an array substrate of a built-in touch panel of a display device is described. The built-in touch panel comprises: an array substrate, which comprises a plurality of sub-pixels; a plurality of gate lines and data lines, which are arranged on the array substrate and insulated by crossing each other; a plurality of self-capacitance electrodes, which are arranged on the same layer and are independent of each other; and a plurality of touch control lines, which connect each of the self-capacitance electrodes to a touch detection chip, respectively, and the plurality of gate lines and the data lines cross each other to define the plurality of sub-pixels, each sub-pixel having a long side and a short side, including a pixel electrode, and the touch control line is arranged in a manner extending in the direction of the short side of the sub-pixel. The built-in touch panel is designed by a new pixel structure, so that the position of the touch control line can be optimized, the aperture ratio can be improved, and the power consumption can be reduced. Prior art literature Patent Literature

[0003] Patent Document 1: Japanese Patent Application No. 2018-509662 Summary of the invention Technical Problems to be Solved by the Invention

[0004] In the built-in touch panel described in the above-mentioned patent document 1, a plurality of metal wires are formed that are arranged in the same layer as the touch control line and are insulated from each other, and these plurality of metal wires are electrically connected to the self-capacitance electrode via a through hole, so that the resistance of the self-capacitance electrode with a high resistance value can be reduced. However, for example, when the metal wire is not normally connected to the self-capacitance electrode, the connection resistance between the self-capacitance electrode and the metal wire becomes higher. Therefore, the electric field from the data line may have an adverse effect on the switching element present near the metal wire via the metal wire.

[0005] The technology described in this specification is a technology that has been accomplished based on the above-described circumstances, and its purpose is to reduce the adverse effects of the electric field from the first wiring. Technical solutions for solving technical problems

[0006] (1) A wiring substrate related to the technology described in this specification comprises: a first wiring extending in a first direction; a second wiring extending in the first direction; a first electrode connected to the second wiring; a third wiring extending in a second direction intersecting the first direction; and a signal supply unit connected to the first wiring but not connected to the second wiring and the third wiring, two of the first wirings are arranged at intervals in the second direction, and two of the second wirings are arranged at intervals in the second direction so as to overlap with the two first wirings via an insulating film, the signal supply unit supplies a first signal to one of the two first wirings and supplies a second signal to the other of the two first wirings, the polarity of the second signal being opposite to that of the first signal, and the third wiring is connected to the two second wirings.

[0007] (2) In addition, based on the above (1), the above may also include: a fourth wiring extending along the first direction and connected to the first electrode; and a fifth wiring extending along the second direction, two of the fourth wirings are arranged at intervals in the second direction, and two of the first wirings are arranged at intervals in the second direction and overlap with the two fourth wirings via an insulating film, the signal supply unit provides a third signal to the two fourth wirings, provides a fourth signal to one of the two first wirings overlapping with the two fourth wirings, and provides a fifth signal to the other of the two first wirings overlapping with the two fourth wirings, the polarity of the fifth signal is opposite to that of the fourth signal, and the fifth wiring is connected to the two fourth wirings.

[0008] (3) In addition, the above-mentioned (1) or (2) may also include: a second electrode; and a switching element, which is connected to the first wiring and the second electrode, and a portion of the second wiring is configured to overlap with at least a portion of the switching element through an insulating film.

[0009] (4) In addition, in any one of the above (1) to (3), a plurality of the third wirings may be arranged at intervals in the first direction, and the plurality of the third wirings may be connected to two of the second wirings, respectively.

[0010] (5) A display device according to the technology described in this specification includes: the wiring substrate according to any one of (1) to (4) above; and a counter substrate arranged to face the wiring substrate with a gap therebetween. Beneficial Effects

[0011] According to the technology described in this specification, it is possible to reduce adverse effects caused by the electric field from the first wiring. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a plan view of a liquid crystal panel, a driver, a flexible substrate, and the like constituting the liquid crystal display device of the first embodiment. Figure 2 It is a cross-sectional view of a liquid crystal panel, a driver, a flexible substrate, etc. according to the first embodiment. Figure 3 This is a circuit diagram showing the electrical configuration of an array substrate constituting the liquid crystal panel according to the first embodiment. Figure 4 This is a cross-sectional view showing the cross-sectional structure of the source wiring, the touch wiring, the first connecting wiring, and the vicinity of the pixel electrode in the liquid crystal panel of the first embodiment. Figure 5 It is a cross-sectional view showing the cross-sectional structure of the vicinity of the TFT and the touch wiring in the array substrate according to the first embodiment. Figure 6 This is a plan view schematically showing the relationship between the touch electrode, the gate wiring, the source wiring, the touch wiring, each connection wiring, and each short-circuit wiring according to the first embodiment. Figure 7 It is a cross-sectional view showing a cross-sectional structure of a TFT and the vicinity of a first connecting wiring in the array substrate according to the first embodiment. Figure 8 It is a cross-sectional view showing the cross-sectional structure of the first short-circuit wiring and the vicinity of the gate wiring in the array substrate according to the first embodiment. Fig. 9 It is a plan view schematically showing the relationship between the touch electrode, the gate wiring, the source wiring, the touch wiring, each connection wiring, and each short-circuit wiring according to the second embodiment. Fig.10 This is a plan view schematically showing the relationship between the touch electrode, the gate wiring, the source wiring, the touch wiring, each connection wiring, and each short-circuit wiring according to the third embodiment. Fig.11 It is a plan view schematically showing the relationship between the touch electrode, the gate wiring, the source wiring, the touch wiring, each connection wiring, and each short-circuit wiring according to the fourth embodiment. Fig.12 It is a plan view schematically showing the relationship between the touch electrode, the gate wiring, the source wiring, the touch wiring, each connection wiring, and each short-circuit wiring according to the fifth embodiment. DETAILED DESCRIPTION

[0013] <First Embodiment> pass Figures 1 to 8The first embodiment is described. In this embodiment, a liquid crystal display device 10 having a display function and a touch panel function (position input function) is exemplified. In addition, the X-axis, the Y-axis, and the Z-axis are shown in a part of each drawing, and the directions of the axes are described in a manner that is shown in each drawing. Figure 2 , Figure 4 , Figure 5 , Figure 7 and Figure 8 The upper side of the figures is set as the front side, and the lower side of these figures is set as the back side.

[0014] like Figure 1 As shown, the liquid crystal display device 10 at least includes: a liquid crystal panel (display device, display panel) 11, which is in a horizontally long square shape and can display images; and a backlight device (illumination device), which is an external light source that irradiates light for display to the liquid crystal panel 11. The backlight device is arranged on the back side (back side) relative to the liquid crystal panel 11, and has a light source (such as LED, etc.) that emits white light (white light), optical components, etc., and the optical components convert the light from the light source into planar light by applying an optical effect. The central side portion of the screen of the liquid crystal panel 11 is the display area AA where the image is displayed. In contrast, the frame-shaped peripheral side portion of the screen of the liquid crystal panel 11 that surrounds the display area AA is set as a non-display area NAA where the image is not displayed.

[0015] like Figure 1 As shown, a circuit unit (peripheral circuit unit, gate circuit unit) 14 is provided in the non-display area NAA of the liquid crystal panel 11. A pair of circuit units 14 are arranged in a manner of sandwiching the display area AA from both sides in the X-axis direction. The circuit unit 14 is provided in a strip-shaped range extending along the Y-axis direction. The circuit unit 14 is used to supply a scanning signal to the gate wiring 26 described later, and is provided in a monolithic manner on the array substrate 21 described later. The circuit unit 14 is a GDM (Gate Driver Monolithic) circuit. The circuit unit 14 includes a shift register circuit that outputs a scanning signal at a predetermined timing, a buffer circuit for amplifying the scanning signal, and the like.

[0016] Regarding the liquid crystal panel 11, in addition to Figure 1 In addition, refer to Figure 2 For detailed description. Figure 1 as well as Figure 2As shown, the liquid crystal panel 11 is formed by bonding a pair of substrates 20 and 21. The front side (front side) of the pair of substrates 20 and 21 is set as a relative substrate (CF substrate) 20, and the back side (back side) is set as an array substrate (wiring substrate) 21. The relative substrate 20 and the array substrate 21 are both formed by stacking various films on the inner surface side of the glass substrate (substrate) 20GS and 21GS. A liquid crystal layer (dielectric layer) 22 containing liquid crystal molecules is sandwiched between the pair of substrates 20 and 21. The liquid crystal molecules are substances whose optical properties change with the application of an electric field. A sealing portion 23 that seals the liquid crystal layer 22 is sandwiched between the outer peripheral ends of the pair of substrates 20 and 21. The sealing portion 23 is formed in a square frame shape (endless ring shape) in a manner of surrounding the liquid crystal layer 22. In addition, polarizing plates 15 are respectively attached to the outer surface sides of the two substrates 20 and 21.

[0017] like Figure 1 and Figure 2 As shown, the short side dimension of the relative substrate 20 is shorter than the short side dimension of the array substrate 21. The relative substrate 20 is bonded to the array substrate 21 in a manner that one end in the short side direction (Y-axis direction) is aligned with the array substrate 21. Therefore, the other end in the short side direction of the array substrate 21 becomes an exposed portion 21A that protrudes laterally relative to the relative substrate 20 and is exposed. The entire area of ​​the exposed portion 21A is a non-display area NAA, on which a driver (signal supply unit) 12 and a flexible substrate 13 for supplying various signals related to the display function and touch panel function described below are installed.

[0018] Figure 1 and Figure 2 The driver 12 shown is composed of an LSI chip having a driving circuit inside. The driver 12 is mounted on the exposed portion 21A of the array substrate 21 by COG (Chip On Glass). The driver 12 processes various signals transmitted by the flexible substrate 13. The driver 12 supplies various signals (such as image signals, touch signals, etc.) to the wiring of the display area AA (specifically, the source wiring 27 and the touch wiring 30 described later). The flexible substrate 13 is configured to form a plurality of wiring patterns on a base material composed of an insulating and flexible synthetic resin material (such as a polyimide resin, etc.). As shown in FIG. Figure 1 and Figure 2 As shown, one end of the flexible substrate 13 is connected to the exposed portion 21A of the array substrate 21, and the other end is connected to an external circuit substrate (control substrate, etc.). The flexible substrate 13 is connected to the end of the exposed portion 21A on the side opposite to the display area AA side in the Y-axis direction relative to the driver 12.

[0019] The liquid crystal panel 11 of this embodiment also has a display function for displaying an image and a touch panel function for detecting the position (input position) of a user input based on the displayed image. In the liquid crystal panel 11, a touch panel pattern for performing the touch panel function is integrated (embedded). The touch panel pattern is a so-called projected electrostatic capacitance method, and its detection method is a self-capacitance method. Figure 1 As shown, the touch panel pattern is composed of a plurality of touch electrodes (first electrodes, position detection electrodes) 29 arranged in a matrix on the panel surface of the liquid crystal panel 11. The touch electrodes 29 are arranged in the display area AA of the liquid crystal panel 11. Therefore, the display area AA of the liquid crystal panel 11 is roughly consistent with the touch area (position input area) that can detect the input position, and the non-display area NAA is roughly consistent with the non-touch area (non-position input area) that cannot detect the input position. Furthermore, if a finger (position input body) as a conductor is brought close to the surface (display surface) of the liquid crystal panel 11 in order to perform position input based on the image of the display area AA of the liquid crystal panel 11 visually recognized by the user, an electrostatic capacitance is formed between the finger and the touch electrode 29. As a result, the electrostatic capacitance detected by the touch electrode 29 located near the finger changes as the finger approaches, and is different from the touch electrode 29 far away from the finger, so the input position can be detected based on this. In addition, in addition to Figure 1 In addition to the illustration, the specific number of touch electrodes 29 can be appropriately changed. The touch electrodes 29 are roughly square when viewed from above, and the size of one side is about several mm. Therefore, the size of the touch electrodes 29 when viewed from above is much larger than the pixels described later, and is arranged in the range spanning multiple pixels in the X-axis direction and the Y-axis direction.

[0020] like Figure 1 As shown, a plurality of touch wirings (fourth wiring, position detection wiring) 30 provided in the liquid crystal panel 11 are selectively connected to a plurality of touch electrodes 29. The touch wiring 30 extends roughly along the Y-axis direction, with one end side connected to the driver 12 in the non-display area NAA, and the other end side connected to a specific touch electrode 29 among the plurality of touch electrodes 29 arranged along the Y-axis direction in the display area AA. Moreover, the touch wiring 30 is connected to the detection circuit. The detection circuit can be provided in the driver 12, but can also be provided outside the liquid crystal panel 11 via the flexible substrate 13. The detailed structure of the touch wiring 30 will be described again later.

[0021] Next, use Figure 3 The structure of the display area AA in the array substrate 21 is described. Figure 3As shown, at least TFT (switching element, transistor) 24 and pixel electrode (second electrode) 25 are provided on the inner surface side of the display area AA of the array substrate 21. TFT24 and pixel electrode 25 are arranged in a matrix (row and column) with intervals along the X-axis direction and the Y-axis direction, respectively. Gate wiring (sixth wiring, scanning wiring) 26 and source wiring (first wiring, image wiring, signal wiring) 27 that are orthogonal (crossed) to each other are arranged around these TFT24 and pixel electrode 25. The gate wiring 26 extends along the X-axis direction, and multiple wirings are arranged at intervals in the Y-axis direction. The source wiring 27 extends along the Y-axis direction (first direction), and multiple wirings are arranged at intervals in the X-axis direction (second direction intersecting the first direction). TFT24 has a gate 24A connected to the gate wiring 26, a source 24B connected to the source wiring 27, a drain 24C connected to the pixel electrode 25, and a semiconductor portion 24D connected to the source 24B and the drain 24C. Then, TFT24 is driven based on the scanning signal supplied to gate 24A by gate wiring 26. Then, the potential of the image signal (first signal, second signal, fourth signal, fifth signal) supplied from driver 12 to source 24B via source wiring 27 is supplied to drain 24C via semiconductor portion 24D. As a result, pixel electrode 25 is charged to the potential of the image signal. Pixel electrode 25 is arranged in an area surrounded by gate wiring 26 and source wiring 27, and its planar shape is, for example, a roughly rectangular shape. In addition, slits are formed in openings of each of the plurality of pixel electrodes 25. In addition, in Figure 3 In the figure, the slit is omitted.

[0022] Next, use Figure 4 The cross-sectional structure of the pixel electrode 25 near the center portion in the liquid crystal panel 11 will be described. Figure 4As shown, in the display area AA on the inner surface side of the relative substrate 20 constituting the liquid crystal panel 11, a color filter 31 showing three colors of blue (B), green (G) and red (R) is provided. A plurality of color filters 31 showing different colors are arranged adjacent to each other in the extension direction (X-axis direction) of the gate wiring 26. A plurality of color filters 31 showing different colors extend along the extension direction (approximately Y-axis direction) of the source wiring 27. In this way, a plurality of color filters 31 showing different colors are arranged in a stripe shape as a whole. These color filters 31 are arranged to overlap with each pixel electrode 25 on the array substrate 21 side when viewed from above, and together with the pixel electrode 25, constitute a pixel as a display unit. A plurality of color filters 31 showing different colors are arranged so that their boundaries (color boundaries) overlap with the source wiring 27. A light shielding portion (light shielding portion between pixels, black matrix) 32 located on the lower layer side of the color filter 31 is provided on the inner surface side of the relative substrate 20. The light shielding portion 32 is made of a light shielding material having excellent light shielding properties. The light shielding portion 32 can block light irradiated from a backlight device or the like. In the display area AA, the planar shape of the light shielding portion 32 is roughly lattice-shaped, separating adjacent pixel electrodes 25 (pixels). The light shielding portion 32 is configured to overlap with at least the gate wiring 26 and the source wiring 27 on the array substrate 21 side when viewed from above. In addition, on the upper side (liquid crystal layer 22 side) of the color filter 31, an outer coating film 33 is provided in a whole-surface configuration over substantially the entire area of ​​the relative substrate 20 for flattening. In addition, the innermost surfaces (uppermost layers) of the two substrates 20 and 21 that are in contact with the liquid crystal layer 22 are respectively formed with orientation films for orienting the liquid crystal molecules contained in the liquid crystal layer 22.

[0023] like Figure 4As shown, a common electrode 28 is formed on the inner surface side of the display area AA of the array substrate 21 in a form overlapping with all the pixel electrodes 25. The common electrode 28 extends over substantially the entire area of ​​the display area AA. The common electrode 28 is arranged on the lower side (glass substrate 21GS side) relative to the pixel electrode 25 via the third interlayer insulating film 38 described later. A common potential signal as a common potential (reference potential) is supplied to the common electrode 28. When the pixel electrode 25 is charged to a potential based on the image signal transmitted to the source wiring 27 as the TFT 24 is driven, a potential difference is generated between the pixel electrode 25 and the common electrode 28. Thus, between the opening edge of the slit in the pixel electrode 25 and the common electrode 28, in addition to the component along the board surface of the array substrate 21, a fringe electric field (inclined electric field) containing a component in the normal direction relative to the board surface of the array substrate 21 is generated. Therefore, by utilizing this fringe electric field, the alignment state of the liquid crystal molecules contained in the liquid crystal layer 22 can be controlled, and a predetermined display is performed based on the alignment state of the liquid crystal molecules. That is, the operation mode of the liquid crystal panel 11 of the present embodiment is set to the FFS (Fringe Field Switching) mode.

[0024] like Figure 1 As shown, the common electrode 28 constitutes the above-mentioned touch electrode 29. The common electrode 28 has a separation opening portion (separation slit) 28A that separates adjacent touch electrodes 29. The separation opening portion 28A is composed of a first separation opening portion 28A1 that spans the entire length of the common electrode 28 along the approximately X-axis direction, and a second separation opening portion 28A2 that spans the entire length of the common electrode 28 along the approximately Y-axis direction, and the whole is roughly lattice-shaped when viewed from above. The common electrode 28 is composed of a plurality of touch electrodes 29, which are divided by the separation opening portion 28A into a roughly checkerboard shape when viewed from above, and are electrically independent of each other. The touch electrodes 29 arranged along the Y-axis direction are separated by the first separation opening portion 28A1, while the touch electrodes 29 arranged along the X-axis direction are separated by the second separation opening portion 28A2. The common potential signal (third signal) related to the image display function and the touch signal (third signal, position detection signal) related to the touch panel function are supplied to the touch wiring 30 connected to such a touch electrode 29 in a time-sharing manner from the driver 12. The timing of supplying the common potential signal from the driver 12 to the touch wiring 30 is the display period, and the timing of supplying the touch signal from the driver 12 to the touch wiring 30 is the sensing period (position detection period). The common potential signal is transmitted to all touch wirings 30 at the same timing (display period), so that all touch electrodes 29 become the reference potential based on the common potential signal and function as the common electrode 28.

[0025] like Figure 4As shown in FIG. 1 , the touch wiring 30 is arranged to overlap with the source wiring 27 in a plan view. Figure 1 As shown, the touch wiring 30 is arranged to cross the first partition opening 28A1 that partitions the touch electrodes 29 adjacent to each other in the Y-axis direction.

[0026] Here, refer to Figure 5 , various films stacked on the inner surface side of the array substrate 21 are described. Figure 5 2 shows the cross-sectional structure of the TFT 24 and the touch wiring 30 in the array substrate 21. Figure 5 As shown, on the glass substrate (substrate) 21GS of the array substrate 21, a first metal film, a gate insulating film 34, a semiconductor film, a second metal film (first conductive film), a first interlayer insulating film (insulating film) 35, a planarizing film (insulating film) 36, a third metal film (second conductive film), a second interlayer insulating film (insulating film) 37, a first transparent electrode film, a third interlayer insulating film (insulating film) 38, a second transparent electrode film and an orientation film are stacked in sequence from the lower side (glass substrate 21GS side).

[0027] The first metal film, the second metal film, and the third metal film are respectively formed by forming a single-layer film composed of one metal material selected from copper, titanium, aluminum, molybdenum, tungsten, etc., or a laminated film or alloy composed of different types of metal materials, and have conductivity and light-shielding properties. The first metal film constitutes the gate wiring 26, the gate 24A of TFT24, etc. The second metal film constitutes the source wiring 27, the source 24B and the drain 24C of TFT24, etc. The third metal film constitutes the touch wiring 30, etc. The first transparent electrode film and the second transparent electrode film are composed of transparent electrode materials (such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), etc.). The first transparent electrode film constitutes the common electrode 28 (touch electrode 29), etc. The second transparent electrode film constitutes the pixel electrode 25, etc. The orientation film is as described above.

[0028] The semiconductor film is composed of an oxide semiconductor material, and constitutes the semiconductor portion 24D of the TFT 24. The semiconductor film may contain, for example, at least one metal element of In, Ga, and Zn, and may be, for example, an In-Ga-Zn-O semiconductor (e.g., indium gallium zinc oxide). Here, the In-Ga-Zn-O semiconductor is a ternary oxide of In (indium), Ga (gallium), and Zn (zinc), and the ratio (composition ratio) of In, Ga, and Zn is not particularly limited, and may include, for example, In:Ga:Zn=2:2:1, In:Ga:Zn=1:1:1, In:Ga:Zn=1:1:2, etc. The In-Ga-Zn-O semiconductor used for the semiconductor film may be amorphous or crystalline. The semiconductor film may also contain other oxide semiconductors instead of the In-Ga-Zn-O semiconductor. For example, it may contain an In-Sn-Zn-O semiconductor (e.g., In2O3-SnO2-ZnO; InSnZnO). In-Sn-Zn-O semiconductors are ternary oxides of In (indium), Sn (tin) and Zn (zinc). Alternatively, the oxide semiconductor layer may include In-W-Zn-O semiconductors, In-W-Sn-Zn-O semiconductors, In-Al-Zn-O semiconductors, In-Al-Sn-Zn-O semiconductors, Zn-O semiconductors, In-Zn-O semiconductors, Zn-Ti-O semiconductors, Cd-Ge-O semiconductors, Cd-Pb-O semiconductors, CdO (cadmium oxide), Mg-Zn-O semiconductors, In-Ga-Sn-O semiconductors, In-Ga-O semiconductors, Zr-In-Zn-O semiconductors, Hf-In-Zn-O semiconductors, Al-Ga-Zn-O semiconductors, Ga-Zn-O semiconductors, In-Ga-Zn-Sn-O semiconductors, etc. containing W (tungsten). The oxide semiconductor material of the semiconductor film has a characteristic of having a higher resistance value in a state where no voltage is applied (off state) than a polycrystalline silicon semiconductor material. In addition, the oxide semiconductor material of the semiconductor film has a higher electron mobility than an amorphous silicon semiconductor material.

[0029] The gate insulating film 34, the first interlayer insulating film 35, the second interlayer insulating film 37 and the third interlayer insulating film 38 are respectively made of silicon nitride (SiN x), silicon oxide (SiO2) and other inorganic materials. The thickness of the gate insulating film 34, the first interlayer insulating film 35, the second interlayer insulating film 37 and the third interlayer insulating film 38 is greater than the thickness of the first transparent electrode film and the second transparent electrode film. The planarizing film 36 is composed of an organic material such as PMMA (acrylic resin). The thickness of the planarizing film 36 is much greater than the thickness of the gate insulating film 34, the first interlayer insulating film 35, the second interlayer insulating film 37 and the third interlayer insulating film 38. The planarizing film 36 is used to planarize the inner surface (the surface on the liquid crystal layer 22 side) of the array substrate 21. The gate insulating film 34 keeps the first metal film on the lower side and the semiconductor film and the second metal film on the upper side in an insulating state. For example, the intersection of the gate wiring 26 composed of the first metal film and the source wiring 27 composed of the second metal film is kept in an insulating state by the gate insulating film 34. In addition, in TFT24, the overlapping portion of the gate 24A composed of the first metal film and the semiconductor portion 24D composed of the semiconductor film is maintained in an insulating state by the gate insulating film 34. The first interlayer insulating film 35 and the planarizing film 36 keep the semiconductor film and the second metal film on the lower layer side and the third metal film on the upper layer side in an insulating state. For example, the overlapping portion of the source wiring 27 composed of the second metal film and the touch wiring 30 composed of the third metal film is maintained in an insulating state by the first interlayer insulating film 35 and the planarizing film 36. The second interlayer insulating film 37 keeps the third metal film on the lower layer side and the first transparent electrode film on the upper layer side in an insulating state. For example, the overlapping portion of the touch wiring 30 composed of the third metal film and the common electrode 28 (touch electrode 29) composed of the first transparent electrode film is maintained in an insulating state by the second interlayer insulating film 37. The third interlayer insulating film 38 keeps the first transparent electrode film on the lower layer side and the second transparent electrode film on the upper layer side in an insulating state. For example, the overlapping portion of the common electrode 28 (touch electrode 29 ) formed of the first transparent electrode film and the pixel electrode 25 formed of the second transparent electrode film is maintained in an insulated state by the third interlayer insulating film 38 .

[0030] The structure of TFT24 is described in detail. Figure 5As shown, the gate 24A of TFT24, which is composed of a first metal film, is located on the lower side relative to the semiconductor part 24D composed of a semiconductor film through the gate insulating film 34. That is, it can be said that TFT24 is a bottom-gate transistor. The gate 24A is formed by locally widening the gate wiring 26 extending in the X-axis direction. The source 24B and the drain 24C, which are composed of a second metal film, are arranged at positions separated in the X-axis direction, and each part is connected in the form of direct contact with the upper side of the semiconductor part 24D. The source 24B is formed by locally widening the source wiring 27 extending in the Y-axis direction. The intermediate electrode 39, which is composed of a third metal film, is overlapped with the end of the drain 24C on the side opposite to the semiconductor part 24D. The first pixel contact hole CH1 is formed in communication with the first interlayer insulating film 35 and the planarizing film 36 sandwiched between the drain 24C and the intermediate electrode 39. The drain 24C and the intermediate electrode 39 are connected through the first pixel contact hole CH1. The intermediate electrode 39 is arranged to overlap a portion of the pixel electrode 25 formed of the second transparent electrode film. The second pixel contact hole CH2 is formed in communication on the second interlayer insulating film 37 and the third interlayer insulating film 38 sandwiched between the intermediate electrode 39 and a portion of the pixel electrode 25. The intermediate electrode 39 and the pixel electrode 25 are connected through the second pixel contact hole CH2. In addition, an opening for passing the pixel electrode 25 is formed in a portion of the common electrode 28 that overlaps with the second pixel contact hole CH2.

[0031] The connection structure between the touch electrode 29 (common electrode 28) and the touch wiring 30 is described. Figure 5 As shown, a second interlayer insulating film 37 is sandwiched between the touch wiring 30 formed of the third metal film and the touch electrode 29 formed of the first transparent electrode film. A first contact hole CH3 for connecting the touch wiring 30 and the touch electrode 29 is opened on the second interlayer insulating film 37. The first contact hole CH3 is arranged at a position overlapping with both the touch wiring 30 and the touch electrode 29 to which the touch wiring 30 is connected. In detail, the first contact hole CH3 is arranged to overlap with each part of the source 24B and the semiconductor layer 24D possessed by a specified TFT 24 included in a plurality of TFTs 24 overlapping both the touch wiring 30 and the touch electrode 29. The first contact hole CH3 is arranged with a plurality of ( Figure 6 The touch wiring 30 is partially widened like the source wiring 27, and the widened portion overlaps with a portion of each of the source electrode 24B and the semiconductor layer 24D and the first contact hole CH3.

[0032] like Figure 6As shown, a plurality of first connection wirings (second wirings) 40 connected to the touch electrodes 29 and second connection wirings 41 connected to a portion of the first connection wirings 40 are provided on the array substrate 21. Figure 6 In the figure, one touch electrode 29 is shown from among the plurality of touch electrodes 29, and the gate wiring 26, source wiring 27, touch wiring 30, first connection wiring 40, and second connection wiring 41 related to the touch electrode 29 are shown. Figure 6 , the source wiring 27 overlapping with the touch wiring 30 is shown relative to the touch wiring 30. Figure 6 Adjacent to the left.

[0033] like Figure 6 As shown, the first connection wiring 40 extends roughly along the Y-axis direction like the touch wiring 30. The first connection wiring 40 overlaps with the touch electrode 29 of the connection object, and the formation range in the Y-axis direction is limited to the same formation range of the touch electrode 29 of the connection object. The first connection wiring 40 and the touch electrode 29 of the connection object are arranged at multiple locations ( Figure 6 The first connection wiring 40 is connected at two locations in the middle. The resistance distribution of the touch electrode 29 is reduced by such a first connection wiring 40. The first connection wiring 40 is not connected to the driver 12. The first connection wiring 40 is located in the same layer as the touch wiring 30 and overlaps with the source wiring 27 when viewed from above. Figure 6 , the source wiring 27 overlapping with the first connection wiring 40 is shown relative to the first connection wiring 40. Figure 6 The first connection wiring 40 extends in the Y-axis direction like the source wiring 27 and the touch wiring 30. The first connection wiring 40 does not cross the first separation opening 28A1 that separates the touch electrode 29 to be connected and the touch electrode 29 adjacent to the touch electrode 29 in the Y-axis direction.

[0034] like Figure 6 As shown in FIG. 1 , the first connection wirings 40 are arranged in a plurality of positions deviated to one side in the X-axis direction in the touch electrode 29 to be connected. Specifically, the plurality of first connection wirings 40 are arranged to be deviated to the touch electrode 29 to be connected. Figure 6 area on the right. Figure 6 FIG. 10 shows that the twelve first connection wirings 40 are arranged in a concentrated manner in the touch electrodes 29 to be connected. Figure 6 In contrast, the touch wiring 30 is biased toward the touch electrode 29. Figure 6 The area on the left is configured in this way. Figure 6 The diagram shows a case where four touch wirings 30 are concentratedly arranged in a region on the left side of the touch electrode 29 . Figure 6Of the four touch wirings 30 shown, the two touch wirings 30 on the right are mainly connected to the touch electrodes 29 shown in the figure, and the two touch wirings 30 on the left are connected to touch electrodes 29 different from the touch electrodes 29 shown in the figure. In addition, the plurality of first connection wirings 40 include the touch electrodes 29 located in the connection object. Figure 6 A first connection wiring 40 which is at the left end of the touch wiring 30 and is sandwiched between a second connection wiring 41 described later.

[0035] The connection structure between the touch electrode 29 and the first connection wiring 40 is described. Figure 7 As shown, the first connection wiring 40 is formed of the same third metal film as the touch wiring 30 . Figure 7 The cross-sectional structure of the vicinity of the TFT24 and the first connection wiring 40 in the array substrate 21 is shown. A second interlayer insulating film 37 is interposed between the first connection wiring 40 formed of a third metal film and the touch electrode 29 to be connected. A second contact hole CH4 for connecting the touch electrode 29 and the first connection wiring 40 is formed with an opening on the second interlayer insulating film 37. The second contact hole CH4 is arranged at a position overlapping with both the first connection wiring 40 and the touch electrode 29 to which the first connection wiring 40 is connected. In detail, the second contact hole CH4 is arranged to overlap with each part of the source 24B and the semiconductor portion 24D possessed by a specified TFT24 among the multiple TFTs24 overlapping with both the touch electrode 29 and the first connection wiring 40. The second contact hole CH4 is arranged to overlap with each part of the source 24B and the semiconductor portion 24D possessed by a specified TFT24 among the multiple TFTs24 overlapping with both the touch electrode 29 and the first connection wiring 40. Figure 6 In addition, the first connection wiring 40 is partially widened, similarly to the source wiring 27 and the contact wiring 30, and the widened portion is arranged to overlap with each part of the source 24B and the semiconductor portion 24D and the second contact hole CH4. In addition, a first interlayer insulating film 35 and a planarizing film 36 are interposed between the first connection wiring 40 composed of the third metal film and the source wiring 27 overlapping with the first connection wiring 40, and an insulating state is maintained.

[0036] like Figure 6 As shown, the second connection wiring 41 is arranged to overlap with the second separation opening 28A2 that separates the touch electrodes 29 adjacent to each other in the X-axis direction. That is, the second connection wiring 41 is arranged not to overlap with the touch electrode 29. The second connection wiring 41 does not cross the first separation opening 28A1 that separates the touch electrodes 29 adjacent to each other in the Y-axis direction. The second connection wiring 41 is composed of the same third metal film as the touch wiring 30 and the first connection wiring 40, and is arranged to overlap with the source wiring 27 when viewed from above. The source wiring 27 that overlaps with the second connection wiring 41 is arranged to overlap with the second separation opening 28A2. In addition, in Figure 6, the source wiring 27 overlapping with the second connection wiring 41 is shown relative to the second connection wiring 41. Figure 6 The second connection wiring 41 extends in the Y-axis direction similarly to the source wiring 27, the touch wiring 30, and the first connection wiring 40. The second connection wiring 41 is connected to the specified first connection wiring 40 via the third short-circuit wiring 44 described later. That is, the second connection wiring 41 is indirectly connected to the touch electrode 29 via the third short-circuit wiring 44 and the first connection wiring 40. The formation range of the second connection wiring 41 in the Y-axis direction is limited to the same formation range of the first connection wiring 40 and the touch electrode 29 of the connection object.

[0037] As described above, since the first connection wiring 40 is connected to the touch electrode 29, the resistance distribution of the touch electrode 29 can be reduced. On the other hand, for example, when the first connection wiring 40 is not normally connected to the touch electrode 29, the connection resistance between the touch electrode 29 and the first connection wiring 40 becomes higher. Therefore, the electric field from the source wiring 27 overlapping with the first connection wiring 40 through the first interlayer insulating film 35 and the planarizing film 36 may have an adverse effect on the TFT 24 (other elements) located near the first connection wiring 40 via the first connection wiring 40. In order to reduce the resistance distribution of the touch electrode 29, a method of increasing the connection portion (second contact hole CH4) between the first connection wiring 40 and the touch electrode 29 can also be adopted. However, at the connection portion between the first connection wiring 40 and the touch electrode 29, the second contact hole CH4 formed by connecting with the first interlayer insulating film 35 and the planarizing film 36 produces a local recess on the inner surface of the array substrate 21. Due to the recess, the orientation of the liquid crystal molecules included in the liquid crystal layer 22 is easily disturbed, and light leakage is easily generated. Therefore, it is difficult to ensure a large number of connection points between the first connection wiring 40 and the touch electrode 29. In addition, in the present embodiment, the number of connection points between the touch wiring 30 and the touch electrode 29 is set to be greater than the number of connection points between the first connection wiring 40 and the touch electrode 29. The reason for this is to prioritize the reliability of providing the common potential signal and the touch signal transmitted by the touch wiring 30 to the touch electrode 29.

[0038] Therefore, if Figure 6 As shown, in the array substrate 21 of the present embodiment, a first short-circuit wiring (third wiring) 42 is provided to short-circuit a plurality of first connection wirings 40 to each other. The first short-circuit wiring 42 extends along the X-axis direction (second direction) intersecting the extension direction (Y-axis direction) of the first connection wiring 40. The first short-circuit wiring 42 is arranged to overlap with the touch electrode 29 to which the first connection wiring 40 to be short-circuited is connected when viewed from above. The first short-circuit wiring 42 is arranged in the touch electrode 29 to which the first connection wiring 40 to be short-circuited is connected. Figure 6The area on the right side of the touch electrode 29 is the area where the first connection wiring 40 to be short-circuited is arranged. The first short-circuit wiring 42 is connected to the touch electrode 29. Figure 6 Therefore, the first connection wirings 40 (12 first connection wirings 40) arranged in the right area of ​​the touch electrode 29 Figure 6 The plurality of first connection wirings 40 in the area on the right side of the first connecting wiring 40 are short-circuited to each other by a first short-circuit wiring 42. The first short-circuit wiring 42 is arranged to be connected to one of the plurality of first connection wirings 40. Figure 6 That is, the first short-circuit wiring 42 is configured in the touch electrode 29. Figure 6 In addition, the first short-circuit wiring 42 is arranged to overlap with the gate wiring 26 when viewed from above. Figure 6 , the first short-circuit wiring 42 overlapping the gate wiring 26 is shown relative to the gate wiring 26. Figure 6 In addition, Figure 6 , only three gate wirings 26 overlapping with the first short-circuit wiring 42, the second short-circuit wiring 43, the third short-circuit wiring 44, and the fourth short-circuit wiring 45 described later are shown. The first short-circuit wiring 42 is not connected to the driver 12.

[0039] like Figure 8 As shown, the first short-circuit wiring 42 is formed of the same third metal film as the touch wiring 30 and the first connection wiring 40. Therefore, the first short-circuit wiring 42 is connected to the first connection wiring 40 of the connection object by direct connection. Figure 8 , a cross-sectional structure of the first short-circuit wiring 42 and the gate wiring 26 in the array substrate 21 cut along the X-axis direction is shown. A gate insulating film 34, a first interlayer insulating film 35, and a planarizing film 36 are sandwiched between the first short-circuit wiring 42 formed by the third metal film and the gate wiring 26 overlapping with the first short-circuit wiring 42, and the insulating state is maintained. A first interlayer insulating film 35 and a planarizing film 36 are sandwiched between the first short-circuit wiring 42 formed by the third metal film and the source wiring 27 intersecting with the first short-circuit wiring 42, and the insulating state is maintained. A third interlayer insulating film 38 is sandwiched between the first short-circuit wiring 42 formed by the third metal film and the touch electrode 29 overlapping with the first short-circuit wiring 42, and the insulating state is maintained.

[0040] Here, from Figure 6 Among the plurality of source wirings 27 in an overlapping relationship with the plurality of first connection wirings 40 shown in the figure, two predetermined source wirings 27 adjacent to each other separated by a gap (a gap of about the width dimension of one pixel electrode 25) in the X-axis direction are distinguished as a first source wiring (one first wiring) 27α and a second source wiring (another first wiring) 27β. Figure 6As shown, the first source wiring 27α is one of the two source wirings 27 adjacent to each other at an interval in the X-axis direction. The second source wiring 27β is the other source wiring 27 adjacent to one of the two source wirings 27 in the X-axis direction. The driver 12 supplies a first image signal (first signal) to the first source wiring 27α of the two source wirings 27α and 27β, and supplies a second image signal (second signal) having a polarity opposite to that of the first image signal to the second source wiring 27β. Figure 6 , the positive and negative polarities of the image signals supplied to the illustrated plurality of source wirings 27 are illustrated as “+” and “-” reference signs on the lower side of each source wiring 27. Specifically, when the polarity of the first image signal supplied to the first source wiring 27α is “+”, the polarity of the second image signal supplied to the second source wiring 27β is “-”. Conversely, when the polarity of the first image signal supplied to the first source wiring 27α is “-”, the polarity of the second image signal supplied to the second source wiring 27β is “+”. That is, the driver 12 performs an inversion drive that periodically inverts the polarities of the image signals supplied to the odd-numbered source wirings 27 and the even-numbered source wirings 27 counted from the end side of one side in the X-axis direction among the plurality of source wirings 27 arranged along the X-axis direction.

[0041] As in this embodiment, the touch electrodes 29 are arranged Figure 6 The plurality of first connection wirings 40 in the area on the right side of the touch electrode 29 are short-circuited to each other by a first short-circuit wiring 42, so that the connection resistance between the plurality of first connection wirings 40 and the touch electrode 29 can be reduced. In addition, since the first image signal and the second image signal with opposite polarities are respectively supplied from the driver 12 to the two source wirings 27α and 27β overlapping with two first connection wirings 40 included in the plurality of first connection wirings 40 via the first interlayer insulating film 35 and the planarizing film 36, the electric field acting on the first connection wiring 40 overlapping with the first source wiring 27α supplied with the first image signal and the electric field acting on the first connection wiring 40 overlapping with the second source wiring 27β supplied with the second image signal can be canceled. By canceling the electric field acting on the two first connection wirings 40 overlapping with the two source wirings 27α and 27β, it is difficult to generate a difference in the electric field on the back channel side that can be generated by each semiconductor portion 24D of the two TFTs 24, each of which partially overlaps with the two first connection wirings 40. This makes it difficult for the transistor characteristics of the two TFTs 24 to change (shift) over time, so that it is possible to suppress a decrease in display quality due to a change in transistor characteristics.

[0042] like Figure 6As shown, a second short-circuit wiring (fifth wiring) 43 is provided on the array substrate 21, which is separated by a gap (a gap of about the width dimension of a pixel electrode 25) in the X-axis direction to short-circuit two adjacent touch wirings 30. The second short-circuit wiring 43 extends along the X-axis direction intersecting the extension direction (Y-axis direction) of the touch wiring 30. The second short-circuit wiring 43 is connected to two touch wirings 30, and the two touch wirings 30 are connected to the same touch electrode 29. The second short-circuit wiring 43 is arranged to overlap with the touch electrode 29 to which the touch wiring 30 to be short-circuited is connected when viewed from above. The second short-circuit wiring 43 is arranged in the touch electrode 29 that overlaps with the touch wiring 30 to which the short-circuit is to be connected. Figure 6 The area on the left side of the touch wiring 30 to be short-circuited is configured. The second short-circuit wiring 43 is configured with two so as to be connected to the touch electrode 29 respectively. Figure 6 The second short-circuit wiring 43 is configured to overlap the gate wiring 26 when viewed from above. Figure 6 , the second short-circuit wiring 43 overlapping the gate wiring 26 is shown relative to the gate wiring 26. Figure 6 The second short-circuit wiring 43 is indirectly connected to the driver 12 via the touch wiring 30 .

[0043] The second short-circuit wiring 43 is formed of the same third metal film as the touch wiring 30 , the first connection wiring 40 , and the first short-circuit wiring 42 (see Figure 8 ). Therefore, the second short-circuit wiring 43 is connected by directly connecting to the touch wiring 30 of the connection object. That is, the relationship between the second short-circuit wiring 43 and the touch wiring 30 is the same as the relationship between the first short-circuit wiring 42 and the first connection wiring 40. In addition, the relationship between the second short-circuit wiring 43 and the gate wiring 26, the source wiring 27, and the contact electrode 29 is the same as the relationship between the first short-circuit wiring 42 and the gate wiring 26, the source wiring 27, and the contact electrode 29. A gate insulating film 34, a first interlayer insulating film 35, and a planarizing film 36 are sandwiched between the second short-circuit wiring 43 composed of the third metal film and the gate wiring 26 overlapping with the second short-circuit wiring 43, and an insulating state is maintained. A first interlayer insulating film 35 and a planarizing film 36 are sandwiched between the second short-circuit wiring 43 composed of the third metal film and the source wiring 27 intersecting with the second short-circuit wiring 43, and an insulating state is maintained. A third interlayer insulating film 38 is interposed between the second short-circuit wiring 43 formed of the third metal film and the touch electrode 29 overlapping the second short-circuit wiring 43 , and an insulating state is maintained.

[0044] Here, from having Figure 6Among the multiple source wirings 27 in a relationship of overlapping the multiple touch wirings 30 shown in FIG. 1 , two predetermined source wirings 27 connected to the same touch electrode 29 and overlapping the two touch wirings 30 are distinguished as a third source wiring (one first wiring) 27γ and a fourth source wiring (another first wiring) 27δ, and the two touch wirings 30 are connected to the same second short-circuit wiring 43. Figure 6 As shown, the third source wiring 27γ and the fourth source wiring 27δ are arranged adjacent to each other with a gap (a gap of about the width dimension of one pixel electrode 25) in the X-axis direction. The third source wiring 27γ is one of the two source wirings 27 adjacent to each other with a gap in the X-axis direction. The fourth source wiring 27δ is the other source wiring 27 adjacent to one of the two source wirings 27 in the X-axis direction. The driver 12 supplies a third image signal (third signal) to the third source wiring 27γ of the two source wirings 27γ and 27δ, and supplies a fourth image signal (fourth signal) having a polarity opposite to that of the third image signal to the fourth source wiring 27δ. Specifically, when the polarity of the third image signal supplied to the third source wiring 27γ is "+", the polarity of the fourth image signal supplied to the fourth source wiring 27δ is "-". In contrast, when the polarity of the third image signal supplied to the third source wiring 27γ is “−”, the polarity of the fourth image signal supplied to the fourth source wiring 27δ is “+”.

[0045] As in the present embodiment, since the two touch wirings 30 are short-circuited to each other by one second short-circuit wiring 43, the connection resistance between the two touch wirings 30 and the touch electrode 29 can be reduced. Furthermore, since the third image signal and the fourth image signal having opposite polarities are respectively supplied from the driver 12 to the two source wirings 27γ and 27δ overlapping with two touch wirings 30 included in the plurality of touch wirings 30 via the first interlayer insulating film 35 and the planarizing film 36, the electric field acting on the touch wiring 30 overlapping with the third source wiring 27γ supplied with the third image signal and the electric field acting on the touch wiring 30 overlapping with the fourth source wiring 27δ supplied with the fourth image signal can be canceled. By canceling the electric field acting on the two first connection wirings 30 overlapping with the two source wirings 27γ and 27δ, it is difficult to generate a difference in the electric field on the back channel side that can be generated by each semiconductor portion 24D provided in the two TFTs 24, each of which has a relationship of partially overlapping with the two first connection wirings 30. As a result, it becomes difficult for the transistor characteristics of the two TFTs 24 to change (shift) over time, so it is possible to suppress the degradation of display quality caused by the change in transistor characteristics. In this way, it is difficult for the electric field from the source wirings 27α to 27δ respectively overlapping the first connection wiring 40 and the touch wiring 30 to change the transistor characteristics of each TFT 24 via the first connection wiring 40 and the touch wiring 30.

[0046] In addition, in the array substrate 21, as Figure 6 As shown in FIG. 1 , a third short-circuit wiring 44 is provided for short-circuiting two specific first connection wirings 40 among the plurality of first connection wirings 40. Specifically, the third short-circuit wiring 44 is connected to two first connection wirings 40 located at the touch electrodes 29 to which the plurality of first connection wirings 40 are connected. Figure 6 The third short-circuit wiring 44 extends along the X-axis direction. The third short-circuit wiring 44 is configured with a plurality of ( Figure 6 In addition, the third short-circuit wiring 44 is configured to overlap with the gate wiring 26 when viewed from above. The third short-circuit wiring 44 is not connected to the driver 12. The third short-circuit wiring 44 is composed of the same third metal film as the touch wiring 30, the first connection wiring 40, the first short-circuit wiring 42, and the second short-circuit wiring 43 (see Figure 8 ). Therefore, the second short-circuit wiring 43 is connected by directly connecting to the first connection wiring 40 of the connection object. The relationship between the third short-circuit wiring 44 and the first connection wiring 40 is the same as the relationship between the first short-circuit wiring 42 and the first connection wiring 40. In addition, the relationship between the third short-circuit wiring 44 and the gate wiring 26, the source wiring 27, and the contact electrode 29 is the same as the relationship between the first short-circuit wiring 42 and the gate wiring 26, the source wiring 27, and the contact electrode 29.

[0047] In addition, in the array substrate 21, as Figure 6 As shown, a fourth short-circuit wiring 45 is provided, which short-circuits a specific first connection wiring 40 among the plurality of first connection wirings 40 and the second connection wiring 41. Specifically, the fourth short-circuit wiring 45 is connected to the touch electrode 29 located at the top of the plurality of first connection wirings 40 as a connection target. Figure 6 The fourth short-circuit wiring 45 extends along the X-axis direction. The fourth short-circuit wiring 45 is configured with a plurality of ( Figure 6 3 in the figure). In addition, the fourth short-circuit wiring 45 is configured to overlap with the gate wiring 26 when viewed from above. The fourth short-circuit wiring 45 is not connected to the driver 12. The fourth short-circuit wiring 45 is composed of the same third metal film as the touch wiring 30, the first connection wiring 40, the first short-circuit wiring 42, the second short-circuit wiring 43, and the third short-circuit wiring 44 (see Figure 8 ). Therefore, the fourth short-circuit wiring 45 is connected by directly connecting to the first connection wiring 40 and the second connection wiring 41 of the connection object. The relationship between the fourth short-circuit wiring 45 and the first connection wiring 40 and the second connection wiring 41 is the same as the relationship between the first short-circuit wiring 42 and the first connection wiring 40. In addition, the relationship between the fourth short-circuit wiring 45 and the gate wiring 26, the source wiring 27, and the contact electrode 29 is the same as the relationship between the first short-circuit wiring 42 and the gate wiring 26, the source wiring 27, and the contact electrode 29.

[0048] As described above, the array substrate (wiring substrate) 21 of the present embodiment comprises: a source wiring (first wiring) 27 extending along a first direction; a first connecting wiring (second wiring) 40 extending along the first direction; a touch electrode (first electrode) 29 connected to the first connecting wiring 40; a first short-circuit wiring (third wiring) 42 extending along a second direction intersecting the first direction; and a driver (signal supply unit) 12 connected to the source wiring 27 but not to the first connecting wiring 40 and the first short-circuit wiring 42, and the source wiring 27 is connected to the first connecting wiring 40 in the second direction. Two first connecting wirings 40 are arranged at intervals on the top, and two first connecting wirings 40 are arranged at intervals in the second direction, overlapping with the two source wirings 27 through an insulating film, namely a first interlayer insulating film 35, and a flattening film 36. The driver 12 supplies a first image signal (first signal) to one of the two source wirings 27, namely the first source wiring 27α, and supplies a second image signal (second signal) having a polarity opposite to the first image signal to the other of the two source wirings 27, namely the second source wiring 27β. The first short-circuit wiring 42 is connected to the two first connecting wirings 40.

[0049] Since two first connection wirings 40 are connected to the touch electrode 29, the resistance distribution of the touch electrode 29 can be reduced. On the other hand, for example, when the first connection wiring 40 is not normally connected to the touch electrode 29, the connection resistance between the touch electrode 29 and the first connection wiring 40 becomes high. Therefore, the electric field from the source wiring 27 overlapping with the first connection wiring 40 via the insulating film, that is, the first interlayer insulating film 35 and the planarizing film 36 may have an adverse effect on other elements present near the first connection wiring 40 via the first connection wiring 40.

[0050] In this regard, the two first connection wirings 40 are connected by the first short-circuit wiring 42 extending in the second direction, so that the connection resistance between the two first connection wirings 40 and the contact electrode 29 can be reduced. In addition, since the first image signal and the second image signal with opposite polarities are respectively supplied from the driver 12 to the two source wirings 27 overlapping with the two first connection wirings 40 via the insulating film, i.e., the first interlayer insulating film 35 and the planarizing film 36, the electric field acting on the first connection wiring 40 overlapping with one source wiring 27 supplied with the first image signal, i.e., the first source wiring 27α, and the electric field acting on the first connection wiring 40 overlapping with the other source wiring 27 supplied with the second image signal, i.e., the second source wiring 27β, can be offset. In summary, it is possible to prevent the electric field from the source wiring 27 from adversely affecting other elements present near the first connection wiring 40 via the first connection wiring 40.

[0051] In addition, the touch wiring (fourth wiring) 30 extending in the first direction and connected to the touch electrode 29 and the second short-circuit wiring (fifth wiring) 43 extending in the second direction are provided, two touch wirings 30 are arranged at intervals in the second direction, two source wirings 27 are arranged at intervals in the second direction and overlap with the two touch wirings 30 via an insulating film, namely, a first interlayer insulating film 35 and a planarizing film 36, and the driver 12 supplies a common potential signal and a touch signal as a third signal to the two touch wirings 30, supplies a third image signal (fourth signal) to one source wiring 27, namely, a third source wiring 27γ, of the two source wirings 27 overlapping the two touch wirings 30, supplies a fourth image signal (fifth signal) having a polarity opposite to that of the third image signal to the other source wiring 27, namely, a fourth source wiring 27δ, of the two source wirings 27 overlapping the two touch wirings 30, and the second short-circuit wiring 43 is connected to the two touch wirings 30. The third signal, namely, the common potential signal and the touch signal output by the driver 12 are supplied to the touch electrode 29 via the two touch wirings 30. Since the two touch wirings 30 are connected by the second short-circuit wiring 43 extending in the second direction, the connection resistance between the two touch wirings 30 and the touch electrode 29 can be reduced. In addition, since the third image signal and the fourth image signal with opposite polarities are respectively supplied from the driver 12 to the two source wirings 27 overlapping the two touch wirings 30 via the insulating film, namely the first interlayer insulating film 35 and the planarizing film 36, the electric field acting on the touch wiring 30 from the third source wiring 27γ, which is one source wiring 27 supplied with the third image signal, and the electric field acting on the touch wiring 30 from the fourth source wiring 27δ, which is another source wiring 27 supplied with the fourth image signal, can be offset. Based on the above, it is possible to make it difficult for the electric field from the source wiring 27 to have an adverse effect on other elements present near the touch wiring 30 via the touch wiring 30. In this way, the adverse effect of the electric field from the source wiring 27 overlapping the first connection wiring 40 and the touch wiring 30 can be appropriately reduced.

[0052] In addition, the pixel electrode (second electrode) 25 and the TFT (switching element) 24 connected to the source wiring 27 and the pixel electrode 25 are provided, and a portion of the first connection wiring 40 is arranged to overlap at least a portion of the TFT 24 via an insulating film, namely, a first interlayer insulating film 35 and a planarizing film 36. The first image signal output from the driver 12 is supplied to the pixel electrode 25 of the connection object via one of the two source wirings 27, namely, the first source wiring 27α, and the TFT 24 connected to the one source wiring 27, namely, the first source wiring 27α. The second image signal output from the driver 12 is supplied to the pixel electrode 25 of the connection object via the other of the two source wirings 27, namely, the second source wiring 27β, and the TFT 24 connected to the other source wiring 27, namely, the second source wiring 27β. By connecting the two first connection wirings 40 to the first short-circuit wiring 42, it is possible to prevent the electric field from the source wiring 27 from adversely affecting the TFT 24 overlapping the first connection wiring 40 via the first connection wiring 40.

[0053] In addition, the liquid crystal panel (display device) 11 of this embodiment includes the array substrate 21 described above and the opposite substrate 20 arranged opposite to the array substrate 21 at a distance. According to the liquid crystal panel 11 of this structure, it is difficult to produce the situation that the display quality is reduced due to the electric field from the source wiring 27.

[0054] <Second Embodiment> pass Fig. 9 A second embodiment will be described. In the second embodiment, a case where the configuration of the first short-circuit wiring 142 is changed will be described. In addition, regarding the same structure, operation, and effect as those of the first embodiment, repeated description will be omitted.

[0055] like Fig. 9 As shown, the first short-circuit wiring 142 of this embodiment is configured to be connected to the touch electrode 129. Fig. 9 Of all the first connecting wirings 140 in the area to the right of Figure 6 That is, the first short-circuit wiring 142 is configured in the touch electrode 129. Figure 6 Near the upper end.

[0056] <Third Embodiment> pass Fig.10 The third embodiment will be described. In the third embodiment, the configuration of the first short-circuit wiring 242 is changed from the first embodiment. The repeated description of the same structure, function, and effect as the first embodiment will be omitted.

[0057] like Fig.10As shown, the first short-circuit wiring 242 of this embodiment is configured to be connected to the touch electrode 229. Fig.10 Of all the first connecting wirings 240 in the area to the right of Figure 6 That is, the first short-circuit wiring 242 is configured in the touch electrode 229. Figure 6 Near the center in the up and down direction.

[0058] <Fourth Embodiment> pass Fig.11 A fourth embodiment will be described. In the fourth embodiment, the configuration of the first short-circuit wiring 342 is changed from the first embodiment. In addition, regarding the same structure, operation, and effect as the first embodiment, repeated description will be omitted.

[0059] like Fig.11 As shown, the first short-circuit wiring 342 of this embodiment is arranged with a plurality of ( Fig.11 Specifically, the plurality of first short-circuit wirings 342 include: a first short-circuit wiring 342 connected to one of the first connection wirings 340; Fig.11 The lower end portion; a first short-circuit wiring 342, connected to the first connection wiring 340 Fig.11 and a first short-circuit wiring 342, connected to the first connection wiring 340 in Fig.11 The plurality of first short-circuit wirings 342 are respectively connected to the touch electrodes 329. Fig.11 In this way, by connecting each first connection wiring 340 to a plurality of first short-circuit wirings 342 , the connection resistance between each first connection wiring 340 and the touch electrode 329 can be further reduced.

[0060] As described above, according to the present embodiment, a plurality of first short-circuit wirings 342 are arranged at intervals in the first direction, and the plurality of first short-circuit wirings 342 are respectively connected to the two first connection wirings 340. In this way, by connecting the two first connection wirings 340 to the plurality of first short-circuit wirings 342, the connection resistance between the two first connection wirings 340 and the touch electrode 329 can be further reduced.

[0061] <Fifth Embodiment> pass Fig.12 A fifth embodiment will be described. In the fifth embodiment, the configuration of the first short-circuit wiring 442 is changed from the first embodiment. In addition, regarding the same structure, operation, and effect as the first embodiment, repeated description will be omitted.

[0062] like Fig.12 As shown, the first short-circuit wiring 442 of this embodiment is arranged in a plurality of intervals in the X-axis direction so as to be connected to each of the two first connection wirings 440. The length dimension of the first short-circuit wiring 442 in the X-axis direction is the interval between two adjacent first connection wirings 440 (source wirings 427) in the X-axis direction, and is also a pixel electrode 25 (refer to Figure 4 ) in the width dimension. The interval between two adjacent first short-circuit wirings 442 in the X-axis direction is about the width dimension of one pixel electrode 25. The driver 412 supplies image signals with reversed polarity to two source wirings 427 that overlap with two first connection wirings 440 that are short-circuited by the first short-circuit wirings 442. Therefore, in this embodiment, as in the first embodiment, the electric fields that overlap with the source wirings 427 and act on the first connection wirings 440 can be offset. In addition, the plurality of first short-circuit wirings 442 are all connected to the first connection wirings 440. Fig.12 The central part in the up and down directions is connected.

[0063] <Other Implementation Methods> The technology disclosed in this specification is not limited to the embodiments illustrated in the above description and drawings, and for example, the following embodiments are also included in the technical scope.

[0064] (1) The connection positions of the first short-circuit wirings 42 , 142 , 242 , 342 , and 442 with the first connection wirings 40 , 140 , 240 , 340 , and 440 in the Y-axis direction can be changed as appropriate other than those shown in the drawings.

[0065] (2) In the configuration described in the fourth embodiment, the number of first short-circuit wirings 342 may be changed to two or four or more.

[0066] (3) The number of the first connection wirings 40 , 140 , 240 , 340 , and 440 short-circuited by the first short-circuit wirings 42 , 142 , 242 , 342 , and 442 may be changed as appropriate other than that shown in the drawings.

[0067] (4) The number of touch wirings 30 to be short-circuited by the second short-circuit wiring 43 can be changed as appropriate other than that shown in the drawings.

[0068] (5) The number of third short-circuit wirings 44 and fourth short-circuit wirings 45 to be provided can be changed as appropriate other than that shown in the drawings.

[0069] (6) The third short-circuit wiring 44 may be omitted.

[0070] (7) The fourth short-circuit wiring 45 may be omitted. In this case, the second connection wiring 41 may be connected to the touch electrodes 29 , 129 , 229 , and 329 .

[0071] (8) Each of the short-circuit wirings 42 to 45 , 142 , 242 , 342 , and 442 may be arranged so as not to overlap with the gate wiring 26 .

[0072] (9) The number of connection points between the touch wiring 30 and the touch electrodes 29 , 129 , 229 , and 329 can be changed as appropriate other than that shown in the drawings.

[0073] (10) The number of connection points between the first connection wiring 40 , 140 , 240 , 340 , 440 and the touch electrodes 29 , 129 , 229 , 329 can be changed as appropriate other than those shown in the drawings.

[0074] (11) The source wiring 27 and 427 , the touch wiring 30 , and the first connecting wiring 40 , 140 , 240 , 340 , and 440 may not be partially widened.

[0075] (12) The relationship between which part of the TFT 24 overlaps with the touch wiring 30 can be changed as appropriate, in addition to the figure. Similarly, the relationship between which part of the TFT 24 overlaps with the first connection wiring 40, 140, 240, 340, 440 can be changed as appropriate, in addition to the figure.

[0076] (13) In the TFT 24 , the intermediate electrode 39 located between the drain electrode 24C and the pixel electrode 25 may be omitted.

[0077] (14) The circuit section 14 may be omitted. In this case, a gate driver having the same function as the circuit section 14 may be mounted on the array substrate 21. In addition, the circuit section 14 may be provided only on one side of the array substrate 21.

[0078] (15) The material of the semiconductor film constituting the semiconductor portion 24D may be polycrystalline silicon (LTPS) or amorphous silicon.

[0079] (16) The structure of TFT24 may be a top gate type, a double gate type, or the like in addition to a bottom gate type.

[0080] (17) The upper electrode of the pixel electrode 25 and the common electrode 28, that is, the "upper electrode", may be the common electrode 28, and the lower electrode, that is, the "lower electrode", may be the pixel electrode 25. In this case, the common electrode 28 as the "upper electrode" has a slit.

[0081] (18) The touch panel pattern may be a mutual capacitance method in addition to a self-capacitance method.

[0082] (19) The liquid crystal panel 11 may also be one without a touch panel pattern (touch panel function). In this case, the common electrode (first electrode) 28 is set to a non-divided structure, and the touch electrodes 29, 129, 229, and 329 are not formed. In addition, a common wiring (third wiring) connected to the common electrode 28 and supplying a common potential signal (third signal) is provided using a third metal film instead of the touch wiring 30.

[0083] (20) The color filter 31 may be provided on the array substrate 21. That is, the liquid crystal panel 11 may have a COA (Color Filter On Array) structure.

[0084] (21) The number of colors of the color filter 31 may be 4 or more. The additional color filter 31 may be a yellow color filter that exhibits yellow color, a transparent color filter that transmits light in the entire wavelength range, or the like.

[0085] (22) The display mode of the liquid crystal panel 11 may be a VA mode, an IPS mode, or the like in addition to the FFS mode.

[0086] (23) The liquid crystal panel 11 may be a reflective type or a semi-transmissive type in addition to a transmissive type. When the liquid crystal panel 11 is a reflective type, the backlight device can be omitted.

[0087] (24) A display panel other than the liquid crystal panel 11 (such as an organic EL display panel) may also be used. Description of Reference Numerals

[0088] 11…liquid crystal panel (display device), 12, 412…driver (signal supply unit), 20…counter substrate, 21…array substrate (wiring substrate), 24…TFT (switching element), 25…pixel electrode (second electrode), 27, 427…source wiring (first wiring), 27α…first source wiring (one first wiring), 27β…second source wiring (another first wiring), 27γ…third source wiring (one first wiring), 27δ…fourth source wiring (another first wiring), 29, 129, 229, 329, 329, touch electrode (first electrode), 30…touch electrode (fourth wiring), 35…first interlayer insulating film (insulating film), 36…planarizing film (insulating film), 40, 140, 240, 340, 440…first connecting wiring (second wiring), 42, 142, 242, 342, 442…first short-circuit wiring (third wiring), 43…second short-circuit wiring (fifth wiring).

Claims

1. A wiring substrate, characterized in that: It has: a first wiring extending along a first direction; a second wiring extending along the first direction; a first electrode connected to the second wiring; a third wiring extending in a second direction intersecting the first direction; as well as a signal supply unit connected to the first wiring and not connected to the second wiring and the third wiring, Two first wirings are arranged at a distance from each other in the second direction, Two second wirings are arranged at positions spaced apart from each other in the second direction so as to overlap with the two first wirings via an insulating film. The signal supply unit provides a first signal to one of the two first wirings, and provides a second signal to the other of the two first wirings, wherein the polarity of the second signal is opposite to that of the first signal, and the third wiring is connected to the two second wirings.

2. The wiring substrate according to claim 1, wherein: have: a fourth wiring extending along the first direction and connected to the first electrode; and a fifth wiring extending along the second direction, Two fourth wirings are arranged at a distance from each other in the second direction, At positions spaced apart from each other in the second direction, two of the first wirings are arranged overlapping with the two of the fourth wirings via an insulating film, The signal supply section supplies a third signal to the two fourth wirings, supplies a fourth signal to one of the two first wirings overlapping the two fourth wirings, and supplies a fifth signal to the other of the two first wirings overlapping the two fourth wirings, wherein the polarity of the fifth signal is opposite to that of the fourth signal. The fifth wiring is connected to two of the fourth wirings.

3. The wiring substrate according to claim 1 or 2, characterized in that: have: a second electrode; as well as a switching element connected to the first wiring and the second electrode, A portion of the second wiring is arranged to overlap with at least a portion of the switching element via an insulating film.

4. The wiring substrate according to claim 1 or 2, characterized in that: A plurality of the third wirings are arranged at intervals in the first direction. The plurality of third wirings are respectively connected to the two second wirings.

5. A display device, characterized in that: have: The wiring substrate according to claim 1 or 2; and The opposing substrate is arranged opposite to the wiring substrate with a gap therebetween.

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