Display panel and electronic equipment

Abstract

The invention discloses a display panel and electronic equipment, and relates to the technical field of electronic equipment, and the display panel comprises an array substrate; the first light-emitting layer is located on the array substrate and comprises a plurality of first pixel units; the second light-emitting layer is located on the side, away from the array substrate, of the first light-emitting layer and comprises a plurality of second pixel units; the charge generation layer is arranged between the first light-emitting layer and the second light-emitting layer and is used for connecting the first pixel units and the second pixel units at the corresponding positions of the first light-emitting layer and the second light-emitting layer so as to generate a plurality of pixel units connected in series; wherein a first distance exists between every two adjacent pixel units connected in series, a second distance exists between the current paths between every two adjacent pixel units connected in series, and the second distance is larger than the first distance. According to the array substrate, a long transverse current path can be formed between every two adjacent pixel units connected in series, so that the leakage current between every two adjacent pixel units connected in series is reduced, and the color cast problem caused by the leakage current is avoided.

Description

Technical Field

[0001] The present application relates to the technical field of electronic equipment, and in particular to a display panel and an electronic equipment. Background Art

[0002] Tandem OLED (also known as Tandem OLED) display panels can achieve high display brightness, high service life, low power consumption and high resolution through stacked light-emitting layers, becoming an important development direction for display panels. Conventional tandem OLED display panels have a large color shift problem. Summary of the invention

[0003] In view of the above problems, the present application provides a display panel and an electronic device to achieve the purpose of reducing the color deviation of the display panel. The specific solution is as follows:

[0004] A first aspect of the present application provides a display panel, comprising:

[0005] An array substrate;

[0006] A first light emitting layer located on the array substrate includes a plurality of first pixel units;

[0007] The second light-emitting layer located at a side of the first light-emitting layer away from the array substrate includes a plurality of second pixel units;

[0008] A charge generating layer, disposed between the first light-emitting layer and the second light-emitting layer, for connecting the first pixel unit and the second pixel unit at corresponding positions of the first light-emitting layer and the second light-emitting layer to generate a plurality of serially connected pixel units;

[0009] There is a first distance between two adjacent series-connected pixel units, and a second distance between two adjacent series-connected pixel units in a current path, and the second distance is greater than the first distance.

[0010] Optionally, in the above display panel, a pixel definition layer is disposed on the surface of the array substrate, the pixel definition layer has a plurality of pixel openings, and a series-connected pixel unit is disposed in each pixel opening;

[0011] The charge generation layer covers the surface of the pixel definition layer away from the array substrate and the first pixel unit in the pixel opening; and the charge generation layer between adjacent pixel openings is provided with a microstructure.

[0012] Optionally, in the above display panel, a groove is provided in the surface of the pixel definition layer between adjacent pixel openings; the microstructure includes a charge generation layer covering the surface of the groove, and the groove makes the current path between two adjacent series-connected pixel units have a second distance.

[0013] Optionally, in the above display panel, there are a plurality of grooves arranged in sequence between adjacent pixel openings.

[0014] Optionally, in the above display panel, a target signal line is arranged on the surface of the array substrate between adjacent pixel openings;

[0015] The bottom of the groove exposes at least a portion of the target signal line, and the charge generation layer is electrically connected to the target signal line at the bottom of the groove;

[0016] The target signal line is used to connect to the control circuit, and the control circuit is used to control the target signal line to be grounded or to be floating.

[0017] Optionally, in the above display panel, a surface of the array substrate on one side of which the pixel definition layer is provided has a first electrode layer; the first electrode layer comprises: a plurality of first electrodes which are opposite to the pixel openings one by one;

[0018] Wherein, the target signal line is located in the first electrode layer.

[0019] Optionally, in the above display panel, an insulating protrusion structure is provided on the surface of the pixel definition layer between adjacent pixel openings; the charge generation layer has a groove formed based on the insulating protrusion structure, so that the current path between two adjacent series-connected pixel units has a second distance.

[0020] Optionally, in the above display panel, the width of an end of the insulating protrusion structure away from the pixel definition layer is greater than the width of an end thereof facing the pixel definition layer.

[0021] Optionally, in the above display panel, a common electrode layer is provided on a side of the second light-emitting layer facing away from the first light-emitting layer, and the insulating protruding structure penetrates the common electrode layer;

[0022] For the same pixel opening, a circle of insulating protrusion structures arranged around the pixel opening is provided on the surface of the pixel definition layer at the periphery of the pixel opening, and a fracture area is provided in the circle of insulating protrusion structures.

[0023] A second aspect of the present application provides an electronic device, comprising the above-mentioned display panel.

[0024] By means of the above technical solution, in the display panel and electronic device provided by the present application, there is a first distance between two adjacent series-connected pixel units, and a second distance is provided for the current path between two adjacent series-connected pixel units. The second distance is set to be greater than the first distance, so that there is a longer lateral current path between two adjacent series-connected pixel units, so as to reduce the leakage current between the two adjacent series-connected pixel units, avoid the color deviation problem caused by the leakage current, and improve the image display quality of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0026] The structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not used to limit the conditions under which this application can be implemented, and therefore have no substantive technical significance. Any structural modification, change in proportion or adjustment of size, without affecting the effects and purposes that can be achieved by this application, should still fall within the scope of the technical contents disclosed in this application.

[0027] Figure 1 is a structural schematic diagram of a display panel;

[0028] Figure 2 A schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0029] Figure 3 A schematic diagram of the structure of a charge generation layer provided in an embodiment of the present application;

[0030] Figure 4 A schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0031] Figure 5 A schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0032] Figure 6 A schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0033] Figure 7 A schematic diagram of a layout of an insulating protrusion structure in a display panel provided in an embodiment of the present application;

[0034] Figure 8 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0035] Reference numerals:

[0036] 10-array substrate; 101-base; 102-circuit layer; 103-transistor; 104-buffer layer; 11-first light-emitting layer; 111-first pixel unit; 12-second light-emitting layer; 121-second pixel unit; 13-pixel definition layer; 14-charge generation layer; 15-common organic layer; 16-second electrode; 17-first electrode; 18-series pixel unit; 191-first distance; 192-second distance; 20-groove; 21-first doping layer; 22-second doping layer; 23-metal interface layer; 24-target signal line; 25-insulating protrusion structure; 251-fracture area; 26-through slit; 27-display panel. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the embodiments of the present application. It is known to those skilled in the art that with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0038] As described in the background art, conventional series-connected OLED display panels have a significant color shift problem, which is caused by leakage current between two adjacent series-connected pixel units in the display panel.

[0039] refer to Figure 1 , Figure 1 is a schematic diagram of the structure of a display panel, the display panel is a series OLED display panel, Figure 1 The cross-sectional view of the display panel in the thickness direction, the display panel shown includes:

[0040] An array substrate 10, on the surface of which a plurality of first electrodes 17 are arranged;

[0041] A pixel definition layer 13 located on the surface of the array substrate 10, wherein the pixel definition layer 13 has a plurality of pixel openings, and the pixel openings are arranged in one-to-one correspondence with the first electrodes 17, exposing a partial surface of the corresponding first electrode 17;

[0042] The first light-emitting layer 11 includes a plurality of first pixel units 111; each of the first pixel units 111 is located in a pixel opening and connected to a first electrode 17 in the pixel opening.

[0043] A charge generating layer 14, which is located on a surface of the pixel definition layer 13 that is away from the array substrate 10 and covers the first light emitting layer 11;

[0044] The second light-emitting layer 12 includes a plurality of second pixel units 121; the second pixel units 121 are respectively located on the surface of the charge generation layer 14 in a pixel opening, and the second pixel units 121 are connected in series with the first pixel units 111 in the same pixel opening through the charge generation layer 14 to form a series pixel unit 18;

[0045] The surface of the second light-emitting layer 12 facing away from the array substrate 10 is covered with a common organic layer 15 , which also covers the charge generating layer 14 ; a second electrode 16 is arranged on the surface of the common organic layer 15 , which is a common electrode of the series pixel unit 18 .

[0046] The first pixel unit 111 and the second pixel unit 121 are both an organic light emitting material block located in a corresponding pixel opening. In the same pixel opening, the stacked first pixel unit 111 and the second pixel unit 121 emit the same light color.

[0047] Since the charge generation layer 14 may cause a lateral leakage current to be generated between two adjacent series-connected pixel units 18 , the leakage current may cause the series-connected pixel units 18 to display abnormally when displaying low grayscales, thereby causing a color shift problem on the display panel.

[0048] In order to solve the above problems, an embodiment of the present application provides a display panel, including:

[0049] An array substrate;

[0050] A first light emitting layer located on the array substrate includes a plurality of first pixel units;

[0051] The second light-emitting layer located at a side of the first light-emitting layer away from the array substrate includes a plurality of second pixel units;

[0052] A charge generating layer, disposed between the first light-emitting layer and the second light-emitting layer, for connecting the first pixel unit and the second pixel unit at corresponding positions of the first light-emitting layer and the second light-emitting layer to generate a plurality of serially connected pixel units;

[0053] There is a first distance between two adjacent series-connected pixel units, and a second distance between two adjacent series-connected pixel units in a current path, and the second distance is greater than the first distance.

[0054] In the display panel provided in the present application, there is a first distance between two adjacent series-connected pixel units, and a second distance between the current path of two adjacent series-connected pixel units. The second distance is set to be greater than the first distance, so that there is a longer lateral current path between the two adjacent series-connected pixel units, so as to reduce the leakage current between the two adjacent series-connected pixel units, avoid the color deviation problem caused by the leakage current, and improve the image display quality of the display panel.

[0055] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0056] refer to Figure 2 , Figure 2 A schematic diagram of the structure of a display panel provided in an embodiment of the present application is shown in FIG. Figure 2 The cross-sectional view of the display panel in the thickness direction, the display panel shown includes:

[0057] An array substrate 10;

[0058] A first light emitting layer 11 located on the array substrate 10, wherein the first light emitting layer 11 includes a plurality of first pixel units 111;

[0059] A second light-emitting layer 12 located at a side of the first light-emitting layer 11 away from the array substrate 10 , wherein the second light-emitting layer 12 includes a plurality of second pixel units 121 ;

[0060] A charge generation layer 14, which is disposed between the first light-emitting layer 11 and the second light-emitting layer 12, and is used to connect the first pixel unit 111 and the second pixel unit 121 at corresponding positions of the first light-emitting layer 11 and the second light-emitting layer 12 to generate a plurality of series-connected pixel units 18;

[0061] There is a first distance 191 between two adjacent series-connected pixel units 18 , and a second distance 192 is provided on the current path between two adjacent series-connected pixel units 18 . The second distance 192 is greater than the first distance 191 .

[0062] The first distance 191 is the distance between two adjacent series-connected pixel units 18 on a plane parallel to the array substrate 10. Figure 2 In the illustrated embodiment, the first distance 191 is the horizontal distance between two adjacent series-connected pixel units 18. The second distance 192 is the length of the current path between two adjacent series-connected pixel units 18. Figure 2 In the illustrated embodiment, the charge generation layer 14 between two adjacent series-connected pixel units 18 is a bent structure, and the current path between the two is as follows: Figure 2 As shown by the dotted line, the second distance 192 is greater than the first distance 191.

[0063] Since the second distance 192 is greater than the first distance 191, a longer lateral current path can be provided between two adjacent series-connected pixel units 18, thereby reducing leakage current between the two adjacent series-connected pixel units 18, avoiding color shift problems caused by leakage current, and improving the image display quality of the display panel.

[0064] In the display panel, at least two light-emitting layers may be sequentially stacked on the surface of the array substrate 10, and a charge generation layer 14 is disposed between adjacent light-emitting layers. The number of light-emitting layers is not limited to Figure 2 The two layers shown may also be greater than two layers, and this embodiment of the present application does not limit this.

[0065] The array substrate 10 has a plurality of first electrodes 17 on its surface, each of which has a correspondingly connected pixel unit 18 disposed on its surface. The display panel further includes a second electrode 16 , which is a common electrode for each of the connected pixel units 18 .

[0066] The surface of the second light-emitting layer 12 facing away from the array substrate 10 is covered with a common organic layer 15 , which also covers the charge generating layer 14 ; a second electrode 16 is arranged on the surface of the common organic layer 15 , which is a common electrode of the series pixel unit 18 .

[0067] A pixel definition layer 13 is disposed on the surface of the array substrate 10. The pixel definition layer 13 has a plurality of pixel openings, and each pixel opening is provided with a series pixel unit 18. The pixel openings are provided in a one-to-one correspondence with the first electrodes 17, and are used to expose the corresponding portion of the first electrode 17, so that the first pixel unit 111 is connected to the first electrode 17 at the bottom of the pixel opening.

[0068] In order to improve the luminous efficiency of the first pixel unit 111, the display panel also includes a first hole injection layer, a first hole transport layer, a first electron transport layer and a first electron injection layer stacked in sequence on the array substrate 10. The first hole injection layer, the first hole transport layer, the first electron transport layer and the first electron injection layer are not shown in the drawings of the embodiment of the present application. The first light-emitting layer 11 is located between the first hole transport layer and the first electron transport layer. The first hole injection layer, the first hole transport layer, the first electron transport layer and the first electron injection layer are all common organic layers of each first pixel unit 111.

[0069] The stacked first hole injection layer and the first hole transport layer cover the surface of the pixel definition layer 13 away from the array substrate 10, and also cover the sidewalls of each pixel opening and the first electrode 17 exposed at the bottom. The first light-emitting layer 11 is located on the surface of the first hole transport layer in the pixel opening, and the first pixel unit 111 is located in the pixel opening. The height of the first pixel unit 111 is less than the top height of the pixel opening. The stacked first electron transport layer and the first electron injection layer cover the first hole transport layer and the first light-emitting layer 11 on one side of the surface away from the array substrate 10. The charge generation layer 14 covers the first electron injection layer on one side of the surface away from the array substrate 10.

[0070] Optionally, at least one of a first hole injection layer, a first hole transport layer, a first electron transport layer and a first electron injection layer may be provided in the display panel. In order to greatly improve the luminous efficiency of the first pixel unit 111, at least one of a first hole injection layer, a first hole transport layer, a first electron transport layer and a first electron injection layer may be provided in the display panel at the same time.

[0071] In order to improve the luminous efficiency of the second pixel unit 121, the display panel also includes a second hole injection layer, a second hole transport layer, a second electron transport layer, and a second electron injection layer stacked sequentially on the side of the first light-emitting layer 11 away from the array substrate 10. The common organic layer 15 can be any one of the second electron transport layer and the second electron injection layer or a stacked structure of the two. The second hole injection layer and the second hole transport layer are not shown in the drawings of the embodiments of the present application. The second light-emitting layer 12 is located between the second hole transport layer and the second electron transport layer. The second hole injection layer, the second hole transport layer, the second electron transport layer, and the second electron injection layer are common organic layers of each second pixel unit 121.

[0072] The stacked second hole injection layer and the second hole transport layer cover the surface of the charge generation layer 14 away from the array substrate 10. The second light emitting layer 12 is located on the surface of the second hole transport layer in the pixel opening, and the second pixel unit 121 is at least partially located in the pixel opening. The height of the second pixel unit 121 can be less than or equal to the top height of the pixel opening, or can be as Figure 2 As shown, the height of the second pixel unit 121 is set to exceed the top height of the pixel opening. The common organic layer 15 (the stacked second electron transport layer and the second electron injection layer) covers the second hole transport layer and the second light emitting layer 12 on the side away from the array substrate 10 .

[0073] Optionally, at least one of a second hole injection layer, a second hole transport layer, a second electron transport layer and a second electron injection layer may be provided in the display panel. In order to improve the second pixel unit 121 to a greater extent, a second hole injection layer, a second hole transport layer, a second electron transport layer and a second electron injection layer may be provided in the display panel at the same time.

[0074] The charge generation layer 14 is located between the common organic layer on the upper surface of the first light-emitting layer 11 and the common organic layer on the lower surface of the second light-emitting layer 12, and can match the work function between the common organic layer of the first light-emitting layer 11 and the common organic layer of the second light-emitting layer 12. The charge generation layer 14 can match the work function between the first electron transport layer and the second hole transport layer.

[0075] refer to Figure 3 , Figure 3 A schematic diagram of the structure of a charge generation layer provided in an embodiment of the present application is shown in FIG. Figure 3 FIG. 1 is a cross-sectional view of the charge generation layer 14 in the thickness direction. The charge generation layer 14 includes a first doped layer 21, a metal interface layer 23, and a second doped layer 22 stacked in sequence. The stacking direction of the first doped layer 21, the metal interface layer 23, and the second doped layer 22 is the same as the stacking direction of the first light-emitting layer 11 and the second light-emitting layer 12.

[0076] One of the first doping layer 21 and the second doping layer 22 is N-type doped and the other is P-type doped, which can be used to provide holes and electrons for the first pixel unit 111 and the second pixel unit 121 in the same series pixel unit 18, respectively, so that charges can be effectively generated and transmitted between the first pixel unit 111 and the second pixel unit 121 stacked in series in the series pixel unit 18, so that the double-click current in the series pixel unit 18 gradually reaches a steady state, thereby improving the performance stability of the series pixel unit 18.

[0077] The charge generation layer 14 is provided with a metal interface layer 23 between the two doping layers. The metal interface layer 23 may be a low work function conductive layer to achieve a low operating voltage and lower power consumption, so that the charge generation layer 14 and the adjacent charge transport layer (such as the empty transport layer and the electron transport layer) have a good highest occupied orbital (Lower Unoccupied Molecular Orbital, referred to as LUMO) and lowest unoccupied orbital (Highest Occupied Molecular Orbital, referred to as HUMO) energy level matching to prevent charge accumulation in the charge generation layer 14. Optionally, the low work function conductive layer may be a metal material or an alkali metal compound having a work function less than 6eV. The material of the metal interface layer 23 may include any one of Ag, LiF, K, Ga, Yb and Mg.

[0078] Although the problem of charge accumulation in the charge generating layer 14 is effectively prevented, the low work function conductive layer has a strong conductivity, which will increase the leakage current between two adjacent series pixel units 18. The leakage current will cause a lateral conduction channel to exist between the adjacent series pixel units 18, which may easily cause lateral crosstalk in the series pixel units 18, thereby causing display abnormalities in the series pixel units 18 at low grayscale brightness.

[0079] In the embodiment of the present application, by setting the second distance 192 to be greater than the first distance 191, while using a low work function conductive layer to prevent the charge accumulation problem in the charge generation layer 14, the leakage current between two adjacent series-connected pixel units 18 can be reduced, thereby solving both the charge accumulation problem in the charge generation layer 14 and the leakage current problem between two adjacent series-connected pixel units 18.

[0080] The charge generating layer 14 covers the surface of the pixel definition layer 13 facing away from the array substrate 10 and the first pixel unit 111 in the pixel opening; the charge generating layer 14 between adjacent pixel openings is provided with a microstructure, which can increase the current path between the series-connected pixel units 18 in two adjacent pixel openings to increase the second distance 192 so that the second distance 192 is greater than the first distance 191, thereby reducing or even avoiding the leakage current between the two adjacent series-connected pixel units 18 and avoiding the color deviation problem caused by the leakage current.

[0081] In one implementation of the present application, Figure 2 As shown, a groove 20 is provided in the surface of the pixel definition layer 13 between adjacent pixel openings; the microstructure includes a charge generation layer 14 covering the surface of the groove 20 , and the groove 20 allows the current path between two adjacent series-connected pixel units 18 to have a second distance 192 .

[0082] like Figure 2 As shown, by setting a groove 20 in the surface of the pixel definition layer 13 between two adjacent pixel openings, the charge generation layer 14 can be conformally covered on the surface of the pixel definition layer 13 having the groove 20 and the pixel opening. Based on the groove 20, the length of the charge generation layer 14 between the two adjacent pixel openings can be extended, and then the current path between the two adjacent series pixel units 18 can be improved to increase the second distance 192, so that the second distance 192 is greater than the first distance 191.

[0083] Optionally, a plurality of grooves 20 arranged in sequence may be provided between adjacent pixel openings to greatly increase the length of the charge generation layer 14 between two adjacent pixel openings, thereby greatly increasing the current path between two adjacent series-connected pixel units 18 and increasing the distance difference between the second distance 192 and the first distance 191. In the embodiment of the present application, a plurality means at least two.

[0084] One or at least two grooves 20 may be provided between two adjacent pixel openings according to the space between the pixel openings and the width of the grooves 20. Figure 2 When there are multiple grooves 20 between two adjacent pixel openings, the depth / width of each groove 20 can be the same to facilitate process preparation. In other ways, the depth / width of at least two grooves 20 can also be different.

[0085] Optionally, the depth of the groove 20 can be set equal to the thickness of the pixel definition layer 13, so that the groove 20 has a greater depth, so as to greatly increase the length of the charge generation layer 14 between two adjacent pixel openings, thereby greatly increasing the current path between two adjacent series pixel units 18 and increasing the distance difference between the second distance 192 and the first distance 191. In other embodiments, the depth of the groove 20 can also be less than the thickness of the pixel definition layer 13.

[0086] When the current path of the charge generation layer 14 between adjacent pixel openings is increased based on the grooves 20, a layer of photomask can be added during the preparation of the display panel. Before forming the charge generation layer 14, the pixel definition layer 13 between adjacent pixel openings is patterned by the added layer of photomask to form the grooves 20, and a conformal charge generation layer 14 is formed on the surface of the pixel definition layer 13 having the grooves 20.

[0087] In the embodiment of the present application, the size, resolution and arrangement of pixel units of the display panel can be set according to the requirements. For example, the display panel can be 12.7 inches, the resolution is 2944*1840, and each series pixel unit 18 can adopt a real RGB arrangement. The width of the pixel definition layer 13 between two adjacent series pixel units 18 (i.e., the first distance 191) can be 28μm, the width of the groove 20 can be 5.4μm, and the depth can be 2μm. At this time, the current path of the charge generation layer 14 between two adjacent pixel openings can be increased by 28%, and the Just Noticeable Color Difference (JNCD) of the display panel can be reduced to 2.1, which can effectively reduce the color deviation problem caused by leakage current of the display panel.

[0088] As shown in Table 1 below, experimental data show that the display panel provided in the embodiment of the present application can effectively improve the color cast problem of the display panel.

[0089] Table 1

[0090]

[0091] In Table 1 above, the original solution is Figure 1 The display panel shown in the figure, scheme 1 is Figure 2 The difference between the two display panels is that the first solution adds a current path of the charge generation layer 14 based on the groove 20 in the pixel definition layer 13, and the other design parameters of the two display panels are the same.

[0092] After the current path is extended based on the groove 20, under the DCI-P3 color standard, when the display brightness of the series pixel unit 18 is 5nits and the display grayscale is 128, the color gamut coverage ratio can be increased to 99.6%.

[0093] refer to Figure 4 , Figure 4 A schematic diagram of the structure of another display panel provided in an embodiment of the present application, Figure 4 is a cross-sectional view of the display panel in the thickness direction. Based on any of the above implementations, Figure 4 In the display panel shown, a target signal line 24 is arranged on the surface of the array substrate 10 between adjacent pixel openings; at least a portion of the target signal line 24 is exposed at the bottom of the groove 20, and the charge generation layer 14 is electrically connected to the target signal line 24 at the bottom of the groove 20; wherein the target signal line 24 is used to connect the control circuit ( Figure 4 The control circuit is not shown in the figure), and the control circuit is used to control the target signal line 24 to be grounded or float.

[0094] By increasing the second distance 192 , the leakage current between two adjacent series-connected pixel units 18 can be reduced to a certain extent. However, there may still be a problem in which carriers in the charge generation layer 14 cross the threshold and reach other series-connected pixel units. Figure 4 In the manner shown, by setting a target signal line 24 and a control circuit connected to the target signal line, carriers accumulated in the charge generation layer 14 can be released when the target signal line 24 is in a grounded state, thereby reducing the leakage current between adjacent series-connected pixel units 18 to a greater extent.

[0095] The array substrate 10 has a first electrode layer on one side of the surface for setting the pixel definition layer 13; the first electrode layer includes: a plurality of first electrodes 17 that are opposite to the pixel openings one by one; wherein the target signal line 24 is located in the first electrode layer, and the first electrode layer can be a metal layer. In this way, the target signal line 24 and the first electrode 17 can be located in the same metal layer. If the target signal line 24 and the first electrode 17 can be prepared simultaneously through the same metal layer, the target signal line 24 can be prepared while the first electrode 17 is prepared, which does not increase the manufacturing process steps of the display panel and the number of metal layers.

[0096] refer to Figure 5 , Figure 5 A schematic diagram of the structure of another display panel provided in an embodiment of the present application is shown in FIG. Figure 5FIG. 1 is a cross-sectional view of a display panel in the thickness direction. Based on any of the above embodiments, the array substrate 10 includes a substrate 101 and a circuit layer 102 located on the surface of the substrate 101. The circuit layer 102 includes a pixel circuit for controlling the series-connected pixel unit 18 to display an image. The transistor 103 in the pixel circuit is connected to the series-connected pixel unit 18 via the first electrode 17.

[0097] Optionally, the substrate 101 may be a hard substrate such as a glass plate, or a flexible substrate such as a polyimide (PI) plate. A buffer layer 104 may be provided on the surface of the substrate 101 , and the circuit layer 102 is located on the side of the buffer layer 104 facing away from the substrate 101 .

[0098] The display timing of a conventional single-layer light-emitting layer is the same, and a display control cycle of the pixel circuit includes a reset phase, a data writing phase, and a light-emitting control phase in sequence. The control circuit can control the target signal line 24 to be in a grounded state during the reset phase of the pixel circuit, so as to release the charge accumulated in the charge generation layer 14 during the previous display control cycle through grounding, and control the target signal line 24 potential to float during other phases of the display control cycle, so that not only can the charge accumulated in the charge generation layer 14 be released through grounding, but also the influence of the grounding of the target signal line 24 on the display state of the series pixel unit 18 can be avoided.

[0099] refer to Figure 6 , Figure 6 A schematic diagram of the structure of another display panel provided in an embodiment of the present application is shown in FIG. Figure 6 is a cross-sectional view of the display panel in the thickness direction. Based on the above implementation, Figure 6 In the display panel shown, an insulating protrusion structure 25 is provided on the surface of the pixel definition layer 13 between adjacent pixel openings; the charge generation layer 14 has a through slit 26 formed based on the insulating protrusion structure 25, so that the current path between two adjacent series-connected pixel units 18 has a second distance 192.

[0100] exist Figure 6 In the manner shown, a through-opening slit 26 can be formed in the charge generating layer 14 through an insulating protrusion structure 25 located on the surface of the pixel definition layer 13. The through-opening slit 26 can increase the second distance 192, thereby allowing a larger current path to exist between two adjacent series-connected pixel units 18 to reduce leakage current therebetween.

[0101] If the through slit 26 completely disconnects the charge generation layer 14 between two adjacent series-connected pixel units 18 , it means that no current flows through the charge generation layer 14 between the two. At this time, the length of the current path is infinite, which means that the second distance 192 is infinitely increased by the through slit 26 .

[0102] If the through slit 26 only disconnects the charge generation layer 14 in the relative area between two adjacent series-connected pixel units 18, it means that the charge generation layer 14 between the two is only disconnected in the area between the two, and the current can also bypass the through slit 26 to be transmitted between the two. At this time, it is equivalent to increasing the second distance 192 to a certain extent through the through slit 26.

[0103] In the embodiment of the present application, the width of the end of the insulating protrusion structure 25 away from the pixel definition layer 13 is greater than the width of the end toward the pixel definition layer 13. In this way, the width of the insulating protrusion structure 25 can be gradually increased toward the direction away from the array substrate 10, so that Figure 6 As shown, the top width of the insulating protrusion structure 25 is greater than the bottom width. In this way, in the process of preparing the display panel, a charge generation layer 14 can be formed on the surface of the pixel definition layer 13 based on the insulating protrusion structure 25. Based on the insulating protrusion structure 25 that is wide at the top and narrow at the bottom, the charge generation layer 14 can be naturally broken when the side wall of the insulating protrusion structure 25 climbs to form a through slit 26, which is convenient for the process preparation of the charge generation layer 14 in the display panel.

[0104] The second light-emitting layer 12 has a common electrode layer (i.e., the second electrode 16) on one side facing away from the first light-emitting layer 11. In one implementation of the embodiment of the present application, an insulating protrusion structure 25 may be provided to penetrate the common electrode layer. The thickness of the insulating protrusion structure 25 may be provided to be greater than the sum of the thicknesses of the common organic layer 15 and the common electrode layer on the surface of the pixel definition layer 13, so that the top surface height of the common electrode layer is also lower than the top height of the insulating protrusion structure 25. In this way, the common electrode layer may be formed on the surface of the common organic layer 15 based on the insulating protrusion structure 25, and the common electrode layer may be naturally broken when the side wall of the insulating protrusion structure 25 climbs, so that the insulating protrusion structure 25 penetrates the common electrode layer.

[0105] Alternatively, the common electrode may be a stacked metal layer of Mg and Ag.

[0106] When the insulating protrusion structure 25 penetrates the common electrode layer, the layout of the insulating protrusion structure 25 can be as follows: Figure 7 shown.

[0107] refer to Figure 7 , Figure 7 A schematic diagram of a layout of an insulating protrusion structure in a display panel provided in an embodiment of the present application, Figure 7 is a top view of the display panel. In this method, combined with Figure 6 and Figure 7As shown, for the same pixel opening, the surface of the pixel definition layer 13 at the periphery of the pixel opening has a circle of insulating protrusion structures 25 arranged around the pixel opening, and a circle of insulating protrusion structures 25 is provided with a fracture area 251. Since the insulating protrusion structure 25 runs through the common electrode layer, in order to make the common electrode layers of each series-connected pixel unit 18 still have an integral equipotential, the insulating protrusion structure 25 is provided with a fracture area 251, so that the common electrode layers in different areas are connected as an integral structure based on the fracture area 251.

[0108] Alternatively, if Figure 7 As shown, the display panel includes three series-connected pixel units 18 with different luminous colors. The three series-connected pixel units 18 are used to emit red light R, green light G and blue light B respectively.

[0109] exist Figure 7 In the manner shown, since the insulating protrusion structure 25 has a broken area 251, the through slit 26 formed in the charge generation layer 14 based on the insulating protrusion structure 25 only disconnects the charge generation layer 14 in the relative area between two adjacent series pixel units 18. At this time, it is equivalent to increasing the second distance 192 to a certain extent through the through slit 26.

[0110] In other embodiments, a common electrode layer may be provided to cover the top of the insulating protrusion structure 25. In this case, the layout of the insulating protrusion structure 25 may be as follows: Figure 7 shown.

[0111] When the common electrode layer covers the top of the insulating protrusion structure 25, the insulating protrusion structure 25 can also be made into a grid structure. At this time, the insulating protrusion structure 25 does not need to set a breaking area 251, and the adjacent series pixel units 18 are completely isolated. The charge generation layer 14 between two adjacent series pixel units 18 is completely disconnected, which is equivalent to the length of the current path being infinite.

[0112] Based on the display panel provided in the above embodiment, another embodiment of the present application further provides an electronic device, which can be Figure 8 shown.

[0113] refer to Figure 8 , Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device shown includes a display panel 27 provided in any implementation manner of the above embodiments.

[0114] Electronic devices include but are not limited to mobile phones, tablet computers, laptop computers, wearable devices and other electronic devices with display functions.

[0115] In the embodiment of the present application, the electronic device adopts the display panel 27 provided in the above embodiment, which can solve the display color deviation problem caused by leakage current between adjacent series-connected pixel units.

[0116] In the specification of this application, each embodiment is described in a progressive, parallel, or progressive and parallel manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other. The embodiments provided in the embodiments of this application can be combined with each other if there is no contradiction.

[0117] It should be noted that in the description of the present application, it should be understood that the description of the drawings and embodiments is illustrative rather than restrictive. The same reference numerals throughout the embodiments of the specification identify the same structure. In addition, for the sake of understanding and ease of description, the drawings may exaggerate the thickness of some layers, films, panels, regions, etc. It is also understood that when an element such as a layer, film, region, or substrate is referred to as "on" another element, the element may be directly on the other element or there may be an intermediate element. In addition, "on" refers to positioning an element on or below another element, but does not essentially refer to positioning on the upper side of another element according to the direction of gravity.

[0118] The terms "upper", "lower", "top", "bottom", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. When a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be a centrally arranged component at the same time.

[0119] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that an article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such article or device. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the existence of other identical elements in the article or device including the above elements.

[0120] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, comprising: An array substrate; A first light emitting layer located on the array substrate includes a plurality of first pixel units; A second light-emitting layer located at a side of the first light-emitting layer away from the array substrate includes a plurality of second pixel units; A charge generating layer, disposed between the first light-emitting layer and the second light-emitting layer, and used to connect the first pixel unit and the second pixel unit at corresponding positions of the first light-emitting layer and the second light-emitting layer to generate a plurality of serially connected pixel units; There is a first distance between two adjacent series-connected pixel units, and a second distance between two adjacent series-connected pixel units in a current path, and the second distance is greater than the first distance.

2. The display panel according to claim 1, wherein a pixel definition layer is disposed on the surface of the array substrate, the pixel definition layer has a plurality of pixel openings, and a series-connected pixel unit is disposed in each of the pixel openings; in, The charge generation layer covers the surface of the pixel definition layer away from the array substrate and the first pixel unit in the pixel opening; the charge generation layer between adjacent pixel openings is provided with a microstructure.

3. According to the display panel of claim 2, a groove is arranged in the surface of the pixel definition layer between adjacent pixel openings; the microstructure includes a charge generating layer covering the surface of the groove, and the groove makes the current path between two adjacent series-connected pixel units have the second distance. 4 . The display panel according to claim 3 , wherein a plurality of grooves are arranged in sequence between adjacent pixel openings.

5. The display panel according to claim 3, wherein a target signal line is disposed on the surface of the array substrate between adjacent pixel openings; The bottom of the groove exposes at least a portion of the target signal line, and the charge generation layer is electrically connected to the target signal line at the bottom of the groove; in, The target signal line is used to connect to a control circuit, and the control circuit is used to control the target signal line to be grounded or to be floating.

6. The display panel according to claim 5, wherein a surface of the array substrate on one side of which the pixel definition layer is disposed has a first electrode layer; the first electrode layer comprises: A plurality of first electrodes facing the pixel openings one by one; Wherein, the target signal line is located in the first electrode layer.

7. According to the display panel of claim 2, an insulating protrusion structure is arranged on the surface of the pixel definition layer between adjacent pixel openings; the charge generating layer has a groove formed based on the insulating protrusion structure, so that the current path between two adjacent series pixel units has the second distance. 8 . The display panel according to claim 7 , wherein a width of an end of the insulating protrusion structure away from the pixel definition layer is greater than a width of an end of the insulating protrusion structure toward the pixel definition layer.

9. The display panel according to claim 7, wherein a common electrode layer is provided on a side of the second light-emitting layer facing away from the first light-emitting layer, and the insulating protruding structure penetrates the common electrode layer; For the same pixel opening, a circle of the insulating protrusion structure arranged around the pixel opening is provided on the surface of the pixel definition layer at the periphery of the pixel opening, and a fracture area is provided in the circle of the insulating protrusion structure.

10. An electronic device comprising the display panel according to any one of claims 1 to 9.

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