System and method for controlled active discharge for inverter for electric vehicle

Abstract

A system includes an inverter configured to convert DC power from a battery to AC power to drive a motor, where the inverter includes: a power switch including a drain terminal, a source terminal, and a gate terminal; and one or more controllers configured to detect a temperature of the power switching member, a rate of change in current of the power switching member, and a filtered current of the power switching member, and controlling a pulse width of a gate control signal to the gate terminal based on the detected temperature of the power switching member, the detected rate of change in current of the power switching member, and the detected filtered current of the power switching member.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority to U.S. non-provisional patent application No. 18 / 297,738 filed on April 10, 2023, which claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 377,486 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,501 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,512 filed on September 28, 2022, and U.S. Provisional Patent Application No. 63 / 378,601 filed on October 6, 2022, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Various embodiments of the present disclosure relate generally to systems and methods for controlled active discharge of an inverter for an electric vehicle, and more particularly to systems and methods for configurable active discharge controlled based on one or more of current or temperature. Background Art

[0004] Inverters, such as those used to drive motors in electric vehicles, are responsible for converting high voltage direct current (HVDC) to alternating current (AC) to drive the motor. In the inverter, bulk capacitors are discharged in the event of a fault condition to reduce the risk of contact with high voltages. Active discharge of bulk capacitors can stress the power switching components.

[0005] The present disclosure is directed to overcoming one or more of these aforementioned challenges. Summary of the invention

[0006] In some aspects, the technology described herein relates to a system comprising: an inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: a power switching element comprising a drain terminal, a source terminal, and a gate terminal; and one or more controllers configured to: detect a temperature of the power switching element, a rate of change of current of the power switching element, and a filtered current of the power switching element, and control a pulse width of a gate control signal to the gate terminal based on the detected temperature of the power switching element, the detected rate of change of current of the power switching element, and the detected filtered current of the power switching element.

[0007] In some aspects, the technology described herein relates to a system wherein the one or more controllers are further configured to perform N average value determinations, wherein the N average value determinations include: applying N pulses having a first pulse width and period to a power switching element, storing a detected temperature of the power switching element, a detected rate of change of current of the power switching element, and a detected filtered current of the power switching element during each period of the applied N pulses, and determining an average value of the N stored temperatures, an average value of the N stored rates of change of current, and an average value of the N stored filtered currents.

[0008] In some aspects, the technology described herein relates to a system wherein the one or more controllers are further configured to perform N threshold determinations, wherein the N threshold determinations include determining whether an average of N stored temperatures is greater than a threshold temperature, whether an average of N stored rates of change in current is greater than a threshold rate of change in current, and whether an average of N stored filtered currents is greater than a threshold filtered current, and controlling a pulse width of a gate control signal to a gate terminal based on the determination of the N threshold determinations.

[0009] In some aspects, the technology described herein relates to a system wherein the one or more controllers are further configured to perform M average value determinations, wherein the M average value determinations include: repeating N average value determinations and N threshold value determinations for M cycles, storing N stored average values ​​of temperatures, N stored average values ​​of rates of change of currents, and N stored average values ​​of filtered currents for each of the M cycles, and determining the average values ​​of the M stored temperatures, the average values ​​of the M stored rates of change of currents, and the average values ​​of the M stored filtered currents.

[0010] In some aspects, the technology described herein relates to a system wherein the one or more controllers are further configured to perform M threshold determinations, wherein the M threshold determinations include determining whether an average of M stored temperatures is greater than a threshold temperature, whether an average of M stored rates of change in current is greater than a threshold rate of change in current, and whether an average of M stored filtered currents is greater than a threshold filtered current, and controlling a pulse width of a gate control signal to a gate terminal based on the determination of the M threshold determinations.

[0011] In some aspects, the technology described herein relates to a system wherein the one or more controllers are further configured to determine a voltage value of a bulk capacitor of the inverter, and repeat the M average value determination and the M threshold determination when the determined voltage value is greater than a threshold discharge voltage value.

[0012] In some aspects, the techniques described herein relate to a system wherein controlling a pulse width of a gate control signal to a gate terminal based on a determination of an N-threshold determination does not include increasing the pulse width.

[0013] In some aspects, the technology described herein relates to a system in which the one or more controllers are one or more point-of-use controllers on a power module having a power switch.

[0014] In some aspects, the technology described herein relates to a system in which a source terminal of a power switch is configured to connect to a negative terminal of a battery and a drain terminal of the power switch is configured to connect to a phase terminal of a motor.

[0015] In some aspects, the technology described herein relates to a system that further includes a battery configured to supply DC power to an inverter and a motor configured to receive AC power from the inverter to drive the motor.

[0016] In some aspects, the technology described herein relates to a method comprising: detecting a temperature of a power switching device, a rate of change of current of the power switching device, and a filtered current of the power switching device, and controlling a pulse width of a gate control signal to a gate terminal of the power switching device based on the detected temperature of the power switching device, the detected rate of change of current of the power switching device, and the detected filtered current of the power switching device.

[0017] In some aspects, the technology described herein relates to a method, which further includes: performing N average value determination, wherein the N average value determination includes: applying N pulses having a first pulse width and period to a power switching device, storing a detected temperature of the power switching device, a detected rate of change of current of the power switching device, and a detected filtered current of the power switching device during each period of the applied N pulses, and determining an average value of the N stored temperatures, an average value of the N stored rates of change of current, and an average value of the N stored filtered currents.

[0018] In some aspects, the technology described herein relates to a method further comprising: performing N threshold determinations, wherein the N threshold determinations include: determining whether an average of N stored temperatures is greater than a threshold temperature, whether an average of N stored rates of change in current is greater than a threshold rate of change in current, and whether an average of N stored filtered currents is greater than a threshold filtered current, and controlling a pulse width of a gate control signal to a gate terminal based on the determination of the N threshold determinations.

[0019] In some aspects, the technology described herein relates to a method, further comprising: performing M average value determinations, wherein the M average value determinations include: repeating N average value determinations and N threshold value determinations for M cycles, storing N stored average values ​​of temperatures, N stored average values ​​of rates of change of currents, and N stored average values ​​of filtered currents for each of the M cycles, and determining the average values ​​of the M stored temperatures, the average values ​​of the M stored rates of change of currents, and the average values ​​of the M stored filtered currents.

[0020] In some aspects, the technology described herein relates to a method, further comprising: performing M threshold determinations, wherein the M threshold determinations include: determining whether an average of M stored temperatures is greater than a threshold temperature, whether an average of M stored rates of change in current is greater than a threshold rate of change in current, and whether an average of M stored filtered currents is greater than a threshold filtered current, and controlling a pulse width of a gate control signal to a gate terminal based on the determination of the M threshold determinations.

[0021] In some aspects, the technology described herein relates to a method further comprising: determining a voltage value of a bulk capacitor associated with a power switching device, and repeating the M average determination and the M threshold determination when the determined voltage value is greater than a threshold discharge voltage value.

[0022] In some aspects, the techniques described herein relate to a method wherein controlling a pulse width of a gate control signal to a gate terminal based on a determination of an N-threshold determination does not include increasing the pulse width.

[0023] In some aspects, the technology described herein relates to a system comprising: a power module for an inverter for an electric vehicle, the power module comprising: a power switch element comprising a drain terminal, a source terminal, and a gate terminal; and one or more controllers, the one or more controllers being configured to: detect a temperature of the power switch element, a rate of change of current of the power switch element, and a filtered current of the power switch element, and control a pulse width of a gate control signal to the gate terminal based on the detected temperature of the power switch element, the detected rate of change of current of the power switch element, and the detected filtered current of the power switch element.

[0024] In some aspects, the technology described herein relates to a system in which the one or more controllers are configured to control a pulse width of a gate control signal to a gate terminal by increasing or decreasing the pulse width of the gate control signal.

[0025] In some aspects, the technology described herein relates to a system in which the one or more controllers are configured to perform operations for decreasing pulse width more frequently than operations for increasing pulse width.

[0026] Other objects and advantages of the disclosed embodiments will be described in part in the following description, and in part will be obvious from the description, or can be understood by practicing the disclosed embodiments. The objects and advantages of the disclosed embodiments will be realized and achieved by means of the elements and combinations particularly pointed out in the appended claims.

[0027] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments, as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various exemplary embodiments and, together with the description, serve to explain the principles of the disclosed embodiments.

[0029] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter is depicted according to one or more embodiments.

[0030] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 An exemplary system infrastructure of a combined inverter and converter.

[0031] Figure 3 Describes a method for Figure 2 An exemplary system infrastructure for a controller of FIG.

[0032] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure for a point-of-use switching controller.

[0033] Figure 5 Describes a method for Figure 4 An exemplary system infrastructure of an upper power module.

[0034] Figure 6 An exemplary system for detecting current flow of a power device switch according to one or more embodiments is depicted.

[0035] Figure 7 An exemplary method for controlling an active discharge operation according to one or more embodiments is depicted.

[0036] Figure 8 An exemplary system for controlling active discharge operations according to one or more embodiments is depicted.

[0037] Fig. 9 Depicted are exemplary graphs from controlling active discharge operations according to one or more embodiments. DETAILED DESCRIPTION

[0038] Both the foregoing general description and the following detailed description are exemplary and explanatory only and do not constrain the claimed features. As used herein, the terms "comprises," "comprising," "has," "having," "includes," "including," or other variations thereof are intended to encompass non-exclusive inclusions such that a process, method, article, or device that includes a series of elements includes not only those elements, but may also include other elements that are not explicitly listed or inherent to such process, method, article, or device. In the present disclosure, unless otherwise stated, relative terms (such as, for example, "about," "substantially," and "approximately") are used to indicate possible ±10% variations in the stated values. In the present disclosure, unless otherwise stated, any numerical value may include possible ±10% variations in the stated values.

[0039] The terms used below may be interpreted in their broadest reasonable manner, although they are being used in conjunction with a detailed description of certain specific examples of the present disclosure. Indeed, certain terms may even be emphasized below; however, any term intended to be interpreted in any constrained manner will be explicitly and specifically defined as such in this detailed description. For example, in the context of the present disclosure, a switching device may be described as a switching element or device, but may refer to any device for controlling power flow in a circuit. For example, a switching element may be, for example, a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT) or a relay, or any combination thereof, but is not limited thereto.

[0040] Various embodiments of the present disclosure relate generally to systems and methods for controlled active discharge of an inverter for an electric vehicle, and more particularly to systems and methods for configurable active discharge controlled based on one or more of current or temperature.

[0041] Inverters (such as those used to drive motors in electric vehicles) are responsible for, for example, converting high voltage direct current (HVDC) into alternating current (AC) to drive the motor. A three-phase inverter may include a bridge having six power device switches (e.g., power transistors such as IGBTs or MOSFETs) that are controlled by pulse width modulation (PWM) signals generated by a controller. The inverter may include three-phase switches to control phase voltages, upper and lower gate drivers to control the switches, a PWM controller, and glue logic between the PWM controller and the gate driver. The PWM controller may generate signals to define the expected state of the system. The gate driver may send signals from the PWM controller to the phase switches. The phase switches may drive the phase voltages.

[0042] FET driver circuits may use a "point of use IC" where the sensing circuit is very close to the FET. Even if the point of use IC and the remote controller are resistant to EM fields, the communication between the point of use IC and the remote controller is still susceptible to induced currents. Point of use ICs have been implemented in low EM field applications, such as smart FETs for automotive applications. However, point of use ICs have not been used in high EM field applications. High EM fields can be fields that (i) induce a current in the IC that exceeds the operating current of the IC and causes malfunctions, or (ii) induce a differential voltage in the IC that exceeds the operating differential voltage and causes malfunctions. High EM fields can be, for example, fields greater than about 10A or about 100V.

[0043] As a result of the system design, a significant amount of energy can be stored on the inverter's high voltage bus bulk / DC bus capacitors. This stored high voltage energy must be dissipated to prevent people from being exposed to dangerous voltage levels. A function of the inverter known as "active discharge" allows for controlled dissipation of energy stored in the system capacitance. Before initiating active discharge of the bus, the high voltage battery that provides energy to the inverter is disconnected to avoid discharging the battery. The active discharge function has the ability to quickly dissipate high voltage bus energy to ensure safety in events such as vehicle maintenance, vehicle collisions, etc. The discharge rate is a function of the initial bus voltage, capacitance, and energy dissipation mechanism. Government / OEM regulations also specify the required discharge rate.

[0044] For example, inverters often have safety requirements to discharge bulk capacitors on the inverter in a short period of time (such as between 1 and 3 seconds) in the event of a crash or other fault condition. Some systems use motor windings to discharge bulk capacitors, which requires that the motor is not shorted and the main microcontroller is available. Some systems use a dedicated resistive discharge to discharge bulk capacitors, which is typically a combination of a high power resistor, a switch, and a controller.

[0045] Therefore, the inverter can use the switching losses in the inverter power device switching elements (IGBT / FET) to release energy. Controlling the power device on / off (also known as enabling / disabling) forms predictable losses. Multiple switching at high frequency rates can cause a significant amount of these accumulated losses. The rate of discharge (loss) can be proportional to the switching frequency. These losses can be used to quickly discharge the HVDC bus without increasing the cost and complexity of using motor windings or dedicated resistors to discharge. In addition, by eliminating the resistive elements in traditional methods, a lot of cost, circuit board area and undesirable heat can be saved.

[0046] Some systems use a gate driver to discharge the bulk capacitor to operate one of the power switches in the half H-bridge switch in linear mode, which effectively uses the power switch as a resistor by controlling the gate positive bias voltage and / or switching. In this method, one power switch (e.g., the upper switch) is turned on as in normal operation, and the other power switch (e.g., the lower switch) is pulsed on with a reduced gate voltage. The HVDC bus and bulk capacitors can be discharged via specific PWM pulses. During active discharge, if the temperature is not controlled, the power switch may experience an increase in temperature that is significant enough to cause failure.

[0047] The power switching components may have significant differences in transfer characteristics based on temperature, especially in the linear mode region for which the DC bus is discharged. For example, the temperature difference may be based on the ambient temperature and may include temperatures such as -40C to 100C operating temperature.

[0048] Some systems that use threshold detection to discharge the bulk capacitor (which requires shutting down the opposing device) may choose to increase the sensed threshold by one step (e.g., 390mV) and may have a voltage that is fixed at the beginning of the discharge operation and cannot be changed during the discharge operation. Some systems use a pre-programmed voltage to discharge the bulk capacitor, where the voltage is fixed at power-up during configuration mode and cannot be changed during inverter operation.

[0049] The point-of-use controller may be on a power module that includes a phase switch. The temperature of the phase switch and / or the power module may be an important factor in the control of the inverter. The phase switch may include, for example, one or more silicon carbide (SiC) grains. One or more embodiments may include a thermistor to monitor the SiC grain temperature. For example, one or more embodiments may include a point-of-use controller, such as an integrated gate driver ASIC. The ASIC may use an on-chip integrated trimmed thermal sensor to accurately measure the temperature. Both the SiC gate threshold voltage and transconductance decrease with temperature.

[0050] Compared to Si IGBTs, SiC MOSFETs have more stringent overcurrent circuit protection requirements. Compared to IGBTs, which may have similar blocking voltage and current ratings, SiC MOSFETs have a smaller chip area, which can make parasitic capacitance smaller than IGBTs, thereby increasing inherent switching speeds. However, the smaller chip area of ​​the SiC MOSFET die may also provide lower heat dissipation capabilities than IGBTs. During overcurrent conditions, the rapidly increasing current can generate a significant amount of Joule heat, and if the ability to dissipate enough heat is not met, the SiC MOSFET die may be destroyed in a short period of time. For smaller die sizes, the surge current capability of SiC MOSFETs may be significantly lower than that of IGBT counterparts.

[0051] One or more embodiments may allow temperature-based control of the power module during bulk capacitor discharge. Bulk capacitor discharge at shutdown is a function in which the bulk capacitor is quickly discharged after the battery contactor is opened. The bulk capacitor discharge reduces the risk of contact with high voltage. Bulk capacitor discharge can transfer energy from the bulk capacitor (e.g., 700μF*800V2) to the power switching element and should be implemented in a controlled manner. Using the temperature of the SiC device during bulk capacitor discharge can reduce the discharge time while protecting the SiC device from excessive temperature rise.

[0052] One or more embodiments may provide an integrated gate driver within a power module. The integrated gate driver may be an ASIC. The ASIC may include two thermal sensors on the ASIC. The thermal sensor may be composed of a stack of diodes having a voltage drop with a negative temperature coefficient. However, the present disclosure is not limited thereto and may include other ways of constructing a thermal sensor within an ASIC.

[0053] One or more embodiments may provide an active discharge operation that continuously measures the temperature, the change in current, and the value of the average current, compares these measured values ​​to a threshold, and periodically adjusts the pulse width of the PWM signal. One or more embodiments may provide a reduced time to discharge the bulk capacitor to below a threshold voltage while maintaining safe operation of the inverter.

[0054] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter according to one or more embodiments is depicted. In the context of the present disclosure, the combined inverter and converter may be referred to as an inverter. Figure 1As shown, the electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include a component for receiving electric power from an external source and outputting electric power to charge the battery 195 of the electric vehicle 100. For example, the inverter 110 may convert DC power from the battery 195 in the electric vehicle 100 into AC power to drive the motor 190 of the electric vehicle 100, but the embodiment is not limited thereto. For example, the inverter 110 may be bidirectional and may convert DC power into AC power, or convert AC power into DC power, such as during regenerative braking. The inverter 110 may be a three-phase inverter, a single-phase inverter, or a multi-phase inverter.

[0055] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 The electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include an inverter controller 300 ( Figure 3 14). The inverter 110 may include a low voltage upper phase controller 120 separated from a high voltage upper phase controller 130 by an electrical isolator 150, and an upper phase power module 140. The upper phase power module 140 may include a point-of-use upper phase controller 142 and an upper phase switch 144. The inverter 110 may include a low voltage lower phase controller 125 separated from a high voltage lower phase controller 135 by an electrical isolator 150, and a lower phase power module 145. The lower phase power module 145 may include a point-of-use lower phase controller 146 and a lower phase switch 148. The upper phase switch 144 and the lower phase switch 148 may be connected to a motor 190 and a battery 195. The electrical isolator 150 may be one or more of optical, converter-based, or capacitor-based isolation. For example, the electrical isolator 150 may be one or more capacitors having a value from about 20 fF to about 100 fF, having a breakdown voltage from about 6 kV to about 12 kV. The electrical isolator 150 may include a pair of capacitors, wherein one capacitor of the pair carries a complementary (180 degrees out of phase) data signal from the other capacitor of the pair to form a differential signal that is rejected for common mode noise. The electrical isolator 150 may include more than one capacitor in series. The electrical isolator 150 may include one capacitor located on a first IC, or may include a first capacitor located on a first IC and a second capacitor located on a second IC that communicates with the first IC.

[0056] The inverter 110 may include a low voltage region (e.g., where the voltage is typically less than 5V) and a high voltage region (e.g., where the voltage may exceed 500V). The low voltage region may be separated from the high voltage region by an electrical isolator 150. The inverter controller 300 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the low voltage upper phase controller 120. The low voltage upper phase controller 120 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the high voltage upper phase controller 130. The low voltage upper phase controller 120 may send a signal to and receive a signal from the low voltage lower phase controller 125. The high voltage upper phase controller 130 may be in the high voltage region of the inverter 110. Therefore, the signal between the low voltage upper phase controller 120 and the high voltage upper phase controller 130 passes through the electrical isolator 150. The high voltage upper phase controller 130 may send signals to and receive signals from a point-of-use upper phase controller 142 in the upper phase power module 140. The point-of-use upper phase controller 142 may send signals to and receive signals from an upper phase switch 144. The upper phase switch 144 may be connected to a motor 190 and a battery 195. For example, the upper phase switch 144 and the lower phase switch 148 may be used to transfer energy from the motor 190 to the battery 195, from the battery 195 to the motor 190, from an external source to the battery 195, or from the battery 195 to an external source. The lower phase system of the inverter 110 may be similar to the upper phase system described above.

[0057] Figure 3 Describes a method for Figure 2 FIG. 3 is an exemplary system infrastructure of an inverter controller 300 . The inverter controller 300 may include one or more controllers.

[0058] The inverter controller 300 may include a set of instructions that can be executed to cause the inverter controller 300 to perform any one or more of the methods or computer-based functions disclosed herein. The inverter controller 300 may operate as a standalone device, or may be connected to other computer systems or peripheral devices, for example using a network.

[0059] In a networked deployment, the inverter controller 300 can operate in the capacity of a server, or as a client in a server-client user network environment, or as a peer computer system in a peer (or distributed) network environment. The inverter controller 300 can also be implemented as or incorporated into various devices, such as a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile device, a palmtop computer, a laptop computer, a desktop computer, a communication device, a wireless phone, a landline phone, a control system, a camera, a scanner, a fax machine, a printer, a pager, a personal trusted device, a network device, a network router, a switch or bridge, or any other machine capable of executing a set of instructions (sequentially or otherwise) (the set of instructions specifies the actions to be taken by the machine). In a specific implementation, the inverter controller 300 can be implemented using an electronic device that provides voice, video or data communication. Further, although the inverter controller 300 is illustrated as a single system, the term “system” should also be understood to include any collection of systems or subsystems that individually or jointly execute one or more sets of instructions to perform one or more computer functions.

[0060] like Figure 3 As shown, the inverter controller 300 may include a processor 302, such as a central processing unit (CPU), a graphics processing unit (GPU), or both. The processor 302 may be a component in a variety of systems. For example, the processor 302 may be part of a standard inverter. The processor 302 may be one or more general-purpose processors, digital signal processors, application-specific integrated circuits, field programmable gate arrays, servers, networks, digital circuits, analog circuits, combinations thereof, or other devices now known or later developed for analyzing and processing data. The processor 302 may implement a software program, such as a manually generated (i.e., programmed) code.

[0061] The inverter controller 300 may include a memory 304 that can communicate via a bus 308. The memory 304 may be a main memory, a static memory, or a dynamic memory. The memory 304 may include, but is not limited to, computer-readable storage media, such as various types of volatile and non-volatile storage media, including but not limited to random access memory, read-only memory, programmable read-only memory, electrically programmable read-only memory, electrically erasable read-only memory, flash memory, tape or disk, optical media, etc. In one specific implementation, the memory 304 includes a cache or random access memory for the processor 302. In an alternative specific implementation, the memory 304 is separated from the processor 302, such as a cache memory, system memory, or other memory of the processor. The memory 304 may be an external storage device or database for storing data. Examples include a hard drive, a compact disk ("CD"), a digital video disk ("DVD"), a memory card, a memory stick, a floppy disk, a universal serial bus ("USB") storage device, or any other device operable to store data. The memory 304 is operable to store instructions that can be executed by the processor 302. The functions, actions, or tasks illustrated in the figures or described herein may be performed by the processor 302 executing instructions stored in the memory 304. The functions, actions, or tasks are not related to a particular type of instruction set, storage medium, processor, or processing strategy, and may be performed by software, hardware, integrated circuits, firmware, microcode, etc. operating alone or in combination. Likewise, processing strategies may include multi-processing, multi-tasking, parallel processing, etc.

[0062] As shown, the inverter controller 300 may further include a display 310, such as a liquid crystal display (LCD), an organic light emitting diode (OLED), a flat panel display, a solid state display, a cathode ray tube (CRT), a projector, a printer, or other display devices known now or later developed for outputting the determined information. The display 310 may serve as an interface for a user to view the operation of the processor 302, or specifically serve as an interface with the software stored in the memory 304 or in the drive unit 306.

[0063] Additionally or alternatively, the inverter controller 300 may include an input device 312 configured to allow a user to interact with any of the components of the inverter controller 300. The input device 312 may be a numeric keypad, a keyboard or a cursor control device (such as a mouse or a joystick), a touch screen display, a remote control, or any other device operable to interact with the inverter controller 300.

[0064] The inverter controller 300 may also or alternatively include a drive unit 306 implemented as a disk or optical drive. The drive unit 306 may include a computer-readable medium 322 in which one or more sets of instructions 324 (e.g., software) may be embedded. Further, the instructions 324 may embody one or more of the methods or logics described herein. The instructions 324 may reside completely or partially within the memory 304 and / or within the processor 302 during execution by the inverter controller 300. The memory 304 and the processor 302 may also include computer-readable media as described above.

[0065] In some systems, the computer-readable medium 322 includes instructions 324 or receives and executes instructions 324 in response to a propagated signal, so that a device connected to the network 370 can transmit voice, video, audio, images, or any other data through the network 370. Further, the instructions 324 can be transmitted or received through the network 370 and / or using the bus 308 via the communication port or interface 320. The communication port or interface 320 can be part of the processor 302 or can be an independent component. The communication port or interface 320 can be formed in software or can be a physical connector in hardware. The communication port or interface 320 can be configured to connect to the network 370, external media, display 310, or any other component in the inverter controller 300, or a combination thereof. The connection to the network 370 can be a physical connection (such as a wired Ethernet connection) or can be established wirelessly, as described below. Similarly, additional connections to other components of the inverter controller 300 can be physical connections or can be established wirelessly. The network 370 can alternatively be directly connected to the bus 308.

[0066] Although the computer-readable medium 322 is shown as a single medium, the term "computer-readable medium" may include a single medium or multiple media (such as a centralized or distributed database and / or associated caches and servers) that store one or more sets of instructions. The term "computer-readable medium" may also include any medium capable of storing, encoding, or carrying a set of instructions for execution by a processor or causing a computer system to perform any one or more of the methods or operations disclosed herein. The computer-readable medium 322 may be non-transitory and may be tangible.

[0067] Computer readable medium 322 may include solid-state memory, such as a memory card or other package that accommodates one or more non-volatile read-only memories. Computer readable medium 322 may be random access memory or other volatile rewritable memory. Additionally or alternatively, computer readable medium 322 may include magneto-optical or optical media, such as a disk or tape or other storage device for capturing carrier signals (such as signals transmitted through a transmission medium). Digital file attachments to emails or other self-contained information archives or archive sets may be considered distribution media as tangible storage media. Therefore, the present disclosure is considered to include any one or more of computer-readable media or distribution media and other equivalents and successor media in which data or instructions may be stored.

[0068] In alternative implementations, dedicated hardware implementations (such as application specific integrated circuits, programmable logic arrays, and other hardware devices) may be constructed to implement one or more of the methods described herein. Applications that may include the apparatus and systems of various implementations may broadly include a variety of electronic and computer systems. One or more implementations described herein may use two or more specific interconnected hardware modules or devices with associated control and data signals that may be transmitted between and through the modules or as part of an application specific integrated circuit to implement functionality. Thus, the present system encompasses software, firmware, and hardware implementations.

[0069] The inverter controller 300 may be connected to a network 370. The network 370 may define one or more networks, including wired or wireless networks. The wireless network may be a cellular telephone network, an 802.11, 802.16, 802.20, or WiMAX network. Further, such networks may include public networks (such as the Internet), private networks (such as intranets), or combinations thereof and may utilize a variety of networking protocols that are now available or later developed, including but not limited to TCP / IP-based networking protocols. The network 370 may include a wide area network (WAN) (such as the Internet), a local area network (LAN), a campus area network, a metropolitan area network, a direct connection (such as through a universal serial bus (USB) port), or any other network that allows data communication. The network 370 may be configured to couple one computing device to another computing device to enable data communication between devices. The network 370 may generally be enabled to use any form of machine-readable media to transmit information from one device to another. The network 370 may include a communication method by which information can travel between computing devices. The network 370 may be divided into subnetworks. A subnetwork may allow access to all other components connected to it, or a subnetwork may restrict access between components. Network 370 may be considered a public or private network connection and may include, for example, a virtual private network or encryption or other security mechanisms employed over the public Internet.

[0070] According to various implementations of the present disclosure, the methods described herein may be implemented by a software program that can be executed by a computer system. Further, in an exemplary non-limiting implementation, the implementation may include distributed processing, component or object distributed processing, and parallel processing. Alternatively, a virtual computer system process may be constructed to implement one or more of the methods or functionalities described herein.

[0071] Although this specification describes components and functions that can be implemented in a specific implementation with reference to specific standards and protocols, the present disclosure is not limited to such standards and protocols. For example, standards for Internet and other packet-switched network transmissions (e.g., TCP / IP, UDP / IP, HTML, HTTP) represent examples of the prior art. Such standards are periodically replaced by faster or more efficient equivalents having substantially the same functionality. Therefore, alternative standards and protocols having the same or similar functionality as those disclosed herein are considered equivalents thereof.

[0072] It will be appreciated that, in one embodiment, the operations of the methods discussed are performed by an appropriate processor (or processors) of a processing (i.e., computer) system executing instructions (computer readable code) stored in a storage device. It will also be appreciated that the present disclosure is not limited to any particular implementation or programming technique, and that the present disclosure may be implemented using any suitable technique for implementing the functionality described herein. The present disclosure is not limited to any particular programming language or operating system.

[0073] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure of a point-of-use switching controller. For a three-phase inverter, each of the upper phase and the lower phase may include three phases related to phases A, B, and C. For example, the upper phase power module 140 may include an upper phase power module 140A for upper phase A, an upper phase power module 140B for upper phase B, and an upper phase power module 140C for upper phase C. The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switching element 144A. The upper phase power module 140B may include a point-of-use upper phase B controller 142B and an upper phase B switching element 144B. The upper phase power module 140C may include a point-of-use upper phase C controller 142C and an upper phase C switching element 144C. Each of the upper phase A switching member 144A, the upper phase B switching member 144B, and the upper phase C switching member 144C may be connected to the motor 190 and the battery 195 . Figure 4 Details of the upper phase power module 140 are depicted. Although not shown, the lower phase power module 145 may include a similar structure as the upper phase power module 140 for the lower phases A, B, and C.

[0074] Figure 5 Describes a method for Figure 4 Example system infrastructure for the upper power module. For example, Figure 5 Additional details of upper phase power module 140A are provided. Although not shown, upper phase power module 140B, upper phase power module 140C, and respective lower phase power modules of lower phase power module 145 may include components related to Figure 5 The upper phase power module 140A shown in FIG. 1 is similar in structure to the upper phase power module 140A shown in FIG. 1. In addition, the terms "upper", "lower", "northern", and "southern" as used in this disclosure are used for reference only, do not limit the elements to a particular orientation, and are generally interchangeable throughout the text. For example, the upper phase power module 140 may be referred to as a lower phase power module, a northern phase power module, a southern phase power module, a first phase power module, or a second phase power module.

[0075] The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switch 144A. The upper phase A switch 144A may include one or more sets of switches. Figure 5 As shown, the upper phase A switch 144A may include an upper phase A north switch 144A-N and an upper phase A south switch 144A-S. The point-of-use upper phase A controller 142A may include one or more memories, controllers, or sensors. For example, the point-of-use upper phase A controller 142A may include a communication manager 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. The point-of-use upper phase A controller 142A may include a controller 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. Figure 5 More or fewer components than those shown. For example, the point-of-use upper phase A controller 142A may include more or less than two switch controls and diagnostic controllers, and may include more than two thermal sensors.

[0076] The communication manager 405 may control inter-controller communications to and from the point-of-use upper phase A controller 142A and / or may control intra-controller communications between components of the point-of-use upper phase A controller 142A. The functional safety controller 410 may control safety functions of the point-of-use upper phase A controller 142A. For example, the test interface and controller 415 may control test functions of the point-of-use upper phase A controller 142A, such as end-of-line testing in manufacturing. The north thermal sensor 420A may sense the temperature at a first location in the point-of-use upper phase A controller 142A, and the south thermal sensor 420B may sense the temperature at a second location in the point-of-use upper phase A controller 142A. For example, the self-test controller 425 may control self-test functions of the point-of-use upper phase A controller 142A, such as during initialization of the point-of-use upper phase A controller 142A after an inverter 110 power-on event. The command manager 430 may control commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The waveform adjuster 435 may control the waveform timing and shape of the commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The memory 440 may include one or more volatile and non-volatile storage media for the operation of the point-of-use upper phase A controller 142A. The north switch control and diagnostic controller 450N may send one or more signals to the north switch 144A-N to control the operation of the north switch 144A-N, and may receive one or more signals from the north switch 144A-N that provide information about the north switch 144A-N. The south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-S to control the operation of the south switches 144A-S, and may receive one or more signals from the south switches 144A-S providing information about the south switches 144A-S. As described above, the terms "north" and "south" are used for reference only, and the north switch control and diagnostic controller 450N may send one or more signals to the south switches 144A-S, and the south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-N.

[0077] Figure 6 An exemplary system for detecting current of a power device switch according to one or more embodiments is depicted. For example, the current detection system 600 may be a specific implementation of the upper phase power module 140 and the lower phase power module 145. Figure 6As shown, the upper power switch 644U (MB) can be a specific implementation of the upper phase A switch 144A, and the lower power switch 644L (MA) can be a specific implementation of the lower phase A switch paired with the upper phase A switch 144A. Figure 6 As shown, the point-of-use upper phase controller 642U can be a specific implementation of the point-of-use upper phase A controller 142A, for example, which has a corresponding point-of-use lower phase A controller 642L. Even more specifically, for example, the point-of-use upper phase controller 642U can be a specific implementation of the north switching member control and diagnostic controller 450N and the south switching member control and diagnostic controller 450S.

[0078] like Figure 6 As shown, for example, the current sensing system 600 may include a positive battery connector 620 and a negative battery connector 621, which may be respective connectors from the battery 195. The positive battery connector 620 may be connected to a drain terminal of an upper power switch 644U, a source terminal of the upper power switch 644U may be connected to a drain terminal of a lower power switch 644L, and a source terminal of the lower power switch 644L may be connected to the negative battery connector 621. The upper power switch 644U and the lower power switch 644L may control the flow of energy from the positive battery connector 620 and the negative battery connector 621 to the phase connector 610, which may be connected to the motor 190 to control the rotation of the motor 190, for example.

[0079] The metal trace from the source terminal of the upper power switch 644U may provide a first sense input SNSP_U and a second sense input SNSM_U to the point-of-use upper phase controller 642U, for example, using a bump, and the point-of-use upper phase controller 642U may provide a gate control signal 630 to the gate terminal of the upper power switch 644U. The distance between the first sense input SNSP_U and the second sense input SNSM_U may be, for example, less than 30 cm or less than 3 cm. The point-of-use upper phase controller 642U may include a current change rate detector 632, an M-bit flash thermometer analog-to-digital converter 636, a low-pass analog filter and a sample and hold circuit 622, a programmable gain controller and an N-bit analog-to-digital converter 626, and an integrated gate driver calculation engine (IGDCE) 628.

[0080] The current change rate detector 632 may receive signals from the first sense input SNSP_U and the second sense input SNSM_U and provide signals to the M-bit flash thermometer analog-to-digital converter 636, the low-pass analog filter and sample and hold circuit 622, and the IGDCE 628. The M-bit flash thermometer analog-to-digital converter 636 may provide a signal to the IGDCE 628. The low-pass analog filter and sample and hold circuit 622 may provide a signal to the programmable gain controller and N-bit analog-to-digital converter 626, and the programmable gain controller and N-bit analog-to-digital converter 626 may provide a signal to the IGDCE 628. The signal from the current change rate detector 632 directly to the IGDCE 628 may immediately indicate an over-current condition to the IGDCE 628. The M-bit flash thermometer analog-to-digital converter 636 may provide a signal to the IGDCE 628 of the current in a relatively short duration window. The low pass analog filter and sample and hold circuit 622 and the programmable gain controller and N-bit analog to digital converter 626 can provide a relatively long duration window for the current IGDCE 628. Utilizing the instantaneous, short duration, and long duration current information, the IGDCE 628 can provide an improved response relative to systems that do not provide control based on this information.

[0081] One or more embodiments may provide a current detection system 600 that uses a metal trace in the source terminal of a power FET as a current sensing complex impedance. For the lower power switch 644L, the trace impedance may be between the source terminal of the lower power switch 644L and the negative battery connector 621. For the upper power switch 644U, the trace impedance may be between the source terminal of the upper power switch 644U and the phase connector 610, or between the source terminal of the upper power switch 644U and the drain terminal of the lower power switch 644L. For the upper power switch 644U, for example, the effective complex impedance of the metal trace may include an inductive component 614 in series with a resistive component 616 and a parallel shunt distributed / displacement capacitor component 618. Although in Figure 6614 are shown as electrical devices, but the inductor component 614, the resistor component 616, and the capacitor component 618 are not additional devices, but rather electrical characteristics of the metal traces themselves. The effective complex impedance can be defined as Z(s)=(Rsrc+SLs)||(1 / SCp), where Rsrc is the resistance of the resistor component 616, S=jω, where ω is the rad / sec frequency, Ls is the inductance of the inductor component 614, and Cp is the capacitance of the capacitor component 618. During an overcurrent event, the series inductor component 614 can provide a large voltage term (e.g., the voltage difference between SNSP_U and SNSM_U) that is proportional to the time rate of the flowing current in the source trace inductance itself. The metal trace of the source terminal of the lower power switch 644L can have a similar inductor / resistor / capacitor structure.

[0082] For example, in the case where the upper power switch 644U is turned on due to a hard fault, such as when the drain of the lower power switch 644L is shorted to the negative battery connection 621, the rate of change of the drain current may become large, which may cause the voltage across the inductive component 614 and the resistive component 616 to increase according to Vsrc_metal_trace=i ds *Rsrc+Ls*di ds / dt. This can allow sensing and acting on hard shorts in durations of hundreds of nanoseconds to easily meet short-circuit withstand times of less than 1.5μs as required for fast power FETs. The inductive component 614 and the resistive component 616 can be used to generate a voltage signal that is a shaped version of the drain current as if the current was flowing only in the resistive component 616. A low-pass analog filter and a sample and hold circuit 622 can be used to generate a shaped version of the drain current, with the output provided to a programmable gain controller and an N-bit analog to digital converter 626. This presents a sense soft short or fault signal for the current sensing system 600 to appropriately act on the fault in durations of 1.0μs or longer, which can be configurable based on specific system requirements. The shaped current component may be used by the IGDCE 628 to determine an optimal next cycle gate drive PWM drive curve to help minimize the switching losses of the upper power switch 644U while enabling a reduction in PWM duration and a reduction in the minimum dead time between the lower power switch 644L and the upper power switch 644U. The optimal next cycle gate drive PWM drive curve may be provided as a gate control signal 630 to the upper power switch 644U.

[0083] In the event of a hard short circuit, the IGDCE 628 may immediately receive a current change rate overcurrent signal from the current change rate detector 632, and may immediately initiate the shutoff of the upper power switch 644U using a uniquely calculated or predetermined shutoff gate drive curve to ensure safe shutoff of the faulty upper power switch 644U. The M-bit flash thermometer analog-to-digital converter 636 is a fast response circuit that may provide M logic signals to the IGDCE 628 to further assist in making the most appropriate decision in the case of hard and soft overcurrent events. For example, the IGDCE 628 may determine that the most appropriate decision is to use a predetermined shutoff curve to determine the safest shutoff curve, or to determine not to take immediate shutoff action when monitoring the current amplitude trajectory.

[0084] In the event of a soft short, the IGDCE may continuously receive digital codes from the programmable gain controller and the N-bit analog-to-digital converter 626, wherein the digital code represents a shaped version of the drain current amplitude flowing for the faulty upper power switching element 644U, which may achieve an almost noise-free signal of the current flowing in the faulty upper power switching element 644U. The accurate and noise-free device current signal may enable protection of the upper power switching element 644U while maintaining the safety functionality of the current detection system 600. When a soft short begins to cause an unsafe system operating condition, the IGDCE 628 may immediately initiate a shutdown process for the faulty upper power switching element 644U using the calculated shutdown gate drive curve to ensure a safe and correct shutdown process. One or more embodiments may provide current detection for a power device that uses both the time rate of change of the power FET current and the shaped version.

[0085] Figure 7 An exemplary method 700 for controlling an active discharge operation according to one or more embodiments is depicted. The method 700 may begin at start 705 and may include applying N (e.g., 32) pulses to a power switch (e.g., one or more of the upper power switches 644U) by one or more controllers (e.g., point-of-use upper phase controller 642U) (operation 710). For example, each of the N pulses may have a configurable pulse width T1, such as 140ns. For example, the N pulses may be applied at a constant period TP, such as 20μs.

[0086] During each period TP, the one or more controllers may measure the temperature of the power switching element (e.g., using the north thermal sensor 420A and the south thermal sensor 420B), the rate of change of the current di / dt (e.g., using the current change rate detector 632), and the filtered current (e.g., using a low-pass analog filter and a sample and hold circuit 622) (operation 715). The measured temperature, di / dt, and filtered current may be stored in a memory of the one or more controllers. After N pulses, the one or more controllers may determine the average of the N stored temperatures, the average of the N stored di / dt, and the average of the N stored filtered currents (operation 720).

[0087] The one or more controllers may determine whether the average of the N stored temperatures is greater than a threshold temperature, whether the average of the N stored di / dt is greater than a threshold di / dt, and whether the average of the N stored filtered currents is greater than a threshold filtered current (operation 725). If all of the averages are less than the corresponding thresholds, the one or more controllers may maintain the pulse width T1 (operation 730). For example, the one or more controllers may maintain the pulse width T1 at 140 ns. However, if any of the averages is greater than the corresponding threshold (which may indicate that the temperature or current is too high), the one or more controllers may reduce the pulse width T1 (operation 735). For example, the one or more controllers may reduce the pulse width T1 from 140 ns to 130 ns.

[0088] For example, here, the short-term (N) average value can be used to quickly react to values ​​above a threshold by reducing pulse width T1, or to maintain pulse width T1 when the value approaches the threshold, but cannot include information over a sufficiently long period of time to allow an increase in pulse width T1 (which can cause higher temperatures and currents). Therefore, the N average value adjustment can maintain pulse width T1 or reduce pulse width T1. However, the N average value adjustment does not include increasing pulse width T1.

[0089] Operations 710 to 735 may be repeated M times (operation 740), and the one or more controllers may store each of the N stored average values ​​of temperature, the N stored average values ​​of di / dt, and the N stored average values ​​of filtered current for each M cycles. For example, operations 710 to 735 may be repeated 8 times, so that 8 average temperatures, 8 average di / dts, and 8 average filtered currents are stored. After M cycles, the one or more controllers may determine the average values ​​of the M stored temperatures, the M stored average values ​​of di / dt, and the M stored average values ​​of filtered current (operation 745).

[0090] The one or more controllers may determine whether the average of the M stored temperatures is greater than a threshold temperature, whether the average of the M stored di / dt is greater than a threshold di / dt, and whether the average of the M stored filtered currents is greater than a threshold filtered current (operation 750). If all of the averages are less than the corresponding thresholds, the one or more controllers may increase the pulse width T1 (operation 760). For example, the one or more controllers may increase the pulse width T1 from 140ns to 150ns. However, if any of the averages is greater than the corresponding threshold (which may indicate that the temperature or current is too high), the one or more controllers may reduce the pulse width T1 (operation 755). For example, the one or more controllers may reduce the pulse width T1 from 140ns to 130ns. For example, the time to complete the M cycles from the start of operation 710 to the start of operation 765 may be approximately 5ms.

[0091] The one or more controllers may determine the bulk capacitor 810 (see Figure 8 ) is less than the threshold discharge voltage value (operation 765). For example, the one or more controllers may perform an active discharge operation on the bulk capacitor 810 to reduce the voltage value of the bulk capacitor 810 from an initial voltage of 900V to a threshold discharge voltage value less than 60V. In operation 765, when the one or more controllers determine that the voltage value of the bulk capacitor 810 is less than the threshold discharge voltage value (e.g., 60V), the voltage of the bulk capacitor 810 may be considered to be less than the safe voltage value, and the method 700 may end at operation 770. However, when the one or more controllers determine that the voltage value of the bulk capacitor 810 is greater than the threshold discharge voltage value (e.g., 60V), the voltage of the bulk capacitor 810 may be considered to be higher than the safe voltage value, and the method 700 may return to operation 710 to repeat the active discharge operation.

[0092] Figure 8 An exemplary system for controlling active discharge operations according to one or more embodiments is depicted. Figure 8 As shown, the motor 190 and the battery 195 can be disconnected from the inverter 110 to isolate the bulk capacitor 810. For example, the bulk capacitor 810 can be a 1mF capacitor. For example, the HVDC can be 900V. The upper phase switching element 144 can be driven by a voltage source Vgs to at least partially or completely turn on the upper phase switching element 144 to transfer the current from the positive side of the bulk capacitor 810 to the lower phase switching element 148. The point-of-use lower phase controller 146 can provide a gate control signal to the lower phase switching element 148 to control the operation of the lower phase switching element 148, and thus control the discharge operation of the bulk capacitor 810.

[0093] Fig. 9 An exemplary graph 900 from controlling an active discharge operation according to one or more embodiments is depicted. Graph 910 depicts that the voltage of bulk capacitor 810 decreases from approximately 900V to approximately 60V in approximately 200ms. As shown in graph 910, after the active discharge operation is initiated at time zero, the conditions to begin increasing (or decreasing) the T1 pulse width (see Figure 7 ). The relatively constant slope decay of the bulk capacitor voltage and the decay of the current through the bulk capacitor (graph 920) further demonstrates that T1 remains constant for 60ms. The shortest time window in which the T1 pulse width may need to be reduced is 40ns or even shorter. At times 60ms, 110ms, and 160ms, the conditions for increasing the T1 pulse width are met, and by increasing T1 at these times, the average current through the bulk capacitor is therefore increased, which increases the voltage decay across the bulk capacitor.

[0094] Graph 920 depicts the current flowing through the bulk capacitor 810, which increases with the corresponding step changes at 60ms, 110ms and 160ms (due to the increase in pulse width), thereby indicating that the pulse width T1 increases (e.g., at operation 760). Immediately after 60ms, 110ms and 160ms, both the bulk capacitor current and the slope decrease over time, which causes the voltage decay across the bulk capacitor. Graph 930 depicts the envelope (peak) of the drain-to-source voltage across the lower phase switching element 148, showing the step rise in the envelope of the drain-to-source voltage at 60ms, 110ms and 160ms (related to the step changes at 60ms, 110ms and 160ms of graph 920). These drain-to-source voltages should be maintained below the breakdown voltage rating of the phase switching element. As shown, the drain-to-source voltage decreases with the voltage decay across the bulk capacitor.

[0095] One or more embodiments may provide for active discharge of a 1 mF bulk capacitor from 900 V to 60 V, where only one phase participates in the active discharge for less than 1000 ms for a switching frequency of 10 KHz. One or more embodiments may provide for active discharge of a 1 mF bulk capacitor from 900 V to 60 V, where only one phase participates in the active discharge for less than 500 ms for a switching frequency of 20 KHz. One or more embodiments may provide for active discharge of a 1 mF bulk capacitor from 900 V to 60 V, where only one phase participates in the active discharge for less than 200 ms for a switching frequency of 50 KHz.

[0096] One or more embodiments may provide an active discharge operation that continuously measures the value of temperature, rate of change in current, and average current, compares these measured values ​​to associated thresholds, and periodically adjusts the pulse width of the PWM signal. One or more embodiments may provide a reduced time to discharge the bulk capacitor to below a threshold voltage while maintaining safe operation of the inverter.

[0097] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered exemplary only, with the true scope and spirit of the invention being indicated by the following claims.

Claims

1. A system comprising: An inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: a power switch including a drain terminal, a source terminal, and a gate terminal; and One or more controllers, the one or more controllers being configured to: detecting a temperature of the power switch, a rate of change in current of the power switch, and a filtered current of the power switch, and A pulse width of a gate control signal to the gate terminal is controlled based on a detected temperature of the power switch, a detected rate of change in current of the power switch, and a detected filtered current of the power switch.

2. The system of claim 1 , wherein the one or more controllers are further configured to perform an N-average determination, wherein the N-average determination comprises: applying N pulses having a first pulse width and period to the power switching element, During each cycle of the applied N pulses, storing a detected temperature of the power switch, a detected rate of change in current of the power switch, and a detected filtered current of the power switch, and An average of the N stored temperatures, an average of the N stored rates of change in current, and an average of the N stored filtered currents are determined.

3. The system of claim 2, wherein the one or more controllers are further configured to perform an N threshold determination, wherein the N threshold determination comprises: determining whether the average of the N stored temperatures is greater than a threshold temperature, whether the average of the N stored rates of change in current is greater than a threshold rate of change in current, and whether the average of the N stored filtered currents is greater than a threshold filtered current, and The pulse width of the gate control signal to the gate terminal is controlled based on the determination of the N threshold determination.

4. The system of claim 3, wherein the one or more controllers are further configured to perform an M-mean determination, wherein the M-mean determination comprises: repeating the N average value determination and the N threshold value determination for M cycles, storing, for each of the M cycles, the average of the N stored temperatures, the average of the N stored rates of change of currents, and the average of the N stored filtered currents, and An average of the M stored temperatures, an average of the M stored rates of change in current, and an average of the M stored filtered currents are determined.

5. The system of claim 4, wherein the one or more controllers are further configured to perform an M threshold determination, wherein the M threshold determination comprises: determining whether the average of the M stored temperatures is greater than the threshold temperature, whether the average of the M stored rates of change in current is greater than a threshold rate of change in current, and whether the average of the M stored filtered currents is greater than the threshold filtered current, and The pulse width of the gate control signal to the gate terminal is controlled based on the determination of the M threshold determination.

6. The system of claim 5, wherein the one or more controllers are further configured to: determining the voltage value of the bulk capacitor of the inverter, and The M average value determination and the M threshold value determination are repeated when the determined voltage value is greater than the threshold discharge voltage value.

7. The system of claim 3, wherein controlling the pulse width of the gate control signal to the gate terminal based on the determination of the N threshold determination does not include increasing the pulse width.

8. The system of claim 1, wherein the one or more controllers are one or more point-of-use controllers on a power module having the power switch. 9 . The system of claim 1 , wherein the source terminal of the power switch is configured to connect to a negative terminal of the battery, and the drain terminal of the power switch is configured to connect to a phase terminal of the motor.

10. The system of claim 1, further comprising: the battery, the battery being configured to supply the DC power to the inverter; as well as The motor is configured to receive the AC power from the inverter to drive the motor.

11. A method comprising: detecting a temperature of a power switch, a rate of change in current of the power switch, and a filtered current of the power switch, and A pulse width of a gate control signal to a gate terminal of the power switch is controlled based on a detected temperature of the power switch, a detected rate of change in current of the power switch, and a detected filtered current of the power switch.

12. The method according to claim 11, further comprising: Performing an N-mean value determination, wherein the N-mean value determination comprises: applying N pulses having a first pulse width and period to the power switching element, During each cycle of the applied N pulses, storing a detected temperature of the power switch, a detected rate of change in current of the power switch, and a detected filtered current of the power switch, and An average of the N stored temperatures, an average of the N stored rates of change in current, and an average of the N stored filtered currents are determined.

13. The method according to claim 12, further comprising: Performing an N threshold determination, wherein the N threshold determination comprises: determining whether the average of the N stored temperatures is greater than a threshold temperature, whether the average of the N stored rates of change in current is greater than a threshold rate of change in current, and whether the average of the N stored filtered currents is greater than a threshold filtered current, and The pulse width of the gate control signal to the gate terminal is controlled based on the determination of the N threshold determination.

14. The method according to claim 13, further comprising: Performing an M-mean value determination, wherein the M-mean value determination comprises: repeating the N average value determination and the N threshold value determination for M cycles, storing, for each of the M cycles, the average of the N stored temperatures, the average of the N stored rates of change of currents, and the average of the N stored filtered currents, and An average of the M stored temperatures, an average of the M stored rates of change in current, and an average of the M stored filtered currents are determined.

15. The method according to claim 14, further comprising: Performing an M threshold determination, wherein the M threshold determination comprises: determining whether the average of the M stored temperatures is greater than the threshold temperature, whether the average of the M stored rates of change in current is greater than a threshold rate of change in current, and whether the average of the M stored filtered currents is greater than the threshold filtered current, and The pulse width of the gate control signal to the gate terminal is controlled based on the determination of the M threshold determination.

16. The method according to claim 15, further comprising: determining a voltage value of a bulk capacitor associated with the power switching element, and The M average value determination and the M threshold value determination are repeated when the determined voltage value is greater than the threshold discharge voltage value.

17. The method of claim 13, wherein controlling the pulse width of the gate control signal to the gate terminal based on the determination of the N threshold determination does not include increasing the pulse width.

18. A system comprising: A power module, the power module is for an inverter for an electric vehicle, the power module comprising: a power switch including a drain terminal, a source terminal, and a gate terminal; and One or more controllers, the one or more controllers being configured to: detecting a temperature of the power switch, a rate of change in current of the power switch, and a filtered current of the power switch, and A pulse width of a gate control signal to the gate terminal is controlled based on a detected temperature of the power switch, a detected rate of change in current of the power switch, and a detected filtered current of the power switch.

19. The system of claim 18, wherein the one or more controllers are configured to control the pulse width by increasing or decreasing the pulse width of the gate control signal to the gate terminal.

20. The system of claim 19, wherein the one or more controllers are configured to perform operations for decreasing the pulse width more frequently than operations for increasing the pulse width.

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