Coding and decoding method of concatenated codes and communication device

Abstract

The embodiment of the invention provides a concatenated code encoding and decoding method and a communication device, and the concatenated code takes a polarization code as an outer code, and takes an N-ER-LDPC code provided by the invention as an inner code. The invention provides a basis matrix of the E-NR-LDPC code and a lifting strategy of the basis matrix. According to the improvement strategy, the basis matrix is improved, the check matrix of the N-ER-LDPC code can be obtained, the check matrix has obvious external characteristics, and the requirement for rate compatibility can be met while the decoding performance is improved.

Description

Method for encoding and decoding concatenated codes and communication device

[0001] This application claims priority to Russian patent application No. 2022125446, filed with the Russian Patent Office on September 29, 2022, entitled “A Nested Concatenated Code Coding Scheme”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The embodiments of the present application relate to the field of channel coding, and more specifically, to a method for encoding and decoding a concatenated code and a communication device. Background Art

[0003] In the field of channel coding, concatenated codes can achieve higher coding gain and lower decoding latency. A concatenated coding strategy typically includes an inner code and an outer code. The inner code can be considered to create a better superchannel by "noising" the physical channel, making the channel conditions seen by the outer code better than the original physical channel.

[0004] Currently, there are many schemes for concatenating different codewords, such as concatenating polar codes and low-density parity check codes (LDPC), Reed-Solomon (RS) codes and polar codes, and polar codes and low-density generation matrices (LDGM). However, the decoding performance of these concatenated codes needs to be improved.

[0005] Summary of the Invention

[0006] The embodiments of the present application provide a method for encoding and decoding concatenated codes, which can improve the decoding performance of concatenated codes and meet the requirements of rate compatibility.

[0007] In a first aspect, a method for encoding a concatenated code is provided. The method includes: performing polar code encoding on a message bit sequence to be encoded to obtain a first encoded codeword of length N_o, where N_o is a positive integer; performing improved low-density parity check (LDPC) code encoding on a second encoded codeword to obtain a concatenated codeword of length N_i, where the second encoded codeword is determined based on the first encoded codeword, where N_i is a positive integer; and outputting the concatenated codeword. The method includes: first t columns of a basis matrix of the improved LDPC code are all-zero columns, where t is a positive integer, and 2≤t<T, where T is equal to the ratio of N_o to p, where p is a multiple by which the basis matrix needs to be expanded, and where p is a positive integer; and a parity check matrix of the improved LDPC code includes at least s columns with a column weight of 1, where the at least s columns include the last (N_i-N_o) columns, where s is a positive integer.

[0008] The second encoding codeword is the same as the first encoding codeword, or the second encoding codeword is obtained by interleaving the first encoding codeword.

[0009] In the embodiment of the present application, since the first t columns of the basis matrix of the improved LDPC code are all-zero columns, during the large iterative decoding process, the soft values ​​of the polar code outer code and the soft values ​​of the improved LDPC code do not exchange soft values ​​at the all-zero columns, and the partial update of the soft values ​​can improve the large iterative decoding performance.

[0010] In addition, since the column weight of the last (N_i-N_o) columns of the check matrix of the improved LDPC code is 1, the method provided in the embodiment of the present application has low coding complexity and can achieve rate compatibility.

[0011] In combination with the first aspect, in certain implementations of the first aspect, the size of the base matrix is ​​m rows and n columns, and the method also includes: constructing a row vector of size m and a column vector of size v, and any two elements in the row vector are different, any two elements in the column vector are different, the m, the n and the v are all positive integers, the m and the v are both less than or equal to p, v=n, or v=nt; obtaining a lifting matrix based on the row vector and the column vector; obtaining an updated base matrix based on the lifting matrix and the base matrix; and obtaining the check matrix of the improved LDPC code based on the updated base matrix.

[0012] In combination with the first aspect, in some implementations of the first aspect, obtaining the lifting matrix according to the row vector and the column vector includes: constructing the lifting matrix M(i, j)=r i c j modp, where the row vector C rows =(r1,r2,...,rm ), r i is the row vector C rows The i-th element in, 1≤i≤m, the column vector C cols =(c1,c2,...,c v ), c j For the column vector C cols The j-th element in , 1≤j≤v, mod is the remainder operation.

[0013] In combination with the first aspect, in some implementations of the first aspect, obtaining an updated basis matrix based on the lifting matrix and the basis matrix includes: if v=n, determining the updated basis matrix H m Expressed as: H m =H opt ⊙M; or, if v = nt, then determine the updated basis matrix H m Expressed as: H m =H opt2 ⊙M; where H opt is the basis matrix, the H opt2 is a matrix obtained by extracting non-zero columns in the base matrix, and M is the lifting matrix.

[0014] Among them, H opt ⊙M represents H opt and M. Hadamard, H. opt2 ⊙M represents H opt2 and the Hadamard product of M. The Hadamard product can also be called the fundamental product.

[0015] Based on the above technical solution, since the first t columns of the basis matrix are all zero columns, a column vector of dimension v=nt can be constructed, thereby reducing the computational complexity.

[0016] In combination with the first aspect, in certain implementations of the first aspect, the check matrix of the improved LDPC code is obtained based on the updated basis matrix, including: if v = n, then expanding the updated basis matrix p times to obtain the check matrix; or, if v = nt, then expanding the updated basis matrix p times to obtain an intermediate check matrix, and supplementing the intermediate check matrix with t*p columns of all-zero columns to obtain the check matrix.

[0017] In a second aspect, a method for decoding a concatenated code is provided. The method includes: obtaining a channel reception vector of length N_i, where N_i is the length of an inner code of the concatenated code, the inner code of the concatenated code is an improved LDPC code, the outer code of the concatenated code is a polar code, and N_i is a positive integer; using a soft input soft output (SISO) decoding algorithm of the improved LDPC code to decode the channel reception vector to obtain a first soft information sequence of length N_i, wherein the SISO decoding algorithm is related to a check matrix of the improved LDPC code; and based on a second soft information sequence, the channel reception vector, and a preset maximum number of iterations of the concatenated code, performing a soft cancellation list (Successive Cancellation List) of the polar code. A first soft information sequence (SCL) decoding algorithm and a second soft information sequence (SISO) decoding algorithm of the improved LDPC code are used to perform iterative decoding of soft information to obtain a third soft information sequence, where the second soft information sequence is determined based on the first soft information sequence; a hard decision is performed on the third soft information sequence to obtain a decoding estimation sequence; and the decoding estimation sequence is output; wherein the first t columns of the basis matrix of the improved LDPC code are all-zero columns, t is a positive integer, and 2≤t<T, T is equal to the ratio of N_o to p, p is a multiple by which the basis matrix needs to be expanded, and p is a positive integer; the check matrix of the improved LDPC code includes at least s columns with a column weight of 1, the at least s columns include the last (N_i-N_o) columns, and s is a positive integer.

[0018] The receiving end deinterleaves the first soft information sequence and reads the soft information at the first N_o positions from the deinterleaved first soft information sequence to obtain the second soft information sequence. Alternatively, the receiving end reads the soft information at the first N_o positions of the first soft information sequence to obtain the second soft information sequence.

[0019] For the concatenated code of the polar code and the improved LDPC code (also called N-ER-LDPC code) provided in this application, its decoding adopts soft information iterative decoding combining the soft SCL decoding algorithm and the SISO decoding algorithm, which can reduce the decoding complexity.

[0020] In combination with the second aspect, in certain implementations of the second aspect, the size of the base matrix is ​​m rows and n columns, and the method also includes: constructing a row vector of size m and a column vector of size v, and any two elements in the row vector are different, any two elements in the column vector are different, the m, the n and the v are all positive integers, the m and the v are both less than or equal to p, v=n, or v=nt; obtaining a lifting matrix based on the row vector and the column vector; obtaining an updated base matrix based on the lifting matrix and the base matrix; and obtaining the check matrix of the improved LDPC code based on the updated base matrix.

[0021] In combination with the second aspect, in some implementations of the second aspect, obtaining the lifting matrix according to the row vector and the column vector includes: constructing the lifting matrix M(i,j)=r i c j modp, where the row vector C rows =(r1,r2,...,r m ), r i is the row vector C rows The i-th element in, 1≤i≤m, the column vector C cols =(c1,c2,...,c v ), c j For the column vector C cols The j-th element in , 1≤j≤v, mod is the remainder operation.

[0022] In conjunction with the second aspect, in certain implementations of the second aspect, obtaining an updated basis matrix according to the lifting matrix and the basis matrix includes: if v=n, determining the updated basis matrix H m Expressed as: H m =H opt ⊙M; or, if v = nt, then determine the updated basis matrix H m Expressed as: H m =H opt2 ⊙M; where H opt is the basis matrix, the H opt2 is a matrix obtained by extracting the non-zero columns in the basis matrix, and M is the lifting matrix.

[0023] Among them, H opt ⊙M represents H opt and M. Hadamard, H. opt2 ⊙M represents H opt2 and the Hadamard product of M. The Hadamard product can also be called the fundamental product.

[0024] Based on the above technical solution, since the first t columns of the basis matrix are all zero columns, a column vector of dimension v=nt can be constructed, thereby reducing the computational complexity.

[0025] In combination with the second aspect, in certain implementations of the second aspect, the check matrix of the improved LDPC code is obtained based on the updated basis matrix, including: if v = n, then expanding the updated basis matrix p times to obtain the check matrix; or, if v = nt, then expanding the updated basis matrix p times to obtain an intermediate check matrix, and supplementing the intermediate check matrix with t*p columns of all-zero columns to obtain the check matrix.

[0026] In a third aspect, a method for decoding a concatenated code is provided, the method comprising: obtaining a channel reception vector of length N_i, where N_i is the length of an inner code of the concatenated code, the inner code of the concatenated code is an improved LDPC code, the outer code of the concatenated code is a polar code, and N_i is a positive integer; wherein the first t columns of a basis matrix of the improved LDPC code are all-zero columns, t is a positive integer, and 2≤t<T, T is equal to the ratio of N_o to p, p is a multiple by which the basis matrix needs to be expanded, and p is a positive integer; the check matrix of the improved LDPC code includes at least s columns with a column weight of 1, the at least s columns include the last (N_i-N_o) columns, and s is a positive integer; decoding the channel reception vector and outputting a decoding result.

[0027] In the embodiment of the present application, since the first t columns of the basis matrix of the improved LDPC code are all-zero columns, during the large iterative decoding process, the soft values ​​of the polar code outer code and the soft values ​​of the improved LDPC code do not exchange soft values ​​at the all-zero columns, and the partial update of the soft values ​​can improve the large iterative decoding performance.

[0028] In combination with the third aspect, in certain implementations of the third aspect, the size of the base matrix is ​​m rows and n columns, and the method also includes: constructing a row vector of size m and a column vector of size v, and any two elements in the row vector are different, any two elements in the column vector are different, the m, the n and the v are all positive integers, the m and the v are both less than or equal to p, v = n, or v = nt; obtaining a lifting matrix based on the row vector and the column vector; obtaining an updated base matrix based on the lifting matrix and the base matrix; and obtaining the check matrix of the improved LDPC code based on the updated base matrix.

[0029] In combination with the third aspect, in some implementations of the third aspect, obtaining the lifting matrix according to the row vector and the column vector includes: constructing the lifting matrix M(i,j)=r i c j modp, where the row vector C rows =(r1,r2,...,r m ), r i is the row vector C rows The i-th element in, 1≤i≤m, the column vector C cols =(c1,c2,...,c v ), c j For the column vector C cols The j-th element in , 1≤j≤v, mod is the remainder operation.

[0030] In conjunction with the third aspect, in certain implementations of the third aspect, obtaining an updated basis matrix based on the lifting matrix and the basis matrix includes: if v=n, determining the updated basis matrix H m Expressed as: H m =H opt ⊙M; or, if v = nt, then determine the updated basis matrix H m Expressed as: H m =H opt2 ⊙M; where H opt is the basis matrix, the H opt2 is a matrix obtained by extracting the non-zero columns in the basis matrix, and M is the lifting matrix.

[0031] Among them, H opt ⊙M represents H opt and M. Hadamard, H. opt2 ⊙M represents H opt2 and the Hadamard product of M. The Hadamard product can also be called the fundamental product.

[0032] Based on the above technical solution, since the first t columns of the basis matrix are all zero columns, a column vector of dimension v=nt can be constructed, thereby reducing the computational complexity.

[0033] In combination with the third aspect, in certain implementations of the third aspect, the check matrix of the improved LDPC code is obtained based on the updated basis matrix, including: if v = n, then expanding the updated basis matrix p times to obtain the check matrix; or, if v = nt, then expanding the updated basis matrix p times to obtain an intermediate check matrix, and supplementing the intermediate check matrix with t*p columns of all-zero columns to obtain the check matrix.

[0034] In a fourth aspect, a communication device is provided, wherein the communication device has the function of implementing the method of the first aspect or any possible implementation of the first aspect. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above-mentioned functions.

[0035] In a fifth aspect, a communication device is provided, wherein the communication device has the function of implementing the method in the second aspect or any possible implementation of the second aspect, or the communication device has the function of implementing the method in the third aspect or any possible implementation of the third aspect. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above functions.

[0036] In a sixth aspect, a communication device is provided, comprising a processor and a memory. Optionally, the device may further comprise a transceiver. The memory is configured to store a computer program, and the processor is configured to call and execute the computer program stored in the memory and control the transceiver to transmit and receive signals, so that the communication device performs the method according to the first aspect or any possible implementation of the first aspect.

[0037] In a seventh aspect, a communication device is provided, comprising a processor and a memory. Optionally, a transceiver is further included. The memory is used to store a computer program, and the processor is used to call and execute the computer program stored in the memory, and control the transceiver to transmit and receive signals, so that the communication device performs the method as described in the second aspect or any possible implementation of the second aspect, or the method as described in the third aspect or any possible implementation of the third aspect.

[0038] In an eighth aspect, a communication device is provided, comprising a processor and a communication interface, wherein the communication interface is used to receive data and / or information and transmit the received data and / or information to the processor, and the processor processes the data and / or information, and the communication interface is also used to output the data and / or information processed by the processor, so that the method in the first aspect, or any possible implementation of the first aspect, is executed.

[0039] In the ninth aspect, a communication device is provided, comprising a processor and a communication interface, wherein the processor processes data and / or information to be sent, and the communication interface is also used to output the data and / or information processed by the processor, so that the method in the second aspect, or any possible implementation of the second aspect, is executed, or so that the method in the third aspect, or any possible implementation of the third aspect, is executed.

[0040] In the tenth aspect, a computer-readable storage medium is provided, in which computer instructions are stored. When the computer instructions are executed on a computer, the method in the first aspect, or the second aspect, or the third aspect, or any possible implementation of these aspects is executed.

[0041] In the eleventh aspect, a computer program product is provided, which includes a computer program code, and when the computer program code is run on a computer, the method in the first aspect, or the second aspect, or the third aspect, or any possible implementation of any of these aspects is executed.

[0042] In the twelfth aspect, a communication system is provided, comprising the communication device as described in the fourth aspect, and / or the communication device as described in the fifth aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] FIG1 is a schematic diagram of the system architecture of a communication system applicable to the technical solution of the present application;

[0044] FIG2 is a schematic diagram of a communication system process;

[0045] FIG3 is a schematic diagram of concatenated coding;

[0046] FIG4 is a schematic diagram of a method for encoding and decoding concatenated codes provided in this application;

[0047] FIG5 is a schematic flow chart of a method for encoding and decoding concatenated codes provided in the present application;

[0048] FIG6 is a schematic diagram of the encoding process of the concatenated code provided in this application;

[0049] FIG7 is a schematic diagram of the encoding process of the transmitting end provided by this application;

[0050] FIG8 is a schematic diagram of a base graph of a base matrix provided in this application;

[0051] FIG9 is a schematic diagram illustrating the technical effect of the improved check matrix of the LDPC code provided in this application;

[0052] FIG10 is a schematic diagram of the decoding process of the receiving end provided by this application;

[0053] FIG11 is a schematic diagram of a soft information iterative decoding solution at a receiving end provided by this application;

[0054] FIG12 is a performance comparison between the solution provided by this application and the existing solution;

[0055] FIG13 is a schematic block diagram of a communication device provided by this application;

[0056] FIG14 is a schematic structural diagram of the communication device provided in this application. DETAILED DESCRIPTION

[0057] The technical solution in this application will be described below with reference to the accompanying drawings.

[0058] The technical solutions of the embodiments of the present application can be applied to various communication systems, including but not limited to: satellite communication systems, the 5th generation (5G) system or new radio (NR) system, long term evolution (LTE) system, LTE frequency division duplex (FDD) system, LTE time division duplex (TDD) system, etc. The technical solutions provided in the present application can also be applied to future communication systems, such as the sixth generation mobile communication system. In addition, it can also be applied to device to device (D2D) communication, vehicle-to-everything (V2X) communication, machine to machine (M2M) communication, machine type communication (MTC), and Internet of Things (IoT) communication system or other communication systems, etc., which are not limited in this article.

[0059] The communication system applicable to the present application may include one or more transmitting ends and one or more receiving ends. Optionally, one of the transmitting end and the receiving end may be a terminal device, and the other may be a network device. Alternatively, both the transmitting end and the receiving end may be terminal devices. The transmitting end may also be considered an encoding end or encoding device, and the receiving end may also be considered a decoding end or decoding device.

[0060] For example, a terminal device may also be referred to as user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, mobile terminal (MT), remote station, remote terminal, mobile device, user terminal, terminal, wireless communication device, user agent, or user apparatus. The terminal device in the embodiments of the present application may refer to a device that provides voice and / or data connectivity to a user and can be used to connect people, objects, and machines, such as a handheld device with wireless connection function, a vehicle-mounted device, etc. The terminal device in the embodiments of the present application can be a mobile phone, a tablet computer, a laptop computer, a PDA, a mobile internet device (MID), a wearable device, a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, a wireless terminal in a smart home, etc. Optionally, the UE can be used to act as a base station. For example, the UE can act as a scheduling entity that provides sidelink signals between UEs in V2X or D2D, etc.

[0061] In the embodiments of the present application, the device for implementing the function of the terminal can be the terminal, or it can be a device that can support the terminal to implement the function, such as a chip system or chip, which can be installed in the terminal. In the embodiments of the present application, the chip system can be composed of a chip, or it can include a chip and other discrete devices.

[0062] Exemplarily, the network device may be a device with wireless transceiver functions, and the network device may be a device that provides wireless communication function services, usually located on the network side, including but not limited to the next generation base station (gNodeB, gNB) in the fifth generation (5G) communication system, the base station in the sixth generation (6G) mobile communication system, the base station in the future mobile communication system or the access node in the wireless fidelity (Wi-Fi) system, the evolved node B (eNB) in the long term evolution (LTE) system, the radio network controller (RNC), the node B (NB), the base station controller (BSC), the home base station (for example, home evolved NodeB, or home Node B, HNB), the base band unit (BBU), the transmission reception point (TRP), the transmitting point (TP), the base transceiver station (BTS), etc. In a network structure, the network device may include a centralized unit (CU) node, or a distributed unit (DU) node, or a RAN device including a CU node and a DU node, or a RAN device including a control plane CU node and a user plane CU node, and a DU node, or the network device may also be a wireless controller, relay station, vehicle-mounted device, and wearable device in a cloud radio access network (CRAN) scenario. In addition, the base station may be a macro base station, a micro base station, a relay node, a donor node, or a combination thereof. The base station may also refer to a communication module, a modem, or a chip for being set in the aforementioned device or apparatus. The base station may also be a mobile switching center and a device that performs the base station function in D2D, V2X, and M2M communications, a network-side device in a 6G network, a device that performs the base station function in future communication systems, and the like. The base station can support networks with the same or different access technologies without limitation.

[0063] In the embodiments of the present application, the device for implementing the function of the network device can be the network device, or it can be a device that can support the network device to implement the function, such as a chip system or chip, which can be installed in the network device. In the embodiments of the present application, the chip system can be composed of a chip, or it can include a chip and other discrete devices.

[0064] It should be understood that the concatenated code encoding or decoding scheme provided in this application, i.e., the channel encoding and decoding scheme, can be used in dedicated network equipment or general-purpose equipment, can be applied to the various network devices described above (e.g., base station equipment), and can also be applied to the various terminal devices described above. Specifically, the channel encoding or channel decoding scheme is mainly implemented by the channel encoding unit or channel decoding unit in these devices.

[0065] In the embodiments of the present application, the functions of the transmitting end or the receiving end can be implemented by an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), etc., or by software (for example, program code in a memory), without limitation.

[0066] In addition, the technical solution of the present application can be applied to a variety of communication scenarios, as shown in Figure 1, which is a schematic diagram of the system architecture of a communication system applicable to the technical solution of the present application.

[0067] As shown in the example of Figure 1, the concatenated code encoding and decoding methods provided in this application can be applied to communications between network devices and terminals, that is, uplink or downlink communications. In this communication scenario, the transmitting end in this article can be a terminal in uplink communication or a network device in downlink communication, and the receiving end can be a network device in uplink communication or a terminal in downlink communication. In addition, the technical solution of this application can also be optionally applied to sidelink communication. In this communication scenario, the transmitting end is a transmitting terminal in sidelink communication, and the receiving end is a receiving terminal in sidelink communication. In addition, it can also be applied to other communication scenarios, which will not be described in detail.

[0068] Refer to Figure 2, which is a flow chart of the communication system. As shown in Figure 2, channel coding, located between source coding and modulation, is responsible for channel coding the bits generated by the source. After modulation, the modulated symbols are sent across a noisy channel to the receiver for demodulation and channel decoding. Channel decoding, located between demodulation and source decoding, is responsible for recovering the source bit stream.

[0069] The technical solution of the present application relates to polar codes (i.e., polar codes), low-density parity check codes (LDPC codes), and concatenated codes in the field of coding.

[0070] The following is a brief introduction to the terms or related concepts involved in this application.

[0071] 1. Polarization code:

[0072] Channel coding and decoding is one of the core technologies in the field of wireless communications. Improving its performance will directly enhance network coverage and user transmission rates. Currently, polar codes are a channel coding technology that can be theoretically proven to reach the Shannon limit and has practical linear complexity coding and decoding capabilities. Polar codes are linear block codes with a coding matrix (also called a generator matrix) of F N , the encoding process can be expressed as follows:

[0073] in, is a binary row vector (i.e., information bit sequence) with length N, where N=2 n , n is a positive integer. F N is an N×N matrix, Defined as log2 N The Kronecker product of the matrices F2, The addition and multiplication operations involved in the above formulas are all addition and multiplication operations on the binary Galois Field.

[0074] 2. Low-density parity check codes (LDPC): A type of linear block code with a sparse parity check matrix. This means the density of nonzero elements in the matrix is ​​relatively low, meaning the matrix must contain significantly more zeros than nonzeros. A [N, K] linear block code can be understood as encoding a K-length information sequence into a code of length N.

[0075] 3. Base Graph: The base graph can be represented as an m×n matrix, consisting of both zero and non-zero elements. Zero elements can be represented by 0, -1, or null, and non-zero elements can be represented by 1. The base graph can be used to indicate the positions of non-zero elements in the base matrix, that is, the row and column positions of the non-zero elements in the matrix. In some implementations, the base graph can also be simplified as a table indicating the row and column positions of the non-zero elements.

[0076] 4. Basis matrix: can be used to construct the check matrix H of LDPC code. Basis matrix H bThe size of can be m×n, the same as the base graph, and the size of the corresponding check matrix H is (m·p)×(n·p), where p is called the lifting size of the check matrix, or the multiple by which the base matrix needs to be expanded, and m, n, and p are all positive integers.

[0077] The expression of the basis matrix can be as follows, where the values ​​of the elements at positions corresponding to non-zero elements in the basis graph are greater than or equal to 0, and the values ​​of the elements at positions corresponding to zero elements can be -1 or null:

[0078] 5. Check matrix: The expression of the check matrix of LDPC code can be shown as follows:

[0079] Each element I(a i,j )(0≤i≤m-1,0≤j≤n-1) can be a zero matrix or a cyclic shift matrix. i,j Greater than or equal to 0, the cyclic shift matrix (for example, I(a i,j )) can be a cyclic shift a of the identity matrix of dimension p×p i,j Therefore, a i,j is called the shift factor of the cyclic shift matrix. i,j The value range can be -1≤a i,j <p.

[0080] In other words, every non-zero element a in the basis matrix i,j (0≤i≤m-1, 0≤j≤n-1) can be used to indicate the number of bits that need to be cyclically shifted in the corresponding unit matrix in the constructed check matrix. For example, a 0,0 The identity matrix I(a) with the dimension of p×p in the upper left corner of the check matrix can be used to indicate 0,0 )The number of bits that need to be cyclically shifted is a 0,0 If I(a 0,0 ) as a whole, I(a 0,0 ) in the check matrix and a 0,0 The positions in the basis matrix are the same, i.e., row 0 and column 0. The zero elements in the basis graph or basis matrix are replaced with a p×p zero matrix.

[0081] 6. Hadamard product: Hadamard product is a type of matrix operation.

[0082] set up And A={a ij}, B={b ij}, 1≤i≤m, 1≤j≤n, then the matrix C shown below is called the Hadamard product of the matrix A and the matrix B, and is denoted as C=A⊙B.

[0083] 7. Hamming distance: In a code group set, the number of positions where the codewords have different values ​​at corresponding positions between any two codewords is defined as the Hamming distance between the two codewords. For example, the Hamming distance between codewords x and y is d(x,y). i=0,1,…,n-1, where x and y are both n-bit codes, and n is a positive integer. Represents exclusive OR. For example, the Hamming distance between (00) and (01) is 1, and the Hamming distance between (110) and (101) is 2.

[0084] In a code group set, the minimum Hamming distance between any two codes is called the minimum Hamming distance of the code group, also known as the minimum Hamming weight. The larger the minimum Hamming distance, the stronger the code's anti-interference ability.

[0085] 8. Soft value: Also known as the log-likelihood ratio (LLR). The LLR for a codeword bit c is defined as log(probability of c = 0 / probability of c = 1). If the LLR for c is greater than 0, c is considered 0 in a hard decision. If the LLR for c is less than 0, c is considered 1 in a hard decision. This is the function of the sign of the LLR. The magnitude of the LLR also reflects the reliability of the hard decision. The larger the absolute value of the LLR, the more certain the hard decision.

[0086] 9. Cascade code:

[0087] When applying channel coding technology in practice, many practical factors must be considered, such as efficiency, performance, and latency. Channel coding theory shows that as the code length N increases, the probability of decoding errors exponentially approaches zero. Therefore, to improve the effectiveness of error-correcting codes, long codes must be used. However, as the code length increases, the code rate decreases, and the complexity and computational effort of the decoder also increase. Concatenated codes were proposed to address this contradiction. They divide the encoding process into several stages, meeting the code length requirements of channel error correction, achieving error correction capabilities and high coding gain close to or even equal to those of long codes. Furthermore, the resulting increase in encoding and decoding complexity is not significant. In other words, if a system includes multiple (at least two) encoding steps, these steps are considered concatenated coding. Concatenated coding includes outer code and inner code. The input of the outer code is the information bit sequence to be encoded, and the output of the outer code serves as the input of the inner code. The output of the inner code is the codeword after the concatenated coding process. It should be understood that the terms outer code and inner code are relative terms. For example, consider a system that includes three encoding passes. The first encoding pass is the outer code relative to the second, and the second encoding pass is the inner code relative to the first. After the first encoding is complete, the second encoding pass is the outer code relative to the third, and the third encoding pass is the inner code relative to the second. Another example involves a system that includes two encoding passes: the outer code is performed first, followed by the inner code. The output of the outer code serves as the input for the inner code.

[0088] Figure 3 illustrates concatenated coding. As shown in Figure 3, a concatenated coding strategy typically includes an inner code and an outer code. The inner code can be considered to create a better superchannel by "noising" the physical channel, allowing the outer code to see a better channel than the original physical channel. Previous studies have shown that concatenated codes can reduce the block error rate (BLER) at all bit rates below the channel capacity.

[0089] In this paper, the outer code and inner code of the concatenated code are represented by C out (N_o,K_o,D_o) and C in (N_i, K_i, D_i) is used to represent the concatenated code, and the concatenated code is identified by C(N, K, D), N = N_o*N_i, K = K_o*K_i, D ≥ D_o*D_i. Among them, the parameter N in the brackets represents the code length, K represents the number of message bits, and D represents the minimum Hamming distance of the code. In this application, it is not required that the inner and outer codewords are in the same algebraic domain. The inner code can be a binary domain, and the outer code can be other non-binary domains. In addition, if the inner code and the outer code are both linear codes, the codeword after concatenation is also a linear code.

[0090] Concatenated codes are typically decoded using iterative soft input soft output (SISO) decoding. This method, sometimes called turbo decoding, relies on using the soft output of the first decoder as the soft input of the second, and then the second decoder as the soft input of the first. This repetitive process ultimately produces a more reliable decision.

[0091] There are many ways to concatenate different codewords. According to the concatenation method, they can be roughly divided into serial concatenation code and parallel concatenation code. Currently, the concatenation code has the following schemes:

[0092] (1) Polar code + LDPC code serial cascade strategy.

[0093] (2) A parallel concatenated code (PCC) architecture is used to concatenate polar and LDPC codes.

[0094] (3) Cascade strategy of Reed-Solomon (RS) code + interleaver + polar code.

[0095] (4) Cascade strategy of polar code + low density generation matrix (LDGM).

[0096] By concatenating polar and rateless LDPC codes, polar codes can gain the advantage of flexible code length expansion offered by rateless LDPC codes, thereby improving their flexibility. The rateless structure allows for more flexible code length expansion in polar codes because of its nested nature. This nested structure ensures that the short code is always a subcode of the long code. As the code length increases, the previously encoded portion remains unchanged; simply adding redundant bits of additional length can extend the code length. However, the existing concatenated code design for polar codes and rateless LDPC codes is primarily based on density polarization theory. The Gaussian approximation and independence assumptions lead to errors in this optimization approach, resulting in a need for improved performance in the resulting concatenated code scheme.

[0097] In view of this, an embodiment of the present application provides an encoding and decoding scheme for a concatenated code of a polar code and an improved LDPC code, which further improves the decoding performance and construction flexibility of the concatenated code and meets the rate compatibility requirements.

[0098] The "improved LDPC code" provided in this application is different from the traditional LDPC code. Because the improved LDPC code can further reduce the bit error rate (BER) compared to the traditional LDPC code and meet the rate compatibility requirements, the improved LDPC code is also referred to as a nested error reducing LDPC (N-ER-LDPC) code in this application.

[0099] Figure 4 is a schematic diagram of a concatenated code encoding and decoding method provided by this application. As shown in Figure 4, at the transmitting end, the message bit sequence u to be encoded first passes through the polar code encoder to obtain the codeword c. After the codeword c is interleaved by the interleaver P, the input sequence P(c) of the N-ER-LDPC code encoder is obtained. P(c) is encoded by the N-ER-LDPC code to obtain the final concatenated codeword C_N-ER-LDPC(P(c)), which is sent to the channel for transmission.

[0100] At the receiving end, the receiver uses soft information iterative decoding.

[0101] The receiving end receives the channel reception vector y and then decodes the channel reception vector y using the soft information iterative decoding scheme for concatenated codes provided in this application. Based on a preset maximum number of iterations, the soft information iterative decoding is performed to obtain a soft information sequence output by a soft successive cancellation list (SCL) decoder. After hard decision making, the final decoded estimate sequence is obtained.

[0102] Specifically, the N-ER-LDPC decoder first decodes the sequence received from the channel (hereinafter referred to as the channel received sequence) to obtain soft information. This soft information serves as the input to the soft SCL decoder, which decodes it to produce soft values ​​of the decoded sequence. This soft information is then subtracted from the soft value to obtain extrinsic information. This extrinsic information is then added to the channel received sequence and input into the N-ER-LDPC decoder for decoding, generating new soft information. This new soft information is then subtracted from the input of the N-ER-LDPC decoder (the input of the N-ER-LDPC decoder is the sum of the extrinsic information and the channel received sequence) to obtain new extrinsic information. This new extrinsic information is then input into the soft SCL decoder for decoding, generating soft values ​​of the new decoded sequence. This process repeats until the maximum number of iterations is reached. A hard decision is then made on the soft values ​​of the decoded sequence generated by the soft SCL decoder to obtain the final estimated sequence.

[0103] It should be noted that after the message bit sequence u to be encoded obtains the codeword c through the polar code encoder, the codeword c can be directly encoded using the N-ER-LDPC code without undergoing interleaving, which is not limited in this embodiment of the present application. If the codeword c is not interleaved, the decoding process does not include deinterleaving.

[0104] The channel coding scheme at the transmitting end and the channel decoding scheme at the receiving end are described in detail below.

[0105] Referring to FIG. 5 , FIG. 5 is a schematic flow chart of a method 500 for encoding and decoding a concatenated code provided in the present application.

[0106] S510 , the transmitting end performs concatenation coding on the message bit sequence to be coded to obtain a concatenated code word.

[0107] For detailed description of S510 , please refer to the further description of FIG. 6 and FIG. 7 .

[0108] S520: The transmitting end sends a concatenated codeword.

[0109] The receiving end receives a channel receiving vector (or called a channel receiving sequence).

[0110] S530: The receiving end uses a soft information iterative decoding scheme to decode the channel reception vector to obtain a decoding estimation sequence.

[0111] The soft information iterative decoding scheme adopted in the present application is a soft information iterative decoding algorithm that combines a soft SCL decoding algorithm with a belief propagation (BP) decoding algorithm, and has low decoding complexity.

[0112] For detailed description of S530, please refer to the detailed description in FIG. 10 and FIG. 11 .

[0113] See Figure 6, which is a schematic diagram of a concatenated code encoding process provided by this application. As shown in Figure 6, the main process of the concatenated code at the sending end can be as follows:

[0114] (1) Given a concatenated code, the message bit sequence to be encoded is u = (u_1, u_2, ..., u_K), where K is a positive integer;

[0115] (2) Add r CRC check bits to the coded message bit sequence u to obtain a sequence of length K + r, where r is a positive integer;

[0116] (3) Polar code encoding is performed on the sequence of length K + r to obtain an inner code with a code length of N_o and a message number of K_o, that is, a polar code codeword C_o, where K_o = K + r and N_o is a positive integer;

[0117] (4) Interleave C_o to obtain the interleaved codeword P(C_o), where the length of the interleaver is N_o;

[0118] (5) Perform N-ER-LDPC encoding on the codeword P(C_o) to obtain a concatenated codeword with a message bit number of K_i and a length of N_i, where K_i = N_o and N_i is a positive integer.

[0119] It should be noted that the above interleaving of the polar code codeword Co_o is an optional step, that is, the polar code codeword Co_o can be directly N-ER-LDPC encoded without interleaving.

[0120] See Figure 7, which is a schematic diagram of the encoding process of the sending end provided by this application.

[0121] S710: The transmitting end performs polar code encoding on the message bit sequence to be encoded to obtain a first encoded codeword of length N_o.

[0122] The message bit sequence to be encoded may also be referred to as an information bit sequence.

[0123] It should be understood that after S710, the transmitting end completes the outer code encoding of the concatenated code, and the first encoded codeword can be called a polar codeword or an outer codeword.

[0124] Optionally, method 700 also includes S720.

[0125] S720: The transmitting end interleaves the first encoded codeword to obtain a second encoded codeword.

[0126] The interleaving in S720 includes outer interleaving and inner interleaving. The outer interleaving can be implemented by an outer interleaver, and the inner interleaving can be implemented by an inner interleaver.

[0127] Specifically, after outer interleaving, the labels corresponding to the R frozen bits of the first encoded codeword are mapped to R rows of the generator matrix of the improved LDPC code, where the row weight of the R rows is less than or equal to the row weight of the other rows of the generator matrix except the R rows. Furthermore, the labels corresponding to the I message bits of the first encoded codeword are mapped to I rows of the generator matrix of the improved LDPC code, where the row weight of the I rows is greater than or equal to the row weight of the other rows of the generator matrix except the I rows. Where R = N_o - K_o, and I = K_o. The number of non-zero elements contained in each column of the generator matrix of the improved LDPC code is called the column weight.

[0128] That is to say, if the row indices of the generator matrix constitute a set, and the row indices in the set are sorted in ascending order according to row weight, then the outer interleaving maps the labels corresponding to the R frozen bits of the first encoded codeword to the R rows corresponding to the first R row indices in the set, and maps the labels corresponding to the message bits of the first encoded codeword to the I rows corresponding to the last I row indices in the set.

[0129] For example, the set of labels corresponding to the frozen bits of the first encoding codeword is recorded as set F = {f1, f2, ..., f R}, the set F is sorted in natural order, where f1 has the minimum value, f R The set of labels corresponding to the message bits of the first coded codeword is recorded as set J = {j1, j2, ..., j I}; The row index (or row index) set of the generator matrix G of the improved LDPC code is recorded as set S = {j1, j2, ..., j N_o}, the row indices in set S are sorted from low to high according to row weight. Then, through outer interleaving, set F is mapped to the first R elements of set S, i.e., F->S[1:R], and set J is mapped to the last I elements of set S, i.e., J->S[(N_o-I+1):N_o].

[0130] The inner interleaving includes: interleaving the mapping relationship between the labels corresponding to the R frozen bits and the R rows, and interleaving the mapping relationship between the labels corresponding to the I message bit and the I row.

[0131] Optionally, the inner interleaving may be any of the following:

[0132] (a) Random interleaving;

[0133] (b) Quadratic interleaving: j->(a*j*(j-1) / 2 mod L)+1, where L is the inner interleaver length, a is any odd number, j=1,2,3,…,L. For example, a=3, L=8, the sequence [1 2 3 4 5 6 7 8] is quadratically interleaved to obtain the sequence [1 4 2 3 7 6 8 5];

[0134] (c) Cyclic interleaving: j->(b*j+r)mod L+1, where b is an integer relatively prime to L, L is the inner interleaver length, and r is an arbitrary integer. For example, r=6, b=7, and the sequence [1 2 3 4 5 6 7 8] is cyclically interleaved to obtain the sequence [6 5 4 3 2 1 8 7].

[0135] S730: The transmitting end performs improved LDPC code encoding on the second encoded codeword to obtain a concatenated codeword of length N_i.

[0136] It can be understood that if the method 700 performs S720, the second encoded codeword is obtained by interleaving the first encoded codeword. If the method 700 does not perform S720, the second encoded codeword is the same as the first encoded codeword.

[0137] The improved LDPC code is obtained according to the base matrix and the lifting matrix of the improved LDPC code.

[0138] The basis matrix of the improved LDPC code has at least one of the following characteristics:

[0139] (1) The first t columns are all-zero columns, t is a positive integer, and 2≤t<T, T is the ratio of N_o to p, that is, T=N_o / p, p is the multiple by which the base matrix needs to be expanded, and p can also be called the expansion factor. Both N_o and p are divisible by 2. For example, when t=2, the base diagram corresponding to the base matrix of the improved LDPC code is shown in Figure 8. It can be understood that the all-zero columns are conducive to ensuring the performance of cascade coding, the BER performance at the position corresponding to the all-zero columns will not change, the slope of the BER curve is flatter, and the corresponding signal-to-noise ratio (SNR) has a wider dynamic range. Figure 9 shows a schematic diagram of the BER performance of the improved LDPC code provided in an embodiment of the present application as an inner code. As shown in Figure 9, since the improved LDPC code has an all-zero column, the corresponding SNR range is wider when the BER is equal to 0.1.

[0140] (2) Include at least s' columns with a column weight of 1, where s' is a positive integer. At least s' columns include the last s" columns of the basis matrix, where s" is the ratio of the difference between N_i and N_o to p, that is, s" = (N_i - N_o) / p.

[0141] The check matrix of the improved LDPC code has at least one of the following characteristics:

[0142] (1) The parity check matrix of the improved LDPC code includes at least s columns with a column weight of 1, where s is a positive integer. At least s columns include the last (N_i-N_o) columns of the parity check matrix. It can be understood that the columns with a column weight of 1 correspond to the unit matrix in the parity check matrix of the improved LDPC code. This feature can ensure that the improved LDPC code has nested performance, and can enable the concatenated coding provided in the embodiment of the present application to meet the rate compatibility requirements.

[0143] (2) The difference between the number of columns and the number of rows of the parity-check matrix of the improved LDPC code is divisible by 2. It can be understood that the outer code of the improved LDPC code is a polar code with a mother code length, and the length of the polar code is a power of 2, that is, N_o is divisible by 2. Also, since the difference between the number of columns and the number of rows of the parity-check matrix of the improved LDPC code is N_o, the difference between the number of columns and the number of rows of the parity-check matrix of the improved LDPC code is divisible by 2.

[0144] (3) The column weight distribution of the parity-check matrix of the improved LDPC code satisfies Table 1.

[0145] Table 1

[0146] The base matrix of the improved LDPC code can be extended in code length through a special lifting method, and then the parity-check matrix of the improved LDPC code can be obtained. The following introduces the design of the lifting matrix and the steps to obtain the parity-check matrix of the improved LDPC code based on the lifting matrix and the base matrix of the improved LDPC code.

[0147] Assume that the base matrix of the LDPC code is a matrix with m rows and n columns, and it is required to extend the base matrix p times, that is, to obtain a parity-check matrix with a dimension equal to mp * np (m < n), where m and n are both positive integers. The steps to obtain the parity-check matrix of the improved LDPC code are as follows:

[0148] (1) Construct a row vector with a size of m and a column vector with a size of v, where any two elements in the row vector are different, and any two elements in the column vector are different. Both m and v are less than or equal to p, v is equal to n, or v = (n - t), where t is the number of all-zero columns in the base matrix of the LDPC code.

[0149] Exemplarily, the constructed row vector C rows can be expressed as: C rows = (r1, r2,..., r m ), where any two elements in C rows are not equal, that is, r i ≠ r i’ , and r i represents the i-th element in the row vector C rows , r i’ represents the i'-th element in the row vector C rows , 1 ≤ i ≤ m, 1 ≤ i' ≤ m, i ≠ i'.

[0150] The constructed column vector C cols can be expressed as: C cols = (c1, c2,..., c v ), and the column vector C colsAny two elements in are not equal, that is, c j’ ≠c j , c j’ is the column vector C cols The j'th element in c j is the column vector C cols The j-th element in , 1≤j≤v, 1≤j'≤v, j'≠j.

[0151] (2) According to the row vector and column vector, the lifting matrix is ​​obtained.

[0152] For example, based on the row vector and column vector, the constructed lifting matrix M can be expressed as: M(i,j)=r i *c j mod p, mod is the remainder operation, M(i,j) is the element in the i-th row and j-th column of the lifting matrix, r i *c j Represents r i with c j Multiply.

[0153] (3) According to the lifting matrix and the basis matrix, the updated basis matrix is ​​obtained.

[0154] If v = n, then according to the lifting matrix and the basis matrix, the updated basis matrix H is obtained m It can be expressed as: H m =H opt ⊙M, the element H in the updated basis matrix m (i,j) is equal to the element H in the basis matrix opt The product of (i,j) and the element M(i,j) in the lifting matrix. m (i, j) is the element in the i-th row and j-th column of the updated promotion matrix, H opt represents the basis matrix, H opt (i,j) is the element in row i and column j in the basis matrix. m Can be called H opt and the Hadamard product or fundamental product of M.

[0155] If v = nt, then the updated basis matrix is ​​obtained according to the lifting matrix and the basis matrix, including: extracting the basis matrix H opt The non-zero columns in the matrix H are obtained opt2 ; According to the matrix H opt2 And the improvement matrix M to get the updated basis matrix H m , the updated basis matrix H m It can be expressed as: H m =H opt2 ⊙M, the element H in the updated basis matrix m (i,j) is equal to the matrix Hopt2 The element H in opt2 The product of (i,j) and the element M(i,j) in the lifting matrix. opt2 (i,j) is the matrix H opt2 The element in row i and column j of H. m Can be called H opt2 and the Hadamard product or fundamental product of M.

[0156] (4) According to the updated basis matrix, the check matrix of the improved LDPC code is obtained.

[0157] If v=n, the check matrix of the improved LDPC code is obtained by expanding the updated base matrix by p times.

[0158] For example, the expression of the updated basis matrix can be as follows:

[0159] The expression of the check matrix of the improved LDPC code obtained by expanding the updated base matrix by p times can be shown as follows:

[0160] Each element I(a i,j )(1≤i≤m, 1≤j≤v) can be a zero matrix or a cyclic shift matrix. i,j Greater than or equal to 0, the cyclic shift matrix (for example, I(a i,j )) can be a cyclic shift a of the identity matrix of dimension p×p i,j Therefore, a i,j is called the shift factor of the cyclic shift matrix. i,j The value range can be -1≤a i,j <p.

[0161] If v=nt, then an improved LDPC code check matrix is ​​obtained according to the updated base matrix, including: expanding the updated base matrix by P times to obtain an intermediate check matrix; and supplementing t*p columns of all-zero columns before the first column of the intermediate check matrix to obtain the improved LDPC code check matrix.

[0162] According to the updated basis matrix, the expression of the improved LDPC code check matrix can be shown as follows:

[0163] The element I(0) in the check matrix H represents an all-zero matrix with a size of p rows and t*p columns.

[0164] According to the above description, in the solution provided by this application, for a base matrix of an improved LDPC code with a dimension of m*n, its corresponding lifting matrix has at least one of the following external characteristics:

[0165] (1) The lifting matrix can be obtained by multiplying the following two vectors:

[0166] C rows =(r1,…,r m ), where r i ≠r i' ;

[0167] C cols =(c1,…,c v ), where c j ≠c j' ;

[0168] (2) The dimensions of the two vectors are m and v, respectively, and any two elements in the vectors must not overlap. For example, select two random sets (difference sets) with dimensions 1*m and 1*v respectively;

[0169] (3) For any p>max(m,v), construct the lifting matrix M(i,j)=(r i *c j )mod p.

[0170] Referring to Figure 9, a schematic diagram of the technical effect of the lifting matrix provided by the present application is shown. In Figure 9, the simulation parameters are: N_i=1024, N_o=768, and the number of iterations of the sum-product algorithm is 50 times (sum-product-50). Among them, the proposed extension scheme (proposed extension) represents the BER performance of the N-ER-LDPC code obtained according to the lifting matrix provided by the present application, and the approximated cycle extrinsic message degres (ACE) extension scheme (ACE extension) represents the BER performance of the N-ER-LDPC code obtained according to the lifting matrix designed by the ACE algorithm. It can be seen that in the interval where BER is less than 0.1, the BER of the present application scheme is greater than the BER of the ACE scheme, which means a larger SNR dynamic range.

[0171] After obtaining the parity check matrix of the improved LDPC code, the second encoding codeword may be encoded according to the parity check matrix of the improved LDPC code, thereby obtaining a concatenated codeword of length N_i.

[0172] It should be noted that if the transmitting end has pre-stored the parity check matrix of the improved LDPC code determined according to the above method, the transmitting end can directly encode the second codeword according to the parity check matrix of the improved LDPC code. In other words, if the transmitting end has pre-stored the parity check matrix of the improved LDPC code determined according to the above method, the transmitting end does not need to determine the parity check matrix of the improved LDPC code according to the above method before encoding the second codeword.

[0173] S740: The transmitting end outputs a concatenated code word.

[0174] See FIG10 , which is a schematic diagram of the decoding process of the receiving end provided in this application.

[0175] S1010, the receiving end obtains the length N_ i The channel receiving vector.

[0176] Among them, N i is the length of the inner code of the concatenated code, the inner code of the concatenated code is the improved LDPC code, and the outer code of the concatenated code is the polar code (specifically the first encoding codeword mentioned above), N_ i Is a positive integer.

[0177] The step of decoding the channel reception vector at the receiving end may include S1020 to S1050.

[0178] S1020, the receiving end uses the improved SISO decoding algorithm of LDPC code to decode the channel receiving vector and obtain a length of N_ i The first soft information sequence.

[0179] It should be understood that the "soft information" or "soft value" in this application refers to LLR. For example, the length of the first soft information sequence is N_ i , which means that the first soft information sequence contains N_ i LLR, the N_ i The LLRs are obtained by decoding the channel received vector y using the improved SISO decoder of the LDPC code.

[0180] The number of iterations of the SISO decoder is recorded as inner_iter.

[0181] S1030: The receiving end deinterleaves the first soft information sequence to obtain a deinterleaved first soft information sequence, and extracts the soft information at the first N_o positions in the deinterleaved first soft information sequence to obtain a second soft information sequence, where N_o is the length of the outer code of the concatenated code and is a positive integer.

[0182] It should be understood that if the above-mentioned second encoding codeword is obtained after interleaving the first encoding codeword, then in S1030, the receiving end completes the deinterleaving of the first soft information sequence, and reads the soft information at the first N_o positions from the deinterleaved first soft information sequence to obtain the soft information sequence of the polar outer code, that is, to obtain the second soft information sequence.

[0183] If the second encoding codeword is the same as the first encoding codeword, then in S1030, the receiving end directly reads the soft information at the first N_o positions from the first soft information sequence to obtain the soft information sequence of the polar outer code, that is, obtains the second soft information sequence.

[0184] S1040: The receiving end performs iterative soft information decoding based on the second soft information sequence, the channel reception vector, and a preset maximum number of iterations of the concatenated code using a soft SCL decoding algorithm for polar codes and an improved SISO decoding algorithm for LDPC codes to obtain a third soft information sequence.

[0185] It can also be understood that the improved SISO decoding algorithm for LDPC codes is related to the improved check matrix for LDPC codes described in the above method 700. In other words, in S1040, the receiving end performs the improved SISO decoding algorithm for LDPC codes according to the improved check matrix for LDPC codes.

[0186] It should be noted that the manner in which the receiving end determines the parity check matrix of the improved LDPC code and the manner in which the transmitting end determines the parity check matrix of the improved LDPC code are specifically described in the above method 700.

[0187] It should also be noted that if the receiving end has pre-stored the parity check matrix of the improved LDPC code determined according to the method described in method 700, the receiving end can directly perform the SISO decoding algorithm for the improved LDPC code based on the parity check matrix of the improved LDPC code. In other words, if the receiving end has pre-stored the parity check matrix of the improved LDPC code determined according to the method described in method 700, the receiving end does not need to determine the parity check matrix of the improved LDPC code according to the method described in method 700 before performing the SISO decoding algorithm for the improved LDPC code.

[0188] In S1040, the receiving end adopts the soft information iterative decoding of the present application. After reaching a preset maximum number of iterations max_Iter through iterative decoding, the soft SCL decoder outputs a third soft information sequence, which is a soft value sequence of the decoding sequence.

[0189] Specifically, taking any two adjacent iterative processes as an example, the process of iterative decoding of the soft information is as follows:

[0190] By performing soft information iterative decoding (j - 1) times, the (j - 1)-th soft information sequence output by the soft SCL decoding algorithm is obtained;

[0191] Subtract the (j - 1)-th soft information sequence from the soft information sequence input to the soft SCL decoding algorithm during the (j - 1)-th soft information iterative decoding process to obtain the j-th extrinsic information of the SISO decoding algorithm;

[0192] Take the sum of the j-th extrinsic information and the channel received vector as the input to the SISO decoding algorithm during the j-th soft information iterative decoding process, and obtain the output of the SISO decoding algorithm during the j-th soft information iterative process;

[0193] Subtract the sum of the j-th extrinsic information and the channel received vector from the output of the SISO decoding algorithm during the j-th soft information iterative process to obtain the j-th soft information sequence of the soft SCL decoding algorithm,

[0194] where the j-th soft information sequence of the soft SCL decoding algorithm is the soft information sequence output by the soft SCL decoding algorithm during the j-th soft information iterative process,

[0195] The j-th extrinsic information of the SISO decoding algorithm is the extrinsic information input to the SISO decoding algorithm during the j-th soft information iterative process,

[0196] s The second soft information sequence is the soft information sequence input to the soft SCL decoding algorithm during the first soft information iterative process, and the third soft information sequence is the soft information sequence output by the soft SCL decoding algorithm during the last soft information iterative process,

[0197] 1 < j ≤ max_Iter, and j is a positive integer.

[0198] S1050, the receiving end performs hard decision on the third soft information sequence to obtain a decoded estimation sequence.

[0199] S1060, the receiving end outputs the decoded estimation sequence.

[0200] The following details the process of the receiving end performing soft information iterative decoding in conjunction with FIG. 11.

[0201] FIG. 11 is a schematic diagram of the soft information iterative decoding scheme of the receiving end provided by the present application.

[0202] As shown in FIG. 11, the process of the receiving end performing soft information iterative decoding is as follows:

[0203] (1) The channel received vector y = (y_1, y_2,..., y_N) i) is first sent to the SISO decoder of N-ER-LDPC for decoding. The number of iterations of the SISO decoder is inner-iter, and the length of the output decoded soft message is N_i, which is recorded as the sequence d=(d_1,d_2,…,d_N i ).

[0204] (2) Find the deinterleaver corresponding to the encoding side interleaver P, which is P_inv.

[0205] (3) Extract the first N_o values ​​of the decoded sequence d of length N_i to obtain the soft information sequence L_polar=P_inv(L N-ER-LDPC_No =(L_1,L_2,…,L_ No It should be noted that the first N_o values ​​of the sequence d of length N_i include the values ​​corresponding to the all-zero columns in the parity check matrix of the N-ER-LDPC code. The soft information of the polar code codeword bits corresponding to the all-zero columns will not be updated during the large iterative decoding process.

[0206] (4) Execute the following loop:

[0207] for i=1:max_Iter

[0208] (a)[L_out,L_code]=soft_SCL(L_polar,List):

[0209] The polar code is decoded using the soft_SCL decoder, producing two outputs, L_out and L_code. L_out is the soft value of the message on the U-side of the polar code, and L_code is the soft value of the codeword on the C-side of the polar code. The UE-side of the polar code represents the message side of the polar code, and the soft value of the message on the U-side of the polar code refers to the soft value corresponding to the message sequence before polar code encoding. The message sequence before polar code encoding includes message bits and frozen bits. The C-side of the polar code represents the codeword side of the polar code, and the soft value of the codeword on the C-side of the polar code refers to the soft value corresponding to the codeword obtained after polar code encoding.

[0210] The soft_SCL decoder has two inputs, L_polar and List, where L_polar is the soft information sequence of the polar outer code described in step (3), L_polar is the soft input LLR value of the polar code soft_SCL decoder, and List is the size of the decoding list, which is a power of 2, such as 1, 2, 4, 8, 16, 32, etc.

[0211] (b) Calculate the extrinsic information (soft values) sent to the N-ER-LDPC decoder. The length of this extrinsic information is equal to the length of the channel received vector, also N_i bits. N_i - N_o non-systematic bits are 0, and the values ​​of N_o positions are equal to (P(L_code) - L_polar). That is, the N_o non-zero elements are equal to the result of subtracting the first input of the soft_SCL decoder from the second output (after interleaving). The vector of this extrinsic information is denoted as E = [P(L_code) - L_polar; 0000 ... 0 (a total of N_i - N_o zeros)].

[0212] (c) SISO decoding is performed again on N-ER-LDPC. This time, the input of the SISO decoder is the channel reception vector y=(y_1,y_2,…,y_N i ), the extrinsic information vector E obtained in step (b) needs to be added, that is, the input L_d of the SISO decoder is expressed as: L_d = soft LDPC decode(y+E,inner_iter).

[0213] (d) Extract the soft values ​​at the first N_o positions of the N-ER-LDPC, and then subtract them from the input of the N-ER-LDPC decoder to generate the input for the next round of soft SCL decoding of the polar.

[0214] In summary, the soft information iterative decoding process involves two decoders, namely a soft SCL decoder for polar codes (ie, outer codes of concatenated codes) and a decoder for N-ER-LDPC codes (ie, inner codes of concatenated codes).

[0215] It should be noted that the deinterleaving step in the above decoding process is an optional step. If the encoding process does not include the interleaving step, the decoding process does not include the deinterleaving step.

[0216] In an embodiment of the present application, since the first t columns of the basis matrix of the improved LDPC code are all-zero columns, the method provided in the embodiment of the present application does not exchange soft values ​​of the polar outer code and the soft values ​​of the improved LDPC code at the all-zero columns during large iterative decoding, and the partial update of the soft values ​​can improve the large iterative decoding performance.

[0217] In addition, since the column weight of the last (N_i-N_o) columns of the check matrix of the improved LDPC code is 1, the method provided in the embodiment of the present application has low coding complexity and can achieve rate compatibility.

[0218] In order to verify the beneficial effects of the improved LDPC code, the encoding and decoding method of the concatenated code provided in the embodiment of the present application and the performance of the NR LDPC code are tested and compared when the simulation channel is an additive white Gaussian noise (AWG) channel and the modulation mode is binary phase shift key (BPSK). In the method provided in the embodiment of the present application, the outer code encoding scheme is a polar code cascaded with a 2-bit CRC, and the polar code is constructed in a density evolution manner. The polar outer code decoder in the decoder is a soft SCL decoding with a list length of 4, the inner code decoder adopts BP decoding with 10 iterations, the first 2p columns of the check matrix of the improved LDPC code are punctured, and the maximum number of iterations of the concatenated code decoding is 10 times. As a comparison, the performance of the NR LDPC code under BP decoding with 50 and 100 iterations is tested.

[0219] The simulation parameters of the concatenated code provided in the embodiment of the present application are shown in Table 2. LDPC is the number of rows of the improved LDPC check matrix, n LDPC is the number of columns of the improved LDPC check matrix, p is the lifting size, PN is the puncturing position of the improved LDPC code, R N-ER-LDPC is the code rate of the inner code, K LDPC is the number of message bits of the inner code, R polar is the code rate of the Polar outer code (i.e. K polar / K LDPC ), CRC is the length of the outer code CRC, K polar is the length of the payload message bit of the Polar outer code (excluding CRC), N CC is the code length of the overall concatenated code, R CC is the code rate of the overall concatenated code.

[0220] Table 2

[0221] The simulation parameters of NR LDPC code are shown in Table 3. Among them, K NR-LDPC is the number of message bits of the NR LDPC code, R NR-LDPC is the code rate of the NR LDPC code.

[0222] Table 3

[0223] The performance comparison of the concatenated code provided by the embodiment of this application and the performance of the NR LDPC code is shown in Figure 12. The horizontal axis represents the number of message bits, and the vertical axis represents the SNR required to achieve a bit error rate of 0.01. The smaller the SNR required to achieve a bit error rate of 0.01, the better the error correction performance of the codeword. As can be seen from Figure 12, the scheme proposed in this application can meet the rate compatibility requirements and has superior error correction performance compared to existing NR LDPC codes at different code lengths and code rates.

[0224] The above describes the concatenated code encoding and decoding method provided by the present application. The following describes the communication device provided by the present application.

[0225] 13 , which is a schematic block diagram of a communication device provided in this application. As shown in FIG13 , the communication device 1300 includes a processing unit 1310 and a transceiver unit 1320 .

[0226] Optionally, the communication device 1300 may correspond to the transmitting end in the embodiment of the method of the present application. In this case, each unit of the communication device 1300 is used to implement the following functions:

[0227] Processing unit 1310 is configured to: perform polarization coding on a message bit sequence to be coded to obtain a first coded codeword of length N_o, where N_o is a positive integer; perform improved LDPC code coding on a second coded codeword to obtain a concatenated codeword of length N_i, where the second coded codeword is determined based on the first coded codeword, where N_i is a positive integer; wherein the first t columns of a basis matrix of the improved LDPC code are all-zero columns, where t is a positive integer, and 2≤t<T, where T is equal to a ratio of N_o to p, where p is a multiple by which the basis matrix needs to be expanded, and p is a positive integer; and the parity check matrix of the improved LDPC code includes at least s columns having a column weight of 1, where the at least s columns include the last (N_i-N_o) columns.

[0228] The transceiver unit 1320 is configured to output the concatenated code word.

[0229] Optionally, the communication device 1300 may correspond to the receiving end in the embodiment of the method of the present application. In this case, each unit of the communication device 1300 is used to implement the following functions:

[0230] The transceiver unit 1320 is configured to obtain a channel reception vector of length N_i, where N_i is the length of an inner code of a concatenated code, the inner code of the concatenated code is a modified LDPC code, the outer code of the concatenated code is a polar code, and N_i is a positive integer.

[0231] The processing unit 1310 is configured to decode the channel received vector using an improved SISO decoding algorithm of an LDPC code to obtain a length of N_ ia first soft information sequence, the SISO decoding algorithm being related to a parity check matrix of the improved LDPC code; wherein the first t columns of the basis matrix of the improved LDPC code are all-zero columns, t is a positive integer, and 2≤t<T, T is equal to the ratio of N_o to p, p is a multiple by which the basis matrix needs to be expanded, and p is a positive integer; the parity check matrix of the improved LDPC code includes at least s columns with a column weight of 1, and the at least s columns include the last (N_i-N_o) columns; based on the second soft information sequence, the channel reception vector, and a preset maximum number of iterations of the concatenated code, soft information iterative decoding is performed using the soft SCL decoding algorithm of the polar code and the SISO decoding algorithm of the improved LDPC code to obtain a third soft information sequence, where the second soft information sequence is determined based on the first soft information sequence; and hard decision is performed on the third soft information sequence to obtain an estimated sequence.

[0232] The transceiver unit 1320 is configured to output the estimated sequence.

[0233] In various embodiments where the communication device 1300 corresponds to a transmitting end, the processing unit 1310 is configured to perform processing and / or operations implemented internally by the transmitting end in addition to the sending and receiving operations. The transceiver unit 1320 is configured to perform receiving (or inputting) operations of the transmitting end and / or to perform sending (or outputting) operations of the transmitting end.

[0234] For example, in FIG5 , the processing unit 1310 is configured to execute S510 , and the transceiver unit 1320 is configured to execute S520 .

[0235] For another example, in FIG7 , the processing unit 1310 is configured to execute S710 - S730 , and the transceiver unit 1320 is configured to execute S740 .

[0236] In various embodiments where the communication device 1300 corresponds to a receiving end, the processing unit 1310 is configured to perform processing and / or operations implemented within the receiving end in addition to the sending and receiving operations. The transceiver unit 1320 is configured to perform receiving (or inputting) operations at the receiving end and / or to perform sending (or outputting) operations at the receiving end.

[0237] For example, in FIG5 , the processing unit 1310 is configured to execute S530 .

[0238] For another example, in FIG10 , the transceiver unit 1320 is used to execute S1010 , the processing unit 1320 is used to execute S1020 - S1050 , and the transceiver unit 1320 is used to execute S1060 .

[0239] Referring to Figure 14 , which is a schematic structural diagram of a communication device provided herein, communication device 1400 includes one or more processors 1410, one or more memories 1420, and one or more communication interfaces 1430. Processor 1410 is configured to control communication interface 1430 to transmit and receive signals, and memory 1420 is configured to store a computer program. Processor 1410 is configured to retrieve and execute the computer program from memory 1420, so that communication device 1400 performs the processing performed by the transmitting end or the receiving end in each method embodiment of the present invention.

[0240] For example, the processor 1410 may have the functionality of the processing unit 1310 shown in Figure 13, and the communication interface 1430 may have the functionality of the transceiver unit 1320 shown in Figure 13. Specifically, the processor 1410 may be configured to execute a process or operation executed internally by the communication device, and the communication interface 1430 may be configured to execute the sending and / or receiving operations of the communication device.

[0241] In FIG14 , the dotted box behind a device (eg, a processor, a memory, or a communication interface) indicates that there may be more than one device.

[0242] Optionally, the memory and processor in the above-mentioned device embodiments may be physically independent units, or the memory and the processor may be integrated together, which is not limited herein.

[0243] In addition, the present application also provides a computer-readable storage medium, which stores computer instructions. When the computer instructions are executed on a computer, the operations and / or processing performed by the sending end in each method embodiment of the present application are executed.

[0244] The present application also provides a computer-readable storage medium, in which computer instructions are stored. When the computer instructions are executed on a computer, the operations and / or processing performed by the receiving end in each method embodiment of the present application are executed.

[0245] In addition, the present application also provides a computer program product, which includes computer program code or instructions. When the computer program code or instructions are run on a computer, the operations and / or processing performed by the sending end in each method embodiment of the present application are executed.

[0246] The present application also provides a computer program product, which includes computer program code or instructions. When the computer program code or instructions are run on a computer, the operations and / or processing performed by the receiving end in the various method embodiments of the present application are executed.

[0247] In addition, the present application also provides a chip, which includes a processor, a memory for storing computer programs is set independently of the chip, and the processor is used to execute the computer program stored in the memory, so that the device equipped with the chip performs the operations and / or processing performed by the sending end in any method embodiment.

[0248] Furthermore, the chip may further include a communication interface. The communication interface may be an input / output interface, or an interface circuit, etc. Furthermore, the chip may further include the memory.

[0249] The present application also provides a chip, which includes a processor, a memory for storing computer programs that is set independently of the chip, and the processor is used to execute the computer program stored in the memory, so that a device equipped with the chip performs the operations and / or processing performed by the receiving end in any one of the method embodiments.

[0250] Furthermore, the chip may further include a communication interface. The communication interface may be an input / output interface, or an interface circuit, etc. Furthermore, the chip may further include the memory.

[0251] Optionally, the processor may be one or more, the memory may be one or more, or the memory may be one or more.

[0252] In addition, the present application also provides a communication device (for example, a chip or a chip system), including a processor and a communication interface, wherein according to the operations and / or processing performed by the transmitting end in any of the aforementioned method embodiments, the communication interface is used to receive (or be referred to as input) message bits to be encoded, and the processor encodes the message bits to be encoded. Optionally, the communication interface is also used to send (or be referred to as output) data and / or information processed by the processor, for example, sending a concatenated codeword.

[0253] The present application also provides a communication device (e.g., a chip or a chip system) comprising a processor and a communication interface. The communication interface is configured to receive (or input) a channel reception vector, and the processor is configured to decode the channel reception vector, according to the operations and / or processing performed by a receiving end in any of the aforementioned method embodiments. Optionally, the communication interface is further configured to transmit (or output) a decoded estimate sequence.

[0254] In addition, the present application also provides a communication device, comprising at least one processor, wherein the at least one processor is coupled to at least one memory, and the at least one processor is used to execute a computer program or instruction stored in the at least one memory, so that the communication device performs the operations and / or processing performed by the sending end in any one method embodiment.

[0255] The present application also provides a communication device, comprising at least one processor, wherein the at least one processor is coupled to at least one memory, and the at least one processor is used to execute a computer program or instruction stored in the at least one memory, so that the communication device performs the operations and / or processing performed by the receiving end in any one of the method embodiments.

[0256] In addition, the present application also provides a communication system, including a transmitting end and a receiving end in the method embodiment of the present application.

[0257] The memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DRRAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0258] The methods provided in the above embodiments can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, they can be implemented in whole or in part in the form of a computer program product. The computer program product may include one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media integrated therein.

[0259] To facilitate a clear description of the technical solutions of the embodiments of the present application, in the embodiments of the present application, numbers such as "first" and "second" are used to distinguish between identical or similar items with substantially the same functions and effects. For example, the first information and the second information are merely used to distinguish different information and do not limit the order in which they are sent / received. Those skilled in the art will understand that numbers such as "first" and "second" do not limit the quantity or execution order, and words such as "first" and "second" do not necessarily mean that they are different.

[0260] In the embodiments of the present application, "message bit" and "information bit" are sometimes used interchangeably. For example, the message bit of the polar outer code can also be expressed as the information bit of the polar outer code. o It is also possible to use N_i and N i There are some other similar substitution expressions in the article, which will not be listed here.

[0261] In the embodiments of this application, "at least one" refers to one or more, and "more" refers to two or more. "And / or" describes the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can mean: A exists alone, A and B exist simultaneously, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects are in an "or" relationship.

[0262] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0263] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0264] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0265] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0266] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0267] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0268] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0269] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A method for encoding a concatenated code, characterized in that: include: Perform polar code encoding on the message bit sequence to be encoded to obtain a first encoded codeword of length N_o, where N_o is a positive integer; Performing improved low-density parity check (LDPC) code encoding on a second encoding codeword to obtain a concatenated codeword of length N_i, where the second encoding codeword is determined based on the first encoding codeword, and N_i is a positive integer; outputting the concatenated code word; The first t columns of the base matrix of the improved LDPC code are all-zero columns, t is a positive integer, and 2≤t<T, T is equal to the ratio of N_o to p, p is the multiple by which the base matrix needs to be expanded, and p is a positive integer; The parity check matrix of the improved LDPC code includes at least s columns with a column weight of 1, the at least s columns include the last (N_i-N_o) columns, and s is a positive integer.

2. The method according to claim 1, characterized in that The size of the base matrix is ​​m rows and n columns, and the method further includes: Constructing a row vector of size m and a column vector of size v, wherein any two elements in the row vector are different, any two elements in the column vector are different, m, n, and v are all positive integers, m and v are both less than or equal to p, v=n, or v=nt; Obtaining a lifting matrix according to the row vector and the column vector; Obtaining an updated basis matrix according to the lifting matrix and the basis matrix; A check matrix of the improved LDPC code is obtained according to the updated base matrix.

3. The method according to claim 2, characterized in that Obtaining the lifting matrix according to the row vector and the column vector includes: Construct the lifting matrix M(i,j)=r i c j mod p, Among them, the row vector C rows =(r1,r2,...,r m ), r i is the row vector C rows The i-th element in, 1≤i≤m, the column vector C cols =(c1,c2,...,c v ), c j is the column vector C cols The j-th element in , 1≤j≤v, mod is the remainder operation.

4. The method according to claim 2 or 3, characterized in that The step of obtaining an updated basis matrix according to the lifting matrix and the basis matrix includes: If v=n, then determine the updated basis matrix H m Expressed as: H m =H opt ⊙M; or, If v=nt, then determine the updated basis matrix H m Expressed as: H m =H opt2 ⊙M; Among them, the H opt is the basis matrix, the H opt2 is a matrix obtained by extracting non-zero columns in the base matrix, and M is the lifting matrix.

5. The method according to any one of claims 2 to 4, characterized in that The step of obtaining the improved LDPC code check matrix according to the updated base matrix includes: If v=n, then the updated base matrix is ​​expanded p-fold to obtain the check matrix; or, If v=nt, the updated base matrix is ​​expanded p times to obtain an intermediate check matrix, and the intermediate check matrix is ​​supplemented with t*p columns of all-zero columns to obtain the check matrix.

6. A method for decoding a concatenated code, characterized in that: include: Obtain a channel reception vector of length N_i, where N_i is the length of an inner code of a concatenated code, the inner code of the concatenated code is a modified low-density parity check (LDPC) code, the outer code of the concatenated code is a polar code, and N_i is a positive integer; The first t columns of the base matrix of the improved LDPC code are all-zero columns, t is a positive integer, and 2≤t<T, T is equal to the ratio of N_o to p, p is the multiple by which the base matrix needs to be expanded, and p is a positive integer; The improved LDPC code check matrix includes at least s columns with a column weight of 1, the at least s columns include the last (N_i-N_o) columns, and s is a positive integer; Decode the channel reception vector and output a decoding result.

7. The method according to claim 6, characterized in that The size of the base matrix is ​​m rows and n columns, and the method further includes: Construct a row vector of size m and a column vector of size v, and any two elements in the row vector are different, any two elements in the column vector are different, m, n and v are all positive integers, and m and v are both less than or equal to Said p, v = n, or, v = nt; Obtaining a lifting matrix according to the row vector and the column vector; Obtaining an updated basis matrix according to the lifting matrix and the basis matrix; A check matrix of the improved LDPC code is obtained according to the updated base matrix.

8. The method according to claim 7, characterized in that Obtaining the lifting matrix according to the row vector and the column vector includes: Construct the lifting matrix M(i,j)=r i c j mod p, Among them, the row vector C rows =(r1,r2,...,r m ), r i is the row vector C rows The i-th element in, 1≤i≤m, the column vector C cols =(c1,c2,...,c v ), c j is the column vector C cols The j-th element in , 1≤j≤v, mod is the remainder operation.

9. The method according to claim 7 or 8, characterized in that The step of obtaining an updated basis matrix according to the lifting matrix and the basis matrix includes: If v=n, then determine the updated basis matrix H m Expressed as: H m =H opt ⊙M; or, If v=nt, then determine the updated basis matrix H m Expressed as: H m =H opt2 ⊙M; Among them, the H opt is the basis matrix, the H opt2 is a matrix obtained by extracting non-zero columns in the base matrix, and M is the lifting matrix.

10. The method according to any one of claims 7 to 9, characterized in that The step of obtaining the improved LDPC code check matrix according to the updated base matrix includes: If v=n, then the updated base matrix is ​​expanded p-fold to obtain the check matrix; or, If v=nt, the updated base matrix is ​​expanded p times to obtain an intermediate check matrix, and the intermediate check matrix is ​​supplemented with t*p columns of all-zero columns to obtain the check matrix.

11. A communication device, characterized in that: include: A processing unit for: Perform polar code encoding on the message bit sequence to be encoded to obtain a first encoded codeword of length N_o, where N_o is a positive integer; Performing improved low-density parity check (LDPC) code encoding on a second encoding codeword to obtain a concatenated codeword of length N_i, where the second encoding codeword is determined based on the first encoding codeword, and N_i is a positive integer; a transceiver unit, configured to output the concatenated codeword; The first t columns of the base matrix of the improved LDPC code are all-zero columns, t is a positive integer, and 2≤t<T, T is equal to the ratio of N_o to p, p is the multiple by which the base matrix needs to be expanded, and p is a positive integer; The parity check matrix of the improved LDPC code includes at least s columns with a column weight of 1, the at least s columns include the last (N_i-N_o) columns, and s is a positive integer.

12. The communication device according to claim 11, wherein: The size of the base matrix is ​​m rows and n columns, and the processing unit is further used for: Constructing a row vector of size m and a column vector of size v, wherein any two elements in the row vector are different, any two elements in the column vector are different, m, n, and v are all positive integers, m and v are both less than or equal to p, v=n, or v=nt; Obtaining a lifting matrix according to the row vector and the column vector; Obtaining an updated basis matrix according to the lifting matrix and the basis matrix; A check matrix of the improved LDPC code is obtained according to the updated base matrix.

13. The communication device according to claim 12, wherein: The processing unit is specifically configured to: Construct the lifting matrix M(i,j)=r i c j mod p, Among them, the row vector C rows =(r1,r2,...,r m ), r i is the row vector C rows The i-th element in, 1≤i≤m, the column vector C cols =(c1,c2,...,c v ), c j is the column vector C cols The j-th element in , 1≤j≤v, mod is the remainder operation.

14. The communication device according to claim 12 or 13, characterized in that: The processing unit is specifically configured to: If v=n, then determine the updated basis matrix H m Expressed as: H m =H opt ⊙M; or, If v=nt, then determine the updated basis matrix H m Expressed as: H m =H opt2 ⊙M; Among them, the H opt is the basis matrix, the H opt2 is a matrix obtained by extracting non-zero columns in the base matrix, and M is the lifting matrix.

15. The communication device according to any one of claims 12 to 14, characterized in that: The processing unit is specifically configured to: If v=n, then the updated base matrix is ​​expanded p-fold to obtain the check matrix; or, If v=nt, the updated base matrix is ​​expanded p times to obtain an intermediate check matrix, and the intermediate check matrix is ​​supplemented with t*p columns of all-zero columns to obtain the check matrix.

16. A communication device, characterized in that: include: a transceiver unit, configured to obtain a channel reception vector of length N_i, where N_i is the length of an inner code of a concatenated code, the inner code of the concatenated code is a modified low-density parity check (LDPC) code, the outer code of the concatenated code is a polar code, and N_i is a positive integer; The first t columns of the base matrix of the improved LDPC code are all-zero columns, t is a positive integer, and 2≤t<T, T is equal to the ratio of N_o to p, p is the multiple by which the base matrix needs to be expanded, and p is a positive integer; The improved LDPC code check matrix includes at least s columns with a column weight of 1, the at least s columns include the last (N_i-N_o) columns, and s is a positive integer; a processing unit, configured to decode the channel reception vector; The transceiver unit is further configured to output a decoding result.

17. The communication device according to claim 16, wherein: The size of the base matrix is ​​m rows and n columns, and the processing unit is further used for: Constructing a row vector of size m and a column vector of size v, wherein any two elements in the row vector are different, any two elements in the column vector are different, m, n, and v are all positive integers, m and v are both less than or equal to p, v=n, or v=nt; Obtaining a lifting matrix according to the row vector and the column vector; Obtaining an updated basis matrix according to the lifting matrix and the basis matrix; A check matrix of the improved LDPC code is obtained according to the updated base matrix.

18. The communication device according to claim 17, wherein: The processing unit is specifically configured to: Construct the lifting matrix M(i,j)=r i c j mod p, Among them, the row vector C rows =(r1,r2,...,r m ), r i is the row vector C rows The i-th element in, 1≤i≤m, the column vector C cols =(c1,c2,...,c v ), c j is the column vector C cols The j-th element in , 1≤j≤v, mod is the remainder operation.

19. The communication device according to claim 17 or 18, characterized in that The processing unit is specifically configured to: If v=n, then determine the updated basis matrix H m Expressed as: H m =H opt ⊙M; or, If v=nt, then determine the updated basis matrix H m Expressed as: H m =H opt2 ⊙M; Among them, the H opt is the basis matrix, the H opt2 is a matrix obtained by extracting non-zero columns in the base matrix, and M is the lifting matrix.

20. The communication device according to any one of claims 17 to 19, characterized in that: The processing unit is specifically configured to: If v=n, then the updated base matrix is ​​expanded p-fold to obtain the check matrix; or, If v=nt, the updated base matrix is ​​expanded p times to obtain an intermediate check matrix, and the intermediate check matrix is ​​supplemented with t*p columns of all-zero columns to obtain the check matrix.

21. A communication device, characterized in that: The communication device comprises at least one processor coupled to at least one memory, wherein the at least one processor is configured to execute a computer program or instruction stored in the at least one memory, so as to enable the communication device to perform the method according to any one of claims 1 to 5, or the method according to any one of claims 6 to 10.

22. A chip, characterized in that: comprising a processor and a communication interface, the communication interface being configured to receive a message bit sequence to be encoded and send the message bit sequence to be encoded to the processor, the processor performing concatenation encoding on the message bit sequence to be encoded according to the method according to any one of claims 1 to 5 to obtain a concatenated codeword; the communication interface being further configured to output the concatenated codeword; or The communication interface is used to receive a channel reception vector, and the channel reception vector is sent to the processor. The processor decodes the concatenated code according to the method according to any one of claims 6 to 10 to obtain a decoding result. The communication interface is used to output the decoding result.

23. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and when the computer instructions are executed on a computer, the method according to any one of claims 1 to 5 or the method according to any one of claims 6 to 10 is implemented.

24. A computer program product, characterized in that The computer program product comprises a computer program code, and when the computer program code is run on a computer, the method according to any one of claims 1 to 5 or the method according to any one of claims 6 to 10 is implemented.

25. A system, characterized in that The method comprises the communication device according to any one of claims 11 to 15, and the communication device according to any one of claims 16 to 20.

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