Peripheral starting control circuit and method

Abstract

The invention relates to a peripheral starting control circuit and method. The circuit comprises a switch unit and a first control circuit unit, the first end of the switch unit is connected with a power supply, the second end of the switch unit is connected with peripheral equipment, the third end of the switch unit is connected with the first end of the first control circuit unit, and the second end of the first control circuit unit is connected with the first end of the main control unit; the main control unit is used for outputting a first level signal to the first control circuit unit according to the starting state of the main control unit, and the first control circuit unit is used for controlling the switching state of the switching unit according to the first level signal. And if the main control unit is successfully started, the first control circuit unit controls the switch unit to be switched on according to the first level signal, so that the peripheral is powered on through the power supply. Therefore, even if the peripheral boot starting sequence is not manually adjusted and the peripheral fails, the electronic equipment can be normally started, so that the starting performance of the electronic equipment is improved.

Description

Technical Field

[0001] The present application relates to the field of circuit development technology, and in particular to a peripheral startup control circuit and method. Background Art

[0002] In order to expand the storage space of electronic devices and facilitate the reading and writing of data in the storage space, peripherals such as Secure Digital Card (SD card), Universal Serial Bus (USB), or Embedded Multi Media Card (EMMC card) are usually installed on electronic devices.

[0003] However, the peripheral boot order of existing electronic devices is usually not adjustable. When the electronic device is powered on, the electronic device and the peripherals are usually powered on at the same time. Once a peripheral fails, the electronic device will be stuck in the peripheral boot item during the startup process, causing the electronic device to fail to start normally.

[0004] Therefore, how to optimize the startup sequence of peripherals to ensure that electronic devices can start normally has become a technical problem that needs to be solved urgently. Summary of the invention

[0005] The present application provides a peripheral startup control circuit and method to solve the technical problem that the peripheral boot startup sequence of existing electronic devices is usually not adjustable, and once a peripheral fails, the electronic device will not be able to start normally.

[0006] In a first aspect, the present application provides a peripheral startup control circuit, which is applied to an electronic device, wherein the electronic device includes a power supply, a peripheral device and a main control unit; the peripheral startup control circuit includes: a switch unit and a first control circuit unit;

[0007] The first end of the switch unit is connected to the power supply, the second end of the switch unit is connected to the peripheral device, the third end of the switch unit is connected to the first end of the first control circuit unit, and the second end of the first control circuit unit is connected to the first end of the main control unit;

[0008] The main control unit is used to output a first level signal to the first control circuit unit according to its own startup state, and the first control circuit unit is used to control the switch state of the switch unit according to the first level signal;

[0009] If the main control unit is successfully started, the first control circuit unit controls the switch unit to be turned on according to the first level signal, so as to power on the peripheral device through the power supply.

[0010] Optionally, the switch unit includes a first field effect transistor and a second field effect transistor, and the first control circuit unit includes a first diode;

[0011] The anode of the first diode is connected to the first end of the main control unit as the second end of the first control circuit unit, and the cathode of the first diode is connected to the third end of the switch unit as the first end of the first control circuit unit;

[0012] The drain of the first field effect transistor is connected to the power supply as the first end of the switch unit, the source of the first field effect transistor is connected to the peripheral device as the second end of the switch unit, the gate of the first field effect transistor is connected to the drain of the second field effect transistor, the source of the second field effect transistor is connected to the ground end, and the gate of the second field effect transistor is connected to the first end of the first control circuit unit as the third end of the switch unit;

[0013] When the main control unit is successfully started, the first level signal is a high level signal, and the first field effect transistor and the second field effect transistor are turned on; when the main control unit fails to start, the first level signal is a low level signal, and the first field effect transistor and the second field effect transistor are turned off.

[0014] Optionally, the peripheral startup control circuit further includes: a second control circuit unit and a reset circuit unit;

[0015] Wherein, the first end of the reset circuit unit is connected to the second end of the main control unit, and the main control unit sends a dog feeding signal to the reset circuit unit when the startup is successful; the second end of the reset circuit unit is connected to the third end of the main control unit, and the reset circuit unit is used to determine whether to send a reset signal to the main control unit according to the reception of the dog feeding signal when the enablement is effective;

[0016] The first end of the second control circuit unit is connected to the third end of the reset circuit unit, and the second end of the second control circuit unit is connected to the first end of the main control unit; the second control circuit unit is used to enable control of the reset circuit unit according to the first level signal output by the main control unit.

[0017] Optionally, the second control circuit unit includes a first transistor, a first capacitor, a second capacitor, a third field effect transistor and a first delay chip;

[0018] Wherein, the emitter of the first transistor is connected to the power supply, the base of the first transistor is connected to the first end of the main control unit as the second end of the second control circuit unit, the collector of the first transistor is connected to the positive electrode of the first capacitor, the negative electrode of the first capacitor is connected to the gate of the third field effect transistor, the source of the third field effect transistor and the negative electrode of the second capacitor are both connected to the ground terminal, the drain of the third field effect transistor is connected to the first input end of the first delay chip, the positive electrode of the second capacitor is connected to the second input end of the first delay chip, and the output end of the first delay chip is connected to the third end of the reset circuit unit as the first end of the second control circuit unit;

[0019] The second control circuit unit is used to control the reset circuit unit to be disabled when the first level signal is a high level signal, and to control the reset circuit unit to be enabled when the first level signal is a low level signal.

[0020] Optionally, the peripheral startup control circuit further includes: a delay circuit unit;

[0021] Wherein, the first end of the delay circuit unit is connected to the third end of the first control circuit unit, and the delay circuit unit is used to perform delay timing according to the second level signal output by the first control circuit unit, and output a third level signal after the delay timing ends;

[0022] The second end of the delay circuit unit is respectively connected to the gate of the second field effect transistor and the gate of the third field effect transistor; the switch unit is used to control its own switching state according to the third level signal to control the power-on state of the peripheral device; the second control circuit is used to enable the reset circuit unit according to the third level signal.

[0023] Optionally, the first control circuit unit further includes a fourth field effect transistor, and the second control circuit further includes a third capacitor;

[0024] The source of the fourth field effect tube is connected to the ground terminal, the gate of the fourth field effect tube is connected to the anode of the first diode, and the drain of the fourth field effect tube is connected to the first end of the delay circuit unit as the third end of the first control circuit unit; the first control circuit is used to control the fourth field effect tube to be in a conducting state when the first level signal is a high level signal; and to control the fourth field effect tube to be in a cut-off state when the first level signal is a low level signal;

[0025] The positive electrode of the third capacitor is connected to the second end of the delay circuit unit, and the negative electrode of the third capacitor is connected to the gate of the third field effect transistor; the second control circuit unit is used to control the reset circuit unit to be disabled when the third level signal is a high level signal, and to control the reset circuit unit to be enabled when the third level signal is a low level signal.

[0026] Optionally, the switch unit further includes a second diode;

[0027] The anode of the second diode is connected to the second end of the delay circuit unit as the fourth end of the switch unit, and the cathode of the second diode is connected to the gate of the second field effect transistor.

[0028] In a second aspect, the present application provides a peripheral startup sequence optimization method, which is applied to the peripheral startup control circuit described in any one of the first aspects; the peripheral startup control method comprises:

[0029] When the main control unit is successfully started, the main control unit outputs a first level signal to the first control circuit unit;

[0030] The first control circuit unit controls the switch unit to be turned on according to the first level signal, so as to power on the peripheral device through the power supply.

[0031] Optionally, the peripheral startup control circuit further includes a second control circuit unit and a reset circuit unit; when the startup is successful, the main control unit outputs a first level signal to the first control circuit unit, including:

[0032] When the main control unit is successfully started, the main control unit outputs a first level signal to the first control circuit unit and sends a dog feeding signal to the reset circuit unit;

[0033] The peripheral device startup control method further includes:

[0034] The first control circuit unit controls the reset circuit unit to enable failure according to the first level signal;

[0035] If the main control unit crashes during operation, the main control unit stops outputting the dog feeding signal;

[0036] The first control circuit unit controls the switch unit to be turned off according to the first level signal;

[0037] The second control circuit unit controls the reset circuit unit to be enabled according to the first level signal;

[0038] The reset circuit unit sends a reset signal to the main control unit when the enabling is effective and the dog feeding signal is not received;

[0039] The main control unit is reset and restarted.

[0040] Optionally, the peripheral device startup control circuit further includes: a delay circuit unit; and the peripheral device startup control method further includes:

[0041] If the main control unit fails to start or fails to restart, the main control unit does not output a dog feeding signal;

[0042] The first control circuit unit controls the switch unit to be turned off and output a second level signal according to the first level signal;

[0043] The delay circuit unit performs delay timing according to the second level signal, and outputs a third level signal after the delay timing ends;

[0044] The switch circuit unit controls the peripheral device to power on according to the third level signal;

[0045] The second control circuit unit controls the reset circuit unit to be enabled according to the third level signal;

[0046] The reset circuit unit sends a reset signal to the main control unit when the enabling is effective and the dog feeding signal is not received;

[0047] The main control unit is reset and restarted, and the system program pre-stored in the peripheral device is used to flash the device.

[0048] The above technical solution provided by the embodiment of the present application has the following advantages over the prior art: the peripheral startup control circuit provided by the embodiment of the present application is applied to an electronic device, the electronic device includes a power supply, a peripheral device and a main control unit; the circuit includes: a switch unit and a first control circuit unit; the first end of the switch unit is connected to the power supply, the second end of the switch unit is connected to the peripheral device, the third end of the switch unit is connected to the first end of the first control circuit unit, and the second end of the first control circuit unit is connected to the first end of the main control unit; the main control unit is used to output a first level signal to the first control circuit unit according to its own startup state, and the first control circuit unit is used to control the switch state of the switch unit according to the first level signal; wherein, if the main control unit is successfully started, the first control circuit unit controls the switch unit to be turned on according to the first level signal, so as to power on the peripheral device through the power supply. In the above manner, the main control unit can output a first level signal to the first control circuit unit according to its own startup state, so that the first control circuit unit controls the switch state of the switch unit according to the first level signal, and then controls the power-on state of the peripheral device. In this way, even if the boot sequence of the peripherals is not adjusted manually and a peripheral failure occurs, the electronic device can still start normally, thereby improving the startup performance of the electronic device. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0050] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0051] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0052] Figure 1 A schematic diagram of the structure of a peripheral startup control circuit provided in an embodiment of the present application;

[0053] Figure 2 A circuit diagram of a peripheral startup control circuit provided in an embodiment of the present application;

[0054] Figure 3A structural schematic diagram of another peripheral startup control circuit provided in an embodiment of the present application;

[0055] Figure 4 A circuit diagram of a second control circuit unit provided in an embodiment of the present application;

[0056] Figure 5 A circuit diagram of another peripheral startup control circuit provided in an embodiment of the present application;

[0057] Figure 6 A flowchart of a method for optimizing the startup sequence of peripherals provided in an embodiment of the present application;

[0058] Figure 7 A schematic diagram of a normal startup process of an electronic device system provided in an embodiment of the present application;

[0059] Figure 8 A schematic diagram of a process flow after a bricking of an electronic device system provided in an embodiment of the present application;

[0060] Fig. 9 A schematic diagram of a process flow of an electronic device system crashing during operation provided by an embodiment of the present application. DETAILED DESCRIPTION

[0061] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0062] The disclosure below provides many different embodiments or examples to implement different structures of the present invention. In order to simplify the disclosure of the present invention, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.

[0063] In order to solve the technical problem that the peripheral boot startup sequence of existing electronic devices is usually not adjustable, and once a peripheral fails, the electronic device will not be able to start normally, the present application provides a peripheral startup control circuit, which can ensure that the electronic device can start normally even if the peripheral boot startup sequence is not manually adjusted and a peripheral fails, thereby improving the startup performance of the electronic device.

[0064] See also Figure 1 , Figure 1 This is a schematic diagram of the structure of a peripheral startup control circuit provided in an embodiment of the present application. Figure 1 As shown, the peripheral startup control circuit 400 is applied to an electronic device, and the electronic device includes a power supply 100, a peripheral device 200 and a main control unit 300; the circuit includes: a switch unit 410 and a first control circuit unit 420;

[0065] A first end of the switch unit 410 is connected to the power supply 100, a second end of the switch unit 410 is connected to the peripheral device 200, a third end of the switch unit 410 is connected to a first end of the first control circuit unit 420, and a second end of the first control circuit unit 420 is connected to a first end of the main control unit 300;

[0066] The main control unit 300 is used to output a first level signal to the first control circuit unit 420 according to its own startup state, and the first control circuit unit 420 is used to control the switch state of the switch unit 410 according to the first level signal;

[0067] If the main control unit 300 is successfully started, the first control circuit unit 420 controls the switch unit 410 to be turned on according to the first level signal, so as to power on the peripheral device 200 through the power supply 100 .

[0068] Specifically, the electronic device may be a device whose system startup items include peripherals such as USB, SD card and / or EMMC card. The first end of the main control unit 300 is used to output a first level signal, which may be a high level signal or a low level signal. The switching state of the switch unit 410 may change according to the change of the first level signal. When the switch unit 410 is in the on state, the switch unit 410 may connect the power supply 100 and the peripheral device 200 to power on the peripheral device 200; when the switch unit 410 is in the off state, the switch unit 410 does not connect the power supply 100 and the peripheral device 200, and does not power on the peripheral device 200.

[0069] In one embodiment, the main control unit 300 can output a first level signal to the first control circuit unit 420 according to the system startup state, so that the first control circuit unit 420 controls the switch state of the switch unit 410 according to the first level signal, and then controls the power-on state of the peripheral 200. In this way, even if the peripheral boot startup sequence is not manually adjusted and the peripheral fails, the electronic device can still start normally, thereby improving the startup performance of the electronic device.

[0070] Further, see Figure 2 , the switch unit 410 includes a first field effect transistor Q1 and a second field effect transistor Q2, and the first control circuit unit 420 includes a first diode D2;

[0071] The anode of the first diode D2 is connected to the first end of the main control unit 300 as the second end of the first control circuit unit 420, and the cathode of the first diode D2 is connected to the third end of the switch unit 410 as the first end of the first control circuit unit 420;

[0072] The drain of the first field effect transistor Q1 is connected to the power supply 100 as the first end of the switch unit 410, the source of the first field effect transistor Q1 is connected to the peripheral device 200 as the second end of the switch unit 410, the gate of the first field effect transistor Q1 is connected to the drain of the second field effect transistor Q2, the source of the second field effect transistor Q2 is connected to the ground end, and the gate of the second field effect transistor Q2 is connected to the first end of the first control circuit unit 420 as the third end of the switch unit 410;

[0073] When the main control unit 300 starts successfully, the first level signal is a high level signal, and the first field effect transistor Q1 and the second field effect transistor Q2 are turned on; when the main control unit 300 fails to start, the first level signal is a low level signal, and the first field effect transistor Q1 and the second field effect transistor Q2 are turned off.

[0074] In one embodiment, when the system is successfully started, the main control unit 300 can output a high-level signal to the first diode D2, and the first diode D2 is in a conducting state, and then the first field effect transistor Q1 and the second field effect transistor Q2 are controlled to be turned on by the high-level signal, so that the power supply 100 and the peripheral device 200 are connected, and the peripheral device 200 is powered on. In the case of a system startup failure, the main control unit 300 can output a low-level signal to the first diode D2, and the first diode D2 is in a cut-off state, and then the first field effect transistor Q1 and the second field effect transistor Q2 are maintained in a cut-off state, and the peripheral device 200 is not powered on. In the above manner, the main control unit 300 can automatically control the switch state of the switch unit 410 according to the system startup state, so as to realize automatic control of the power-on state of the peripheral device 200. In this way, it can avoid the electronic device startup being affected by the failure of the peripheral device 200, and it can also avoid the need to manually power on the peripheral device 200 after the electronic device is started.

[0075] Further, see Figure 3 , the peripheral startup control circuit further includes: a second control circuit unit 430 and a reset circuit unit 440;

[0076] The first end of the reset circuit unit 440 is connected to the second end of the main control unit 300, and the main control unit 300 sends a dog feeding signal to the reset circuit unit 440 when the startup is successful; the second end of the reset circuit unit 440 is connected to the third end of the main control unit 300, and the reset circuit unit 440 is used to determine whether to send a reset signal to the main control unit 300 according to the reception of the dog feeding signal when the enable is effective;

[0077] The first end of the second control circuit unit 430 is connected to the third end of the reset circuit unit 440, and the second end of the second control circuit unit 430 is connected to the first end of the main control unit 300; the second control circuit unit 430 is used to enable control of the reset circuit unit 440 according to the first level signal output by the main control unit 300.

[0078] Specifically, the second end of the main control unit 300 is used to output a dog-feeding signal after the system is successfully started. The reset circuit unit 440 is used to detect the dog-feeding signal when the enable is effective, and then determine whether to send a reset signal to the main control unit 300 according to the reception of the dog-feeding signal. Specifically, if the reset circuit unit 440 does not detect the dog-feeding signal within a preset period of time, the reset signal is sent to the third end of the main control unit 300; if the reset circuit unit 440 detects the dog-feeding signal within the preset period of time, the reset signal is not sent to the third end of the main control unit 300.

[0079] The second control circuit unit 430 can control the reset circuit unit 440 to be enabled according to the first level signal output by the main control unit 300. Specifically, when the first level signal output by the main control unit 300 is a high level signal (i.e., the system is successfully started), the reset circuit unit 440 is controlled to be disabled. In this way, the reset circuit unit 440 can shield the dog feeding signal and not detect the dog feeding signal, thereby preventing the main control unit 300 from resetting and restarting. When the first level signal output by the main control unit 300 is a low level signal (i.e., the system freezes during operation), the reset circuit unit 440 is controlled to be enabled. In this way, the reset circuit unit 440 can send a reset signal to the main control unit 300 because it cannot receive the dog feeding signal, thereby resetting and restarting the main control unit 300.

[0080] Further, see Figure 4 , the second control circuit unit 430 includes a first transistor Q5, a first capacitor C5, a second capacitor C4, a third field effect transistor Q4 and a first delay chip U3;

[0081] Among them, the emitter of the first transistor Q5 is connected to the power supply 100, the base of the first transistor Q5 is connected to the first end of the main control unit 300 as the second end of the second control circuit unit 430, the collector of the first transistor Q5 is connected to the positive electrode of the first capacitor C5, the negative electrode of the first capacitor C5 is connected to the gate of the third field effect transistor Q4, the source of the third field effect transistor Q4 and the negative electrode of the second capacitor C4 are both connected to the ground end, the drain of the third field effect transistor Q4 is connected to the first input end of the first delay chip U3, the positive electrode of the second capacitor C4 is connected to the second input end of the first delay chip U3, and the output end of the first delay chip U3 is connected to the third end of the reset circuit unit 440 as the first end of the second control circuit unit 430;

[0082] The second control circuit unit 430 is used to control the reset circuit unit 440 to be disabled when the first level signal is a high level signal, and to control the reset circuit unit 440 to be enabled when the first level signal is a low level signal.

[0083] In one embodiment, when the first level signal output from the first end of the main control unit 300 is a high level signal (i.e., the system starts successfully), the first transistor Q5 is in the off state, and the third field effect transistor Q4 is also in the off state. Pin 3 of the first delay chip U3 is at a high level, so that pin 6 of the first delay chip U3 is at a low level, thereby controlling the reset circuit unit 440 to be disabled (i.e., pin 2 of the reset chip is at a low level). In this way, the reset circuit unit 440 can shield the dog feeding signal and not detect the dog feeding signal, thereby avoiding the main control unit 300 from resetting and restarting. When the first level signal output from the first end of the main control unit 300 is a low level signal (i.e., the system crashes during operation), the first control circuit unit 420 can control the switch unit 410 to switch to the disconnected state to power off the peripheral device 200. At the same time, the first transistor Q5 can be controlled to be in the on state. At this time, the third field effect transistor Q4 is also in the on state, and the 3rd pin of the first delay chip U3 is at a low level, so that the first delay chip U3 performs delay timing (such as timing for 30 seconds, etc.). After the timing is completed, the 6th pin of the first delay chip U3 is at a high level, thereby controlling the reset circuit unit 440 to be enabled (i.e., the 2nd pin of the reset chip is at a high level). In this way, the reset circuit unit 440 can detect the dog feeding signal, and send a reset signal to the main control unit 300 when the dog feeding signal is not detected, thereby resetting and restarting the main control unit 300. After the main control unit 300 is reset and restarted, the output first level signal is a high level signal, which can automatically control the switch unit 410 to conduct and power on the peripheral device 200.

[0084] In this way, different functions of the peripherals 200 can be inserted to meet different application scenarios, and the electronic device can realize normal startup, program burning or log printing, etc. Moreover, the electronic device can also skip the normal startup of the peripherals 200 when the electronic device crashes and restarts.

[0085] Further, see Figure 3 , the peripheral startup control circuit also includes: a delay circuit unit 450;

[0086] The first end of the delay circuit unit 450 is connected to the third end of the first control circuit unit 420, and the delay circuit unit 450 is used to perform delay timing according to the second level signal output by the first control circuit unit 420, and output a third level signal after the delay timing ends;

[0087] The second end of the delay circuit unit 450 is respectively connected to the gate of the second field effect transistor Q2 and the third end of the gate of the third field effect transistor Q4; the switch unit 410 is used to control its own switching state according to the third level signal to control the power-on state of the peripheral 200; the second control circuit is used to enable the reset circuit unit 440 according to the third level signal.

[0088] Specifically, the delay circuit unit 450 may include a second delay chip U1 for delay timing. It should be noted that the timing length of the second delay chip U1 needs to be greater than the timing length of the first delay chip U3. For example, the timing length of the first delay chip U3 is 30 seconds, and the timing length of the second delay chip U1 is 1 minute, etc.

[0089] The delay circuit unit 450 can perform delay timing according to the second level signal output by the first control circuit unit 420, and output a third level signal after the delay timing ends, and then the switch unit 410 can control its own switch state according to the third level signal output by the delay circuit unit 450 to control the power-on state of the peripheral 200; and the second control circuit can also enable the reset circuit unit 440 according to the third level signal output by the delay circuit unit 450. In this way, when the electronic device becomes bricked, the delay circuit unit 450 can output a corresponding level signal to power on the peripheral 200, and control the main control unit 300 to restart after the reset circuit unit 440 is enabled, and then the main control device is burned with the system program pre-stored in the peripheral 200, thereby avoiding the need for manual replacement of the SD card after the electronic device becomes bricked, and avoiding the problem of manual on-site cover opening and factory repair after bricking.

[0090] Further, see Figure 5 , the first control circuit unit 420 further includes a fourth field effect transistor Q3, and the second control circuit further includes a third capacitor C2;

[0091] The source of the fourth field effect transistor Q3 is connected to the ground terminal, the gate of the fourth field effect transistor Q3 is connected to the anode of the first diode D2, and the drain of the fourth field effect transistor Q3 is connected to the first end of the delay circuit unit 450 as the third end of the first control circuit unit 420; the first control circuit is used to control the fourth field effect transistor Q3 to be in a conducting state when the first level signal is a high level signal; and to control the fourth field effect transistor Q3 to be in a cut-off state when the first level signal is a low level signal;

[0092] The positive electrode of the third capacitor C2 is connected to the second end of the delay circuit unit 450, and the negative electrode of the third capacitor C2 is connected to the gate of the third field effect transistor Q4; the second control circuit unit 430 is used to control the reset circuit unit 440 to be disabled when the third level signal is a high level signal, and to control the reset circuit unit 440 to be enabled when the third level signal is a low level signal.

[0093] In one embodiment, when the electronic device becomes bricked, the main control unit 300 does not output the dog feeding signal, and the reset circuit unit 440, because it does not detect the dog feeding signal, will send a reset signal to reset and restart the main control unit 300. At this time, the main control unit 300 will turn off the delay circuit control signal reset (i.e., output a low-level signal to turn off the fourth field effect transistor Q3), and the delay circuit unit 450 will restart the timing. Since the main control unit 300 cannot enter the system, the main control unit 300 falls into a loop restart. After the delay circuit unit 450 finishes timing, the 6-pin outputs a high level, controls the first field effect transistor Q1 and the second field effect transistor Q2 to be turned on, and powers on the peripheral 200; at the same time, the third capacitor C2 gives a short pulse to the gate of the third field effect transistor Q4, and controls the first delay chip U3 to pull the output of the reset circuit unit 440 low, allowing the main control unit 300 to restart. When the main control unit 300 restarts, the peripheral 200 has power and there is a burning program in the peripheral 200, and the program burning is executed. After the burning is completed, it is manually restarted (if conditions permit, the power supply device can be remotely controlled to power off and then power on), and then the normal startup steps are performed.

[0094] In this way, when the electronic device becomes bricked, the delay circuit unit 450 can output a corresponding level signal to power on the peripheral device 200, and control the main control unit 300 to restart after the reset circuit unit 440 is enabled and takes effect, and then the main control device is program burned through the system program pre-stored in the peripheral device 200, thereby avoiding the need for manual replacement of the SD card after the electronic device becomes bricked, and avoiding the problem of manual on-site opening of the cover and returning the device to the factory for repair after it becomes bricked.

[0095] Further, the switch unit 410 further includes a second diode D1;

[0096] The anode of the second diode D1 is connected to the second end of the delay circuit unit 450 as the fourth end of the switch unit 410 , and the cathode of the second diode D1 is connected to the gate of the second field effect transistor Q2 .

[0097] In one embodiment, the switch unit 410 also includes a second diode D1, which can control the second diode D1 to be turned on after the timing of the delay circuit unit 450 ends (that is, the pin of the second delay chip U16 outputs a high level), thereby controlling the first field effect transistor Q1 and the second field effect transistor Q2 to be turned on, thereby powering on the peripheral 200.

[0098] See also Figure 6 , Figure 6 A flowchart of a peripheral startup sequence optimization method provided in an embodiment of the present application. Figure 6 As shown, the peripheral startup sequence optimization method is applied to the peripheral startup control circuit of any of the above embodiments; the peripheral startup control method includes:

[0099] When the main control unit is successfully started, the main control unit outputs a first level signal to the first control circuit unit;

[0100] The first control circuit unit controls the switch unit to be turned on according to the first level signal, so as to power on the peripheral device through the power supply.

[0101] Specifically, the first end of the main control unit is used to output a first level signal, which can be a high level signal or a low level signal. The switch state of the switch unit can change according to the change of the first level signal. When the switch unit is in the on state, the switch unit can connect the power supply and the peripheral device to power on the peripheral device; when the switch unit is in the off state, the switch unit does not connect the power supply and the peripheral device, and does not power on the peripheral device.

[0102] In one embodiment, when the system is successfully started, the main control unit can output a high-level signal to the first diode, and the first diode is in a conducting state at this time, and then the first field effect tube and the second field effect tube are controlled to be turned on by the high-level signal, so that the power supply and the peripheral are connected, and the peripheral is powered on. In the case of a system startup failure, the main control unit can output a low-level signal to the first diode, and the first diode is in a cut-off state at this time, and then the first field effect tube and the second field effect tube are maintained in a cut-off state, and the peripheral is not powered on. In the above manner, the main control unit can automatically control the switch state of the switch unit according to the system startup state, so as to realize automatic control of the power-on state of the peripheral. In this way, it can avoid the influence of the startup of the electronic device due to the failure of the peripheral, and it can also avoid the need to manually power on the peripheral after the electronic device is started.

[0103] Furthermore, the peripheral startup control circuit further includes a second control circuit unit and a reset circuit unit; when the startup is successful, the main control unit outputs a first level signal to the first control circuit unit, including:

[0104] When the main control unit is successfully started, it outputs a first level signal to the first control circuit unit and sends a dog feeding signal to the reset circuit unit;

[0105] The peripheral device startup control method also includes:

[0106] The first control circuit unit controls the reset circuit unit to enable failure according to the first level signal;

[0107] If the main control unit crashes during operation, the main control unit stops outputting the dog feeding signal;

[0108] The first control circuit unit controls the switch unit to be turned off according to the first level signal;

[0109] The second control circuit unit controls the reset circuit unit to enable according to the first level signal;

[0110] The reset circuit unit sends a reset signal to the main control unit when the enable is effective and no dog feeding signal is received;

[0111] The main control unit is reset and restarted.

[0112] In one embodiment, in the case of a system crash during operation, the first level signal output by the main control unit is a low level signal, which can control the switch unit to switch to the disconnected state to realize power-off of the peripherals. At the same time, the first transistor can also be controlled to be in the on state, at which time the third field effect tube is also in the on state, and the 3rd pin of the first delay chip is at a low level, so that the first delay chip performs delay timing (such as timing for 30 seconds, etc.). After the timing is completed, the 6th pin of the first delay chip is at a high level, thereby controlling the reset circuit unit to be enabled (i.e., the 2nd pin of the reset chip is at a high level). In this way, the reset circuit unit can detect the dog feeding signal, and send a reset signal to the main control unit when the dog feeding signal is not detected, thereby resetting and restarting the main control unit. After the main control unit is reset and restarted, the output first level signal is a high level signal, which can automatically control the switch unit to conduct and power on the peripherals.

[0113] In this way, different peripherals with different functions can be inserted to meet different application scenarios, and the electronic device can realize normal startup, program burning or log printing and other functions. In addition, the electronic device can also skip the normal startup of the peripherals when it crashes and restarts.

[0114] Furthermore, the peripheral device startup control circuit further includes: a delay circuit unit; and the peripheral device startup control method further includes:

[0115] If the main control unit fails to start or restarts successfully, the main control unit does not output the dog feeding signal;

[0116] The first control circuit unit controls the switch unit to be turned off and output a second level signal according to the first level signal;

[0117] The delay circuit unit performs delay timing according to the second level signal, and outputs a third level signal after the delay timing ends;

[0118] The switch circuit unit controls the peripheral device to power on according to the third level signal;

[0119] The second control circuit unit controls the reset circuit unit to enable according to the third level signal;

[0120] The reset circuit unit sends a reset signal to the main control unit when the enable is effective and no dog feeding signal is received;

[0121] The main control unit is reset and restarted, and the system program pre-stored in the peripheral device is used to flash the device.

[0122] In one embodiment, when the electronic device becomes bricked (i.e., the main control unit fails to start or fails to restart), the main control unit does not output a dog feeding signal. Since the reset circuit unit does not detect the dog feeding signal, it will send a reset signal to reset and restart the main control unit. At this time, the main control unit will turn off the delay circuit control signal reset (i.e., output a low-level signal to cut off the fourth field effect tube), and the delay circuit unit will restart the timing. Since the main control unit cannot enter the system, the main control unit falls into a loop restart. After the delay circuit unit timing ends, the 6-pin outputs a high level, controls the first field effect tube and the second field effect tube to be turned on, and powers on the peripheral device; at the same time, the third capacitor gives a short pulse to the gate of the third field effect tube, and controls the first delay chip to pull down the output of the reset circuit unit, so that the main control unit restarts. When the main control unit restarts, the peripheral device is powered on and there is a burning program in the peripheral device, and the program is burned. After the burning is completed, it is manually restarted (if conditions permit, the power supply device can be remotely controlled to power off and then powered on), and then the normal startup steps are performed.

[0123] In this way, when the electronic device becomes bricked, the delay circuit unit can output the corresponding level signal to power on the peripheral device, and control the main control unit to restart after the reset circuit unit is enabled, and then burn the program of the main control device through the system program pre-stored in the peripheral device, thereby avoiding the need for manual replacement of peripheral devices after the electronic device becomes bricked, and avoiding the problem of manual on-site opening of the cover and returning the device to the factory for repair after it becomes bricked.

[0124] In one embodiment, Figure 5 In the peripheral startup control circuit shown in the figure, the normal startup process of the electronic equipment system is as follows Figure 7As shown. In the normal boot process, the second delay chip U1 and the first delay chip U3 start timing when powered on, the first delay chip U3 counts for 30s to shield the dog feeding signal, the second delay chip U1 counts for 1min, and the watchdog chip U2 (i.e., the reset circuit unit) CD counts for 0s. Before the second delay chip U1 ends the timing, after the main control unit normally starts and enters the system, the main control unit sends a dog feeding signal to the watchdog chip U2, and the IO pin of the main control unit (i.e., the TIMER_SD network) outputs a high level, which controls the first field effect tube Q1 to be turned on through the first diode D2 and the second field effect tube Q2, and the peripheral is powered on, and at the same time gives a high level to control the fourth field effect tube Q3 to be turned on, turning off the timing function of the delay circuit unit, and executing the main control unit's log writing, encryption and other operations.

[0125] The process of electronic equipment system being bricked is as follows Figure 8 After the system becomes bricked, it cannot start normally to enter the system. After the delay circuit unit finishes timing, the peripherals are powered on and the control main control unit restarts to perform the system flash operation. Specifically, after the bricking, the dog feeding signal of the watchdog chip U2 is interrupted, and the 4-pin is pulled low to control the main control unit to restart. When restarting, the main control unit turns off the delay circuit unit control signal reset (the output level becomes low to turn off the fourth field effect transistor Q3), and the second delay chip U1 restarts the timing. Since it cannot enter the system, the main control unit falls into a loop restart. After the timing of the second delay chip U1 ends, the 6-pin outputs a high level, controls the first diode D2 and the second field effect transistor Q2 to control the first field effect transistor Q1 to be turned on, and the SD card is powered on. At the same time, the third capacitor C2 gives a short pulse to the gate of the third field effect transistor Q4, and the output of the watchdog chip U2 is pulled low by controlling the first delay chip U3 to restart the main control unit. When the main control unit restarts, the SD card has power and there is a burning program in the SD card, and the program is burned. After the burning is completed, it is manually restarted (if conditions permit, the power supply equipment can be remotely controlled to power off and then powered on), and then the normal startup steps are performed.

[0126] The process of electronic equipment system crashing during operation is as follows Fig. 9 As shown. After the system crashes, the dog feeding signal of the watchdog chip U2 is interrupted, and the 4-pin is pulled low to control the main control unit to restart. When restarting, the main control unit turns off the control signal of the delay circuit unit to reset and turns off the power supply of the first field effect tube Q1. The second delay chip U1 is re-timed, and a short pulse is given to the gate of the third field effect tube Q4 through the first transistor Q5 and the first capacitor C5, so that the first delay chip U3 is re-timed, and the 6-pin output shielded dog feeding signal is sent to the watchdog chip U2. After the main control unit restarts, the dog feeding signal is sent to the watchdog chip U2. The main control unit outputs a high level, controls the first field effect tube Q1 to turn on, and the SD card is powered on. At the same time, the control signal of the delay circuit unit is turned off, and the delay circuit unit is turned off, and the write log, encryption and other operations are performed.

[0127] In this way, SD cards with different functions can be inserted to meet different application scenarios, and the host can normally start, burn programs or print logs and other functions; the normal SD startup can be skipped when the device crashes and restarts; the burning program can also be written to the SD card in advance to avoid the need for manual SD card replacement after the on-site equipment becomes bricked, and the SD card can also be used to store key logs on-site, and the customer only needs to unplug the SD card to read the logs; avoiding the problem of opening the cover on site and returning to the factory for repair after bricking.

[0128] An embodiment of the present application also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the peripheral startup sequence optimization method provided in any of the aforementioned method embodiments are implemented.

[0129] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0130] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a general hardware platform, and of course, by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the relevant technology can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0131] It should be understood that the terms used herein are only for the purpose of describing specific example embodiments and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one", "an" and "said" as used herein may also be meant to include plural forms. The terms "include", "comprise", "contain", and "have" are inclusive, and therefore specify the existence of stated features, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, steps, operations, elements, parts, and / or combinations thereof. The method steps, processes, and operations described herein are not interpreted as necessarily requiring them to be performed in the specific order described or illustrated, unless the execution order is clearly indicated. It should also be understood that additional or alternative steps may be used.

[0132] The foregoing is merely a specific embodiment of the present invention, which enables those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A peripheral startup control circuit, characterized in that: Applicable to electronic equipment, the electronic equipment comprises a power supply, a peripheral device and a main control unit; the peripheral device startup control circuit comprises: a switch unit and a first control circuit unit; The first end of the switch unit is connected to the power supply, the second end of the switch unit is connected to the peripheral device, the third end of the switch unit is connected to the first end of the first control circuit unit, and the second end of the first control circuit unit is connected to the first end of the main control unit; The main control unit is used to output a first level signal to the first control circuit unit according to its own startup state, and the first control circuit unit is used to control the switch state of the switch unit according to the first level signal; If the main control unit is successfully started, the first control circuit unit controls the switch unit to be turned on according to the first level signal, so as to power on the peripheral device through the power supply.

2. The peripheral device startup control circuit according to claim 1, characterized in that: The switch unit includes a first field effect transistor and a second field effect transistor, and the first control circuit unit includes a first diode; The anode of the first diode is connected to the first end of the main control unit as the second end of the first control circuit unit, and the cathode of the first diode is connected to the third end of the switch unit as the first end of the first control circuit unit; The drain of the first field effect transistor is connected to the power supply as the first end of the switch unit, the source of the first field effect transistor is connected to the peripheral device as the second end of the switch unit, the gate of the first field effect transistor is connected to the drain of the second field effect transistor, the source of the second field effect transistor is connected to the ground end, and the gate of the second field effect transistor is connected to the first end of the first control circuit unit as the third end of the switch unit; When the main control unit is successfully started, the first level signal is a high level signal, and the first field effect transistor and the second field effect transistor are turned on; when the main control unit fails to start, the first level signal is a low level signal, and the first field effect transistor and the second field effect transistor are turned off.

3. The peripheral device startup control circuit according to claim 2, characterized in that: The peripheral startup control circuit further includes: a second control circuit unit and a reset circuit unit; Wherein, the first end of the reset circuit unit is connected to the second end of the main control unit, and the main control unit sends a dog feeding signal to the reset circuit unit when the startup is successful; the second end of the reset circuit unit is connected to the third end of the main control unit, and the reset circuit unit is used to determine whether to send a reset signal to the main control unit according to the reception of the dog feeding signal when the enablement is effective; The first end of the second control circuit unit is connected to the third end of the reset circuit unit, and the second end of the second control circuit unit is connected to the first end of the main control unit; the second control circuit unit is used to enable control of the reset circuit unit according to the first level signal output by the main control unit.

4. The peripheral device startup control circuit according to claim 3, characterized in that: The second control circuit unit includes a first transistor, a first capacitor, a second capacitor, a third field effect transistor and a first delay chip; Wherein, the emitter of the first transistor is connected to the power supply, the base of the first transistor is connected to the first end of the main control unit as the second end of the second control circuit unit, the collector of the first transistor is connected to the positive electrode of the first capacitor, the negative electrode of the first capacitor is connected to the gate of the third field effect transistor, the source of the third field effect transistor and the negative electrode of the second capacitor are both connected to the ground terminal, the drain of the third field effect transistor is connected to the first input end of the first delay chip, the positive electrode of the second capacitor is connected to the second input end of the first delay chip, and the output end of the first delay chip is connected to the third end of the reset circuit unit as the first end of the second control circuit unit; The second control circuit unit is used to control the reset circuit unit to be disabled when the first level signal is a high level signal, and to control the reset circuit unit to be enabled when the first level signal is a low level signal.

5. The peripheral device startup control circuit according to claim 4, characterized in that: The peripheral startup control circuit also includes: a delay circuit unit; Wherein, the first end of the delay circuit unit is connected to the third end of the first control circuit unit, and the delay circuit unit is used to perform delay timing according to the second level signal output by the first control circuit unit, and output a third level signal after the delay timing ends; The second end of the delay circuit unit is respectively connected to the gate of the second field effect transistor and the gate of the third field effect transistor; the switch unit is used to control its own switching state according to the third level signal to control the power-on state of the peripheral device; the second control circuit is used to enable the reset circuit unit according to the third level signal.

6. The peripheral device startup control circuit according to claim 5, characterized in that: The first control circuit unit further includes a fourth field effect transistor, and the second control circuit further includes a third capacitor; The source of the fourth field effect tube is connected to the ground terminal, the gate of the fourth field effect tube is connected to the anode of the first diode, and the drain of the fourth field effect tube is connected to the first end of the delay circuit unit as the third end of the first control circuit unit; the first control circuit is used to control the fourth field effect tube to be in a conducting state when the first level signal is a high level signal; and to control the fourth field effect tube to be in a cut-off state when the first level signal is a low level signal; The positive electrode of the third capacitor is connected to the second end of the delay circuit unit, and the negative electrode of the third capacitor is connected to the gate of the third field effect transistor; the second control circuit unit is used to control the reset circuit unit to be disabled when the third level signal is a high level signal, and to control the reset circuit unit to be enabled when the third level signal is a low level signal.

7. The peripheral device startup control circuit according to claim 5, characterized in that: The switch unit further includes a second diode; The anode of the second diode is connected to the second end of the delay circuit unit as the fourth end of the switch unit, and the cathode of the second diode is connected to the gate of the second field effect transistor.

8. A peripheral device startup control method, characterized in that: Applicable to the peripheral startup control circuit as claimed in claim 1 or 2; the peripheral startup control method comprises: When the main control unit is successfully started, the main control unit outputs a first level signal to the first control circuit unit; The first control circuit unit controls the switch unit to be turned on according to the first level signal, so as to power on the peripheral device through the power supply.

9. The peripheral device startup control method according to claim 8, characterized in that: The peripheral startup control circuit further includes a second control circuit unit and a reset circuit unit; when the main control unit successfully starts, the main control unit outputs a first level signal to the first control circuit unit, including: When the main control unit is successfully started, the main control unit outputs a first level signal to the first control circuit unit and sends a dog feeding signal to the reset circuit unit; The peripheral device startup control method further includes: The first control circuit unit controls the reset circuit unit to enable failure according to the first level signal; If the main control unit crashes during operation, the main control unit stops outputting the dog feeding signal; The first control circuit unit controls the switch unit to be turned off according to the first level signal; The second control circuit unit controls the reset circuit unit to be enabled according to the first level signal; The reset circuit unit sends a reset signal to the main control unit when the enabling is effective and the dog feeding signal is not received; The main control unit is reset and restarted.

10. The peripheral device startup control method according to claim 9, characterized in that: The peripheral device startup control circuit further includes: a delay circuit unit; the peripheral device startup control method further includes: If the main control unit fails to start or fails to restart, the main control unit does not output a dog feeding signal; The first control circuit unit controls the switch unit to be turned off and output a second level signal according to the first level signal; The delay circuit unit performs delay timing according to the second level signal, and outputs a third level signal after the delay timing ends; The switch circuit unit controls the peripheral device to power on according to the third level signal; The second control circuit unit controls the reset circuit unit to be enabled according to the third level signal; The reset circuit unit sends a reset signal to the main control unit when the enabling is effective and the dog feeding signal is not received; The main control unit is reset and restarted, and the system program pre-stored in the peripheral device is used to flash the device.

Images