Surge current reduction circuit

Abstract

An inrush current reduction circuit is disclosed. The surge current reduction circuit includes: a switching element connected between a power supply side of a BMS module and a power supply side of a battery cell module, and having a gate connected to a ground side through a first resistor; a diode, one side of which is connected to the source of the switching element; a second resistor, one side of which is connected to the other side of the diode, and the other side of which is connected to a ground side through the first resistor; and a Zener diode connected in parallel to the second resistor.

Description

Technical Field

[0001] The present invention relates to an inrush current reduction circuit, which can reduce the generation of inrush current when a battery management system (BMS) module is connected to a battery cell module. Background Art

[0002] In modular applications that typically require connection between a BMS module and a battery cell module, when the BMS module is connected to the battery cell module, surge current generated due to inductive and capacitive components of the BMS module and the battery cell module may cause damage to circuit elements.

[0003] Therefore, there is a need for an inrush current reduction circuit that can reduce the generation of inrush current that may be generated when connecting a BMS module and a battery cell module. Summary of the invention

[0004] An aspect of the present invention is to provide an inrush current reduction circuit capable of reducing generation of an inrush current that may be generated when a BMS module is connected to a battery cell module.

[0005] According to one aspect of the present invention, an inrush current reduction circuit includes: a switching element connected between a power supply side of a BMS module and a power supply side of a battery cell module and having a gate connected to a ground side through a first resistor; a diode connected to a source of the switching element at one side thereof; a second resistor connected to the other side of the diode at one side thereof and connected to the ground side at the other side thereof through the first resistor; and a Zener diode connected in parallel to the second resistor.

[0006] The switching element may include a P-CH field effect transistor (FET).

[0007] The drain of the switching element may be connected to the power supply side of the BMS module.

[0008] The source of the switching element may be connected to the power supply side of the battery cell module.

[0009] The anode of the diode may be connected to the source of the switching element.

[0010] A Zener diode may be connected between one side of the first resistor and the other side of the diode.

[0011] An anode of the Zener diode may be connected to one side of the first resistor, and a cathode of the Zener diode may be connected to the cathode of the diode.

[0012] The switching element can disconnect the surge current generated in the initial stage of the connection between the BMS module and the battery cell module in the OFF state, and as the voltage level of the surge current continues to increase, the switching element can use the voltage distribution performed by the first resistor and the second resistor, and be turned on when the voltage (Vgs) between the two ends of the second resistor reaches a threshold voltage (Vth) or greater to allow only a portion of the surge current to flow through the switching element.

[0013] The switching element may further include a capacitor and a third resistor connected in parallel to both ends of the switching element.

[0014] The capacitor and the third resistor may be connected in series to each other.

[0015] The voltage applied to both ends of the switching element may be adjusted depending on the capacitance of the capacitor and the resistance of the third resistor.

[0016] The inrush current reduction circuit according to the present invention can reduce the generation of inrush current when the BMS module and the battery cell module are connected.

[0017] The inrush current reduction circuit according to the present invention can prevent damage to circuit elements by reducing the generation of inrush current that may be generated when connecting a BMS module and a battery cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The following drawings attached to this specification illustrate embodiments of the present disclosure and, together with the detailed description of the present disclosure, further describe aspects and features of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the drawings:

[0019] Figure 1 This is a circuit diagram of a typical connection circuit between a BMS module and a battery cell module.

[0020] Figure 2 It is shown in Figure 1 Graph showing the surge current waveform generated when the BMS module is connected to the battery cell module.

[0021] Figure 3 is a schematic circuit diagram of an inrush current reduction circuit according to a first embodiment of the present invention.

[0022] Figure 4A and Figure 4B is a diagram showing the inrush current generated when the BMS module is connected to the battery cell module. Figure 3 A diagram of the operation of a switching element of an inrush current reduction circuit.

[0023] Figure 5 is a schematic circuit diagram of an inrush current reduction circuit according to a second embodiment of the present invention.

[0024] Figure 6 is a circuit showing that when a capacitor and a resistor are connected in parallel between the source and drain of a switching element, a Figure 5 Graph of a voltage waveform of a decrease in voltage at an input terminal of a switching element shown in . DETAILED DESCRIPTION

[0025] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The terms or words used in this specification and claims should not be interpreted as limited to the usual or dictionary meanings, and should be interpreted as meanings and concepts consistent with the technical ideas of the present disclosure based on the principle that the inventor can be his / her own lexicon compiler to appropriately define the concepts of the terms to best explain his / her invention.

[0026] The embodiments described in this specification and the configurations shown in the accompanying drawings are only some embodiments of the present disclosure and do not represent all technical ideas, aspects and features of the present disclosure. Therefore, it should be understood that there may be various equivalents and modifications that can replace or modify the embodiments described herein when submitting this application.

[0027] It will be understood that when an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, it may be directly on, directly connected to, or coupled to the other element or layer, or one or more intermediate elements or layers may also be present. When an element or layer is referred to as being "directly on," "directly connected to," or "directly coupled to" another element or layer, there are no intermediate elements or layers. For example, when a first element is described as being "coupled to" or "connected to" a second element, the first element may be directly coupled to or connected to the second element, or the first element may be indirectly coupled to or connected to the second element via one or more intermediate elements.

[0028] In the accompanying drawings, for clarity of explanation, the sizes of various elements, layers, etc. may be exaggerated. The same reference numerals designate the same elements. As used herein, the term "and / or" includes any and all combinations of one or more associated listed items. In addition, when describing an embodiment of the present disclosure, the use of "may" relates to "one or more embodiments of the present disclosure". Expressions such as "at least one of ... " and "any one of ... " modify the entire element list when following the element list, without modifying the individual elements in the list. When phrases such as "at least one of A, B and C", "at least one of A, B or C", "at least one of the group selected from A, B and C" or "at least one of A, B and C" are used to specify the list of elements A, B and C, the phrase may refer to any and all suitable combinations or subsets of A, B and C, such as A, B, C, A and B, A and C, B and C, or A and B and C. As used herein, the terms "use," "using," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized," respectively. As used herein, the terms "substantially," "about," and similar terms are used as terms of approximation rather than terms of degree, and are intended to take into account the inherent variations in measured or calculated values ​​that one of ordinary skill in the art would recognize.

[0029] It should be understood that although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are used to distinguish an element, component, region, layer or section from another element, component, region, layer or section. Therefore, without departing from the teachings of the exemplary embodiments, the first element, component, region, layer or section discussed below can be referred to as a second element, component, region, layer or section.

[0030] For ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or feature to another element or features as shown in the figures. It will be understood that, in addition to the orientations shown in the figures, spatially relative terms are intended to cover different orientations of the device in use or operation. For example, if the device in the drawings is turned over, elements described as being "below" or "below" other elements or features will be oriented as being "above" or "on" the other elements or features. Thus, the term "below" can cover both orientations of above and below. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0031] The terms used herein are for the purpose of describing the embodiments of the present disclosure and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "an" are intended to also include the plural forms, unless the context clearly states otherwise. It will be further understood that when used in this specification, the terms "includes", "including", "comprises" and / or "comprising" specify the presence of the features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0032] In addition, any numerical range disclosed and / or listed herein is intended to include all subranges of the same numerical precision contained in the listed range. For example, a range of "1.0 to 10.0" is intended to include all subranges between the listed minimum value of 1.0 and the listed maximum value of 10.0 (and including), that is, having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as 2.4 to 7.6. Any maximum numerical limit listed herein is intended to include all lower numerical limits contained therein, and any minimum numerical limit cited in this specification is intended to include all higher numerical limits contained therein.

[0033] Referring to two compared elements, features, etc. as "the same" may mean that they are "substantially the same." Thus, the phrase "substantially the same" may include situations with deviations that are considered low in the art (e.g., 5% or less). Additionally, when a parameter is referred to as being uniform in a given area, it may mean that it is uniform in terms of average value.

[0034] Throughout the specification, unless otherwise specified, each element may be in the singular or in the plural.

[0035] When any element is referred to as being disposed (or located or positioned) "on (or below)" or "over (or under)" a component, it may mean that the arbitrary element is placed in contact with the upper (or lower) surface of the component, and may also mean that another component may be interposed between the component and any arbitrary element disposed (or located or positioned) above (or below) the component.

[0036] In addition, it will be understood that when an element is referred to as being "coupled," "linked," or "connected" to another element, the elements may be directly "coupled," "linked," or "connected" to each other, or there may be an intermediate element between them through which the element may be "coupled," "linked," or "connected" to another element. In addition, when a part is referred to as being "electrically coupled" to another part, the part may be directly connected to the other part, or there may be an intermediate part therebetween so that the part and the other part are indirectly connected to each other.

[0037] Throughout the specification, unless otherwise specified, when "A and / or B" is stated, it means A, B, or A and B. That is, "and / or" includes any or all combinations of the listed multiple items. When "C to D" is stated, it means C or greater and D or less unless otherwise specified.

[0038] Figure 1 This is a circuit diagram of a typical connection circuit between a BMS module and a battery cell module.

[0039] Reference Figure 1 Typically, in the BMS module 10 (for ease of description, Figure 1 Only the input side of the BMS module is shown in the figure, and there is no surge current reduction circuit between the battery cell module 20.

[0040] In this structure, a surge current of a high voltage level is generated when the BMS module 10 is connected to the battery module 20 .

[0041] Figure 2 It is shown in Figure 1 Graph showing the surge current waveform generated when the BMS module is connected to the battery cell module.

[0042] For example, refer to Figure 2 When the battery cell module 20 is connected at an input voltage of 114 V, a surge current of about 220 V is instantaneously generated due to inductance and capacitance components, thereby causing damage to the circuit elements of the BMS module 10 .

[0043] Therefore, in the embodiment of the present invention, the surge current reduction circuit 110; 120 (see Figure 3 and Figure 5 ) is disposed between the BMS module 10 and the battery cell module 20 to reduce the generation of surge current that may be generated when the BMS module 10 is connected to the battery cell module 20, thereby preventing damage to circuit elements of the BMS module 10.

[0044] Figure 3 is a schematic circuit diagram of an inrush current reduction circuit according to a first embodiment of the present invention.

[0045] Reference Figure 3 , the inrush current reduction circuit 110 according to the first embodiment of the present invention includes a switching element Q1, wherein a drain is connected to the power supply side of the BMS module 10, a source is connected to the power supply side of the battery cell module 20, and a gate is connected to the ground side through a first resistor R6, a diode D6 has an anode connected to the source of the switching element Q1, a second resistor R5 is connected to a cathode of the diode D6 at one side thereof and is connected to the ground side through the first resistor R6 at the other side thereof, and a Zener diode D4, which is connected in parallel to the second resistor R5.

[0046] Here, the switching element Q1 includes a P-CH FET (Field Effect Transistor), and the Zener diode D4 has an anode connected to one side of the first resistor R6 and a cathode connected to the cathode of the diode D6.

[0047] For reference, a typical surge current prevention circuit includes a resistor and a switch connected in parallel to each other to prevent surge current by controlling the switch.

[0048] Unlike a typical inrush current reduction circuit, the inrush current reduction circuit according to the first embodiment is configured to prevent inrush current from being generated at the initial stage of module connection while allowing the switching element Q1 to use an RC circuit without switching control (see Figure 5 ) and the switching element Q1 (see Figure 3 ) operates at a preset voltage or higher.

[0049] Figure 4A and Figure 4B It is shown Figure 3 FIG. 1 is a diagram illustrating the operation of a switching element of an inrush current reduction circuit according to an inrush current generated when a BMS module is connected to a battery cell module.

[0050] Reference Figure 4A , since the surge current generated at the initial stage of the connection between the BMS module 10 and the battery cell module 20 is blocked by the switching element Q1 in the off state, the surge current is not transmitted to the BMS module 10 .

[0051] However, as the voltage level of the surge current continues to increase, stress on the switching element Q1 increases.

[0052] refer to Figure 4B After the BMS module 10 and the battery cell module 20 are connected to each other, when the voltage level of the surge current continues to increase, that is, when the voltage Vgs between both ends of the second resistor R5 reaches the threshold voltage Vth or higher using the voltage distribution of the first resistor R6 and the second resistor R5, the switching element Q1 is turned on to allow part of the surge current to flow therethrough.

[0053] Figure 5 is a schematic circuit diagram of an inrush current reduction circuit according to a second embodiment of the present invention.

[0054] Reference Figure 5 The surge current reduction circuit 120 according to the second embodiment further includes a capacitor C17 and a third resistor R1, which are connected in parallel according to Figure 3 Between the source and drain of the switching element Q1 of the inrush current reduction circuit 110 of the first embodiment shown, the capacitor C17 and the third resistor R1 are connected in series with each other.

[0055] When the BMS module 10 and the battery cell module 20 are connected to each other, the capacitor C17 and the third resistor R1 connected in parallel between the source and drain of the switching element Q1 allow current to flow to the capacitor C17 and the third resistor R1 connected in series to each other, and due to the characteristics of the capacitor C17, when no voltage change occurs, no current flows after a certain period of time (i.e., after a period of time depending on the capacitance of the capacitor).

[0056] Here, the capacitor C17 and the third resistor R1 are connected to each other in series.

[0057] Therefore, it is assumed that about 150 V (see FIG. 1 ) is applied to the input terminal of the switching element Q1 before providing a circuit of the capacitor C17 and the third resistor R1 connected in parallel between the source and drain of the switching element Q1. Figure 4B ), the presence of the circuit of the capacitor C17 and the third resistor R1 connected in parallel between the source and drain of the switching element Q1 allows about 125 V, that is, the voltage to be applied to the input terminal of the switching element Q1 to be reduced by about 25 V from 150 V, thereby providing an effect of reducing the stress on the switching element Q1.

[0058] Here, the voltage applied to the input terminal of the switching element Q1 may be adjusted according to the capacitance of the capacitor C17 and the resistance of the third resistor R1 .

[0059] Figure 6 is a circuit showing that when a capacitor C17 and a resistor R1 are connected in parallel between the source and drain of the switching element Q1, a current applied to Figure 5 Graph showing a voltage waveform of a decrease in the voltage at the input terminal of the switching element Q1.

[0060] refer to Figure 6 and Figure 4B, it can be seen that the presence of the circuit of the capacitor C17 and the third resistor R1 connected in parallel between the source and drain of the switching element Q1 allows a voltage reduced to about 125V (i.e., a voltage reduced by about 25V from 150V) to be applied to the input terminal of the switching element Q1, thereby providing an effect of reducing the stress on the switching element Q1.

[0061] As described above, the inrush current reduction circuit according to this embodiment can prevent damage to the circuit elements of the BMS module 10 connected to the battery cell module 20, can reduce the inrush current by turning on / off the switching element included in the inrush current reduction circuit, and can reduce the stress on the switching element Q1 through the circuit of the capacitor C17 and the third resistor R1 connected in parallel with the switching element.

[0062] Although the present invention has been described with reference to some example embodiments, it will be appreciated by those skilled in the art that these embodiments are given by way of illustration only, and that various modifications, variations and changes may be made without departing from the spirit and scope of the present invention. Therefore, the scope of the present invention shall be limited only by the appended claims and their equivalents. In addition, the embodiments described herein may be implemented as, for example, methods or processes, devices, software programs, data streams or signals. Although discussed in the context of a single type of implementation (e.g., discussed only as a method), the features discussed herein may also be implemented in other forms (e.g., devices or programs). The device may be implemented by suitable hardware, software, firmware, etc. The method may be implemented on a device such as a processor, which generally refers to a processing device including a computer, a microprocessor, an integrated circuit, a programmable logic device, etc. The processor includes a communication device such as a computer, a cellular phone, a personal digital assistant (PDA), and other devices that facilitate information communication between a device and an end user.

Claims

1. A surge current reduction circuit, comprising: A switch element connected between the power supply side of the battery management system BMS module and the power supply side of the battery cell module, and having a gate connected to the ground side through a first resistor; a diode connected at one side thereof to the source of the switching element; a second resistor connected at one side thereof to the other side of the diode and connected at the other side thereof to the ground side through the first resistor; as well as A Zener diode is connected in parallel to the second resistor.

2. The inrush current reduction circuit according to claim 1, wherein: The switching element includes a P-CH field effect transistor FET.

3. The inrush current reduction circuit according to claim 1, wherein: The drain of the switching element is connected to the power supply side of the BMS module.

4. The inrush current reduction circuit according to claim 1, wherein: The source of the switching element is connected to the power supply side of the battery cell module.

5. The inrush current reduction circuit according to claim 1, wherein: The anode of the diode is connected to the source of the switching element.

6. The inrush current reduction circuit according to claim 1, wherein: The Zener diode is connected between one side of the first resistor and the other side of the diode.

7. The inrush current reduction circuit according to claim 6, wherein: An anode of the Zener diode is connected to one side of the first resistor, and a cathode of the Zener diode is connected to a cathode of the diode.

8. The inrush current reduction circuit according to claim 1, wherein: The switching element disconnects the surge current generated in the initial stage of the connection between the BMS module and the battery cell module in the OFF state, and as the voltage level of the surge current continues to increase, the switching element is turned on when the voltage Vgs between the two ends of the second resistor reaches a threshold voltage Vth or more using voltage distribution performed by the first resistor and the second resistor to allow only a portion of the surge current to flow through the switching element.

9. The inrush current reduction circuit according to claim 1, wherein: The switching element further includes a capacitor and a third resistor connected in parallel to both ends of the switching element.

10. The inrush current reduction circuit according to claim 9, wherein: The capacitor and the third resistor are connected to each other in series.

11. The inrush current reduction circuit according to claim 9, wherein: The voltage applied to the both ends of the switching element is adjusted depending on the capacitance of the capacitor and the resistance of the third resistor.

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