High-voltage-withstanding gallium oxide transverse Schottky barrier diode realized by utilizing double-layer P-type nickel oxide and preparation method of high-voltage-withstanding gallium oxide transverse Schottky barrier diode

Abstract

The invention provides a high-voltage-resistant gallium oxide transverse Schottky barrier diode realized by using double-layer P-type nickel oxide and a preparation method thereof. The high-voltage-resistant gallium oxide transverse Schottky barrier diode comprises a substrate, an N-type gallium oxide epitaxial layer, a first P-type nickel oxide layer, a second P-type nickel oxide layer, a dielectric layer, an N-type gallium oxide heavily doped region, a cathode metal layer and an anode metal layer. The first P-type nickel oxide layer and the N-type gallium oxide epitaxial layer form a PN junction, and transverse depletion is assisted by longitudinal depletion, so that the carrier concentration of the epitaxial layer can be properly increased while the withstand voltage is improved, and the on-resistance is reduced. The second P-type nickel oxide layer is in short circuit with the anode metal layer, on one hand, the potential difference of the whole P-type nickel oxide and N-type gallium oxide is increased, the auxiliary effect of longitudinal depletion is enhanced, and the surface electric field is balanced; and on the other hand, the hole concentration of the second P-type nickel oxide layer is higher than that of the first P-type nickel oxide layer, so that anode edge electric field concentration can be relieved. Therefore, the device can realize lower on resistance and bear higher reverse breakdown voltage.

Description

Technical Field

[0001] The present invention relates to the technical field of power semiconductors, and in particular to a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide, and a preparation method thereof. Background Art

[0002] The lateral power device bears the reverse bias voltage through its lateral withstand voltage structure and longitudinal withstand voltage structure. When the electric field peak of a certain part reaches the critical breakdown electric field, the device breaks down. However, under the influence of the two-dimensional electric field, the surface of the drift region of the lateral power device is not as close to an ideal diode as the longitudinal junction in the body, causing the device surface field to reach the critical breakdown electric field before the longitudinal field. Therefore, the lateral power device has a lower withstand voltage capability than the vertical power device. The Reduce Surface Field (RESURF) technology can significantly improve the withstand voltage capability of lateral power devices by assisting lateral depletion through the longitudinal junction and reshaping the surface electric field distribution of the drift region.

[0003] exist β -Ga2O3 is based on the self-compensation of Ga and O vacancies and the large effective mass of holes due to the flat valence band. Gallium oxide currently lacks effective P-type doping. If you want to use RESURF technology to improve the withstand voltage of gallium oxide lateral Schottky barrier diodes (LSBDs), you need to provide a vertical PN junction to assist lateral depletion. Therefore, how to make RESURF technology work in gallium oxide LSBDs has become a difficult point. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide and a preparation method thereof, which effectively suppresses the surface electric field peak on the anode side. It can achieve lower on-resistance and withstand higher reverse breakdown voltage, thereby obtaining a gallium oxide LSBD device with excellent performance.

[0005] To achieve the above-mentioned purpose, the present invention adopts the following technical solution: a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide, comprising a stacked substrate (1), an N-type gallium oxide epitaxial layer (2), a first P-type nickel oxide layer (3), a second P-type nickel oxide layer (4), a dielectric layer (5), an N-type gallium oxide heavily doped region (6), a cathode metal layer (7), and an anode metal layer (8); The stacked substrate (1) and the N-type gallium oxide epitaxial layer (2) are stacked in sequence from bottom to top; the first P-type nickel oxide layer (3) is embedded in the top of the N-type gallium oxide epitaxial layer (2); the second P-type nickel oxide layer (4) is deposited on the top of the N-type gallium oxide epitaxial layer (2), the right side of the second P-type nickel oxide layer (4) is short-circuited with the anode metal layer (8), and the lower surface of the second P-type nickel oxide layer (4) is in contact with the upper surface of the first P-type nickel oxide layer (3), forming a double-layer P-type nickel oxide structure; the dielectric layer (5) covers the On the upper surface of the second P-type nickel oxide layer (4), part of the first P-type nickel oxide layer (3) and part of the N-type gallium oxide epitaxial layer (2); the upper surface of the N-type gallium oxide heavily doped region (6) is in contact with the cathode metal layer (7), the lower surface of the N-type gallium oxide heavily doped region (6) is in contact with the upper surface of the N-type gallium oxide epitaxial layer (2), and the remaining area of ​​the N-type gallium oxide epitaxial layer (2) is low-doped; the right side of the cathode metal layer (7) is in contact with the dielectric layer (5); and the left side of the anode metal layer (8) is in contact with the second P-type nickel oxide layer (4) and the dielectric layer (5).

[0006] In a preferred embodiment, the substrate (1) is an aluminum oxide heterogeneous substrate or an iron-doped gallium oxide homogeneous high-resistance substrate.

[0007] In a preferred embodiment, the N-type gallium oxide epitaxial layer (2) has a thickness of 0.2-1.2 μm and an electron concentration of 10 16 ~5.0×10 17 cm -3 , the electron concentration of the N-type gallium oxide heavily doped region (6) is 10 18 ~10 20 cm -3 .

[0008] In a preferred embodiment, the thickness of the first P-type nickel oxide layer (3) is 0.02-0.4 μm, and the hole concentration is 10 17 ~10 19 cm -3 The distance between the cathode metal layer and the anode metal layer is 1~5 μm, and the distance between the cathode metal layer and the anode metal layer is 0.1~3 μm.

[0009] In a preferred embodiment, the second P-type nickel oxide layer (4) has a thickness of 0.02-0.4 μm and a hole concentration of 10 17 ~10 20 cm -3 , and is higher than the first P-type nickel oxide layer (3), and has a distance of 3 to 8 μm from the cathode metal layer.

[0010] In a preferred embodiment, the dielectric layer (5) serves to isolate the air and protect the device, and is made of aluminum oxide, silicon nitride or silicon dioxide.

[0011] In a preferred embodiment, the cathode metal layer (7) is made of Ti metal.

[0012] In a preferred embodiment, the material of the anode metal layer (8) is selected from Au, Ni, Pt, Cu or TiN.

[0013] The present invention also provides a method for preparing a high-voltage gallium oxide lateral Schottky barrier diode using a double-layer P-type nickel oxide, and the method comprises the following steps: Step 1) pre-treating the substrate (1) to remove surface stains; Step 2) epitaxially growing an N-type gallium oxide epitaxial layer (2) on the pre-treated substrate (1); Step 3) Spin-coating photoresist on the sample surface and forming an opening pattern using a standard photolithography process; Step 4) etching the gallium oxide epitaxial layer (2) using a reactive ion etching process according to the opening pattern; Step 5) growing nickel oxide on the surface of the sample, and stripping off the photoresist to form a first P-type nickel oxide layer (3); Step 6) Spin-coating photoresist on the sample surface and forming an opening pattern using a standard photolithography process; Step 7) growing nickel oxide on the surface of the sample, and stripping the photoresist to form a second P-type nickel oxide layer (4); Step 8) epitaxially growing a dielectric layer (5) on the surface of the second P-type nickel oxide layer (4) after the growth is completed; Step 9) Spin-coating photoresist on the sample surface and forming a cathode opening pattern using a standard photolithography process; Step 10) etching the dielectric layer (5) using a reactive ion etching process according to the cathode opening pattern until the upper surface of the N-type gallium oxide epitaxial layer (2) is reached; Step 11) using an ion implantation process to form an N-type gallium oxide heavily doped region (6) on the upper surface of the gallium oxide epitaxial layer (2) exposed by etching; Step 12) depositing metal by evaporation or sputtering, and stripping the photoresist to form a cathode metal layer (7); Step 13) Spin-coating photoresist on the sample surface and forming an opening pattern at the anode using a standard photolithography process; Step 14) etching the dielectric layer (5) using a reactive ion etching process according to the opening pattern at the anode until the etching reaches the upper surface of the gallium oxide epitaxial layer (2); Step 15) Depositing metal by evaporation or sputtering, and stripping the photoresist to form an anode metal layer (8).

[0014] In a preferred embodiment, in step 2), an N-type gallium oxide epitaxial layer (2) is epitaxially grown on the pre-treated substrate (1) using a hydride vapor phase epitaxy (HVPE) or metal organic chemical vapor deposition (MOCVD) process.

[0015] Compared with the prior art, the present invention has the following beneficial effects: the present invention proposes a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide with different hole concentrations, and forms a PN junction structure with the help of the first P-type nickel oxide layer and the N-type gallium oxide epitaxial layer, which can appropriately increase the carrier concentration of the N-type gallium oxide epitaxial layer while giving full play to the advantages of RESURF technology; and then, with the help of the second P-type nickel oxide layer and the anode short-circuited, the inter-junction potential difference of the longitudinal PN junction formed by the overall P-type nickel oxide region and the N-type gallium oxide region is increased, and the effect of longitudinal depletion assisting lateral depletion is further enhanced, thereby improving the device's voltage resistance; and, its hole concentration is higher than that of the first P-type nickel oxide layer, and the dispersion effect on the anode electric field line is stronger, which effectively suppresses the electric field peak on the anode side, so that the gallium oxide LSBD device can obtain a higher reverse breakdown voltage with a lower on-resistance. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a schematic diagram of a high-voltage gallium oxide lateral Schottky barrier diode structure realized by using a double-layer P-type nickel oxide according to a preferred embodiment of the present invention; Figure 2 This is a specific process diagram of a high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide in a preferred embodiment of the present invention; Figure 3 It is a diagram showing the relationship between the withstand voltage of a high withstand voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide in a preferred embodiment of the present invention and a gallium oxide lateral Schottky barrier diode of a conventional structure; Figure 4 This is a comparison diagram of the surface electric field distribution of the drift region when a high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide in a preferred embodiment of the present invention is broken down with a gallium oxide lateral Schottky barrier diode of a conventional structure; Figure 5 It is a forward characteristic relationship diagram of a high withstand voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide in a preferred embodiment of the present invention and a gallium oxide lateral Schottky barrier diode of a conventional structure; Figure numerals: 1-substrate, 2-N-type gallium oxide epitaxial layer, 3-first P-type nickel oxide layer, 4-second P-type nickel oxide layer, 5-dielectric layer, 6-N-type gallium oxide heavily doped region, 7-cathode metal layer, 8-anode metal layer. DETAILED DESCRIPTION

[0017] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0018] It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0019] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application; as used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or their combinations.

[0020] A high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide, reference Figure 1-5 , comprising a stacked substrate 1, an N-type gallium oxide epitaxial layer 2, a first P-type nickel oxide layer 3, a second P-type nickel oxide layer 4, a dielectric layer 5, an N-type gallium oxide heavily doped region 6, a cathode metal layer 7, and an anode metal layer 8; the stacked substrate 1 and the N-type gallium oxide epitaxial layer 2 are stacked in sequence from bottom to top; the first P-type nickel oxide layer 3 is embedded in the top of the N-type gallium oxide epitaxial layer 2; the second P-type nickel oxide layer 4 is deposited on the top of the N-type gallium oxide epitaxial layer 2, the right side of the second P-type nickel oxide layer 4 is short-circuited with the anode metal layer 8, and the lower surface of the second P-type nickel oxide layer 4 is in partial contact with the upper surface of the first P-type nickel oxide layer 3, forming a double-layer P-type The nickel oxide structure; the dielectric layer 5 covers the upper surface of the second P-type nickel oxide layer 4, part of the first P-type nickel oxide layer 3 and part of the N-type gallium oxide epitaxial layer 2; the upper surface of the N-type gallium oxide heavily doped region 6 is in contact with the cathode metal layer 7, the lower surface of the N-type gallium oxide heavily doped region 6 is in contact with the upper surface of the N-type gallium oxide epitaxial layer 2, and the remaining area of ​​the N-type gallium oxide epitaxial layer 2 is low-doped; the right side of the cathode metal layer 7 is in contact with the dielectric layer 5; the left side of the anode metal layer 8 is in contact with the second P-type nickel oxide layer 4 and the dielectric layer 5; the substrate 1 is a gallium oxide high-resistance substrate doped with aluminum oxide or iron; the N-type gallium oxide epitaxial layer 2 has a thickness of 0.2~1.2 μm and an electron concentration of 10 16 ~5.0×10 17 cm-3 The electron concentration of the N-type gallium oxide heavily doped region 6 is 10 18 ~10 20 cm -3 The thickness of the first P-type nickel oxide layer 3 is 0.02~0.4 μm, and the hole concentration is 10 17 ~10 19 cm -3 , the distance between the cathode metal layer is 1~5 μm, and the distance between the anode metal layer is 0.1~3 μm; the thickness of the second P-type nickel oxide layer 4 is 0.02~0.4 μm, and the hole concentration is 10 17 ~10 20 cm -3 , and is higher than the first P-type nickel oxide layer 3, and the distance between it and the cathode metal layer is 3~8 μm; the dielectric layer 5 is made of aluminum oxide, hafnium oxide, silicon nitride or silicon dioxide; the cathode metal layer 7 is made of Ti metal; the material of the anode metal layer 8 is selected from Au, Ni, Pt, Cu or TiN.

[0021] Reference Figure 2 The present invention prepares a high-voltage gallium oxide lateral Schottky barrier diode using a double-layer P-type nickel oxide, and provides the following embodiments: Example, preparing a gallium oxide epitaxial layer with a thickness of 0.5 μm and an electron concentration of 2.4×10 17 cm -3 The thickness of the first P-type nickel oxide layer is 0.2 μm and the hole concentration is 7×10 17 cm -3 , the distance between the cathode metal layer is 4 μm, and the distance between the anode metal layer is 0.1 μm; the thickness of the second P-type nickel oxide layer is 0.1 μm, and the hole concentration is 1.8×10 18 cm -3 A high-voltage gallium oxide lateral Schottky barrier diode is realized using a double layer of P-type nickel oxide with a spacing of 7.6 μm between the cathode metal layer and the cathode metal layer.

[0022] Step 1) An alumina substrate 1 with a thickness of 500 μm is immersed in an acetone solution, an anhydrous ethanol solution and deionized water for ultrasonic cleaning in sequence, and the cleaned alumina substrate 1 is blown dry with nitrogen, and then the cleaned and dried alumina substrate 1 is heat-treated to remove surface contaminants.

[0023] Step 2) MOCVD process is used to epitaxially grow the thickness to 0.5 μm and the electron concentration to 2.4×10 17 cm -3 Gallium oxide epitaxial layer 2.

[0024] Step 3) Spin-coat photoresist on the sample surface, use standard photolithography process to form an opening pattern, and use reactive ion etching process to etch the gallium oxide epitaxial layer 2 according to the opening pattern, with an etching depth of 0.2 μm.

[0025] Step 4) Use magnetron sputtering to grow a layer with a thickness of 0.2 μm and a hole concentration of 7×10 17 cm -3 The nickel oxide is removed and the photoresist is stripped to form a first P-type nickel oxide layer 3.

[0026] Step 5) Spin-coat photoresist on the sample surface and form an opening pattern using a standard photolithography process. Based on the opening pattern, a layer with a thickness of 0.1 μm and a hole concentration of 1.8×10 18 cm -3 The nickel oxide is removed and the photoresist is stripped to form a second P-type nickel oxide layer 4.

[0027] Step 6) After the second P-type nickel oxide layer 4 is grown, an aluminum oxide dielectric layer 5 with a thickness of 0.2 μm is epitaxially grown on the surface.

[0028] Step 7) Spin-coat photoresist on the sample surface and form a cathode metal opening pattern using a standard photolithography process; according to the cathode metal opening pattern, etch the aluminum oxide dielectric layer 5 using a reactive ion etching process until the upper surface of the N-type gallium oxide epitaxial layer 2 is reached.

[0029] Step 8) The upper surface of the exposed gallium oxide epitaxial layer 2 is ion implanted to form an electron concentration of 10 20 cm -3 The heavily doped region 6.

[0030] Step 9) Depositing a layer of metal by electron beam evaporation, and stripping off the photoresist to form a cathode metal layer 7.

[0031] Step 10) Spin-coat photoresist on the sample surface, use standard photolithography to form an opening pattern at the anode, and use reactive ion etching to etch the aluminum oxide dielectric layer 5 according to the opening pattern at the anode until the upper surface of the gallium oxide epitaxial layer 2 is reached.

[0032] Step 11) forming an N-type gallium oxide heavily doped region 6 by using an ion implantation process on the upper surface of the gallium oxide epitaxial layer 2 exposed by etching; Step 12) depositing metal by evaporation or sputtering process, and stripping the photoresist to form cathode metal layer 7; Step 13) Spin-coating photoresist on the sample surface and forming an opening pattern at the anode using a standard photolithography process; Step 14) etching the dielectric layer 5 using a reactive ion etching process according to the opening pattern at the anode until the etching reaches the upper surface of the gallium oxide epitaxial layer 2; Step 15) Depositing a layer of metal by electron beam evaporation, and stripping the photoresist to form an anode metal layer 8.

[0033] More specifically, the pretreatment in step 1) includes immersing the substrate 1 in an acetone solution, an anhydrous ethanol solution and deionized water for ultrasonic cleaning for 5 to 15 minutes each, and blowing the cleaned substrate 1 dry with nitrogen, and then heat-treating the cleaned and dried substrate 1 to remove surface contaminants.

[0034] More specifically, in step 2), an N-type gallium oxide epitaxial layer 2 is epitaxially grown on the pre-treated substrate 1 by using a hydride vapor phase epitaxy (HVPE) or metal organic chemical vapor deposition (MOCVD) process.

[0035] More specifically, in step 12) and step 15), the metal layer is deposited by one or more methods including magnetron sputtering, thermal evaporation, and electron beam evaporation.

[0036] More specifically, in step 3), step 6), step 9), and step 13), the specific method of spin coating is: using a spin coater, setting the rotation speed to 1000~3000 rpm / min, and the spin coating time to 5~30 s; finally, pre-bake at a temperature of 60~150°C for 60~120 s.

[0037] The overall technical solution of the present invention mainly has two points. One is a double-layer P-type nickel oxide with different hole concentrations, wherein the first P-type nickel oxide layer is located below the top of the N-type gallium oxide epitaxial layer and forms a PN junction structure with the N-type gallium oxide epitaxial layer, thereby effectively utilizing the RESURF technology to reduce the surface electric field and increase the device breakdown voltage in the form of longitudinal depletion assisting lateral depletion, and the carrier concentration of the N-type gallium oxide epitaxial layer can be appropriately increased to reduce the on-resistance of the device; in addition, the right side of the first P-type nickel oxide layer maintains a certain distance from the anode, which can avoid the device from breaking down prematurely in the nickel oxide region; the second P-type nickel oxide layer is deposited above the top of the N-type gallium oxide epitaxial layer, and the right side is short-circuited with the anode, and its hole concentration is higher than that of the first P-type nickel oxide layer, and the dispersion effect on the electric field lines at the edge of the anode is stronger, which effectively suppresses the electric field peak on the anode side and further balances the surface electric field. Secondly, the second P-type nickel oxide layer is short-circuited with the anode, and the lower surface is in contact with the upper surface of the first P-type nickel oxide layer, thereby increasing the junction potential difference between the overall P-type nickel oxide region and the N-type gallium oxide region, further enhancing the role of longitudinal depletion in assisting lateral depletion, and achieving higher voltage resistance of the device.

[0038] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

[0039] Working principle of the present invention: Device performance is improved by introducing a double layer of P-type nickel oxide with different hole concentrations. Among them, the first P-type nickel oxide layer is located below the top of the N-type gallium oxide epitaxial layer, and forms a vertical PN junction structure with the N-type gallium oxide epitaxial layer, thereby effectively utilizing the RESURF technology to reduce the surface electric field and increase the device breakdown voltage in the form of vertical depletion assisting lateral depletion. At the same time, the carrier concentration of the N-type gallium oxide epitaxial layer can be appropriately increased to reduce the on-resistance of the device; in addition, the right side of the first P-type nickel oxide layer maintains a certain distance from the anode, which can prevent the device from breaking down prematurely in the nickel oxide region; the second P-type nickel oxide layer is deposited above the top of the N-type gallium oxide epitaxial layer, and the right side is connected to the anode. The short circuit is formed on the upper surface of the first P-type nickel oxide layer, and the lower surface is in contact with the upper surface of the first P-type nickel oxide layer, thereby increasing the inter-junction potential difference between the overall P-type nickel oxide region and the N-type gallium oxide region, further enhancing the effect of longitudinal depletion assisting lateral depletion, and achieving a higher withstand voltage of the device; and the second P-type nickel oxide layer has a higher hole concentration than the first P-type nickel oxide layer, and has a stronger dispersion effect on the electric field lines at the edge of the anode, effectively suppressing the electric field peak on the anode side, and further balancing the surface electric field; therefore, the device can withstand a higher reverse breakdown voltage with a lower on-resistance, thereby obtaining a gallium oxide LSBD device with excellent performance.

[0040] Figure 3 The hole concentration of the first P-type nickel oxide layer in the embodiment of the present invention is 7×10 17 cm -3 The hole concentration of the second P-type nickel oxide layer is higher than that of the first P-type nickel oxide layer, which is 1.8×10 18 cm -3 , and the withstand voltage relationship of the high-voltage gallium oxide lateral Schottky barrier diode realized by shorting the anode is compared with the conventional structure gallium oxide lateral Schottky barrier diode. Figure 3 It can be seen that the breakdown voltage of a conventional gallium oxide lateral Schottky barrier diode without a nickel oxide layer is only 1215 V, while the breakdown voltage of a high-voltage gallium oxide lateral Schottky barrier diode achieved using a double-layer P-type nickel oxide reaches 3039 V, and the device breakdown voltage is increased by 150%.

[0041] Figure 4 The hole concentration of the first P-type nickel oxide layer in the embodiment of the present invention is 7×10 17 cm -3The hole concentration of the second P-type nickel oxide layer is higher than that of the first P-type nickel oxide layer, which is 1.8×10 18 cm -3 , and the surface electric field distribution of the drift region when the high-voltage gallium oxide lateral Schottky barrier diode realized by shorting the anode and the conventional structure gallium oxide lateral Schottky barrier diode are broken down. Figure 4 It can be seen that the drift region surface of the conventional gallium oxide lateral Schottky barrier diode without nickel oxide layer is mainly composed of Schottky junction and N + The N-junction region bears the electric field, and the high-voltage gallium oxide lateral Schottky barrier diode realized by double-layer P-type nickel oxide allows more areas on the surface of the drift region to jointly bear the electric field, making the electric field distribution more uniform, greatly improving the voltage resistance of the gallium oxide lateral Schottky barrier diode.

[0042] Figure 5 The hole concentration of the first P-type nickel oxide layer in the embodiment of the present invention is 7×10 17 cm -3 The hole concentration of the second P-type nickel oxide layer is higher than that of the first P-type nickel oxide layer, which is 1.8×10 18 cm -3 , and the forward characteristics of the high-voltage gallium oxide lateral Schottky barrier diode realized by shorting the anode are compared with those of the conventional gallium oxide lateral Schottky barrier diode. Figure 5 It can be seen that the specific on-resistance of the conventional gallium oxide lateral Schottky barrier diode without the nickel oxide layer is 17.4 mΩ·cm 2 The specific on-resistance of the high-voltage gallium oxide lateral Schottky barrier diode realized by double-layer P-type nickel oxide is 7.7mΩ·cm 2 , the device's on-resistance was reduced by 56%.

Claims

1. A high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide, characterized in that: It comprises a stacked substrate (1), an N-type gallium oxide epitaxial layer (2), a first P-type nickel oxide layer (3), a second P-type nickel oxide layer (4), a dielectric layer (5), an N-type gallium oxide heavily doped region (6), a cathode metal layer (7), and an anode metal layer (8); The stacked substrate (1) and the N-type gallium oxide epitaxial layer (2) are stacked in sequence from bottom to top; the first P-type nickel oxide layer (3) is embedded in the top of the N-type gallium oxide epitaxial layer (2); the second P-type nickel oxide layer (4) is deposited on the top of the N-type gallium oxide epitaxial layer (2), the right side of the second P-type nickel oxide layer (4) is short-circuited with the anode metal layer (8), and the lower surface of the second P-type nickel oxide layer (4) is in contact with the upper surface of the first P-type nickel oxide layer (3), forming a double-layer P-type nickel oxide structure; the dielectric layer (5) covers the On the upper surface of the second P-type nickel oxide layer (4), part of the first P-type nickel oxide layer (3) and part of the N-type gallium oxide epitaxial layer (2); the upper surface of the N-type gallium oxide heavily doped region (6) is in contact with the cathode metal layer (7), the lower surface of the N-type gallium oxide heavily doped region (6) is in contact with the upper surface of the N-type gallium oxide epitaxial layer (2), and the remaining area of ​​the N-type gallium oxide epitaxial layer (2) is low-doped; the right side of the cathode metal layer (7) is in contact with the dielectric layer (5); and the left side of the anode metal layer (8) is in contact with the second P-type nickel oxide layer (4) and the dielectric layer (5).

2. A high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that: The substrate (1) is an aluminum oxide heterogeneous substrate or an iron-doped gallium oxide homogeneous high-resistance substrate.

3. The high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that: The N-type gallium oxide epitaxial layer (2) has a thickness of 0.2-1.2 μm and an electron concentration of 10 16 ~5.0×10 17 cm -3 , the electron concentration of the N-type gallium oxide heavily doped region (6) is 10 18 ~10 20 cm -3 .

4. The high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that: The thickness of the first P-type nickel oxide layer (3) is 0.02-0.4 μm, and the hole concentration is 10 17 ~10 19 cm -3 The distance between the cathode metal layer and the anode metal layer is 1~5 μm, and the distance between the cathode metal layer and the anode metal layer is 0.1~3 μm.

5. The high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that: The second P-type nickel oxide layer (4) has a thickness of 0.02-0.4 μm and a hole concentration of 10 17 ~10 20 cm -3 , and is higher than the first P-type nickel oxide layer (3), and has a distance of 3 to 8 μm from the cathode metal layer.

6. The high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that: The dielectric layer (5) serves to isolate air and protect components, and is made of aluminum oxide, silicon nitride or silicon dioxide.

7. The high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that: The cathode metal layer (7) is made of Ti metal.

8. The high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that: The material of the anode metal layer (8) is selected from Au, Ni, Pt, Cu or TiN.

9. A method for preparing a high-voltage gallium oxide lateral Schottky barrier diode using double-layer P-type nickel oxide, characterized in that A high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide as described in any one of claims 1 to 8 is prepared, comprising the following steps: Step 1) pre-treating the substrate (1) to remove surface stains; Step 2) epitaxially growing an N-type gallium oxide epitaxial layer (2) on the pre-treated substrate (1); Step 3) Spin-coating photoresist on the sample surface and forming an opening pattern using a standard photolithography process; Step 4) etching the gallium oxide epitaxial layer (2) using a reactive ion etching process according to the opening pattern; Step 5) growing nickel oxide on the surface of the sample, and stripping off the photoresist to form a first P-type nickel oxide layer (3); Step 6) Spin-coating photoresist on the sample surface and forming an opening pattern using a standard photolithography process; Step 7) growing nickel oxide on the surface of the sample, and stripping the photoresist to form a second P-type nickel oxide layer (4); Step 8) epitaxially growing a dielectric layer (5) on the surface of the second P-type nickel oxide layer (4) after the growth is completed; Step 9) Spin-coating photoresist on the sample surface and forming a cathode opening pattern using a standard photolithography process; Step 10) etching the dielectric layer (5) using a reactive ion etching process according to the cathode opening pattern until the upper surface of the N-type gallium oxide epitaxial layer (2) is reached; Step 11) using an ion implantation process to form an N-type gallium oxide heavily doped region (6) on the upper surface of the gallium oxide epitaxial layer (2) exposed by etching; Step 12) depositing metal by evaporation or sputtering process, and stripping the photoresist to form a cathode metal layer (7); Step 13) Spin-coating photoresist on the sample surface and forming an opening pattern at the anode using a standard photolithography process; Step 14) etching the dielectric layer (5) using a reactive ion etching process according to the opening pattern at the anode until the etching reaches the upper surface of the gallium oxide epitaxial layer (2); Step 15) Depositing metal by evaporation or sputtering, and stripping the photoresist to form an anode metal layer (8).

10. The method for preparing a high-voltage gallium oxide lateral Schottky barrier diode using double-layer P-type nickel oxide according to claim 9, characterized in that: In step 2), an N-type gallium oxide epitaxial layer (2) is epitaxially grown on the pre-treated substrate (1) using a hydride vapor phase epitaxy (HVPE) or metal organic chemical vapor deposition (MOCVD) process.

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