A high thermal conductivity AlGaN / In x Al 1-x Sb high electron mobility transistor and its fabrication method

Abstract

This invention relates to an AlGaN / In with high thermal conductivity x Al 1‑ x Sb high electron mobility transistor and its fabrication method, the transistor comprising: a high thermal conductivity substrate layer, a buffer layer, and an In... x Al 1‑x The structure consists of an Sb channel layer, an AlGaN barrier layer, a cap layer, a source, a drain, a passivation layer, and a gate; where x ranges from 0.8 to 1; In x Al 1‑x The Sb channel layer and the AlGaN barrier layer form an AlGaN / In x Al 1‑x Sb heterojunction. The AlGaN / In of this invention. x Al 1‑x Sb heterojunctions have a larger bandgap difference, which can generate a higher concentration of 2DEG in the channel and improve the heat dissipation performance of the device through a high thermal conductivity substrate, thereby improving the switching characteristics of the device and its performance and stability in high-temperature and high-power applications.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, specifically relating to a high thermal conductivity AlGaN / In x Al 1-x Sb high electron mobility transistor and its fabrication method. Background Technology

[0002] Traditional high electron mobility transistors (HEMTs) are mainly made of AlGaN / GaN heterojunctions, and most of these HEMT devices are epitaxially structured on sapphire substrates.

[0003] However, the low concentration of two-dimensional electron gas in the channel of traditional AlGaN / GaN high electron mobility transistors affects the switching characteristics and stability of the device under high temperature and high power conditions. Furthermore, due to the high bias voltage operation, excessive power dissipation in HEMT devices leads to temperature rise, and the limited heat dissipation capacity of traditional low thermal conductivity substrates and heat dissipation pathways hinders heat diffusion to the surrounding environment, thereby enhancing phonon scattering and reducing carrier mobility in the potential well. This significantly limits the application scenarios of AlGaN / GaN HEMTs. Summary of the Invention

[0004] To address the aforementioned problems in the prior art, this invention provides an AlGaN / In material with high thermal conductivity. x Al 1-x Sb high electron mobility transistor and its fabrication method. The technical problem to be solved by this invention is achieved through the following technical solution:

[0005] The first aspect of the present invention provides an AlGaN / In material with high thermal conductivity. x Al 1-x Sb high electron mobility transistor, comprising: a high thermal conductivity substrate layer, a buffer layer, and an In layer. x Al 1-x Sb channel layer, AlGaN barrier layer, cap layer, source, drain, passivation layer and gate;

[0006] The high thermal conductivity substrate layer, the buffer layer, and the In x Al 1-x The Sb channel layer, the AlGaN barrier layer, and the cap layer are arranged sequentially from bottom to top; wherein, the value of x ranges from 0.8 to 1; the In x Al 1-x The Sb channel layer and the AlGaN barrier layer form an AlGaN / In x Al 1-x Sb heterojunction;

[0007] The source and the drain are spaced apart on the upper surface of the cap layer;

[0008] The passivation layer covers the surfaces of the cap layer, the source electrode, and the drain electrode;

[0009] The gate is disposed between the source and the drain, and extends from the upper surface of the passivation layer to the upper surface of the cap layer.

[0010] In one feasible implementation, the number of both the source and the gate is two;

[0011] The drain is disposed between the two sources and is spaced apart from both sources;

[0012] The two gates are disposed at the interval between the drain and the two sources, and there is a gap between the gates and the sources and the drain.

[0013] One feasible approach also includes interconnected metal;

[0014] The interconnect metal is disposed on the upper surfaces of the source and the drain, penetrating the passivation layer.

[0015] In one feasible approach, the material of the high thermal conductivity substrate layer includes diamond or SiC.

[0016] In one feasible embodiment, the buffer layer is made of GaN and has a thickness of 0.5–5 μm.

[0017] In one feasible manner, x = 1, the In x Al 1-x The material of the Sb channel layer is InSb.

[0018] In one feasible manner, the In x Al 1-x The thickness of the Sb channel layer is 1–5 nm.

[0019] In one feasible embodiment, the AlGaN barrier layer has a thickness of 10–30 nm and an Al content of 10%–30% in the AlGaN barrier layer.

[0020] In one feasible embodiment, the cap layer is made of InSb and has a thickness of 2–3 nm;

[0021] The passivation layer is made of SiN.

[0022] A second aspect of the present invention provides an AlGaN / In material with high thermal conductivity. x Al 1-xThe method for fabricating Sb high electron mobility transistors is used to prepare the high thermal conductivity AlGaN / In transistors provided in the first aspect of this invention. x Al 1-x Sb high electron mobility transistor, comprising the following steps:

[0023] S1: A buffer layer and an In layer are grown sequentially from bottom to top on the surface of a high thermal conductivity substrate. x Al 1-x Sb channel layer, AlGaN barrier layer and cap layer;

[0024] S2: Source and drain electrodes spaced apart are prepared on the surface of the cap layer;

[0025] S3: Prepare a passivation layer on the surface of the cap layer, the source electrode, and the drain electrode;

[0026] S4: Etch the passivation layer to form a gate trench located between the source and the drain, extending from the upper surface of the passivation layer to the upper surface of the cap layer; fabricate a gate in the gate trench.

[0027] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0028] The high thermal conductivity AlGaN / In provided by this invention x Al 1-x Sb high electron mobility transistor, through In x Al 1-x The Sb channel layer and AlGaN barrier layer form an AlGaN / In x Al 1-x Sb heterojunction to replace the traditional AlGaN / GaN heterojunction, AlGaN / In x Al 1-x The Sb heterojunction has a larger bandgap difference, which can generate a higher concentration of 2DEG in the channel. The high thermal conductivity substrate layer improves the heat dissipation performance of the device, effectively alleviates the self-heating effect of the device under high bias voltage operation, and thus improves the switching characteristics of the device and its performance and stability in high temperature and high power application scenarios. Attached Figure Description

[0029] Figure 1 This invention provides an AlGaN / In material with high thermal conductivity. x Al 1-x Schematic diagram of the structure of an Sb high electron mobility transistor;

[0030] Figures 2a to 2i This invention provides an AlGaN / In material with high thermal conductivity. x Al 1-xA schematic diagram of the steps involved in fabricating an Sb high electron mobility transistor.

[0031] Figure label:

[0032] 1: High thermal conductivity substrate layer; 2: Buffer layer; 3: In x Al 1-x 4: Sb channel layer; 5: AlGaN barrier layer; 6: cap layer; 7: source; 8: drain; 9: passivation layer; 10: gate; 11: interconnect metal. Detailed Implementation

[0033] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0034] Example 1

[0035] Please see Figure 1 , Figure 1 This invention provides an AlGaN / In material with high thermal conductivity. x Al 1-x A schematic diagram of the structure of an Sb high electron mobility transistor.

[0036] This embodiment provides an AlGaN / In with high thermal conductivity. x Al 1-x Sb high electron mobility transistor, comprising: high thermal conductivity substrate layer 1, buffer layer 2, In x Al 1-x Sb channel layer 3, AlGaN barrier layer 4, cap layer 5, source 6, drain 7, passivation layer 8, and gate 9. High thermal conductivity substrate layer 1, buffer layer 2, In x Al 1-x The Sb channel layer 3, AlGaN barrier layer 4, and cap layer 5 are arranged sequentially from bottom to top. Here, x represents In... x Al 1-x The In content of Sb, x ranges from 0.8 to 1. x Al 1-x Sb channel layer 3 and AlGaN barrier layer 4 form AlGaN / In x Al 1-x An Sb heterojunction is formed. Source 6 and drain 7 are spaced apart on the upper surface of cap layer 5. Passivation layer 8 covers the surfaces of cap layer 5, source 6, and drain 7. Gate 9 is disposed between source 6 and drain 7, extending from the upper surface of passivation layer 8 to the upper surface of cap layer 5.

[0037] Specifically, in x Al 1-xAs a third-generation semiconductor material, Sb possesses high electron mobility and electron saturation drift velocity, allowing it to form diverse quantum well band structures with the wide-bandgap material AlGaN. These quantum well structures offer strong confinement capabilities for charge carriers. This embodiment utilizes In... x Al 1-x Sb channel layer 3 and AlGaN barrier layer 4 form AlGaN / In x Al 1-x Sb heterojunction to replace the traditional AlGaN / GaN heterojunction, AlGaN / In x Al 1-x The Sb heterojunction has a larger bandgap difference, enabling the generation of a higher concentration of two-dimensional electron gas (2DEG) in the channel. Furthermore, the high thermal conductivity substrate layer 1 enhances the device's heat dissipation performance, effectively mitigating self-heating effects under high bias voltage operation. This, in turn, improves the device's switching characteristics and performance and stability in high-temperature, high-power applications. Moreover, by adjusting In... x Al 1-x The ratio of Al to In components in the Sb channel layer 3 can achieve different device performance requirements.

[0038] In this embodiment, there are two sources 6 and two gates 9. The drain 7 is disposed between the two sources 6 and is spaced apart from both sources 6. The two gates 9 are disposed between the drain 7 and the two sources 6, and are spaced apart from both the gates 9 and the sources 6 and the drain 7.

[0039] In one feasible manner, this embodiment provides AlGaN / In with high thermal conductivity. x Al 1-x The Sb high electron mobility transistor also includes interconnect metal 10. Interconnect metal 10 is disposed on the upper surfaces of the source 6 and drain 7, penetrating the passivation layer 8.

[0040] In this embodiment, the high thermal conductivity substrate 1 is made of diamond or SiC. The buffer layer 2 is made of GaN and has a thickness of 0.5–5 μm. x Al 1-x The thickness of the Sb channel layer 3 is 1–5 nm. The thickness of the AlGaN barrier layer 4 is 10–30 nm, and the Al content in the AlGaN barrier layer 4 is 10%–30%. The cap layer 5 is made of InSb and has a thickness of 2–3 nm. The passivation layer 8 is made of SiN. The gate 9 is a T-type gate.

[0041] Specifically, InSb material has a small work function, and using InSb as the cap layer 5 makes it easier for the source 6 and drain 7 to form ohmic contacts.

[0042] In one feasible way, x = 0.8, In x Al 1-x The material of Sb channel layer 3 is In 0.8 Al 0.2 Sb.

[0043] In another feasible way, x = 0.9, In x Al 1-x The material of Sb channel layer 3 is In 0.9 Al 0.1 Sb.

[0044] In yet another feasible way, x = 1, In x Al 1-x The material of the Sb channel layer 3 is InSb. InSb has the highest electron mobility and electron saturation drift velocity. The AlGaN / InSb heterojunction can further increase the 2DEG concentration of the device, thereby further improving the switching characteristics and performance of the device in high-power applications.

[0045] The second aspect of this embodiment provides an AlGaN / In with high thermal conductivity. x Al 1-x A method for fabricating an Sb high electron mobility transistor, used to fabricate the transistor provided in the first aspect of this embodiment, includes the following steps:

[0046] S1: Buffer layer 2 and In are grown sequentially from bottom to top on the surface of high thermal conductivity substrate 1. x Al 1-x Sb channel layer 3, AlGaN barrier layer 4, and cap layer 5.

[0047] Specifically, step S1 includes:

[0048] S101: As Figure 2a As shown, diamond or SiC material is used as a high thermal conductivity substrate 1, and the high thermal conductivity substrate 1 is cleaned to remove organic and inorganic residues on the surface.

[0049] In one feasible approach, a diamond material is obtained as a high thermal conductivity substrate 1. The high thermal conductivity substrate 1 is ultrasonically cleaned with acetone, then washed with anhydrous ethanol to remove the acetone and dried to remove organic and inorganic residues from the surface of the high thermal conductivity substrate 1.

[0050] S102: As Figure 2b As shown, a 0.5–5 μm GaN layer is grown on the upper surface of a high thermal conductivity substrate 1 using a novel vapor phase epitaxial growth technique (MOCVD) as a buffer layer 2.

[0051] In one feasible approach, a high thermal conductivity substrate 1 is placed within the MOCVD reaction chamber, and the reaction chamber is evacuated to a vacuum level of 3 × 10⁻⁶. -2 Torr, the temperature in the reaction chamber is maintained at 950℃. Under the condition of maintaining a pressure of 20 Torr, Ga(CH3)3 at a flow rate of 25 sccm is introduced, and then the temperature is raised to 1000℃ and NH3 at a flow rate of 1500 sccm is introduced to grow a GaN layer with a thickness of 2 μm on the upper surface of the high thermal conductivity substrate 1, thus obtaining the buffer layer 2.

[0052] S103: As Figure 2c As shown, unintentionally doped In of 1–5 nm is grown on the upper surface of buffer layer 2 using molecular beam epitaxy (MBE). x Al 1-x Sb, as In x Al 1-x Sb channel layer 3. Where x represents In x Al 1-x The molar content of In in Sb, x ranges from 0.8 to 1.

[0053] In one feasible approach, the wafer obtained in step S102 is moved from the MOCVD chamber to the molecular beam epitaxy (MBE) chamber, maintaining an Sb / In beam current ratio of 3, and the temperatures of the indium beam source and the antimony pyrolysis beam source are increased separately until the equivalent pressure of the indium beam reaches 5 × 10⁻⁶. -8 mbar, the equivalent pressure of the antimony pyrolysis beam reaches 15 × 10 mbar. -8 After mbar, the baffles of both the indium and antimony beam sources were simultaneously turned on to begin InSb nucleation layer growth. Once the nucleation layer growth was complete, the In and Sb beam currents were kept constant, and the growth temperature was increased to 250℃ to begin InSb channel layer growth. After InSb grew to 5 nm, heating was stopped, and the layer was allowed to cool naturally to room temperature. x Al 1-x When the value of x in Sb channel layer 3 is 1, it is an InSb channel layer. It should be understood that the InSb nucleation layer acts as a buffer layer 2 and In... x Al 1-x The transition between Sb channel layers 3 is to improve In x Al 1-x Material quality of Sb channel layer 3.

[0054] S104: As Figure 2d As shown, in In x Al 1-x On the upper surface of the Sb channel layer 3, AlGaN of 10–30 nm is grown using a novel vapor phase epitaxy (MOCVD) technique, serving as the AlGaN barrier layer 4. x Al 1-xSb channel layer 3 and AlGaN barrier layer 4 form AlGaN / In x Al 1-x Sb heterojunction.

[0055] In one feasible manner, the wafer obtained in step S103 is transferred from the MBE chamber to the MOCVD chamber, the temperature of the reaction chamber is raised to 1000°C, and a nitrogen source with a flow rate of 2000 sccm, a gallium source with a flow rate of 50 sccm, and an aluminum source with a flow rate of 20 sccm are introduced. An AlGaN barrier layer 4 with an Al composition of 30% and a thickness of 20 nm is grown using the MOCVD growth process.

[0056] S105: As Figure 2e As shown, 2-3 nm InSb is grown on the upper surface of AlGaN barrier layer 4 using MBE as cap layer 5.

[0057] In one feasible approach, the wafer obtained in step S103 is moved from the MOCVD chamber to the MBE chamber. While maintaining the Sb / In beam current ratio at 3, the temperatures of the indium beam source and the antimony pyrolysis beam source are increased separately until the equivalent pressure of the indium beam reaches 5 × 10⁻⁶. -8 mbar, the equivalent pressure of the antimony pyrolysis beam reaches 15 × 10 mbar. -8 After mbar, the baffles of both the indium and antimony beam sources are simultaneously turned on to begin the growth of the InSb nucleation layer. Once the nucleation layer has grown to a certain thickness, the In and Sb beam currents are kept constant, and the growth temperature is increased to 250°C to begin the growth of the InSb cap layer. After the InSb has grown to 2.5 nm, heating is stopped, and the layer is allowed to cool naturally to room temperature. It should be understood that the InSb nucleation layer serves as a transition between the AlGaN barrier layer 4 and the cap layer 5 to improve the material quality of the cap layer 5.

[0058] The grown wafer was transferred to the MBE chamber, maintaining an Sb / In beam current ratio of 3, and the temperatures of the indium beam source and the antimony pyrolysis beam source were increased separately until the indium beam equivalent pressure reached 5 × 10⁻⁶. -8 mbar, the equivalent pressure of the antimony pyrolysis beam reaches 15 × 10 mbar. -8 After mbar, the baffles of the indium and antimony beam sources are simultaneously turned on to begin the growth of the InSb nucleation layer. After the nucleation layer growth is complete, the In and Sb beam currents are kept constant, and the growth temperature is increased to 250℃ to begin the growth of the InSb cap layer 5. After the InSb has grown to 2.5 nm, the heating is stopped, and the material is allowed to cool naturally to room temperature.

[0059] S2: Source electrode 6 and drain electrode 7 are prepared at intervals on the surface of cap layer 5.

[0060] like Figure 2fAs shown, the epitaxial wafer obtained in step S1 is cleaned, and then photolithographic alignment marks are made at both ends of the upper surface of the cap layer 5 to facilitate subsequent overlay processes. Next, a Ti / Al / Ni / Au multilayer metal (20nm / 160nm / 55nm / 45nm) is deposited on the upper surface of the cap layer 5 using electron beam evaporation. Then, rapid thermal annealing at 850–900℃ in an N2 environment forms ohmic contacts, resulting in spaced source electrodes 6 and drain electrodes 7. Furthermore, there are two source electrodes 6, and the drain electrode 7 is positioned between the two source electrodes 6, with a gap between it and both source electrodes 6. After the source electrodes 6 and drain electrodes 7 are fabricated, ion implantation is performed at both ends of the epitaxial wafer to create device isolation regions, achieving isolation of the active regions and preventing mutual interference between devices.

[0061] In one feasible approach, the epitaxial wafer obtained in step S1 is ultrasonically cleaned with acetone, then washed with anhydrous ethanol to remove the acetone and dried to remove grease and oxides from the sample surface. Subsequently, photolithographic alignment marks are fabricated at both ends of the upper surface of the cap layer 5. The annealing temperature is 850℃ for 50 seconds.

[0062] S3: A passivation layer 8 is prepared on the surface of the cap layer 5, the source electrode 6, and the drain electrode 7.

[0063] like Figure 2g As shown, plasma-enhanced chemical vapor deposition (PECVD) was used to passivate the surface of the cap layer 5, source 6, and drain 7 with Si3N4. After passivation, an ellipsometry was used to monitor the thickness and refractive index of Si3N4 to ensure that they were within the set range. The leakage current of Si3N4 was also monitored to ensure that it met the device requirements.

[0064] In one feasible approach, prior to preparing the passivation layer 8, the sample undergoes a pre-passivation surface treatment. First, it is sequentially cleaned with an organic solution of acetone and isopropanol. Then, the sample is immersed in an ammonia solution (28% ammonia:H2O = 1:6) at 55°C for 5 minutes, followed by rinsing with deionized water and drying with N2. Subsequently, the device is passivated using a PECVD device with a Si3N4 surface thickness of 20 nm. The deposition conditions are: temperature 250°C, pressure 600 mTorr, and RF power 22 W.

[0065] S4: Etch passivation layer 8 to form a gate trench located between source 6 and drain 7, extending from the upper surface of passivation layer 8 to the upper surface of cap layer 5, and fabricate gate 9 in the gate trench.

[0066] like Figure 2hAs shown, a gate trench is formed between the source 6 and the drain 7 using photolithography. After the gate trench photolithography is completed, a hard film is formed on a hot plate. The passivation layer 8 in the gate trench region is removed using inductively coupled plasma etching (ICP), and then gate metal is deposited. The gate metal should be neat and free of adhesion to obtain the gate 9. In this embodiment, there are two gate trench photolithography regions, which are located at the interval between the drain 7 and the two sources 6, and there are gaps between the gate trench photolithography regions and both the source 6 and the drain 7. Figure 2i As shown, after the gate 9 is fabricated, the passivation layer 8 on the upper surface of the source 6 and drain 7 is etched through openings to expose the source 6 and drain 7. Interconnect metal 10 is deposited or electroplated in the etched area to complete the fabrication of the device.

[0067] In one feasible approach, the ICP process conditions are: upper electrode power 80W, lower electrode power 10W, CF4 flow rate 25sccm, O2 flow rate 5sccm, and etching rate 0.67nm / s.

[0068] This embodiment provides AlGaN / In with high thermal conductivity. x Al 1-x Sb high electron mobility transistor, through In x Al 1- x Sb channel layer 3 and AlGaN barrier layer 4 form AlGaN / In x Al 1-x Sb heterojunction to replace the traditional AlGaN / GaN heterojunction, AlGaN / In x Al 1-x The Sb heterojunction has a larger bandgap difference, enabling the generation of higher concentration 2DEG in the channel. The high thermal conductivity substrate layer 1 enhances the device's heat dissipation performance, effectively mitigating self-heating under high bias voltage operation. This, in turn, improves the device's switching characteristics and performance and stability in high-temperature, high-power applications. Furthermore, the InSb cap layer 5, with its low work function, facilitates the formation of ohmic contacts between the source 6 and drain 7.

[0069] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. An AlGaN / In with high thermal conductivity x Al 1-x Sb high electron mobility transistor, characterized in that... include: High thermal conductivity substrate (1), buffer layer (2), In x Al 1-x Sb channel layer (3), AlGaN barrier layer (4), cap layer (5), source (6), drain (7), passivation layer (8) and gate (9); The high thermal conductivity substrate layer (1), the buffer layer (2), and the In x Al 1-x The Sb channel layer (3), the AlGaN barrier layer (4), and the cap layer (5) are arranged sequentially from bottom to top; wherein, the value of x ranges from 0.8 to 1; the In x Al 1-x The Sb channel layer (3) and the AlGaN barrier layer (4) form an AlGaN / In x Al 1-x Sb heterojunction; The source electrode (6) and the drain electrode (7) are disposed at intervals on the upper surface of the cap layer (5); The passivation layer (8) covers the surfaces of the cap layer (5), the source electrode (6), and the drain electrode (7); The gate (9) is disposed between the source (6) and the drain (7) and extends from the upper surface of the passivation layer (8) to the upper surface of the cap layer (5).

2. The AlGaN / In with high thermal conductivity according to claim 1 x Al 1-x Sb high electron mobility transistor, characterized in that... The number of the source electrode (6) and the gate electrode (9) are both two; The drain (7) is disposed between the two sources (6) and is spaced apart from both sources (6); The two gates (9) are disposed at the interval between the drain (7) and the two sources (6), and there is a gap between the gates (9) and the sources (6) and the drain (7).

3. The AlGaN / In with high thermal conductivity according to claim 1 x Al 1-x Sb high electron mobility transistor, characterized in that... It also includes interconnect metals (10); The interconnect metal (10) is disposed on the upper surfaces of the source (6) and the drain (7) and penetrates the passivation layer (8).

4. The AlGaN / In with high thermal conductivity according to claim 1 x Al 1-x Sb high electron mobility transistor, characterized in that... The material of the high thermal conductivity substrate (1) includes diamond or SiC.

5. The AlGaN / In with high thermal conductivity according to claim 1 x Al 1-x Sb high electron mobility transistor, characterized in that... The material of the buffer layer (2) includes GaN, and the thickness is 0.5 to 5 μm.

6. The AlGaN / In with high thermal conductivity according to claim 1 x Al 1-x Sb high electron mobility transistor, characterized in that... x = 1, the In x Al 1-x The material of the Sb channel layer (3) is InSb.

7. The AlGaN / In with high thermal conductivity according to claim 1 x Al 1-x Sb high electron mobility transistor, characterized in that... The In x Al 1-x The thickness of the Sb channel layer (3) is 1–5 nm.

8. An AlGaN / In material with high thermal conductivity according to claim 1 x Al 1-x Sb high electron mobility transistor, characterized in that... The AlGaN barrier layer (4) has a thickness of 10-30 nm and the Al content in the AlGaN barrier layer (4) is 10%-30%.

9. The AlGaN / In with high thermal conductivity according to claim 1 x Al 1-x Sb high electron mobility transistor, characterized in that... The cap layer (5) is made of InSb and has a thickness of 2-3 nm; The passivation layer (8) is made of SiN.

10. An AlGaN / In with high thermal conductivity x Al 1-x The method for fabricating Sb high electron mobility transistors is characterized by, Used for preparing AlGaN / In with high thermal conductivity as described in any one of claims 1 to 9 x Al 1-x Sb high electron mobility transistor, comprising the following steps: S1: Buffer layer (2) and In are grown sequentially from bottom to top on the surface of the high thermal conductivity substrate (1). x Al 1-x Sb channel layer (3), AlGaN barrier layer (4) and cap layer (5); S2: A source electrode (6) and a drain electrode (7) are prepared at intervals on the surface of the cap layer (5); S3: A passivation layer (8) is prepared on the surface of the cap layer (5), the source electrode (6) and the drain electrode (7); S4: Etch the passivation layer (8) to form a gate trench located between the source (6) and the drain (7) and extending from the upper surface of the passivation layer (8) to the upper surface of the cap layer (5); fabricate a gate (9) in the gate trench.

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