Display panel and display device

By setting up the isolation structure and conductive layer connection of partition block design in the display panel, the product defect problem under the influence of static electricity is solved, and higher stability and reliability are achieved.

CN119907461APending Publication Date: 2025-04-29HEFEI VISIONOX TECH CO LTD +1
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Patent Information

Application Number
CN202411817312.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-10
Publication Date
2025-04-29

AI Technical Summary

Technical Problem

Existing display products are susceptible to static electricity, resulting in poor product.

Method used

By setting up multiple isolation structures in the display panel, a partition block design is formed, and the charge aggregation on the isolation structure in each sub-region is relatively limited, reducing the risk of electrostatic discharge. At the same time, the conductive layer connects the isolation structure of adjacent sub-regions to form an electrical connection, disperse the electric field distribution, and avoid excessive local electric field.

Benefits of technology

It effectively reduces the product defect rate caused by electrostatic discharge and improves the stability and reliability of the product in an electrostatic environment.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a display panel and a display device, the display panel is provided with a display area and a non-display area at least partially surrounding the display area, and the display area comprises a plurality of sub-areas; the display panel comprises a substrate and a plurality of isolation structures, and the isolation structures are arranged on one side of the substrate and located in the corresponding sub-areas; the isolation structure encloses to form an isolation opening for accommodating at least part of the light-emitting device; wherein the isolation structures in the adjacent sub-regions are at least partially arranged at intervals. According to the display panel, the isolation structures are arranged at intervals to form a partition block design, and the display area is divided into a plurality of sub-areas, so that charge accumulation on the isolation structures in each sub-area is relatively limited, and the risk of electrostatic discharge caused by excessive accumulation of local charges is reduced. And meanwhile, the electric field distribution becomes relatively dispersed and uniform due to the partitioned design, the situation that the local electric field is too strong is avoided, and the phenomena of air breakdown and arc discharge caused by the strong electric field are reduced.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] OLED (Organic Light-Emitting Diode) is an active light-emitting device with a sandwich structure consisting of multiple organic layers and electrodes on both sides. At present, the market size of display panels based on AMOLED (Active-matrix organic light-emitting diode) continues to increase, and it continues to expand from the field of smartphones to the fields of medium-sized display panels such as tablets, laptops, and vehicles. In the preparation process of traditional display panels, the graphicization of luminous pixels is usually achieved through a fine metal mask (FMM). FMM technology is mature and has rich experience in mass production. However, FMM technology also has problems such as limited accuracy, high development cost, and long development cycle. The non-fine metal mask technology eliminates the limitations of traditional OLED processes on display size, resolution and other screen performance, and has the advantages of high performance, full-domain size, and agile delivery. Patents CN118251982A, CN116648095A, CN117062489A, CN118742138A, CN118678783A, CN118660598A, CN118675450A, CN118824188A, and CN118781966A record relevant contents of the non-fine metal mask technology for reference.

[0003] However, existing display products are easily affected by static electricity, resulting in product defects. Summary of the invention

[0004] In view of this, the purpose of the present application is to provide a display panel and a display device that are helpful to improve the static electricity problem.

[0005] Based on the above purpose, the present application provides a display panel, the display panel having a display area and a non-display area at least partially surrounding the display area, the display area including a plurality of sub-areas; the display panel includes:

[0006] substrate;

[0007] A plurality of isolation structures are arranged on one side of the substrate and located in the corresponding sub-regions; the isolation structures enclose and form isolation openings for accommodating at least part of the light-emitting devices;

[0008] Wherein, the isolation structures in adjacent sub-regions are at least partially spaced apart from each other.

[0009] In one embodiment, the display panel further includes:

[0010] A conductive layer, through which the isolation structures in adjacent sub-regions are electrically connected.

[0011] In one embodiment, the conductive layer and the isolation structure are arranged in different layers and are connected through vias;

[0012] Preferably, the light emitting device comprises a first electrode, a light emitting functional layer and a second electrode which are sequentially stacked on the substrate in a direction away from the substrate, and the orthographic projection of the conductive layer on the substrate is spaced apart from the orthographic projection of the first electrode on the substrate.

[0013] Preferably, the orthographic projections of the isolation structures located at both sides of the gap on the substrate at least partially overlap with the orthographic projections of the conductive layer on the substrate.

[0014] In one embodiment, the display panel further includes:

[0015] A pixel definition layer is arranged on a side of the isolation structure close to the substrate, the pixel definition layer defines a pixel opening corresponding to the isolation opening, and the light emitting device is at least partially located in the pixel opening; the conductive layer is arranged between the substrate and the pixel definition layer;

[0016] Preferably, the orthographic projection of the conductive layer on the substrate is located within the orthographic projection of the pixel definition layer on the substrate.

[0017] In one embodiment, the pixel definition layer includes the via hole, and the isolation structure is electrically connected to the conductive layer through the via hole;

[0018] Preferably, the orthographic projection of the via hole on the substrate is located within the orthographic projection of the isolation structure on the substrate;

[0019] Preferably, the depth of the via hole is equal to the depth of the pixel opening.

[0020] In one embodiment, a plurality of the sub-areas are arranged in a matrix in the display area;

[0021] Preferably, a plurality of the light-emitting devices are arranged in the sub-region.

[0022] In one embodiment, the display panel further includes:

[0023] A first power line, electrically connected to the first electrode and at least located in the non-display area;

[0024] The second power line is electrically connected to the isolation structure and / or the conductive layer and is at least located in the non-display area.

[0025] In one embodiment, the isolation structure includes a first support portion and a crown portion, and the crown portion is disposed on a side of the first support portion away from the substrate;

[0026] Preferably, the conductive layer is electrically connected to the first supporting portion;

[0027] Preferably, the orthographic projection of one end of the first supporting portion close to the crown portion on the substrate is located within the orthographic projection of the crown portion on the substrate;

[0028] Preferably, the material of the first supporting portion includes aluminum;

[0029] Preferably, the material of the crown comprises titanium.

[0030] In one embodiment, the isolation structure further includes a second supporting portion, and the second supporting portion is disposed on a side of the first supporting portion close to the substrate;

[0031] Preferably, the conductive layer is electrically connected to the second supporting portion;

[0032] Preferably, the material of the second supporting portion includes molybdenum.

[0033] In one embodiment, the display panel further includes:

[0034] A first encapsulation layer, the first encapsulation layer covers a surface of the light-emitting device away from the substrate and at least covers a side wall of the isolation opening;

[0035] a second encapsulation layer, the second encapsulation layer being located on a side of the first encapsulation layer away from the substrate, a gap being formed between the isolation structures in adjacent sub-regions, and the second encapsulation layer filling the gap;

[0036] Preferably, the second encapsulation layer is an organic layer;

[0037] Preferably, the display panel further comprises a third encapsulation layer, and the second encapsulation layer is located between the first encapsulation layer and the third encapsulation layer;

[0038] Preferably, the first encapsulation layer and the third encapsulation layer are inorganic layers.

[0039] Based on the same inventive concept, the present application further provides a display panel, wherein the display panel has a display area, wherein the display area includes a plurality of sub-areas; the display panel includes:

[0040] substrate;

[0041] A plurality of isolation structures are arranged on one side of the substrate and located in the corresponding sub-regions; the isolation structures enclose and form isolation openings for accommodating at least part of the light-emitting devices; and there are gaps between the isolation structures in adjacent sub-regions;

[0042] A conductive layer, wherein the isolation structures in adjacent sub-regions are electrically connected via the conductive layer, an orthographic projection of the conductive layer on the substrate partially overlaps with an orthographic projection of the gap on the substrate, and a partial area of ​​the orthographic projection of the gap on the substrate is located outside the orthographic projection of the conductive layer on the substrate.

[0043] In one embodiment, the conductive layer and the isolation structure are arranged in different layers and are connected through a via.

[0044] In one embodiment, the conductive layer and the isolation structure are disposed in the same layer.

[0045] Based on the same inventive concept, the present application also provides a display device, which includes the above-mentioned display panel.

[0046] Compared with the prior art, the display panel provided by the present application divides the display area into multiple sub-areas by designing the isolation structure into partition blocks, so that the charge accumulation on the isolation structure in each sub-area is relatively limited, reducing the risk of electrostatic discharge caused by excessive accumulation of local charges. At the same time, the partition block design makes the electric field distribution relatively dispersed and uniform, avoiding the situation where the local electric field is too strong, reducing the air breakdown and arc discharge caused by the strong electric field, thereby improving the stability and reliability of the product in an electrostatic environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0048] Figure 1 is a structural schematic diagram of a related display panel;

[0049] Figure 2 is a schematic diagram of a hierarchical structure of a related display panel;

[0050] Figure 3 A schematic diagram of the structure of a display panel provided in one embodiment of the present application;

[0051] Figure 4A schematic diagram of a hierarchical structure of a display panel provided in an embodiment of the present application;

[0052] Figure 5 A schematic diagram of the structure of a display panel provided in another embodiment of the present application;

[0053] Figure 6 A schematic diagram of a hierarchical structure of a display panel provided in another embodiment of the present application;

[0054] Figure 7 A schematic diagram of a hierarchical structure of a display panel provided in another embodiment of the present application;

[0055] Figure 8 A schematic diagram of a hierarchical structure of a display panel provided in another embodiment of the present application;

[0056] Fig. 9 A schematic diagram of a hierarchical structure of a display panel provided in another embodiment of the present application;

[0057] Fig.10 A schematic diagram of the hierarchical structure of a display panel provided in another embodiment of the present application.

[0058] Marking description: 100, display panel; 101, display area; 102, non-display area; 110, sub-area; 120, gap; 130, first power line; 140, second power line; 1, substrate; 11, substrate; 12, driving device layer; 2, isolation structure; 21, isolation opening; 22, first supporting part; 23, crown; 24, second supporting part; 3, light-emitting device; 31, first electrode; 32, light-emitting functional layer; 33, second electrode; 4, conductive layer; 5, pixel definition layer; 51, pixel opening; 52, via; 61, first encapsulation layer; 62, second encapsulation layer; 63, third encapsulation layer. DETAILED DESCRIPTION

[0059] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0060] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0061] Improving the density of light-emitting devices in a display panel (i.e., pixel density) is an important way to improve the display effect. However, the display panels currently made using fine metal evaporation mask (FMM) technology cannot further increase the density of light-emitting devices due to technical limitations. In order to solve the technical problem that the density of light-emitting devices cannot be further increased, in some display panels, an isolation structure is set between pixel openings. When the light-emitting material layer and the cathode layer are evaporated in the entire layer, the light-emitting material layer and the cathode layer between adjacent pixel openings can be disconnected at the position of the isolation structure. Through multiple evaporation and multiple etching processes, corresponding light-emitting device film layers can be formed in the pixel openings corresponding to light-emitting devices of different colors.

[0062] Patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, PCT / CN2024 / 099072, CN117979755A, CN117998900A, CN117062489A, CN117580403A, CN116583155A, CN116669477A, ​​CN117396039A, CN116669480A, CN116600606A, and CN117500332A record the composition, preparation and other related technical solutions of the isolation structure for reference.

[0063] Reference Figure 1 , Figure 2As shown, a related display panel 100 is provided with a display area 101 and a non-display area 102, and also includes a substrate 1 and an isolation structure 2 arranged on one side of the substrate 1. The isolation structure 2 encloses an isolation opening 21 for accommodating a light-emitting device 3. Adjacent light-emitting devices 3 are separated by the isolation structure 2. The light-emitting devices 3 generally include R, G, and B, which are respectively used to emit red light, green light, and blue light. Accordingly, the isolation opening 21 also includes a plurality of types of openings respectively used to accommodate different light-emitting devices 3.

[0064] After long-term research, the inventors found that for medium-sized display panels, due to their large size, the grid structure formed by the isolation structure 2 covers the entire display area 101, which is a large piece of metal. When affected by static electricity, charges are likely to quickly accumulate and conduct on a large continuous metal surface, forming a large electrostatic potential difference, thereby increasing the possibility of electrostatic discharge (ESD). In addition, the electric field distribution formed by the entire surface of metal is relatively concentrated, and a strong electric field is likely to be formed in certain areas, prompting processes such as air ionization to occur. Arc discharge is likely to occur in the back-end process, resulting in product defects.

[0065] Based on this, the present application provides a display panel to solve the above technical problems, as detailed in the following embodiments.

[0066] Reference Figure 3 , Figure 4 As shown, an embodiment of the present application provides a display panel 100, which has a display area 101 and a non-display area 102, wherein the non-display area 102 is at least partially arranged around the display area 101. The display area 101 includes a plurality of sub-areas 110.

[0067] The display panel 100 includes a substrate 1 and a plurality of isolation structures 2 disposed on one side of the substrate 1, each isolation structure 2 being located in a corresponding sub-region 110, and the isolation structures 2 enclose an isolation opening 21, and the isolation opening 21 is used to accommodate at least a portion of a film layer of the light-emitting device 3. The isolation structures 2 in adjacent sub-regions 110 are spaced apart from each other.

[0068] Of course, in other embodiments, the isolation structures 2 in adjacent sub-regions 110 may also be partially spaced apart from each other.

[0069] Specifically, the material of the isolation structure 2 includes metal, such as aluminum.

[0070] The display panel 100 provided by the present application forms a partition block design for the isolation structure 2 in the entire display area 101 by setting a plurality of isolation structures 2 located in different sub-areas 110. The coverage of a single isolation structure 2 does not exceed the sub-area 110, so that the size of the isolation structure 2 is reduced, and each sub-area 110 is relatively independent. The charge accumulation on the isolation structure 2 in each sub-area 110 is relatively limited, and a high potential difference will not be formed as quickly as the entire surface of metal, reducing the risk of electrostatic discharge due to excessive accumulation of local charges. At the same time, the partition block design makes the electric field distribution of each small block relatively dispersed and uniform, avoiding the situation where the local electric field is too strong, reducing the air breakdown and arc discharge caused by the strong electric field, thereby improving the stability and reliability of the product in an electrostatic environment.

[0071] Reference Figure 4 , Figure 5 As shown, in one embodiment, the display panel 100 further includes a conductive layer 4, and the isolation structures 2 in adjacent sub-regions 110 are electrically connected through the conductive layer 4. In this way, after the block design, the isolation structures 2 arranged at intervals are electrically connected through the conductive layer 4, which increases the resistance and complexity of the discharge path compared to the isolation structure 2 using the entire surface of metal, so that the electrostatic discharge is no longer quickly released along a single, low-resistance path, but needs to be conducted through multiple small blocks and relatively complex connections between the small blocks, thereby effectively dispersing the electrostatic energy and reducing the degree of harm of electrostatic discharge to the product.

[0072] Continue to refer to Figure 4 As shown, in one embodiment, the conductive layer 4 and the isolation structure 2 are disposed in different layers and are connected through a via 52 .

[0073] In the embodiment of the present application, the light-emitting device 3 includes a first electrode 31, a light-emitting functional layer 32, and a second electrode 33 which are sequentially stacked on the substrate 1 in a direction away from the substrate 1. The conductive layer 4 is disposed on the same layer as the first electrode 31. In this way, the conductive layer 4 and the first electrode 31 can be prepared on the same layer to simplify the process steps, reduce production costs, and improve production efficiency.

[0074] In one embodiment, the orthographic projection of the conductive layer 4 on the substrate 1 is spaced apart from the orthographic projection of the first electrode 31 on the substrate 1 .

[0075] Specifically, at least part of the light-emitting functional layer 32 and the second electrode 33 are located in the isolation opening 21 , and the second electrode 33 is electrically connected to the isolation structure 2 , ensuring that the second electrode 33 of the light-emitting device 3 is connected to the external circuit through the isolation structure 2 .

[0076] Exemplarily, the first electrode 31 includes an anode, and the second electrode 33 includes a cathode. The light-emitting functional layer 32 may include a carrier transport layer and a light-emitting material layer. The carrier transport layer may include a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer. The hole injection layer and the hole transport layer may be located between the first electrode 31 and the light-emitting material layer, and the electron injection layer and the electron transport layer may be located between the second electrode 33 and the light-emitting material layer.

[0077] Optionally, the conductive layer 4 is used to connect a common power supply line, and the isolation structure 2 is reused as an auxiliary cathode.

[0078] In this embodiment, the isolation structures 2 are electrically connected to each other through the conductive layer 4 to form a continuous overlapping structure, and the cathodes of the light-emitting devices 3 can be connected to form a common electrode for driving.

[0079] Reference Figure 4 As shown, in one embodiment, the display panel 100 further includes a pixel definition layer 5, which is disposed on a side of the isolation structure 2 close to the substrate 1, and the pixel definition layer 5 defines a pixel opening 51 corresponding to the isolation opening 21, and the light-emitting device 3 is at least partially located in the pixel opening 51. The conductive layer 4 is disposed between the substrate 1 and the pixel definition layer 5. In this embodiment, the pixel definition layer 5 covers the conductive layer 4, which can provide physical protection and accurately define the active area of ​​the conductive layer 4, avoiding electrical interaction between the conductive layer 4 and other structures or regions, thereby reducing signal interference. In addition, this covering design helps to optimize the electric field distribution in each sub-region 110, making the electric field more uniform and stable.

[0080] Preferably, the orthographic projection of the conductive layer 4 on the substrate 1 is located within the orthographic projection of the pixel definition layer 5 on the substrate 1 .

[0081] Preferably, the first electrode 31 is partially exposed to the pixel opening 51 , and the pixel definition layer 5 is provided so that the first electrode 31 can have a larger area, and there is no need to consider the alignment accuracy of the first electrode 31 and the isolation structure 2 in the preparation process.

[0082] Preferably, the orthographic projection of the isolation structure 2 on the substrate 1 is located within the orthographic projection of the pixel definition layer 5 on the substrate 1 .

[0083] Continue to refer to Figure 4 As shown, in one embodiment, the pixel definition layer 5 includes a via hole 52 , and the isolation structure 2 is electrically connected to the conductive layer 4 through the via hole 52 , so that the signal of the conductive layer 4 can be transmitted to the second electrode 33 through the isolation structure 2 .

[0084] Preferably, the orthographic projection of the via hole 52 on the substrate 1 is located within the orthographic projection of the isolation structure 2 on the substrate 1 .

[0085] Preferably, the depth of the via hole 52 is equal to the depth of the pixel opening 51. Since the conductive layer 4 and the first electrode 31 are in the same layer, the film thickness of the portion of the pixel definition layer 5 covering the conductive layer 4 and the portion of the first electrode 31 are the same, the via hole 52 is opened in the portion of the pixel definition layer 5 covering the conductive layer 4, and the pixel opening 51 is opened in the portion of the pixel definition layer 5 covering the first electrode 31, so the depths of the two are also equal.

[0086] Reference Figure 3 , Figure 5 As shown, in one embodiment, a plurality of sub-regions 110 are arranged in a matrix in the display area 101. In the display area 101, the plurality of sub-regions 110 are arranged in a matrix, and the distribution is relatively uniform, which can optimize the electric field distribution. Specifically, the plurality of sub-regions 110 are arranged at intervals in a vertical first direction (such as the X direction in the figure) and a second direction (such as the Y direction in the figure), and accordingly, the isolation structures 2 corresponding to the sub-regions 110 are arranged at intervals in the vertical first direction and the second direction.

[0087] Preferably, a plurality of light emitting devices 3 are arranged in each sub-region 110. One isolation opening 21 corresponds to one light emitting device 3. In each sub-region 110, the isolation structure 2 has a plurality of isolation openings 21, which may form a grid structure.

[0088] Reference Figure 3 As shown, in one embodiment, the display panel 100 further includes a first power line 130 and a second power line 140, the first power line 130 is electrically connected to the first electrode 31, and the first power line 130 is at least located in the non-display area 102. The second power line 140 is electrically connected to at least one of the conductive layer 4 and the isolation structure 2, and the second power line 140 is at least located in the non-display area 102. Specifically, the first power line 130 and the second power line 140 can extend from the display area 101 to the non-display area 102.

[0089] The first power line 130 provides a first power signal (ELVDD), and the second power line 140 provides a second power signal (ELVSS). The voltage of the first power signal ELVDD provided by the first power line 130 is greater than the voltage of the second power signal ELVSS provided by the second power line 140.

[0090] Reference Figure 6 As shown, in one embodiment, the substrate 1 includes a substrate 11 and a driving device layer 12, the driving device layer 12 is arranged on a side of the substrate 11 close to the light-emitting device 3, and the driving device layer 12 is electrically connected to the light-emitting device 3. The driving device layer 12 includes a plurality of metal layers, the plurality of metal layers are stacked in sequence, and an insulating layer is arranged between adjacent metal layers.

[0091] Preferably, the plurality of metal layers include a first metal layer, a second metal layer, a third metal layer, a fourth metal layer and a fifth metal layer arranged in sequence in a direction away from the substrate 11. The first electrode 31 is electrically connected to the fifth metal layer.

[0092] Preferably, the first power line is arranged on the fifth metal layer.

[0093] Preferably, the substrate 1 also includes an active layer, which is arranged between the substrate 11 and the driving device layer 12. Among them, the active layer includes a source region, a semiconductor region and a drain region, the first metal layer includes a gate, the third metal layer includes a source electrode and a drain electrode, the orthographic projection of the gate on the substrate 11 overlaps the orthographic projection of the semiconductor region on the substrate 11, the source electrode is connected to the source region, and the drain electrode is connected to the drain region. The second metal layer may include a capacitor plate. The first electrode 31 of the light-emitting device 3 is connected through the via 52 of the pixel definition layer 5 via the fifth metal layer, the fourth metal layer and the source or drain in the third metal layer. A TFT (Thin Film Transistor) structure is formed by the gate, the source electrode, the drain electrode and the active layer.

[0094] Continue to refer to Figure 6 As shown, in one embodiment, the isolation structure 2 includes a first support portion 22 and a crown portion 23, and the crown portion 23 is disposed on a side of the first support portion 22 away from the substrate 1. The isolation structure 2 adopts a two-layer stacked structure.

[0095] Preferably, the conductive layer 4 is electrically connected to the first supporting portion 22 .

[0096] Preferably, the orthographic projection of one end of the first support portion 22 close to the crown portion 23 on the substrate 1 is located within the orthographic projection of the crown portion 23 on the substrate 1. The first support portion 22 and the crown portion 23 form a T-shaped structure with a larger top and a smaller bottom, which is convenient for evaporation to form a light-emitting device and effectively blocks the light-emitting functional layer of an adjacent light-emitting device to reduce the current crosstalk problem of the adjacent light-emitting devices.

[0097] Preferably, the material of the first support portion 22 includes aluminum, and the material of the crown portion 23 includes titanium.

[0098] Reference Figure 7 As shown, in another embodiment, the isolation structure 2 includes a second support portion 24, a first support portion 22 and a crown portion 23, and the second support portion 24 is disposed on a side of the first support portion 22 close to the substrate 1. The isolation structure 2 adopts a three-layer laminated structure.

[0099] Preferably, the conductive layer 4 is electrically connected to the second supporting portion 24 .

[0100] Preferably, the material of the second supporting portion 24 includes molybdenum.

[0101] Reference Figure 8As shown, in one embodiment, the display panel 100 further includes a first encapsulation layer 61 , which covers a surface of the light emitting device 3 away from the substrate 1 and at least covers a side wall of the isolation opening 21 .

[0102] Preferably, the orthographic projection of the first encapsulation layer 61 on the substrate 1 does not overlap with the orthographic projection of the gap 120 on the substrate 1. The first encapsulation layer 61 can cover the entire isolation opening 21 and extend to the side of the isolation structure 2 away from the substrate 1 to form an encapsulation portion corresponding to each light-emitting device 3.

[0103] Furthermore, a gap 120 is formed between the isolation structures 2 in adjacent sub-regions 110 . The display panel 100 further includes a second encapsulation layer 62 , which is located on a side of the first encapsulation layer 61 away from the substrate 1 , and fills the gap 120 .

[0104] Specifically, the gap 120 refers to the spacing space between adjacent isolation structures 2 , and the spacing space is filled with the second encapsulation layer 62 .

[0105] Preferably, the display panel 100 further includes a third encapsulation layer 63 , and the second encapsulation layer 62 is located between the first encapsulation layer 61 and the third encapsulation layer 63 .

[0106] Preferably, the first encapsulation layer 61 and the third encapsulation layer 63 are inorganic layers. The inorganic layer has high density to isolate water and oxygen. The second encapsulation layer 62 is an organic layer with a large thickness to flatten the surface of the display panel, thereby realizing inorganic-organic-inorganic three-layer encapsulation.

[0107] Based on the same inventive concept, Fig. 9 As shown, another embodiment of the present application provides a display panel, wherein the display panel 100 has a display area 101, and the display area 101 includes a plurality of sub-areas 110. The display panel 100 includes a substrate 1 and a plurality of isolation structures 2 disposed on one side of the substrate 1, each isolation structure 2 being located in a corresponding sub-area 110, and the isolation structures 2 enclose to form an isolation opening 21, and the isolation opening 21 is used to accommodate at least a portion of the film layer of the light-emitting device 3. There is a gap 120 between the isolation structures 2 in adjacent sub-areas 110.

[0108] The display panel 100 further includes a conductive layer 4, and the isolation structures 2 in adjacent sub-regions 110 are electrically connected via the conductive layer 4. Figure 5 As shown, the orthographic projection of the conductive layer 4 on the substrate 1 partially overlaps with the orthographic projection of the gap 120 on the substrate 1, and a partial area of ​​the orthographic projection of the gap 120 on the substrate 1 is spaced apart from the orthographic projection of the conductive layer 4 on the substrate 1, that is, a partial area of ​​the orthographic projection of the gap 120 on the substrate 1 is located outside the orthographic projection of the conductive layer 4 on the substrate 1.

[0109] For example, in the first direction, the size of the gap 120 is smaller than the size of the conductive layer 4; in the second direction, the size of the gap 120 is larger than the size of the conductive layer 4. The overlapping portion of the conductive layer 4 and the projection of the gap 120 can separate the projection of the gap 120 into multiple discontinuous portions along the second direction.

[0110] The display panel 100 provided in this embodiment forms a partition block design by setting a plurality of spaced isolation structures 2. At the same time, the spaced isolation structures 2 are electrically connected through the conductive layer 4. In this way, the size of the isolation structure 2 is reduced, the charge accumulation is relatively limited, and a high potential difference will not be formed as quickly as the entire metal surface, reducing the risk of electrostatic discharge caused by excessive accumulation of local charges. At the same time, the partition block design makes the electric field distribution of each small block relatively dispersed and uniform, avoiding the situation where the local electric field is too strong, and reducing the air breakdown and arc discharge caused by the strong electric field.

[0111] Continue to refer to Fig. 9 As shown, in one embodiment, the conductive layer 4 and the isolation structure 2 are disposed in different layers and are connected through a via 52 .

[0112] Reference Fig.10 As shown, in another embodiment, the conductive layer 4 and the isolation structure 2 are disposed in the same layer.

[0113] Another embodiment of the present application provides a method for preparing a display panel, comprising the following steps:

[0114] Step S1, providing a substrate 1;

[0115] Step S2, forming an isolation layer on one side of the substrate 1;

[0116] Step S3 , patterning the isolation layer to form a plurality of isolation structures 2 , wherein the isolation structures 2 enclose an isolation opening 21 , and adjacent isolation structures 2 are arranged at intervals.

[0117] The manufacturing method of the display panel 100 provided in the present application forms a partition block design by setting a plurality of spaced isolation structures 2, so that the size of the isolation structure 2 is reduced, the charge accumulation is relatively limited, and a high potential difference will not be formed as quickly as the whole metal surface, thereby reducing the risk of electrostatic discharge caused by excessive accumulation of local charges. At the same time, the partition block design makes the electric field distribution of each small block relatively dispersed and uniform, avoiding the situation where the local electric field is too strong, reducing the air breakdown and arc discharge caused by the strong electric field, thereby improving the stability and reliability of the product in an electrostatic environment.

[0118] In one embodiment, before forming the isolation layer in step S2, the method for preparing the display panel 100 further includes:

[0119] Step S11 : forming a conductive layer 4 on one side of the substrate 1 , so that adjacent isolation structures 2 are electrically connected via the conductive layer 4 .

[0120] The isolation structures 2 are electrically connected to each other through the conductive layer 4 to form a continuous overlapping structure, and the cathodes of the light-emitting devices 3 can be connected to form a common electrode for driving.

[0121] In one embodiment, step S11 of forming the conductive layer 4 comprises:

[0122] A first electrode layer is formed on the substrate 1 , and the first electrode layer is patterned to form a conductive layer 4 and a first electrode 31 .

[0123] The conductive layer 4 and the first electrode 31 are prepared in the same layer, which can simplify the process steps, reduce production costs and improve production efficiency.

[0124] Preferably, after forming a plurality of isolation structures 2 in step S3 , the method for manufacturing the display panel 100 further includes: forming a light-emitting functional layer 32 and a second electrode 33 in the isolation opening 21 , and electrically connecting the second electrode 33 to the isolation structure 2 .

[0125] Preferably, the second electrode 33 , the light emitting functional layer 32 and the first electrode 31 are stacked to form the light emitting device 3 .

[0126] In one embodiment, after forming the conductive layer 4 in step S11, the method for preparing the display panel 100 further includes:

[0127] Step S12 , forming a pixel definition layer 5 on a side of the conductive layer 4 away from the substrate 1 .

[0128] Step S13 , forming a via hole 52 in the pixel definition layer 5 , so that the isolation structure 2 is electrically connected to the conductive layer 4 through the via hole 52 .

[0129] Preferably, the orthographic projection of the conductive layer 4 on the substrate 1 is located within the orthographic projection of the pixel definition layer 5 on the substrate 1 .

[0130] In one embodiment, the isolation layer includes a first isolation layer and a second isolation layer stacked in sequence in a direction away from the substrate 1; step S3 patterns the isolation layer, including:

[0131] Step S31: Graphically process the second isolation layer and the first isolation layer to form the crown portion 23 and the first support portion 22, respectively. Figure 6 .

[0132] Preferably, the orthographic projection of one end of the first supporting portion 22 close to the crown portion 23 on the substrate 1 is located within the orthographic projection of the crown portion 23 on the substrate 1 .

[0133] Preferably, the conductive layer 4 is electrically connected to the first supporting portion 22 .

[0134] In one embodiment, the isolation layer includes a first isolation layer, a second isolation layer, and a third isolation layer stacked in sequence in a direction away from the substrate 1; step S3 patterns the isolation layer, including:

[0135] Step S32: Graphically process the third isolation layer, the second isolation layer and the first isolation layer to form the crown portion 23, the first support portion 22 and the second support portion 24, respectively. Figure 7 .

[0136] Preferably, the conductive layer 4 is electrically connected to the second supporting portion 24 .

[0137] Another embodiment of the present application provides a display device, which includes the display panel 100 in the above embodiment. The display device can be located in a smart device (such as a mobile phone, VR device, computer, TV, car display, etc.).

[0138] The display device provided by the present application has a display panel 100, which is provided with a plurality of isolation structures 2 located in different sub-areas 110, so that the isolation structures 2 in the entire display area 101 form a partition block design, and the coverage of a single isolation structure 2 does not exceed the sub-area 110, so that the size of the isolation structure 2 can be reduced, and each sub-area 110 is relatively independent, and the charge accumulation on the isolation structure 2 in each sub-area 110 is relatively limited, and a high potential difference will not be formed as quickly as the entire surface of metal, reducing the risk of electrostatic discharge caused by excessive accumulation of local charges. At the same time, the partition block design makes the electric field distribution of each small block relatively dispersed and uniform, avoiding the situation where the local electric field is too strong, reducing the air breakdown and arc discharge caused by the strong electric field, thereby improving the stability and reliability of the product in an electrostatic environment.

[0139] Although the present application has been described in conjunction with specific embodiments thereof, many alternatives, modifications and variations of these embodiments will be apparent to those skilled in the art in light of the foregoing description.

[0140] It should be noted that the above is a description of an embodiment of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0141] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. A display panel, characterized in that: The display panel comprises a display area and a non-display area at least partially surrounding the display area, wherein the display area comprises a plurality of sub-areas; the display panel comprises: substrate; A plurality of isolation structures are arranged on one side of the substrate and located in the corresponding sub-areas; the isolation structures enclose and form isolation openings for accommodating at least part of the light-emitting devices; Wherein, the isolation structures in adjacent sub-regions are at least partially spaced apart from each other.

2. The display panel according to claim 1, characterized in that: The display panel further includes: A conductive layer, through which the isolation structures in adjacent sub-regions are electrically connected.

3. The display panel according to claim 2, characterized in that: The conductive layer and the isolation structure are arranged in different layers and are connected through vias; Preferably, the light emitting device comprises a first electrode, a light emitting functional layer and a second electrode which are sequentially stacked on the substrate in a direction away from the substrate, and the conductive layer is arranged on the same layer as the first electrode.

4. The display panel according to claim 2, characterized in that: The light emitting device comprises a first electrode, a light emitting functional layer and a second electrode which are sequentially stacked on the substrate in a direction away from the substrate, and an orthographic projection of the conductive layer on the substrate is spaced apart from an orthographic projection of the first electrode on the substrate.

5. The display panel according to claim 3, characterized in that: The display panel further includes: A pixel definition layer is arranged on a side of the isolation structure close to the substrate, the pixel definition layer defines a pixel opening corresponding to the isolation opening, and the light emitting device is at least partially located in the pixel opening; the conductive layer is arranged between the substrate and the pixel definition layer; Preferably, the orthographic projection of the conductive layer on the substrate is located within the orthographic projection of the pixel definition layer on the substrate.

6. The display panel according to claim 5, characterized in that: The pixel definition layer includes the via hole, and the isolation structure is electrically connected to the conductive layer through the via hole; Preferably, the orthographic projection of the via hole on the substrate is located within the orthographic projection of the isolation structure on the substrate; Preferably, the depth of the via hole is equal to the depth of the pixel opening.

7. The display panel according to claim 1, characterized in that: The plurality of sub-areas are arranged in a matrix in the display area; Preferably, a plurality of the light-emitting devices are arranged in the sub-region.

8. The display panel according to claim 4, characterized in that: The display panel further includes: A first power line, electrically connected to the first electrode and at least located in the non-display area; The second power line is electrically connected to the isolation structure and / or the conductive layer and is at least located in the non-display area.

9. The display panel according to claim 3, characterized in that: The isolation structure comprises a first support portion and a crown portion, wherein the crown portion is arranged on a side of the first support portion away from the substrate; Preferably, the conductive layer is electrically connected to the first supporting portion; Preferably, the orthographic projection of one end of the first supporting portion close to the crown portion on the substrate is located within the orthographic projection of the crown portion on the substrate; Preferably, the material of the first supporting portion includes aluminum; Preferably, the material of the crown comprises titanium.

10. The display panel according to claim 9, characterized in that: The isolation structure further includes a second supporting portion, which is disposed on a side of the first supporting portion close to the substrate; Preferably, the conductive layer is electrically connected to the second supporting portion; Preferably, the material of the second supporting portion includes molybdenum.

11. The display panel according to claim 1, characterized in that: The display panel further includes: A first encapsulation layer, the first encapsulation layer covers a surface of the light-emitting device away from the substrate and at least covers a side wall of the isolation opening; a second encapsulation layer, the second encapsulation layer being located on a side of the first encapsulation layer away from the substrate, a gap being formed between the isolation structures in adjacent sub-regions, and the second encapsulation layer filling the gap; Preferably, the second encapsulation layer is an organic layer; Preferably, the display panel further comprises a third encapsulation layer, and the second encapsulation layer is located between the first encapsulation layer and the third encapsulation layer; Preferably, the first encapsulation layer and the third encapsulation layer are inorganic layers.

12. A display panel, characterized in that: The display panel has a display area, and the display area includes a plurality of sub-areas; the display panel includes: substrate; A plurality of isolation structures are arranged on one side of the substrate and located in the corresponding sub-regions; the isolation structures enclose and form isolation openings for accommodating at least part of the light-emitting devices; and there are gaps between the isolation structures in adjacent sub-regions; A conductive layer, wherein the isolation structures in adjacent sub-regions are electrically connected via the conductive layer, an orthographic projection of the conductive layer on the substrate partially overlaps with an orthographic projection of the gap on the substrate, and a partial area of ​​the orthographic projection of the gap on the substrate is located outside the orthographic projection of the conductive layer on the substrate.

13. The display panel according to claim 12, characterized in that: The conductive layer and the isolation structure are arranged in different layers and are connected through vias.

14. The display panel according to claim 12, characterized in that: The conductive layer and the isolation structure are arranged in the same layer.

15. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-14.

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