Display panel, manufacturing method thereof and display device

Abstract

Embodiments of the present application provide a display panel, a manufacturing method thereof and a display device. The display panel comprises a substrate, a pixel definition layer, a process structure layer, an isolation structure and a display functional layer comprising a plurality of light emitting devices. The pixel definition layer comprises a pixel limiting portion. The process structure layer is located on a side of the pixel limiting portion away from the substrate. A normal projection of the process structure layer on the substrate is located within a normal projection of the pixel limiting portion on the substrate. The isolation structure is located on a side of the process structure layer away from the substrate and comprises a first isolation layer, a second isolation layer and a third isolation layer which are sequentially stacked. A normal projection of the second isolation layer on the substrate is located within a normal projection of the first isolation layer on the substrate. The light emitting device comprises a first electrode, a light emitting functional layer and a second electrode which are sequentially stacked. The second electrode is electrically connected to the first isolation layer. Embodiments of the present application can improve the flatness of the pixel limiting portion, facilitate the film formation of the electrode layer and thus ensure the display effect of the display panel.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel, a method for manufacturing the same, and a display device. Background Technology

[0002] Organic Light Emitting Display (OLED) and flat panel displays based on Light Emitting Diode (LED) technologies are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body, and wide application range, becoming the mainstream display devices. In the traditional display panel manufacturing process, a fine metal mask (FMM) is typically used to pattern the light-emitting pixels. FMM technology is mature and has extensive mass production experience. However, FMM technology also has problems such as limited precision, high development costs, and long development cycles. Fine metal mask-less technology eliminates the limitations of traditional OLED processes on display size, resolution, and other screen performance aspects, offering advantages such as high performance, full-size display, and agile delivery. Patents CN118251982A, CN115666161A, CN116648095A, CN117062489A, CN118678742A, CN118785761A, CN115224220A, CN118678729A, CN118660529A, and CN118660589A describe relevant content regarding the technology of eliminating fine metal masks, and are provided for reference.

[0003] However, the current manufacturing process of OLED display products needs improvement. Summary of the Invention

[0004] In view of the above, embodiments of this application provide a display panel and a method for manufacturing the same, as well as a display device, to at least partially solve the above problems.

[0005] According to a first aspect of the embodiments of this application, a display panel is provided. The display panel includes a substrate, a pixel definition layer, a process structure layer, an isolation structure, and a display function layer. The pixel definition layer is located on one side of the substrate and includes a pixel defining portion and a plurality of pixel openings formed by the pixel defining portion. The process structure layer is located on the side of the pixel defining portion away from the substrate, and the orthographic projection of the process structure layer on the substrate is located within the orthographic projection of the pixel defining portion on the substrate. The isolation structure is located on the side of the process structure layer away from the substrate and forms an isolation opening, which communicates with the pixel opening. The isolation structure includes a first isolation layer, a second isolation layer, and a third isolation layer stacked sequentially in a direction away from the substrate, and the orthographic projection of the second isolation layer on the substrate is located within the orthographic projection of the first isolation layer on the substrate. The display function layer is located on the substrate and includes a plurality of light-emitting devices at least partially located within the pixel openings. Each light-emitting device includes a first electrode, a light-emitting function layer, and a second electrode stacked in a direction away from the substrate. The second electrode is electrically connected to the first isolation layer.

[0006] In some embodiments, the orthographic projection of the isolation structure on the substrate covers the orthographic projection of the process structure layer on the substrate.

[0007] In some embodiments, the orthographic projection of the process structure layer on the substrate lies within the orthographic projection of the first isolation layer on the substrate.

[0008] In some embodiments, the second electrode is electrically connected to the first isolation layer and the second isolation layer.

[0009] In some embodiments, the orthographic projection of the first isolation layer on the substrate is located within the orthographic projection of the pixel defining portion on the substrate.

[0010] In some embodiments, the material of the first isolation layer is titanium nitride, and / or the material of the process structure layer is molybdenum.

[0011] In some embodiments, the thickness of the process structure layer is less than the thickness of the first isolation layer.

[0012] In some embodiments, the orthographic projection of the second isolation layer on the substrate is located at the orthographic projection of the third isolation layer on the substrate.

[0013] In some embodiments, the shortest distance between the boundary of the orthographic projection of the third isolation layer on the substrate and the boundary of the orthographic projection of the second isolation layer on the substrate is 0.3-1 μm.

[0014] In some embodiments, the height of the second isolation layer is greater than that of the first isolation layer along a direction perpendicular to the substrate, and the height of the second isolation layer is greater than that of the third isolation layer.

[0015] In some embodiments, the display panel further includes a first encapsulation layer located on the side of the display functional layer away from the substrate.

[0016] According to a second aspect of the embodiments of this application, a method for manufacturing a display panel is provided. The method includes: providing a substrate; forming a pixel definition layer; the pixel definition layer is located on one side of the substrate, and includes pixel defining portions and a plurality of pixel openings formed by the pixel defining portions; forming a process protection layer; the process protection layer is located on the side of the pixel definition layer away from the substrate; forming an isolation structure; the isolation structure is located on the side of the process protection layer away from the substrate, and includes a first isolation layer, a second isolation layer, and a third isolation layer, wherein the first isolation layer is formed using a dry etching process, the second isolation layer is formed using a wet etching process, and the first isolation layer, the second isolation layer, and the third isolation layer are sequentially stacked along a direction away from the substrate; the orthographic projection of the second isolation layer on the substrate is located within the orthographic projection of the first isolation layer on the substrate; performing wet etching on the process protection layer to form a process structure layer; forming a display function layer; the display function layer is located on the substrate and includes a plurality of light-emitting devices at least partially located within the pixel openings, each light-emitting device including a first electrode, a light-emitting function layer, and a second electrode stacked along a direction away from the substrate, the second electrode being electrically connected to the first isolation layer.

[0017] In some embodiments, the process protective layer is wet-etched to form a process structure layer, and the orthographic projection of the process structure layer on the substrate is located within the orthographic projection of the first isolation layer on the substrate.

[0018] In some embodiments, the initial first isolation layer is made of titanium nitride, the initial second isolation layer is made of aluminum, the initial third isolation layer is made of titanium, and the process protection layer is made of molybdenum.

[0019] According to a third aspect of the embodiments of this application, a display device is provided. The display device includes the display panel of any of the above embodiments.

[0020] According to the solution provided in this application embodiment, a process protective layer is first formed, followed by an isolation structure. A second isolation layer is formed using a wet etching process, and a first isolation layer is formed using a dry etching process. The process protective layer protects the pixel-defining portion during the formation of the first isolation layer. Even if the dry etching process over-etches, it only causes a depression on the upper surface of the process protective layer and does not damage the pixel-defining portion, thus ensuring the flatness of the pixel-defining portion surface. Then, a process structure layer is formed using a wet etching process. When forming the second electrode, the portion of the second electrode on the pixel-defining portion has good flatness, which is beneficial for electrode layer film formation, allowing the light-emitting device to emit light normally, thereby ensuring the display effect of the display panel. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings.

[0022] Figure 1 This is an exemplary structural diagram of a display device according to an embodiment of this application.

[0023] Figure 2 This is an exemplary structural diagram of a display panel according to an embodiment of this application.

[0024] Figure 3 for Figure 2 Enlarged view of point A in the middle.

[0025] Figure 4 for Figure 3 A sectional view taken along section lines B1-B2.

[0026] Figure 5 This is an exemplary structural diagram of a portion of a display panel in some embodiments.

[0027] Figure 6a and Figure 6b This is a schematic diagram of some steps involved in forming the isolation structure in some embodiments.

[0028] Figure 7 A flowchart illustrating a method for manufacturing a display panel according to an embodiment of this application.

[0029] Figures 8-20 This is a structural diagram corresponding to each step in the manufacturing method of a display panel according to some embodiments. Detailed Implementation

[0030] To enable those skilled in the art to better understand the technical solutions in the embodiments of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art should fall within the protection scope of the embodiments of this application.

[0031] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in the embodiments of this application refers to and includes any or all possible combinations of one or more associated listed items.

[0032] It should be understood that in the description of the embodiments of this application, the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing the scheme of the embodiments of this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0033] Furthermore, when an element or layer is referred to as being "on" another element or layer, "connected to," or "bonded to" another element or layer, the element or layer may be directly on the other element or layer, directly connected to, or directly bonded to the other element or layer, or there may be intermediate elements or layers. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to," or "directly bonded to" another element or layer, there are no intermediate elements or layers.

[0034] The terms First, Second, etc., are used to describe various elements, components, regions, layers, and / or parts, but these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, and / or part from another element, component, region, layer, and / or part.

[0035] Unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0036] The specific implementation of the embodiments of this application will be further described below with reference to the accompanying drawings.

[0037] Figure 1 This is an exemplary structural diagram of a display device according to an embodiment of this application.

[0038] See Figure 1 This application provides a display device 1000. The display device 1000 is an electronic device with image (including static images or dynamic images, wherein the dynamic image may be video) display function. For example, the display device 1000 may be any of the following: monitor, television, billboard, digital photo frame, laser printer with display function, telephone, mobile phone, personal digital assistant (PDA), digital camera, portable camcorder, viewfinder, navigator, large-area wall, home appliance, information query device (such as business query device for e-government, bank, hospital, power and other departments), monitor, electronic display screen, virtual reality (VR) display device, augmented reality (AR) display device, and vehicle display, but is not limited thereto.

[0039] See also Figure 1 The display device 1000 may include a display panel 100. Depending on the display principle, the display panel may be any one of an organic light-emitting diode (OLED) display panel, a quantum dot light-emitting diode (QLED) display panel, a mini LED (or micro LED) display panel, and a liquid crystal display (LCD) panel. The embodiments of this disclosure do not limit the display panel.

[0040] Figure 2 This is an exemplary structural diagram of a display panel according to an embodiment of this application. Figure 3 for Figure 2 Enlarged view of point A in the middle.

[0041] For ease of description below, an XYZ coordinate system is established. See [link / reference] Figure 2 The third direction Z represents the thickness direction of the display panel 100 (or the thickness direction of the display device). The first direction X and the second direction Y are perpendicular to each other and both are perpendicular to the third direction Z.

[0042] See Figure 2 The display panel 100 has a display area AA and a non-display area SA, wherein the display area AA is the area on the display panel 100 used for displaying images, and the non-display area SA is the area on the display panel 100 other than the display area AA. The non-display area SA may be located on at least one side of the display area AA (e.g., one side, or multiple sides), for example, the non-display area SA may be arranged around the display area AA.

[0043] The display area AA comprises multiple pixel units P. See also Figure 3 Each pixel unit P includes multiple sub-pixels 101, and each sub-pixel 101 is the smallest unit for displaying an image within the display panel 100. The multiple sub-pixels 101 emit different colors of light. For example, each pixel unit P includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. The first, second, and third sub-pixels emit three primary colors of light respectively; for example, the first sub-pixel may emit red light, the second sub-pixel may emit green light, and the third sub-pixel may emit blue light. The arrangement of the multiple sub-pixels 101 in the display area AA can be any of the following arrangements: standard RGB arrangement, Delta pixel arrangement, Pentile arrangement, diamond-like arrangement, etc.

[0044] Figure 4 for Figure 3 A sectional view taken along section lines B1-B2.

[0045] See Figure 4 The display panel 100 includes a substrate 10, a display function layer, a pixel definition layer 20, and a virtual isolation structure (VSS) 40.

[0046] The substrate 10 includes a substrate 11. The substrate 11 supports other structures in the display panel 100. The substrate 11 can be configured according to actual needs. For example, the substrate 11 can be a rigid substrate, and the material of the rigid substrate can be glass or polymethyl methacrylate (PMMA), etc. For another example, the substrate 11 can be a flexible substrate, and the material of the flexible substrate can be polyethylene terephthalate (PET), polyethylene naphthalate (PEN), ultrathin glass, or polyimide (PI), etc.

[0047] The substrate 10 may further include a driving circuit layer 12, which is located on one side of the substrate 11 and coupled to a plurality of light-emitting devices (described in detail below). The driving circuit layer 12 is configured to provide an electrical signal to each light-emitting device, causing the device to emit light of a corresponding brightness. The driving circuit layer 12 includes a plurality of pixel driving circuits, each electrically connected to a sub-pixel 101 for driving the sub-pixel to emit light. The pixel driving circuit may include multiple electronic components such as transistors and capacitors. For example, each pixel driving circuit may include three transistors and one capacitor, forming a 3T1C (i.e., one driving transistor, two switching transistors, and one capacitor). It may also include more than three transistors and at least one capacitor, such as a 4T1C (i.e., one driving transistor, three switching transistors, and one capacitor), a 5T1C (i.e., one driving transistor, four switching transistors, and one capacitor), or a 7T1C (i.e., one driving transistor, six switching transistors, and one capacitor). The transistors may be thin-film transistors (TFTs), metal oxide semiconductors (MOS), or other switching devices with similar characteristics.

[0048] The pixel definition layer 20 is located on one side of the substrate 10. The pixel definition layer 20 includes a pixel defining portion 21 and a plurality of pixel openings 22 formed by the pixel defining portion 21. That is, the surface of the pixel definition layer 20 away from the substrate 10 has a plurality of openings.

[0049] The display functional layer is located on the substrate 10 and includes a plurality of light-emitting devices 50, at least partially (e.g., partially, or entirely) located within pixel openings 22. Each light-emitting device 50 is an electronic device capable of emitting light, and each light-emitting device 50 corresponds to one sub-pixel and one pixel opening 22. The light-emitting device 50 can be any of an OLED device, a QLED device, an LED device, or a Mini LED or Micro LED device. Each light-emitting device 50 includes a first electrode 51, a light-emitting functional layer 52, and a second electrode 53 sequentially stacked along a direction away from the substrate 10. The first electrode 51 is located on one side of the substrate 10, and each first electrode 51 corresponds to one pixel opening 22. The pixel opening 22 exposes a portion of the corresponding first electrode 51, and a pixel defining portion 21 covers the gap between adjacent first electrodes 51. The light-emitting functional layer 52 covers the exposed first electrodes 51, with the side of the light-emitting functional layer 52 near the substrate 10 connected to the first electrode 51 and the side away from the substrate 10 connected to the second electrode 53. Either the first electrode 51 or the second electrode 53 is an anode, and the other is a cathode. For example, the first electrode 51 is the anode and the second electrode 53 is the cathode. Also for example, the first electrode 51 is the cathode and the second electrode 53 is the anode. The structure of the first electrode 51 can be a composite structure formed by sequentially stacking a transparent conductive oxide film / a metal film / a transparent conductive oxide film. The transparent conductive oxide film is made of, for example, any one of indium tin oxide (ITO) and indium zinc oxide (IZO), and the metal film is made of, for example, any one of gold (Au), silver (Ag), aluminum (Al), neodymium aluminum (AlNd), molybdenum (Mo), titanium (Ti), nickel (Ni), and platinum (Pt). The first electrode can also be a single-layer structure, and the material of the single-layer structure can be any one of ITO, IZO, Au, Ag, Ni, and Pt. The second electrode 53 is closer to the light-emitting surface of the display panel 100 than the first electrode 51, therefore the second electrode 53 is a light-emitting side electrode. The material of the second electrode 53 can include a transparent conductive oxide, such as ITO or IZO. The light-emitting functional layer 52 may include a light-emitting layer and a functional material layer. For example, the functional material layer may include one or more of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), depending on actual needs. This embodiment does not impose any restrictions on this.

[0050] The isolation structure 40 is located on the side of the pixel definition layer 20 away from the substrate 10, and is used to isolate the light-emitting functional layer 53 of the adjacent light-emitting device 50. Specifically, the isolation structure 40 is located on the side of the pixel definition portion 21 away from the substrate 10. The isolation structure 40 can be a multi-layer structure. For example, the isolation structure 40 includes a first isolation layer 41, a second isolation layer 42, and a third isolation layer 43 stacked sequentially along the direction away from the substrate 10. The orthographic projection of the second isolation layer 42 on the substrate 10 is located within the orthographic projection of the first isolation layer 41 on the substrate 10. That is, the second isolation layer 42 is recessed compared to the first isolation layer 41, and the first isolation layer 41 is expanded compared to the second isolation layer 42. A portion of the surface of the first isolation layer 41 away from the substrate 10 (hereinafter referred to as the upper surface of the first isolation layer 41) is not covered by the second isolation layer 42. In this way, the second electrode 53 can be connected to a portion of the sidewall and upper surface of the first isolation layer 41, increasing the contact area between the second electrode 53 and the first isolation layer 41. This increases the contact area between the second electrode 53 and the isolation structure 40, reduces the impedance, and increases the current under the same voltage, thereby increasing the brightness of the light-emitting device 50 and improving the display effect of the display panel 100.

[0051] The materials used in adjacent layers of the isolation structure 40 are different. Specifically, the materials of the first isolation layer 41 and the second isolation layer 42 are different, and the materials of the second isolation layer 42 and the third isolation layer 43 are different. For example, the material of the first isolation layer 41 is titanium nitride, the material of the second isolation layer 42 is aluminum, and the material of the third isolation layer 43 is titanium. The isolation structure 40 is formed by an etching process. Exemplarily, an initial first isolation layer, an initial second isolation layer, and an initial third isolation layer are first formed in sequence, the initial third isolation layer is etched to form the third isolation layer 43, the initial second isolation layer is etched to form the second isolation layer 42, and the initial first isolation layer is etched to form the first isolation layer 41.

[0052] The isolation structure 40 encloses and forms multiple isolation openings. These isolation openings communicate with the pixel openings 21, and the light-emitting device 50 is surrounded by the isolation structure 40. The isolation structure 40 is electrically connected to the light-emitting device 50; specifically, the first isolation layer 41 is electrically connected to the second electrode 53. See also, for an example... Figure 4 Along the first direction X, the left and right sides of the light-emitting device 50 are respectively provided with isolation structures 40, and the left and right sides of the second electrode 53 are respectively connected to the isolation structures 40 on both sides.

[0053] In other examples, the second isolation layer 42 and the first isolation layer 41 are an integrated structure, that is, the integrated structure can be an independent membrane layer, and there is no physical interface in the membrane layer.

[0054] Figure 5 This is an exemplary structural diagram of a portion of a display panel in some embodiments.

[0055] In some embodiments, a wet etching process (WE) is used to form the first isolation layer 41 and the second isolation layer 42. The materials of the first isolation layer 41 and the second isolation layer 42 are different under the etching action of the same etching solution. Due to the different materials of the two (for example, the material of the first isolation layer 41 is molybdenum (Mo) and the material of the second isolation layer 42 is aluminum (Al)), the etching rate of the materials of the first isolation layer 41 and the second isolation layer 42 is different in the same etching time. There is a problem of etching uniformity between the two, which makes the first isolation layer 41 shrink inward compared with the second isolation layer 42 (that is, the orthogonal projection of the first isolation layer 41 on the substrate 10 is located within the orthogonal projection of the second isolation layer 42 on the substrate).

[0056] In this way, when the second electrode 53 is formed, there is a gap between the second electrode 53 and the first isolation layer 41, which causes the second electrode 53 to not be connected to the first isolation layer 41. At this time, the second electrode 53 is only connected to the second isolation layer 42, or even neither the second isolation layer 42 nor the first isolation layer 41 is connected to the second electrode 53. As a result, the overlap area between the second electrode 53 and the isolation structure 40 is reduced, the impedance is increased, and the current is reduced under the same voltage, which reduces the brightness of the light-emitting device 50 and thus reduces the display effect of the display panel 100.

[0057] Figure 6a and Figure 6b This is a schematic diagram of some steps involved in forming the isolation structure in some embodiments.

[0058] To address the aforementioned issues, some embodiments employ different etching processes to form the second isolation layer 42 and the first isolation layer 41, respectively. Specifically, when the initial material of the first isolation layer is replaced with titanium nitride (TiN) using the WE process to etch the initial second isolation layer to form the second isolation layer 42, the etching solutions corresponding to Mo and TiN are different. The etching solution that etches Mo will not etch TiN. Therefore, the second isolation layer 42 is first formed by etching with an etching solution that etches Mo using the WE process, and then the first isolation layer 41 is formed using a dry etching (DE) process. See also Figure 6a The initial first isolation layer 401 covers the pixel limiting portion 21 and the pixel opening 22, see [reference]. Figure 6b The DE process removes a portion of the initial first isolation layer located at the bottom and sidewall of the pixel opening 22 to expose the first electrode 51, and a portion of the initial first isolation layer located on the pixel limiting portion 21 exposes a portion of the surface of the pixel limiting portion 21 away from the substrate 10, forming the first isolation layer 41. At this time, the orthographic projection of the first isolation layer 41 on the substrate 10 is located within the orthographic projection of the pixel limiting portion 21 on the substrate 10.

[0059] However, during the formation of the first isolation layer 41 in the DE process, due to the limitations of the DE process, over-etching occurs, causing some material to be removed from the side surface of the pixel limiting portion 21 away from the substrate 10 (hereinafter referred to as the upper surface of the pixel limiting portion 21). This results in a depression on the upper surface of the pixel limiting portion 21, reducing its flatness. When the second electrode 53 is subsequently deposited, the second electrode 53 will break at the depression, causing poor continuity of the electrode film of the light-emitting device, which prevents the light-emitting device from emitting light and thus reduces the display effect of the display panel 100.

[0060] To address the aforementioned issues, in embodiments of this application, the display panel 100 further includes a process structure layer 30. (Continue to see...) Figure 4 The process structure layer 30 is located on the side of the pixel limiting portion 21 away from the substrate 10. It can be understood that the process structure layer 30 is located between the pixel limiting portion 21 and the isolation structure 40, and the isolation structure 40 is located on the side of the process structure layer 30 away from the substrate 10. That is, the pixel limiting portion 21, the process structure layer 30 and the isolation structure 40 are stacked sequentially along the direction away from the substrate 10.

[0061] The orthographic projection of the process structure layer 30 onto the substrate 10 lies within the orthographic projection of the pixel limiting portion 21 onto the substrate 10. In this way, the process structure layer 30 does not overlap with the pixel opening 22, maximizing the exposed area of ​​the light-emitting functional layer 52 located within the pixel opening 22. A portion of the light-emitting functional layer 52 can also be located on the upper surface of the pixel limiting portion 21, further increasing the orthographic projection area of ​​the light-emitting functional layer 52 onto the substrate 10. This expands the light-emitting area of ​​the light-emitting device 50 and improves the display effect of the display panel 100.

[0062] In the manufacturing process of the display panel 100, a process protection layer is first formed, followed by an initial isolation structure. The initial isolation structure includes an initial first isolation layer, an initial second isolation layer, and an initial third isolation layer stacked sequentially along the direction away from the process protection layer. The third isolation layer 43, the second isolation layer 42, and the first isolation layer 41 are etched. The second isolation layer 42 is formed using the WE process, and the first isolation layer 41 is formed using the DE process. The process protection layer plays a role in protecting the pixel limiting portion 21 during the DE process. Even if the DE process is over-etched, only the surface of the process protection layer away from the substrate 10 (hereinafter referred to as the upper surface of the process protection layer) will form a depression, and it will not damage the pixel limiting portion 21, thereby ensuring the flatness of the surface of the pixel limiting portion 21. Then, the process protection layer located at the bottom and sidewalls of the pixel opening 22 and part of the process protection layer located on the upper surface of the pixel limiting part 21 are removed by the WE process, exposing the first electrode 51 and part of the upper surface of the pixel limiting part 21. The remaining process protection layer serves as the process structure layer 30. During this process, the exposed part of the upper surface of the pixel limiting part 21 is relatively flat. When the second electrode 53 is subsequently deposited, the part of the second electrode 53 formed on the pixel limiting part 21 has good flatness, which is conducive to the formation of the electrode layer film, so that the light-emitting device emits light normally, thereby ensuring the display effect of the display panel 100.

[0063] In some embodiments, the orthographic projection of the first isolation layer 41 on the substrate 10 lies within the orthographic projection of the pixel defining portion 21 on the substrate 10. That is, the orthographic projection of the first isolation layer 41 on the substrate 10 lies within the orthographic projection of the pixel defining portion 21 on the substrate 10 corresponding to the isolation structure 40 containing the first isolation layer 41. This creates a gap between the boundary of the side surface of the pixel defining portion 21 away from the substrate 10 and the boundary of the first isolation layer 41. A portion of the second electrode 53 lies on the side surface of the pixel defining portion 21 away from the substrate 10 (the orthographic projection of the second electrode 53 on the substrate 10 overlaps with the orthographic projection of the side surface of the pixel defining portion 21 away from the substrate 10), allowing the second electrode 53 to be electrically connected to the first isolation layer 41 on the upper surface of the pixel defining portion 21, thereby enhancing the connection between the second electrode 53 and the first isolation layer 41.

[0064] In other examples, the orthographic projections of the first isolation layer 41, the second isolation layer 42, and the third isolation layer 43 on the substrate 10 may all be located within the orthographic projection of the pixel limiting portion 21 corresponding to the isolation structure 40 on the substrate 10.

[0065] In some embodiments, see continue to see Figure 4The isolation structure 40 covers the process structure layer 30. Specifically, the orthographic projection of the process structure layer 30 on the substrate 10 lies within the orthographic projection of the isolation structure 40 on the substrate 10. In this way, the process structure layer 30 is recessed compared to the isolation structure 40, and along the first direction X, the edge of the isolation structure 40 protrudes on at least one side compared to the edge of the process structure layer 30. As a result, when the second electrode 53 is formed by vapor deposition, the protruding part of the isolation structure 40 compared to the process structure layer 30 can more easily overlap with the second electrode 53, ensuring the connection effect between the second electrode 53 and the isolation structure 40. This allows the first electrode 51 and the second electrode 53 of the light-emitting device 50 to better excite the light-emitting functional layer 52 to emit light, thereby improving the display effect of the display panel 100.

[0066] In some embodiments, see continue to see Figure 4 The orthographic projection of the process structure layer 30 on the substrate 10 lies within the orthographic projection of the first isolation layer 41 on the substrate 10. Specifically, there is a gap between the orthographic projection of the boundary of the process structure layer 30 on the substrate 10 and the orthographic projection of the first isolation layer 41 on the substrate 10, and the process structure layer 30 is recessed compared to the first isolation layer 41. In this way, when the second electrode 53 is formed by vapor deposition, the first isolation layer 41 is expanded compared to the process structure layer 30, making it easier for the second electrode 53 to connect with the first isolation layer 41 compared to the process structure layer 30, ensuring the connection effect between the second electrode 53 and the first isolation layer 41, thereby improving the display effect of the display panel 100. Furthermore, the first isolation layer 41 is recessed compared to the second isolation layer 42, and a gap is left between the first isolation layer 41 and the pixel limiting portion 21. When the light-emitting functional layer 52 is formed by vapor deposition, the light-emitting functional layer 52 can be located in the gap between the first isolation layer 41 and the pixel limiting portion 21, further increasing the orthogonal projection area of ​​the light-emitting functional layer 52 on the substrate 10, thereby expanding the light-emitting area of ​​the light-emitting device 50 and improving the display effect of the display panel 100.

[0067] In some embodiments, see continue to see Figure 4 The second electrode 53 is electrically connected to the first isolation layer 41 and the second isolation layer 42. That is, the second electrode 53 is not only in contact with a portion of the sidewall and upper surface of the first isolation layer 41, but also connected to the sidewall of the second isolation layer 42. The second electrode 53 is in contact with both the first isolation layer 41 and the second isolation layer 42, which further increases the contact area between the second electrode 53 and the isolation structure 40, thereby further reducing the impedance. Under the same voltage, the current increases, which increases the brightness of the light-emitting device 50, thereby improving the display effect of the display panel 100.

[0068] In some embodiments, the material of the first isolation layer 41 is titanium nitride. In this way, the first isolation layer 41 can be formed using the DE process, and the etching process only etches to the interface between the initial first isolation layer and the process protection layer, or etches into the process protection layer, without damaging the pixel definition layer 20. This results in better flatness of the pixel definition layer 20, which is beneficial for electrode layer film formation when the second electrode 53 is subsequently formed, thereby ensuring the display effect of the display panel 100.

[0069] In some embodiments, the material of the process structure layer 30 is Mo. Mo is resistant to dry etching, so when the first isolation layer 41 is formed, the DE process can be used, and the process structure layer 30 will not be etched through, thus preventing the flatness of the pixel limiting portion 21 located below the process structure layer 30 from being compromised. Furthermore, the Mo material allows the process structure layer 30 to be formed using the WE process to maintain the flatness of the upper surface of the pixel limiting portion 21. When the second electrode 53 is subsequently formed, a portion of the second electrode 53 located on the upper surface of the pixel limiting portion 21 can maintain good flatness, allowing the light-emitting device 50 to emit light normally.

[0070] In some embodiments, the thickness of the process structure layer 30 is less than or equal to the thickness of the first isolation layer 21. If the process structure layer 30 is too thick, more etching solution is required to form it, resulting in a longer etching time and reduced production efficiency of the display panel. Conversely, a smaller thickness of the process structure layer 30 allows for a reduction in the thickness of the display panel, enabling a thinner and lighter display panel.

[0071] In some embodiments, the third isolation layer 43 covers the second isolation layer 42, and the first isolation layer 41 covers the second isolation layer 42. Specifically, in the orthographic projection on the substrate 10, the third isolation layer 43 covers the second isolation layer 42, and the first isolation layer 41 covers the second isolation layer 42. In this case, the isolation structure 40 is an I-shaped structure. Exemplarily, along the first direction X, one side boundary of the second isolation layer 42 is located within the boundary of the third isolation layer 43, and the other side boundary may coincide with or be located within the boundary of the third isolation layer 43; one side boundary of the second isolation layer 42 is located within the boundary of the first isolation layer 41, and the other side boundary may coincide with or be located within the boundary of the first isolation layer 41. In this way, the orthographic projections of the second isolation layer 42 and the first isolation layer 42 on the substrate 10 are both located within the third isolation layer 43, which can improve the isolation effect of the isolation structure 40.

[0072] In some embodiments, see continue to see Figure 4In the orthographic projection onto the substrate 10, the shortest distance d1 between the boundary of the third isolation layer 43 and the boundary of the second isolation layer 42 is 0.3-1μm, for example, 0.3μm, 0.4μm, 0.7μm, 0.8μm, 1μm, etc., to prevent the distance between the third isolation layer 43 and the second isolation layer 42 in the first direction X from being too short, thereby improving the isolation effect of the isolation structure 40.

[0073] In some embodiments, see continue to see Figure 4 The display panel 100 may further include a first encapsulation layer 60, which is located on the side of the display functional layer away from the substrate 10. Exemplarily, the first encapsulation layer 60 is composed of a plurality of encapsulation units that respectively cover the isolation openings. The first encapsulation layer 60 at least covers the light-emitting devices 50, and a dense thin film (e.g., a thin film with only a closed outline) is formed on top of these light-emitting devices 50 to prevent external water and oxygen from entering the light-emitting devices, thus protecting the film layer of the light-emitting devices 50. To achieve a better sealing effect, the material of the first encapsulation layer 60 may include one or more inorganic insulating materials, such as silicon oxide, silicon nitride, and titanium oxide. The first encapsulation layer 60 may be formed using thin film deposition processes such as chemical vapor deposition (CVD), physical vapor deposition (PVD), or atomic layer deposition (ALD).

[0074] It should be noted that the first encapsulation layer 60 serves as an encapsulation layer for the light-emitting device, and therefore can also be referred to as the first encapsulation layer (only one film layer is provided) or one of the film layers in the first encapsulation layer (when there are multiple encapsulation film layers).

[0075] In some embodiments, along a direction perpendicular to the substrate 10, the height of the second isolation layer 42 is greater than the height of the first isolation layer 41, and the height of the second isolation layer 42 is greater than the height of the third isolation layer 43. If the height of the second isolation layer 42 is less than that of the first isolation layer and less than that of the third isolation layer, the height of the second isolation layer 42 will be too small, resulting in an insufficient film thickness of the first encapsulation layer 60 formed at the sidewall of the isolation structure 40. This will prevent effective protection of the corresponding light-emitting devices and other structures.

[0076] In some embodiments, see continue to see Figure 4The display panel 100 may further include a second encapsulation layer 70 and a third encapsulation layer 80 to further enhance the encapsulation effect. The second encapsulation layer 70 is located on the side of the first encapsulation layer 60 away from the substrate 10, and the third encapsulation layer 80 is located on the side of the second encapsulation layer 70 away from the substrate 10, covering the isolation opening and the isolation structure 40. The second encapsulation layer 70 and the third encapsulation layer 80 can extend from the display area AA to the non-display area SA, at which point their outlines are located within the non-display area SA. The second encapsulation layer 70 is an organic layer, and the third encapsulation layer 80 is an inorganic layer.

[0077] Embodiments of this application also provide a method for manufacturing a display panel.

[0078] Figure 7 A flowchart illustrating a method for manufacturing a display panel according to an embodiment of this application. Figures 8-20 This is a structural diagram corresponding to each step in the manufacturing method of a display panel according to some embodiments.

[0079] The following, with reference to the accompanying drawings, provides an illustrative description of some embodiments of the display panel provided in this disclosure.

[0080] S1, see also Figure 8 , providing substrates.

[0081] The substrate 10 may include a substrate 11 and a driving circuit layer 12. The specific structure and materials can be found in the description above, and will not be repeated here.

[0082] S2, Forming the pixel definition layer.

[0083] The pixel definition layer 20 is located on one side of the substrate 10. The pixel definition layer 20 includes a pixel defining portion 21 and a plurality of pixel openings 22 formed by the pixel defining portion 21.

[0084] The pixel definition layer 20 includes:

[0085] S21, see also Figure 9 This forms the initial pixel definition layer.

[0086] The initial pixel definition layer 201 is located on one side of the substrate 10. The initial pixel definition layer 201 covers a plurality of first electrodes 51.

[0087] S22, see also Figure 10 This forms a pixel definition layer.

[0088] A pixel opening 22 is formed on the initial pixel definition layer 201, and the remaining part is a pixel limiting part 21. The orthogonal projection of each pixel opening 22 on the substrate 10 is located within the orthogonal projection of the first electrode 51 on the substrate 10.

[0089] S3, see also Figure 11, forming a process protective layer 301.

[0090] The process protection layer 301 is located on the side of the pixel definition layer 20 away from the substrate 10, covering the pixel defining portion 21 and multiple pixel openings. The process protection layer 301 is made of a material resistant to dry etching, such as Mo.

[0091] S4. Form an isolation structure.

[0092] The isolation structure 30 is located on the side of the process protection layer 301 away from the substrate 10. The isolation structure 30 includes a first isolation layer, a second isolation layer, and a third isolation layer stacked sequentially along the direction away from the substrate 10. The second isolation layer is formed by a wet etching process, and the first isolation layer is formed by a dry etching process. The orthographic projection of the second isolation layer 42 on the substrate 10 is located within the orthographic projection of the first isolation layer 41 on the substrate 10.

[0093] Among them, the isolation structure 40 includes:

[0094] S41, see also Figure 12 An initial first isolation layer 401 is formed. The initial first isolation layer 401 is located on the side of the process protection layer 301 away from the substrate 10. The material of the initial first isolation layer 401 is a material that can be used in the DE process, such as TiN.

[0095] S42, see also Figure 13 An initial second isolation layer 402 is formed. The initial second isolation layer 402 is located on the side of the initial first isolation layer 401 away from the substrate 10. The material of the initial second isolation layer 402 is a material that can be processed using the WE process, such as A1. The material of the initial second isolation layer 402 is different from the materials of the initial first isolation layer 401 and the process protection layer.

[0096] S43, see also Figure 14 An initial third isolation layer 403 is formed. The third isolation layer 403 is located on the side of the initial second isolation layer 402 away from the substrate 10. The material of the initial third isolation layer 403 is a material that can be processed using the WE process, such as Ti. The material of the initial third isolation layer 403 is different from that of the initial second isolation layer 402. During etching, the same etching solution has different etching rates for the initial third isolation layer 403 and the initial second isolation layer 402, preventing over-etching. In some examples, the thickness of the initial second isolation layer 402 is greater than the thickness of the initial third isolation layer 403. During the etching of the initial third isolation layer 403, under the same mask, the larger thickness of the initial second isolation layer 402 can prevent over-etching of the etching solution, which would cause the second isolation layer 402 and the third isolation layer 403 to be the same size, reducing the isolation effect of the subsequently formed isolation structure 40.

[0097] S44, see also Figure 15The third isolation layer 43 is formed by wet etching process.

[0098] A portion of the initial third isolation layer 403 is removed, and the remaining portion forms the third isolation layer 43. The third isolation layer 43 is located on the side of the pixel limiting portion 21 away from the substrate 10. At this time, a portion of the initial second isolation layer 402 may be removed by the etching solution. During the WE process, the etching rates of the initial third isolation layer 403 and the initial second isolation layer 402 are different for the same etching solution, so the second isolation layer 42 will not be formed simultaneously when the third isolation layer 43 is formed.

[0099] S45, see also Figure 16 The second isolation layer 42 is formed by wet etching process.

[0100] A portion of the initial second isolation layer 402 is removed, leaving a second isolation layer 42. The second isolation layer 42 is located between the third isolation layer 43 and the initial first isolation layer 401. During the formation of the second isolation layer 42 using the WE process, the same etching solution has different etching rates for the initial first isolation layer 401 and the initial second isolation layer 402. Therefore, the first isolation layer 41 is not formed simultaneously with the formation of the second isolation layer 42. Within the same time frame, the etching solution used in this step will not penetrate the initial first isolation layer 401 and the process protection layer 301, thus preventing the pixel limiting portion 21 from being exposed. When forming the second isolation layer 42, the same mask can be used, and by increasing the etching time, the second isolation layer 42 can be made smaller than the third isolation layer 43, thereby improving the isolation effect of the isolation structure 30.

[0101] S46, see also Figure 17 A first isolation layer 41 is formed using a dry etching process. The first isolation layer 41 is located between the second isolation layer 42 and the pixel defining portion 21. During the formation of the first isolation layer 41 by the DE process, the process protection layer 301 is made of a different material than the initial first isolation layer 401. Even if the DE process over-etches and causes scratches to form on the process protection layer 301, it will not penetrate the process protection layer 301 and form scratches on the upper surface of the pixel defining portion 21, thereby maintaining the flatness of the upper surface of the pixel defining portion 21. S627, see Figure 18 A portion of the process protective layer 301 is removed using a wet etching process, leaving the remaining process protective layer to form the process structure layer 30. The process structure layer 30 is located between the pixel defining portion 21 and the first isolation layer 41. The wet etching process maintains the flatness of the upper surface of the pixel defining portion 21, preventing the formation of depressions. This ensures that the second electrode 53 has good flatness on the pixel defining portion 21 during subsequent formation, allowing the light-emitting device to emit light normally. The orthographic projection of the formed first isolation layer 41 onto the substrate 10 lies within the orthographic projection of the process structure layer 30 onto the substrate.

[0102] In some embodiments, the initial first isolation layer 401 is made of titanium nitride, the initial second isolation layer 402 is made of aluminum, and the process protection layer 301 is made of molybdenum. During the formation of the third isolation layer 43 using a wet etching process, the second isolation layer 42 using a wet etching process, and the first isolation layer 41 using a dry etching process, over-etching can be prevented, thus avoiding impact on the display effect.

[0103] S5. Forming the process structure layer.

[0104] See Figure 18 The process protective layer 301 is wet-etched to form the process structure layer 30. The process structure layer 30 is located on the side of the pixel limiting portion 21 away from the substrate 10. The structure and materials of the process structure layer 30 can be found in the description above, and will not be repeated here.

[0105] S6. Form the display function layer.

[0106] See Figure 19 The display functional layer is located on the substrate 10 and includes a plurality of light-emitting devices 50 located within corresponding pixel openings 22. Each light-emitting device 50 includes a first electrode 51, a light-emitting functional layer 52, and a second electrode 53 stacked along a direction away from the substrate. The second electrode 52 is electrically connected to the first isolation layer 41. The structure and materials of the display functional layer can be found in the description above and will not be repeated here.

[0107] In some embodiments, the method of manufacturing the display panel further includes:

[0108] S7. Form the first encapsulation layer.

[0109] See Figure 20 The first encapsulation layer 60 is located on the side of the display functional layer away from the substrate 10. The structure and material of the first encapsulation layer 60 can be found in the description above, and will not be repeated here.

[0110] It should be noted that while the light-emitting devices emitting different colors are fabricated independently, the film layers (evaporated film layers, such as the light-emitting functional layer) in each light-emitting device are deposited on the entire display panel during the evaporation process. For example, the light-emitting devices include a first light-emitting device, a second light-emitting device, and a third light-emitting device that emit different colors of light. Specifically, the first light-emitting device can emit red light, the second light-emitting device can emit green light, and the third light-emitting device can emit blue light. During the fabrication process, the first, second, and third light-emitting devices are fabricated sequentially. When fabricating the first light-emitting device, a first light-emitting device is formed in each pixel opening. A first encapsulation layer 60 is fabricated on the display panel to cover the first light-emitting device. Then, the first encapsulation layer 60, as well as the second electrode and the light-emitting functional layer of the light-emitting device, are removed from a portion of the first opening. In this process, the first encapsulation layer 60 is used to protect the first light-emitting devices in other pixel openings. Based on this method, the second and third light-emitting devices are then fabricated sequentially, ultimately forming the first encapsulation layer 60.

[0111] In some examples, after the first encapsulation layer 60 is formed, a second encapsulation layer 70 and a second encapsulation layer 80 are formed on the side of the first encapsulation layer 60 away from the substrate 10, which provides further protection.

[0112] In this embodiment, a process protection layer is formed first, followed by an initial isolation structure. A second isolation layer 42 is formed using a WE process, and a first isolation layer 41 is formed using a DE process. The process protection layer protects the pixel-defining portion 21 during the DE process. Even if the DE process is over-etched, it only causes a depression on the upper surface of the process protection layer and does not damage the pixel-defining portion 21, thus ensuring the flatness of the pixel-defining portion 21 surface. Then, a WE process is used to remove the process protection layer located at the bottom and sidewalls of the pixel opening 22, as well as a portion of the process protection layer on the upper surface of the pixel-defining portion 21, exposing the first electrode 51 and a portion of the upper surface of the pixel-defining portion 21. The remaining process protection layer serves as the process structure layer 30. During this process, the exposed portion of the upper surface of the pixel-defining portion 21 is relatively flat. When the second electrode 53 is subsequently deposited, the portion of the second electrode 53 formed on the pixel-defining portion 21 has good flatness, which is beneficial for electrode layer film formation, allowing the light-emitting device to emit light normally, thereby ensuring the display effect of the display panel 100.

[0113] The above embodiments are only used to illustrate the embodiments of this application, and are not intended to limit the embodiments of this application. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of this application. Therefore, all equivalent technical solutions also fall within the scope of the embodiments of this application, and the patent protection scope of the embodiments of this application should be defined by the claims.

Claims

1. A method for manufacturing a display panel, characterized in that, include: Provide substrate; Form a pixel definition layer; The pixel definition layer is located on one side of the substrate, and the pixel definition layer includes a pixel defining portion and a plurality of pixel openings formed by the pixel defining portion; A process protection layer is formed; the process protection layer is located on the side of the pixel definition layer away from the substrate; An isolation structure is formed; the isolation structure is located on the side of the process protection layer away from the substrate; the isolation structure includes a first isolation layer, a second isolation layer, and a third isolation layer, wherein the first isolation layer is formed by a dry etching process, the second isolation layer is formed by a wet etching process, and the first isolation layer, the second isolation layer, and the third isolation layer are stacked sequentially along the direction away from the substrate; the orthographic projection of the second isolation layer on the substrate is located within the orthographic projection of the first isolation layer on the substrate; The process protective layer is wet-etched to form a process structure layer. The material of the first isolation layer is titanium nitride, and the material of the process protective layer is molybdenum. A display functional layer is formed; the display functional layer is located on the substrate and includes a plurality of light-emitting devices at least partially located within the pixel openings; the light-emitting devices include a first electrode, a light-emitting functional layer and a second electrode stacked along a direction away from the substrate, the second electrode being electrically connected to the first isolation layer.

2. The method for manufacturing a display panel according to claim 1, characterized in that, In the process of wet etching the process protective layer to form the process protective layer, the orthographic projection of the process structure layer on the substrate is located within the orthographic projection of the first isolation layer on the substrate.

3. The method for manufacturing a display panel according to claim 1 or 2, characterized in that, The material of the second insulating layer is aluminum.

4. A display panel, characterized in that, include: substrate; A pixel definition layer is located on one side of the substrate; the pixel definition layer includes a pixel defining portion and a plurality of pixel openings formed by the pixel defining portion; A process structure layer is located on the side of the pixel limiting portion away from the substrate, and the orthographic projection of the process structure layer on the substrate is located within the orthographic projection of the pixel limiting portion on the substrate. The material of the process structure layer is molybdenum. An isolation structure is located on the side of the process structure layer away from the substrate. The isolation structure encloses and forms an isolation opening, which communicates with the pixel opening. The isolation structure includes a first isolation layer, a second isolation layer, and a third isolation layer stacked sequentially along the direction away from the substrate. The orthographic projection of the second isolation layer on the substrate is located within the orthographic projection of the first isolation layer on the substrate. The material of the first isolation layer is titanium nitride. The display functional layer is located on the substrate and includes a plurality of light-emitting devices at least partially located within the pixel openings; the light-emitting devices include a first electrode, a light-emitting functional layer, and a second electrode stacked along a direction away from the substrate. The orthographic projection of the process structure layer on the substrate is located within the orthographic projection of the first isolation layer on the substrate. There is a gap between the first isolation layer and the pixel defining portion. The light-emitting functional layer is located in the gap. The second electrode is electrically connected to the first isolation layer.

5. The display panel according to claim 4, characterized in that, The second electrode is electrically connected to the first isolation layer and the second isolation layer.

6. The display panel according to claim 4, characterized in that, The orthographic projection of the first isolation layer on the substrate is located within the orthographic projection of the pixel defining portion on the substrate.

7. The display panel according to claim 4, characterized in that, The thickness of the process structure layer is less than the thickness of the first isolation layer.

8. The display panel according to claim 4, characterized in that, The orthographic projection of the second isolation layer on the substrate lies within the orthographic projection of the third isolation layer on the substrate.

9. The display panel according to claim 8, characterized in that, The shortest distance between the boundary of the orthographic projection of the third isolation layer on the substrate and the boundary of the orthographic projection of the second isolation layer on the substrate is 0.3-1 μm.

10. The display panel according to claim 4, characterized in that, Also includes: The first encapsulation layer is located on the side of the display functional layer away from the substrate.

11. The display panel according to claim 10, characterized in that, Along a direction perpendicular to the substrate, the height of the second isolation layer is greater than that of the first isolation layer, and the height of the second isolation layer is greater than that of the third isolation layer.

12. A display device, characterized in that, include: The display panel as described in any one of claims 4 to 11.

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