Display panel, preparation method thereof and display device

Abstract

The invention provides a display panel, a preparation method thereof and a display device, and belongs to the technical field of display. The display panel comprises a substrate, a driving layer arranged on the substrate and a plurality of light-emitting devices arranged on the side, away from the substrate, of the driving layer, and the driving layer comprises a plurality of pixel driving circuits used for driving the light-emitting devices; at least one pixel driving circuit in the plurality of pixel driving circuits at least comprises a driving transistor; the anode of at least one light-emitting device in the plurality of light-emitting devices is electrically connected with a first power supply signal line, the cathode of at least one light-emitting device in the plurality of light-emitting devices is electrically connected with the first pole of the driving transistor, and the second pole of the driving transistor is electrically connected with a second power supply signal line. The first power supply voltage of the first power supply signal line is greater than the second power supply voltage transmitted by the second power supply signal line.

Description

Technical Field

[0001] The present disclosure belongs to the field of display technology, and particularly relates to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] The cathode of a traditional organic light-emitting diode (OLED) is a full-surface vapor-deposited structure. After the display panel is turned on, the screen temperature gradually increases over time, and the brightness and cathode current rise until saturation. There are differences in brightness performance at different positions of the screen. Summary of the invention

[0003] The present disclosure aims to solve at least one of the technical problems existing in the prior art, and provides a display panel and a method for manufacturing the same, and a display device.

[0004] In a first aspect, the technical solution adopted to solve the technical problem of the present disclosure is a display panel, comprising a base substrate, a driving layer arranged on the base substrate, and a plurality of light-emitting devices arranged on a side of the driving layer away from the base substrate, wherein the driving layer comprises a plurality of pixel driving circuits for driving the plurality of light-emitting devices; at least one pixel driving circuit of the plurality of pixel driving circuits comprises at least a driving transistor;

[0005] An anode of at least one of the plurality of light-emitting devices is electrically connected to a first power signal line, a cathode of at least one of the plurality of light-emitting devices is electrically connected to a first electrode of the driving transistor, a second electrode of the driving transistor is electrically connected to a second power signal line, and a first power voltage of the first power signal line is greater than a second power voltage transmitted by the second power signal line.

[0006] In some embodiments, the display panel further comprises a pixel defining layer and a switching electrode layer disposed on a side of the pixel defining layer away from the driving layer; the pixel defining layer comprises a plurality of pixel openings and a retaining wall structure for forming the plurality of pixel openings, and the plurality of pixel openings are used to define the plurality of light-emitting devices;

[0007] The transfer electrode layer includes an isolation column, and the positive projection of the retaining wall structure on the base substrate covers the positive projection of the isolation column on the base substrate; the cathode of the at least one light-emitting device extends from the corresponding pixel opening to the surrounding retaining wall structure and is separated by the isolation column; the isolation column overlaps the separated cathode and is electrically connected to the first electrode of the driving transistor;

[0008] An insulating structure is arranged between two adjacent light-emitting devices, and the insulating structure isolates the cathodes of the two adjacent light-emitting devices.

[0009] In some embodiments, the isolation columns are arranged in one-to-one correspondence with the light-emitting devices, and the orthographic projections of the isolation columns on the base substrate surround the orthographic projections of the corresponding light-emitting devices on the base substrate; adjacent isolation columns are arranged at intervals.

[0010] In some embodiments, the insulating structure is an insulating layer;

[0011] The insulating layer wraps the side surface of the isolation column away from the cathode overlap side and at least a portion of the surface of the isolation column away from the substrate.

[0012] In some embodiments, the display panel further comprises an encapsulation layer disposed on a side of the at least one light emitting device away from the base substrate;

[0013] The light-emitting layer and cathode of the at least one light-emitting device, and the encapsulation layer all extend from the corresponding pixel opening to the surrounding retaining wall structure, and the light-emitting layer, the cathode and the encapsulation layer extending to the retaining wall structure form a stacked structure;

[0014] The insulating structure is a first etching channel, and the first etching channel penetrates the stacked structure between two adjacent isolation pillars in the thickness direction of the substrate.

[0015] In some embodiments, the insulating structure is a second etching channel, and the second etching channel penetrates the isolation column in the thickness direction of the substrate;

[0016] The isolation column comprises a first half and a second half; the first half and the second half are separated by the second etched channel; the orthographic projections of the first half and the second half on the substrate respectively surround the orthographic projections of different light emitting devices on the substrate;

[0017] The display panel further includes an encapsulation layer disposed on a side of the at least one light emitting device away from the base substrate, the encapsulation layer falls into the second etched channel and wraps the side surfaces of the first half and the second half that are oppositely disposed.

[0018] In some embodiments, the display panel further includes a pixel defining layer, a first switching electrode and a partition structure arranged on a side of the pixel defining layer away from the driving layer; the pixel defining layer includes a plurality of pixel openings and a retaining wall structure for forming the plurality of pixel openings, and the plurality of pixel openings are used to define the plurality of light-emitting devices;

[0019] The orthographic projection of the partition structure on the base substrate surrounds the orthographic projection of the corresponding light-emitting device on the base substrate; the cathode of at least one light-emitting device extends from the pixel opening to the surrounding retaining wall structure and is partitioned by the partition structure;

[0020] The first switching electrode is arranged between the partition structure and the light emitting device, and the first switching electrode is overlapped with the cathode partitioned by the partition structure, and is electrically connected to the first electrode of the driving transistor.

[0021] In some embodiments, the first transfer electrode is an isolation column; the height of the isolation column is lower than the height of the partition structure, and the partition structure wraps the side surface of the isolation column away from the cathode overlap side and at least a portion of the surface of the isolation column away from the substrate.

[0022] In some embodiments, the isolation column comprises a bottom, a main body, and a partitioning portion which are sequentially arranged in a direction away from the substrate; the bottom and the partitioning portion both protrude from the main body;

[0023] The partition portion partitions the cathode of the at least one light emitting device extending to the retaining wall structure. The cathode of the at least one light emitting device overlaps the main body portion and is electrically connected to the first electrode of the driving transistor through the main body portion and the bottom.

[0024] In some embodiments, the display panel further includes an encapsulation layer disposed on a side of the at least one light-emitting device away from the base substrate, and the encapsulation layer fills the concave gap between the partition portion and the main body portion.

[0025] In some embodiments, the isolation column includes a main body and a partition portion located on a side of the main body away from the substrate; the partition portion protrudes from the main body;

[0026] The partition portion partitions the cathode of the at least one light emitting device extending to the retaining wall structure. The cathode of the at least one light emitting device overlaps the main body portion and is electrically connected to the first electrode of the driving transistor through the main body portion.

[0027] In some embodiments, the display panel further includes a second switching electrode and a planarization layer disposed on a side of the driving layer close to the pixel defining layer;

[0028] The second transfer electrode passes through the first connection via hole of the retaining wall structure and the second connection via hole of the planarization layer to electrically connect the first electrode of the driving transistor and the isolation column.

[0029] In a second aspect, an embodiment of the present disclosure further provides a method for preparing a display panel, which is used to prepare the display panel as described in any one of the first aspects; wherein the method for preparing the display panel comprises:

[0030] Providing a substrate as described above;

[0031] A driving layer is formed on the substrate; the driving layer comprises a plurality of pixel driving circuits for driving a plurality of light emitting devices; at least one pixel driving circuit of the plurality of pixel driving circuits comprises at least a driving transistor;

[0032] A plurality of light-emitting devices are formed on a side of the driving layer away from the base substrate; wherein an anode of at least one of the plurality of light-emitting devices is electrically connected to a first power signal line, a cathode of at least one of the plurality of light-emitting devices is electrically connected to a first electrode of the driving transistor, a second electrode of the driving transistor is electrically connected to a second power signal line, and a first power voltage of the first power signal line is greater than a second power voltage transmitted by the second power signal line.

[0033] In some embodiments, before forming the light-emitting layer of the light-emitting device, the method further includes:

[0034] forming a planarization layer on a side of the driving layer away from the base substrate;

[0035] forming an anode of each of the light-emitting devices on a side of the planarization layer away from the driving layer;

[0036] forming a pixel definition material layer and a switching electrode material layer in sequence on a side of the anode away from the planarization layer;

[0037] Etching the switching electrode material layer and the pixel defining material layer to form a pixel defining layer and a switching electrode layer;

[0038] The pixel defining layer includes a plurality of pixel openings and a retaining wall structure for forming the plurality of pixel openings, the plurality of pixel openings being used to define the plurality of light-emitting devices; the transfer electrode layer includes an isolation column, the orthographic projection of the retaining wall structure on the substrate covers the orthographic projection of the isolation column on the substrate; the cathode of at least one light-emitting device extends from the corresponding pixel opening to the surrounding retaining wall structure and is separated by the isolation column; the isolation column overlaps the separated cathode and is electrically connected to the first electrode of the driving transistor; an insulating structure is arranged between two adjacent light-emitting devices, and the insulating structure isolates the cathodes of the two adjacent light-emitting devices.

[0039] In some embodiments, the plurality of light emitting devices include a plurality of first light emitting devices, a plurality of second light emitting devices, and a plurality of third light emitting devices;

[0040] The switching electrode material layer and the pixel defining material layer are etched to form a pixel defining layer and a switching electrode layer, comprising:

[0041] Etching the transfer electrode material layer once to form a plurality of undercut structures; the orthographic projections of the undercut structures on the substrate are located between the orthographic projections of the anodes of the adjacent light-emitting devices on the substrate;

[0042] Performing secondary etching on the transfer electrode material layer and the pixel definition material layer having the undercut structure to form a plurality of first openings penetrating the transfer electrode material layer and the pixel definition material layer to expose anodes of the plurality of first light-emitting devices and obtain first isolation columns overlapped with the plurality of first light-emitting devices;

[0043] Etching the transfer electrode material layer and the pixel definition material layer having the undercut structure three times to form a plurality of second openings penetrating the transfer electrode material layer and the pixel definition material layer to expose the anodes of the plurality of second light-emitting devices and obtain second isolation columns overlapped with the plurality of second light-emitting devices;

[0044] The transfer electrode material layer and the pixel defining material layer of the undercut structure are etched four times to form a plurality of third openings penetrating the transfer electrode material layer and the pixel defining material layer to expose the anodes of the plurality of third light-emitting devices and obtain third isolation columns overlapped with the plurality of third light-emitting devices.

[0045] In some embodiments, after performing the secondary etching and before performing the tertiary etching, the method further includes:

[0046] Sequentially forming the light-emitting material layer and the cathode layer of the plurality of first light-emitting devices on the side of the switching electrode material layer away from the pixel defining material layer;

[0047] The light-emitting material layer and the cathode layer outside the first sub-pixel region are removed to form the plurality of first light-emitting devices; the plurality of first light-emitting devices and the first isolation column are both located in the first sub-pixel region.

[0048] In some embodiments, after performing the third etching and before performing the fourth etching, the method further includes:

[0049] Sequentially forming the light-emitting material layer and the cathode layer of the plurality of second light-emitting devices on the side of the switching electrode material layer away from the pixel defining material layer;

[0050] The light-emitting material layer and the cathode layer outside the second sub-pixel region are removed to form the plurality of second light-emitting devices; the plurality of second light-emitting devices and the second isolation column are both located in the second sub-pixel region.

[0051] In some embodiments, after performing the etching four times, the method further includes:

[0052] Sequentially forming the light-emitting material layer and the cathode layer of the plurality of third light-emitting devices on the side of the switching electrode material layer away from the pixel defining material layer;

[0053] The light-emitting material layer and the cathode layer outside the third sub-pixel region are removed to form a plurality of third light-emitting devices; the plurality of third light-emitting devices and the third isolation columns are both located in the third sub-pixel region.

[0054] In some embodiments, etching the transfer electrode material layer and the pixel defining material layer to form a pixel defining layer and a transfer electrode layer includes:

[0055] Etching the transfer electrode material layer once to form a plurality of undercut structures; the orthographic projections of the undercut structures on the substrate are located between the orthographic projections of the anodes of the adjacent light-emitting devices on the substrate;

[0056] The transfer electrode material layer and the pixel defining material layer having the undercut structure are etched twice to form a plurality of openings penetrating the transfer electrode material layer and the pixel defining material layer to expose the anodes of the respective light-emitting devices and obtain the pixel defining layer and the transfer electrode layer.

[0057] In some embodiments, after forming the switching electrode layer, the method further includes:

[0058] The light-emitting layers and cathodes of the plurality of light-emitting devices are sequentially formed on a side of the switching electrode layer away from the pixel defining layer to obtain the plurality of light-emitting devices.

[0059] In some embodiments, before performing the secondary etching, the method further includes:

[0060] An insulating layer is formed on a side of the transfer electrode material layer having the undercut structure away from the pixel defining material layer; and an orthographic projection of the insulating layer on the base substrate covers an orthographic projection of the undercut structure on the base substrate.

[0061] In some embodiments, after forming each of the light-emitting devices, the method further includes:

[0062] An inorganic packaging material layer is formed on the side of the light-emitting device away from the substrate; the light-emitting layer and cathode of the at least one light-emitting device, and the inorganic packaging material layer are extended from the pixel opening to the surrounding retaining wall structure, and the light-emitting layer, the cathode and the inorganic packaging material layer extending to the retaining wall structure constitute a stacked structure;

[0063] The stacked structure between adjacent isolation pillars is etched to form a first etching channel; the first etching channel penetrates the stacked structure between two adjacent isolation pillars in the thickness direction of the substrate.

[0064] In some embodiments, the light-emitting layer and cathode of the at least one light-emitting device extend from the pixel opening to the surrounding retaining wall structure, and the light-emitting layer and cathode extending to the retaining wall structure form a stacked structure;

[0065] After forming each of the light-emitting devices, the method further comprises:

[0066] The isolation column is etched to form a second etching channel; the second etching channel penetrates the isolation column in the thickness direction of the substrate; the second etching channel divides the isolation column into a first half and a second half.

[0067] In some embodiments, before forming each of the light-emitting devices, the method further includes:

[0068] A partition structure is formed on the side of the transfer electrode layer away from the base substrate, and the partition structure wraps the side surface of the isolation column away from the pixel opening and at least a part of the surface of the isolation column away from the base substrate.

[0069] In a third aspect, an embodiment of the present disclosure further provides a display device, comprising a display panel as described in any one of the first aspects. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] Figure 1 is a circuit diagram of a related pixel driving circuit.

[0071] Figure 2 A circuit diagram of a display driving circuit provided in an embodiment of the present disclosure.

[0072] Figure 3 A schematic diagram of a display panel of Example 1 provided in accordance with an embodiment of the present disclosure.

[0073] Figure 4 A schematic diagram of a display panel of Example 2 provided in accordance with an embodiment of the present disclosure.

[0074] Figure 5a A schematic plan view of a display panel of Example 1 provided in accordance with an embodiment of the present disclosure.

[0075] Figure 5b A schematic plan view of a display panel of Example 2 provided in accordance with an embodiment of the present disclosure.

[0076] Figure 6 A schematic diagram of an isolation column provided in an embodiment of the present disclosure.

[0077] Figure 7 A schematic diagram of another isolation column provided in an embodiment of the present disclosure.

[0078] Figure 8 A schematic diagram of the film layer of the display panel of Example 3 provided in an embodiment of the present disclosure.

[0079] Fig. 9 A schematic plan view of a display panel of Example 3 provided in accordance with an embodiment of the present disclosure.

[0080] Fig.10 A schematic plan view of the display panel of Example 4 provided in accordance with an embodiment of the present disclosure.

[0081] Fig.11 for Fig.10 Schematic diagram of the cross section along the A-A' direction of the structure.

[0082] Figure 12a to Figure 12k A schematic diagram of the step-by-step formation of isolation columns and structures at various intermediate stages of the display panel under Example 1 provided in an embodiment of the present disclosure.

[0083] Fig.13a and Fig.13b A schematic diagram of the display panel integrally formed isolation columns and part of the intermediate stage structure under Example 1 provided in an embodiment of the present disclosure.

[0084] Fig.14a and Fig.14b A schematic diagram of a structure of some intermediate stages during the preparation process of a display panel in Example 3 provided in an embodiment of the present disclosure.

[0085] Fig.15a and Fig.15b A schematic diagram of a structure of some intermediate stages during the preparation process of a display panel according to Example 4 provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0086] In order to make the purpose, technical scheme and advantages of the embodiments of the present disclosure clearer, the technical scheme in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all of the embodiments. The components of the embodiments of the present disclosure generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present disclosure provided in the drawings is not intended to limit the scope of the present disclosure for protection, but merely represents the selected embodiments of the present disclosure. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present disclosure.

[0087] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0088] The "multiple or several" mentioned in this disclosure refers to two or more. "And / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0089] In the related art, since the cathode of the light-emitting device is a whole-surface vapor deposition structure, the cathode voltage drop is large, which will affect the uniformity of the display brightness. Figure 1As shown, taking the pixel driving circuit adopting 2T1C (two transistors and one capacitor) circuit structure as an example, after the display panel is lit, the screen temperature gradually increases with time. The second pole of the driving transistor DTFT (that is, the source of the N-type DTFT) is the cross-voltage end of the OLED device. As the temperature rises, the voltage of the OLED device decreases, so the absolute value of the voltage at the N2 point increases. The fluctuation of the voltage at the N2 point (that is, the source voltage of the driving transistor) has a greater impact on the gate of the driving transistor DTFT, thereby affecting the brightness uniformity. In addition, as the temperature increases, the threshold voltage Vth of the driving transistor DTFT becomes negatively biased, and the leakage current (Ion) increases. After the circuit threshold is compensated, the current increases due to the increase in the leakage current (Ion), which also affects the brightness uniformity.

[0090] In view of this, an embodiment of the present disclosure provides a display panel, which changes the connection position between the traditional light-emitting device and the pixel driving circuit, sets the anode of the light-emitting device to be electrically connected to the first power signal line, and the cathode of the light-emitting device to be electrically connected to the first electrode of the driving transistor, thereby overcoming the influence of the fluctuation of the driving voltage of the light-emitting device on the gate voltage of the driving transistor, thereby improving (thermal) afterimage.

[0091] Figure 2 A circuit diagram of a display driving circuit provided by an embodiment of the present disclosure, Figure 3 Schematic diagram of a display panel of Example 1 provided in an embodiment of the present disclosure. Figure 2 and Figure 3 As shown, the display panel includes a base substrate 1, a driving layer 2 arranged on the base substrate 1, and a plurality of light-emitting devices 3 arranged on a side of the driving layer 2 away from the base substrate 1, the driving layer 2 includes a plurality of pixel driving circuits for driving the plurality of light-emitting devices 3; at least one pixel driving circuit among the plurality of pixel driving circuits includes at least a driving transistor DTFT; an anode 31 of at least one light-emitting device 3 among the plurality of light-emitting devices 3 is electrically connected to a first power signal line VDD, a cathode 33 of at least one light-emitting device 3 among the plurality of light-emitting devices 3 is electrically connected to a first electrode D of the driving transistor DTFT, and a second electrode of the driving transistor DTFT is electrically connected to a second power signal line VSS.

[0092] like Figure 2 As shown, the pixel driving circuit at least includes a driving transistor DTFT, a data writing transistor T1 and a storage capacitor Cst, that is, a 2T1C (i.e., two transistors and one capacitor) circuit structure. For ease of understanding, the present disclosure takes the pixel driving circuit as the simplest 2T1C circuit structure as an example, and in practice, other driving circuit structures such as 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C, 7T2C or 11T3C can also be selected, which will not be listed one by one in the disclosure.

[0093] The display panel also includes a first power signal line VDD, a second power signal line VSS, a data line Data and a gate scan line G1. The first electrode of the data write transistor T1 is electrically connected to the data line Data, the second electrode of the data write transistor T1 is electrically connected to the first node N1, and the gate of the data write transistor T1 is electrically connected to the gate scan line G1; the first electrode D of the driving transistor DTFT is electrically connected to the cathode 33 of the light emitting device 3, the second electrode of the driving transistor DTFT is electrically connected to the second power signal line VSS, and the gate of the driving transistor DTFT is electrically connected to the first node N1; the first plate of the storage capacitor Cst is electrically connected to the first node N1, and the second plate of the storage capacitor Cst is electrically connected to the second electrode (i.e., the second node N2) of the driving transistor DTFT. Among them, the first power signal line VDD is used to transmit the first power supply voltage, and the second power signal line VSS is used to transmit the second power supply voltage, and the first power supply voltage is greater than the second power supply voltage. Specifically, the first power supply voltage is an anode voltage, such as +5V; the second power supply voltage is a cathode voltage, such as -5V. The data line Data is used to transmit a data voltage signal to realize screen display. The gate scanning line G1 is used to transmit a gate scanning signal to control the on and off of the data writing transistor T1 and drive the light emitting device 3 with the help of the driving transistor DTFT and the storage capacitor Cst.

[0094] It should be noted that the transistor used in the embodiments of the present disclosure may be a thin film transistor or a field effect transistor or other devices with the same characteristics. Since the source and drain of the transistor used are symmetrical, there is no difference between the source and drain. In the embodiments of the present disclosure and the subsequent description, in order to distinguish the source and drain of the transistor, one of the electrodes is called the first electrode and the other electrode is called the second electrode. In the case of using transistors with opposite polarities or the case of a change in the direction of current during circuit operation, the functions of the "source" and the "drain" are sometimes interchanged. Therefore, in this specification, the "source" and the "drain" can be interchanged.

[0095] In addition, transistors can be divided into N-type and P-type according to the characteristics of the transistors. When a P-type transistor is used, the first pole is the source of the P-type transistor, the second pole is the drain of the P-type transistor, and when a low-level signal is input to the gate, the source and drain are turned on; when an N-type transistor is used, the first pole is the drain of the N-type transistor, the second pole is the source of the N-type transistor, and when a high-level signal is input to the gate, the source and drain are turned on. In the disclosed embodiment, the transistors are all N-type transistors as an example for specific description. For example, the first pole D of the driving transistor DTFT is the drain of the driving transistor DTFT, and the second pole of the driving transistor DTFT is the source of the driving transistor DTFT. Therefore, the cathode 33 of the light-emitting device 3 is electrically connected to the drain of the driving transistor DTFT, and the source of the driving transistor DTFT is electrically connected to the second power signal line VSS.

[0096] The first power signal line VDD provides the first power voltage to the anode 31 of the light emitting device 3. When the driving transistor DTFT is turned on, the cathode 33 of the light emitting device 3 is connected to the second power signal line VSS, thereby accessing the second power voltage to drive the light emitting device 3 to light up.

[0097] The embodiment of the present disclosure changes the connection position between the traditional light-emitting device 3 and the pixel driving circuit, and sets the anode 31 of at least one light-emitting device 3 to be electrically connected to the first power signal line VDD, and the cathode 33 of at least one light-emitting device 3 to be electrically connected to the first electrode D of the driving transistor DTFT. Therefore, in the present disclosure, at least part of the light-emitting devices 3 have independent cathodes 33, eliminating the influence of the large voltage drop of the cathode 33 of the light-emitting device 3 on the whole surface structure, so as to improve the uneven brightness. At the same time, the independent cathode 33 of the light-emitting device 3 is electrically connected to one end of the first electrode D of the driving transistor DTFT. Compared with the traditional light-emitting device 3 electrically connected to one end of the second electrode of the driving transistor DTFT, the present disclosure can eliminate the voltage fluctuation of the N2 node of the light-emitting device 3 caused by the temperature. Since the voltage fluctuation of the N2 node is eliminated, that is, the second electrode (source) voltage of the driving transistor DTFT is stabilized, the influence of the voltage fluctuation of the N2 point on the gate voltage of the driving transistor DTFT can be improved, thereby improving the uneven brightness, improving the thermal afterimage, and then improving the display quality.

[0098] It should be noted that the light-emitting device 3 involved in the embodiment of the present disclosure may include but is not limited to an organic light-emitting diode (OLED), a quantum dot light-emitting diode (QLED) or a micro light-emitting diode (MicroLED).

[0099] Optionally, the light emitting device 3 is an OLED device, and the display panel is an OLED display panel.

[0100] Figure 4 A schematic diagram of a display panel of Example 2 provided in an embodiment of the present disclosure, Figure 5a A schematic plan view of a display panel of Example 1 provided in an embodiment of the present disclosure, Figure 5b A schematic plan view of a display panel of Example 2 provided in accordance with an embodiment of the present disclosure.

[0101] In some embodiments, Figure 3 to Figure 5bAs shown, the display panel further includes a pixel defining layer PDL and a transfer electrode layer 4 arranged on the side of the pixel defining layer PDL away from the driving layer 2; the pixel defining layer PDL includes a plurality of pixel openings and a retaining wall structure for forming the plurality of pixel openings, and the plurality of pixel openings are used to define a plurality of light-emitting devices 3. Specifically, the pixel opening of the pixel defining layer PDL exposes the anode 31 of the light-emitting device 3, and a light-emitting layer 32 and a cathode 33 are sequentially arranged on the anode 31, so that the light-emitting device 3 is defined. The position of the light-emitting device 3 disclosed in the present invention specifically refers to the area where the pixel opening is located; the light-emitting device 3 specifically refers to the light-emitting unit composed of the anode 31, the light-emitting layer 32 and the cathode 33 located in the pixel opening. The transfer electrode layer 4 includes an isolation column 40, and the positive projection of the retaining wall structure on the base substrate 1 covers the positive projection of the isolation column 40 on the base substrate 1. The cathode 33 of at least one light-emitting device 3 extends from the corresponding pixel opening to the surrounding retaining wall structure and is separated by the isolation column 40; the isolation column 40 overlaps the separated cathode 33 and is electrically connected to the first electrode D of the driving transistor DTFT. The cathodes 33 between two adjacent light emitting devices 3 are spaced apart and insulated from each other. Here, the material of the isolation column 40 is a conductive material, and the cathode 33 of at least one light emitting device 3 is overlapped with the side surface of the isolation column 40 while being isolated by the isolation column 40, and is further electrically connected to the first electrode D of the driving transistor DTFT through the isolation column 40.

[0102] Here, the isolation column 40 may be a multi-layer structure, specifically a double-layer or triple-layer structure. Taking the three-layer structure as an example, optionally, Figure 6 A schematic diagram of an isolation column provided in an embodiment of the present disclosure, such as Figure 6 As shown, the isolation column 40 includes a bottom 41, a main body 42 and a partition 43 which are sequentially arranged in a direction away from the base substrate 1; the bottom 41 and the partition 43 both protrude from the main body 42; the partition 43 partitions the cathode 33 and the light-emitting layer 32 of at least one light-emitting device 3 extending to the retaining wall structure (PDL), and the cathode 33 of at least one light-emitting device 3 overlaps with the main body 42, and is electrically connected to the first electrode D of the driving transistor DTFT through the main body 42 and the bottom 41. Optionally, the bottom 41, the main body 42 and the partition 43 use a three-layered material structure of titanium (Ti) / aluminum (Al) / titanium (Ti). Through the toughness difference of multiple materials and the introduction of multi-layer interfaces, the toughness and high-temperature performance of the material are significantly improved. At the same time, it also has good high-strength performance, which is beneficial to the laminated structure that isolates the light-emitting layer 32 and the cathode 33. Taking the double-layer structure as an example, optionally, Figure 7 A schematic diagram of another isolation column provided in an embodiment of the present disclosure, such as Figure 7As shown, the isolation column 40 includes a main body 42 and a partitioning portion 43 located on the side of the main body 42 away from the substrate 1; the partitioning portion 43 protrudes from the main body 42; the partitioning portion 43 partitions the cathode 33 and the light-emitting layer 32 of at least one light-emitting device 3 extending to the retaining wall structure, and the cathode 33 of at least one light-emitting device 3 overlaps the main body 42 and is electrically connected to the first electrode D of the driving transistor DTFT through the main body 42. Optionally, the main body 42 and the partitioning portion 43 use a two-layer material structure of aluminum (Al) and titanium (Ti), or a two-layer material structure of aluminum alloy and titanium (Ti). Through the toughness difference of multiple materials and the introduction of multi-layer interfaces, the toughness and high-temperature performance of the material are significantly improved, and it also has good high-strength performance, which is conducive to the laminated structure of isolating the light-emitting layer 32 and the cathode 33.

[0103] Optionally, the longitudinal section of the main body 42 of the isolation column 40 is a trapezoid. That is, the orthographic projection of the surface of the main body 42 close to the partition 43 on the base substrate 1 falls into the orthographic projection of the surface of the main body 42 close to the bottom 41 on the base substrate 1, so that the cathode 33 separated by the partition 43 can be easily overlapped at the position of the main body 42 close to the bottom 41. At the same time, the partition 43 and one end of the main body 42 close to the partition 43 form an inner concave notch, which is convenient for the subsequent packaging tightness after the packaging layer 6 is filled.

[0104] An insulating structure 5 is provided between two adjacent light-emitting devices 3, and the insulating structure 5 isolates the cathodes 33 of the two adjacent light-emitting devices 3. Optionally, the insulating structure 5 is provided on the side of the isolation column 40 away from the cathode 33 overlapped therewith. The orthographic projection of the insulating structure 5 on the substrate substrate 1 falls within the orthographic projection of the retaining wall structure on the substrate substrate 1. Exemplarily, the insulating structure 5 can be an etched channel, or an insulating layer 51, or a combination of the insulating layer 51 and the etched channel to isolate the cathode 33 between adjacent light-emitting devices 3. It should be noted that the "etched channel" here refers to an opening formed by etching using an etching process, which can be an opening formed by etching the isolation column 40, or it can also be an opening formed by etching the cathode 33 and the light-emitting layer 32, etc. As long as the cathode 33 between adjacent light-emitting devices 3 is isolated, the present disclosure does not limit the process and morphology of preparing the insulating structure 5.

[0105] At least one isolation column 40 is disposed between any two adjacent light emitting devices 3. Specifically, one isolation column 40 or multiple isolation columns 40 may be disposed between adjacent light emitting devices 3. The orthographic projection of the isolation column 40 on the base substrate 1 surrounds the orthographic projection of the light emitting device 3 on the base substrate 1.

[0106] like Figure 3 and Figure 4As shown, the display panel further includes a packaging layer 6 disposed on a side of at least one light-emitting device 3 away from the substrate 1. The packaging layer 6 is used to package all the structures on its side close to the substrate 1, including the light-emitting device 3, the isolation posts 40 located on the barrier structure, the cathode 33, and the insulating layer 51. In addition, as Figure 6 shown, the packaging layer 6 (such as the first inorganic packaging layer CVD1) also fills the concave notch between the partition portion 43 and the main body portion 42 and is in direct contact with the main body portion 42 and the partition portion 43, which is beneficial to improving the sealing performance. Here, by using the fluidity of the packaging material, the packaging wraps the exposed surfaces of the structures on the substrate 1. The morphology of the isolation post 40 in the present disclosure can be like Figure 6 shown as an "I" shape or like Figure 7 shown as a "T" shape. By using the morphology of such isolation posts 40, the sealing range of the packaging layer 6 is increased, thereby improving the water vapor intrusion path and enhancing the packaging effect of the light-emitting device 3.

[0107] In some embodiments, as Figure 3 and Figure 4 shown, the isolation posts 40 are arranged in one-to-one correspondence with the light-emitting devices 3, and the orthographic projection of the isolation posts 40 on the substrate 1 surrounds the orthographic projection of the corresponding light-emitting device 3 on the substrate 1; adjacent isolation posts 40 are spaced apart.

[0108] As Figure 5a and Figure 5b shown, it includes a plurality of pixel units, and each pixel unit includes a plurality of sub-pixels. The sub-pixels include a light-emitting device 3 and a pixel driving circuit for driving the light-emitting device 3. Such as a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B. The red sub-pixel R includes a red light-emitting device 3 and a pixel driving circuit for driving the red light-emitting device. The green sub-pixel G includes a green light-emitting device and a pixel driving circuit for driving the green light-emitting device. The blue sub-pixel B includes a blue light-emitting device and a pixel driving circuit for driving the blue light-emitting device. Figure 5a and Figure 5bOnly two rows and two columns of two sub-pixels are shown. For ease of understanding, part of the film layer is made transparent, but this does not constitute a limitation on the film layer material. The orthographic projections of different isolation columns 40 on the base substrate 1 surround the orthographic projections of different light-emitting devices 3 on the base substrate 1. For example, a first isolation column 401 surrounding the red light-emitting device is arranged around the red light-emitting device, a second isolation column 402 surrounding the green light-emitting device is arranged around the green light-emitting device, and a third isolation column 403 surrounding the blue light-emitting device is arranged around the blue light-emitting device. The first isolation column 401 can block the cathode of the red light-emitting device (red sub-pixel R), the second isolation column 402 can block the cathode of the green light-emitting device (green sub-pixel G), and the third isolation column 403 can block the cathode of the blue light-emitting device (blue sub-pixel B).

[0109] Alternatively, if Figure 3 As shown, the insulating structure 5 is an insulating layer 51. The insulating layer 51 wraps the side surface of the isolation column 40 away from the cathode 33 overlap side and at least part of the surface of the isolation column 40 away from the base substrate 1. For example, the insulating layer 51 wraps the side surface of the isolation column 40 away from the cathode 33 overlap side and the entire upper surface of the isolation column 40 away from the base substrate 1, so as to prevent the cathodes 33 of adjacent light-emitting devices 3 from being connected through the conductive isolation column 40. Figure 5a As shown, the orthographic projection of the insulating layer 51 on the base substrate 1 covers the orthographic projection of the isolation column 40 between two adjacent light-emitting devices 3 on the base substrate 1 .

[0110] Exemplarily, the material of the insulating layer 51 may be an inorganic insulating material.

[0111] like Figure 3 and Figure 4 As shown, the display panel also includes a second switching electrode 62 and a planarization layer PLN disposed between the pixel definition layer PDL and the driving layer 2. The second switching electrode 62 passes through the first connection via V1 penetrating the retaining wall structure and the second connection via V2 of the planarization layer PLN, and electrically connects the first electrode D of the driving transistor DTFT and the isolation column 40, that is, the cathode 33 of the light-emitting device 3 is electrically connected to the first electrode D of the driving transistor DTFT through the isolation column 40 and the second switching electrode 62. Here, the second switching electrode 62 is in direct contact with the surface of the bottom 41 of the isolation column 40 close to the base substrate 1, and the cathode 33 of the light-emitting device 3 is in direct contact with at least the surface of the bottom 41 away from the base substrate 1 and / or the side surface of the main body 42.

[0112] Optionally, the second transfer electrode 62 may be an integrated structure vertically passing through the first connection via V1 and the second connection via V2 .

[0113] Optionally, the display panel further includes a third switching electrode 63 ( Figure 3Not shown, see Figure 8 As shown in the structure, the third switching electrode 63 is in the same layer as the anode 31 and is arranged at intervals, the second switching electrode 62 is electrically connected to the third switching electrode 63 through the first connecting via V1, the third switching electrode 63 is switched, and then electrically connected to the first electrode D of the driving transistor DTFT through the second connecting via V2.

[0114] like Figure 4 As shown, the display panel further includes an encapsulation layer 6 disposed on the side of at least one light-emitting device 3 away from the base substrate 1. The light-emitting layer 32 and cathode 33 of at least one light-emitting device 3, as well as the encapsulation layer 6, extend from the corresponding pixel opening to the surrounding retaining wall structure, and the light-emitting layer 32, cathode 33 and encapsulation layer 6 extending to the retaining wall structure constitute a stacked structure. Optionally, the insulating structure 5 is a first etched channel 52, and the first etched channel 52 penetrates the stacked structure between two adjacent isolation columns 40 in the thickness direction of the base substrate 1 to isolate the cathodes 33 of adjacent light-emitting devices 3, so as to prevent the isolated cathodes 33 from being connected to the cathodes 33 of other light-emitting devices 3 through the conductive isolation columns 40.

[0115] Here, the first etching channel 52 refers to an opening that penetrates the stacked structure in the thickness direction of the substrate 1. The opening can be further filled with the organic encapsulation layer IJP in the future to improve the isolation effect.

[0116] Optionally, the encapsulation layer 6 in the display panel may be a single-layer structure or a multi-layer structure. When the encapsulation layer 6 is a multi-layer structure, the encapsulation layer 6 may include a first inorganic encapsulation layer CVD1, an organic encapsulation layer IJP, and a second inorganic encapsulation layer CVD2, which are sequentially arranged in a direction away from the base substrate 1, for example, silicon nitride SiN (inorganic material) + ink (organic material) + silicon nitride SiN (inorganic material). Figure 4 As shown, the first etched channel 52 penetrates the first inorganic encapsulation layer CVD1, the cathode 33 and the light-emitting layer 32 in the thickness direction of the substrate 1, exposes the retaining wall structure, and is encapsulated by the organic encapsulation layer IJP.

[0117] The difference between Example 2 and Example 1 is that the insulating structure 5 uses a first etching channel 52 instead of an insulating layer 51, and the other structural features are the same, and the repeated parts will not be repeated.

[0118] The disclosed embodiment adopts the design of isolation column 40 + insulating layer 51 or first etched channel 52, that is, to isolate the cathodes 33 of adjacent light-emitting devices 3, while extending the water vapor intrusion path and improving the sealing performance.

[0119] In some embodiments, Figure 8 A schematic diagram of a film layer of a display panel of Example 3 provided in an embodiment of the present disclosure, Fig. 9A schematic plan view of a display panel according to Example 3 provided in an embodiment of the present disclosure is shown in FIG. Figure 8 and Fig. 9 As shown, the insulating structure 5 includes a second etched channel 53, and the second etched channel 53 penetrates the isolation column 40 in the thickness direction of the substrate 1. Here, the second etched channel 53 refers to an opening that penetrates the isolation column 40 in the thickness direction of the substrate 1. The opening can be further filled with the organic encapsulation layer IJP in the subsequent process to improve the isolation effect.

[0120] like Figure 8 As shown, the isolation column 40 between adjacent light-emitting devices 3 is originally an integrated structure. By etching the isolation column 40, a second etched channel 53 is formed, thereby forming a first half 40a and a second half 40b of the separation, thereby separating the cathodes 33 of the adjacent light-emitting devices 3. Specifically, the isolation column 40 includes a first half 40a and a second half 40b; the first half 40a and the second half 40b are separated by the second etched channel 53 to separate the cathodes 33 of the adjacent light-emitting devices 3, so as to prevent the separated cathodes 33 from being connected again through the conductive isolation column 40. Fig. 9 As shown, the orthographic projections of the first half 40 a and the second half 40 b on the substrate 1 respectively surround the orthographic projections of different light emitting devices 3 on the substrate 1 .

[0121] In this embodiment, an isolation column 40 is provided between adjacent light emitting devices 3 to simplify the structure and shorten the spacing between adjacent pixel openings, which is beneficial to improving the pixel density (PPI). The isolation column 40 isolates the cathodes 33 of two adjacent light emitting devices 3 at the same time, and the isolated cathodes 33 are overlapped on both sides of the isolation column 40. Then, the second etched channel 53 penetrating the isolation column 40 is used to isolate the cathodes 33 of the two adjacent light emitting devices 3, so as to prevent the isolated cathodes 33 of the adjacent light emitting devices 3 from being connected through the conductive isolation column 40.

[0122] Optionally, the display panel further includes an encapsulation layer 6 disposed on a side of at least one light emitting device 3 away from the base substrate 1, the encapsulation layer 6 falls into the second etched channel 53, and wraps the side surfaces of the first half 40a and the second half 40b that are disposed oppositely. Specifically, the encapsulation layer 6 includes a first inorganic encapsulation layer CVD1, an organic encapsulation layer IJP, and a second inorganic encapsulation layer CVD2 that are sequentially disposed in a direction away from the base substrate 1, wherein the first inorganic encapsulation layer CVD1 falls into the second etched channel 53, and wraps the side surfaces of the first half 40a and the second half 40b that are disposed oppositely to improve the encapsulation effect. The actual structure of the isolation column 40 in this embodiment may be selected as follows: Figure 6 or Figure 7For the structure shown, the repeated parts will not be elaborated. The encapsulation layer 6 also fills the concave notch between the partition portion 43 and the main body portion 42 and is in direct contact with the main body portion 42 and the partition portion 43, which is beneficial to improving the sealing performance. Here, by utilizing the fluidity of the encapsulation material, the encapsulation wraps all the exposed surfaces of the structure on the substrate 1. The morphology of the isolation column 40 of the present disclosure can be, for example, Figure 6 the "I" shape shown or Figure 7 the "T" shape shown. By using the morphology of such isolation columns 40, the sealing range of the encapsulation layer 6 is increased, thereby improving the water vapor intrusion path and the encapsulation effect of the light-emitting device 3 can be improved.

[0123] The sub-pixel arrangement mode of the embodiments of the present disclosure can be but is not limited to, for example, Figure 5a and Figure 5b the rectangular array arrangement shown, and can also be the blue diamond arrangement, as Fig. 9 shown. The pixel unit includes a plurality of sub-pixels of different colors, such as a red sub-pixel R, a first green sub-pixel G1, a second green sub-pixel G2, and a blue sub-pixel B. The cut first half portion 40a and the second half portion 40b respectively surround different sub-pixels to lap the cathodes 33 of each light-emitting device 3 while improving the hermetic encapsulation effect.

[0124] As Figure 8 shown, the display panel further includes a second transfer electrode 62 and a planarization layer PLN disposed between the pixel defining layer PDL and the driving layer 2. The second transfer electrode 62 passes through the first connection via V1 of the through-wall structure and the second connection via V2 of the planarization layer PLN and is electrically connected to the first pole D of the driving transistor DTFT, that is, the cathode 33 of the light-emitting device 3 is electrically connected to the first pole D of the driving transistor DTFT through the isolation column 40 and the second transfer electrode 62. Optionally, the display panel further includes a third transfer electrode 63. The third transfer electrode 63 is in the same layer as the anode 31 and is spaced apart. The second transfer electrode 62 is electrically connected to the third transfer electrode 63 through the first connection via V1, and the third transfer electrode 63 is transferred and then electrically connected to the first pole D of the driving transistor DTFT through the second connection via V2.

[0125] In this embodiment, the design of the isolation column 40 + the second etching channel 53 is adopted, that is, the cathodes 33 of adjacent light-emitting devices 3 are isolated, and at the same time, the water vapor intrusion path is extended to improve the sealing performance.

[0126] In some embodiments, Fig.10 is a schematic plan view of the display panel of Example 4 provided by the embodiments of the present disclosure, Fig.11 is Fig.10 a schematic cross-sectional view in the A-A' direction of the structure. As Fig.10 and Fig.11As shown, the display panel further includes a pixel defining layer PDL, a first switching electrode 61 disposed on the side of the pixel defining layer PDL away from the driving layer 2, and a partition structure 7; the pixel defining layer PDL includes a plurality of pixel openings and a retaining wall structure for forming the plurality of pixel openings, and the plurality of pixel openings are used to define a plurality of light-emitting devices 3. The positive projection of the partition structure 7 on the base substrate 1 surrounds the positive projection of the corresponding light-emitting device 3 on the base substrate 1; the cathode 33 of at least one light-emitting device 3 extends from the corresponding pixel opening to the surrounding retaining wall structure and is isolated by the partition structure 7; the first switching electrode 61 is disposed between the partition structure 7 and the light-emitting device 3, and the first switching electrode 61 overlaps the cathode 33 isolated by the partition structure 7, and is electrically connected to the first electrode D of the driving transistor DTFT. Here, the material of the partition structure 7 is an insulating material, such as a negative photoresist material. The first transfer electrode 61 is located between the partition structure 7 and the pixel opening. Since the light-emitting layer 32 and the cathode 33 of the light-emitting device 3 extend from the corresponding pixel opening to the surrounding retaining wall structure, the cathode 33 of the light-emitting device 3 is isolated by the partition structure 7 and falls on the first transfer electrode 61 to be electrically connected thereto, and is electrically connected to the first electrode D of the driving transistor DTFT with the help of the first transfer electrode 61.

[0127] Optionally, the orthographic projection of the partition structure 7 on the base substrate 1 overlaps with the orthographic projection of the first switching electrode 61 on the base substrate 1 .

[0128] Here, the first transfer electrode 61 can be a single-layer structure or a multi-layer structure. Optionally, the first transfer electrode 61 is an isolation column 40 of a multi-layer structure; the height of the isolation column 40 is lower than the height of the partition structure 7, and the partition structure 7 wraps the side surface of the isolation column 40 away from the cathode 33 overlapped side and at least part of the surface of the isolation column 40 away from the substrate 1. Specifically, the partition structure 7 wraps the side surface of the isolation column 40 away from the cathode 33 overlapped side and part of the surface of the isolation column 40 away from the substrate 1, so as to further isolate the cathode 33 of the light-emitting device 3 with the help of the isolation column 40. Here, the isolation column 40 is a conductive material, and the cathode 33 of the light-emitting device 3 is overlapped with the side surface of the isolation column 40 while being isolated by the isolation column 40, and is further electrically connected to the first electrode of the driving transistor DTFT through the isolation column 40.

[0129] Here, the structure of the isolation column 40 can be seen in Figure 6 or Figure 7 The repeated parts are not repeated here.

[0130] Alternatively, if Fig.11As shown, the display panel further includes a second switching electrode 62 and a planarization layer PLN disposed between the pixel definition layer PDL and the driving layer 2. The second switching electrode 62 passes through the first connection via hole V1 penetrating the retaining wall structure and the second connection via hole V2 of the planarization layer PLN, and electrically connects the first electrode D of the driving transistor DTFT and the isolation column 40.

[0131] like Fig.10 As shown, it includes a plurality of pixel units, each pixel unit includes a plurality of sub-pixels, and the sub-pixels include a light-emitting device 3 and a pixel driving circuit for driving the light-emitting device 3. For example, a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B, the red sub-pixel R includes a red light-emitting device 3 and a pixel driving circuit for driving the red light-emitting device 3, the green sub-pixel G includes a green light-emitting device 3 and a pixel driving circuit for driving the green light-emitting device 3, and the blue sub-pixel B includes a blue light-emitting device 3 and a pixel driving circuit for driving the blue light-emitting device 3. Fig.10 Only two rows and two columns of sub-pixels are shown for ease of understanding. Fig.10 Part of the film layer is made transparent, but this does not constitute a limitation on the material of the film layer. The orthographic projection of the partition structure 7 on the base substrate 1 surrounds the orthographic projection of each light-emitting device 3 on the base substrate 1, and the partition structure 7 is connected to form an integral structure. The first transfer electrode 61 (isolation column 40) is arranged in a one-to-one correspondence with the light-emitting device 3, and the overlapping first transfer electrodes 61 corresponding to different light-emitting devices 3 are arranged at intervals, for example, at intervals of the size (length or width) of a light-emitting device. For example, a red light-emitting device (red sub-pixel R) is correspondingly provided with a first transfer electrode 611, a green light-emitting device (green sub-pixel G) is correspondingly provided with a first transfer electrode 612, and a blue light-emitting device (blue sub-pixel B) is correspondingly provided with a first transfer electrode 613. The first conversion electrode 611 and the first conversion electrode 612 are spaced apart by the length of a red light-emitting device (or the width of a blue light-emitting device), the first conversion electrode 611 and the first conversion electrode 613 are spaced apart by the width of a red light-emitting device (or the width of a green light-emitting device), and the first conversion electrode 612 and the first conversion electrode 613 are spaced apart by the length of the diagonal of a red light-emitting device.

[0132] The difference between Example 4 and Examples 1 to 3 is that the isolation column 40 adopts a non-surrounding structure, and uses an independent partition structure 7 to isolate the cathode 33. The isolation column 40 plays an auxiliary isolation role. The most important thing is that the isolation column 40 serves as a switching electrode to electrically connect the cathode 33 overlapped thereon to the first electrode D of the driving transistor DTFT through the second switching electrode 62. Other structural features are the same, and the repeated parts will not be repeated.

[0133] In addition, the embodiment of the present disclosure further provides a method for preparing a display panel, including steps S11 to S13.

[0134] S11, providing a substrate 1.

[0135] S12, forming a driving layer 2 on the base substrate 1; the driving layer 2 includes a plurality of pixel driving circuits for driving a plurality of light-emitting devices 3; at least one pixel driving circuit among the plurality of pixel driving circuits includes a plurality of transistors, for example, a driving transistor DTFT.

[0136] S13 , forming a plurality of light emitting devices 3 on a side of the driving layer 2 facing away from the base substrate 1 .

[0137] Among them, the anode 31 of at least one light emitting device 3 among the multiple light emitting devices 3 is electrically connected to the first power signal line VDD, the cathode 33 of at least one light emitting device 3 among the multiple light emitting devices 3 is electrically connected to the first electrode D of the driving transistor DTFT, the second electrode of the driving transistor DTFT is electrically connected to the second power signal line VSS, and the first power voltage of the first power signal line VDD is greater than the second power voltage transmitted by the second power signal line VSS.

[0138] The embodiment of the present disclosure electrically connects the anode 31 of at least one light-emitting device 3 to the first power signal line VDD, and electrically connects the cathode 33 of at least one light-emitting device 3 to the first electrode D of the driving transistor DTFT, so as to prepare at least one light-emitting device 3 with an independent cathode 33, thereby eliminating the influence of the large voltage drop of the cathode 33 of the light-emitting device 3 on the entire surface structure, so as to improve the uneven brightness; at the same time, the independent cathode 33 of the light-emitting device 3 is electrically connected to one end of the first electrode D of the driving transistor DTFT. Compared with the traditional light-emitting device 3 electrically connected to one end of the second electrode of the driving transistor DTFT, the present disclosure can eliminate the voltage fluctuation of the second electrode of the driving transistor DTFT caused by the temperature of the light-emitting device 3, that is, stabilize the second electrode (source electrode) voltage of the driving transistor DTFT, so as to improve the influence of the second electrode (source electrode) voltage fluctuation of the driving transistor DTFT on the gate voltage of the driving transistor DTFT, thereby improving the uneven brightness, improving the thermal afterimage, and further improving the display quality.

[0139] In some embodiments, before forming the driving layer 2 , the method further includes: forming a buffer layer Buffer on the base substrate 1 .

[0140] In some embodiments, forming the driving layer 2 specifically includes: forming an active layer of the driving transistor DTFT on the side of the buffer layer Buffer away from the substrate substrate 1; forming a first gate insulating layer GI1 on the side of the active layer away from the substrate substrate 1; forming a gate of the driving transistor DTFT and a first plate of the storage capacitor Cst on the side of the first gate insulating layer GI1 away from the substrate substrate 1; forming a second gate insulating layer GI2 on the side of the gate of the driving transistor DTFT away from the substrate substrate 1; forming a second plate of the storage capacitor Cst on the side of the second gate insulating layer GI2 away from the substrate substrate 1; forming an interlayer insulating layer ILD on the side of the second plate of the storage capacitor Cst away from the substrate substrate 1; forming a first pole D and a second pole S of the light-emitting device 1 on the side of the interlayer insulating layer ILD away from the substrate substrate 1, so as to obtain the driving layer 2.

[0141] In some embodiments, before forming the light emitting layer 32 of the light emitting device 3, the method further includes:

[0142] S21, such as Fig.12a As shown, a planarization layer PLN is formed on the side of the driving layer 2 facing away from the substrate 1, so as to planarize the film structure on the lower side thereof.

[0143] S22, such as Figure 12b As shown, the anode 31 of each light-emitting device 3 is formed on the side of the planarization layer PLN facing away from the driving layer 2 .

[0144] The anodes 31 of the light emitting devices 3 are independently arranged and spaced apart from each other.

[0145] S23, such as Fig.12c As shown, a pixel defining material layer PDL' and a transfer electrode material layer 4' are sequentially formed on the side of the anode 31 away from the planarization layer PLN.

[0146] It should be noted that if Fig.12c As shown, after forming the pixel definition material layer PDL' and before forming the transfer electrode material layer 4', it is necessary to etch the first connection via hole V1 and the second connection via hole V2, and form a second transfer electrode 62 penetrating the first connection via hole V1 and the second connection via hole V2.

[0147] S24 , etching the transfer electrode material layer 4 ′ and the pixel defining material layer PDL′ to form the pixel defining layer PDL and the transfer electrode layer 4 .

[0148] Among them, the transfer electrode layer 4 includes an isolation column 40, and the positive projection of the retaining wall structure on the base substrate 1 covers the positive projection of the isolation column 40 on the base substrate 1; the cathode 33 of at least one light-emitting device 3 extends from the corresponding pixel opening to the surrounding retaining wall structure and is separated by the isolation column 40; the isolation column 40 overlaps the separated cathode 33 and is electrically connected to the first electrode D of the driving transistor DTFT; an insulating structure 5 is arranged between two adjacent light-emitting devices 3, and the insulating structure 5 isolates the cathodes 33 of two adjacent light-emitting devices 3.

[0149] The display panel includes a plurality of first light-emitting devices 301, a plurality of second light-emitting devices 302, and a plurality of third light-emitting devices 303. The first light-emitting devices 301, the second light-emitting devices 302, and the third light-emitting devices 303 are light-emitting devices 3 of different colors, for example, red light-emitting devices, green light-emitting devices, and blue light-emitting devices, respectively. Optionally, each light-emitting device 3 has a corresponding isolation column 40, for example, the first light-emitting device 301 corresponds to the first isolation column 401, the second light-emitting device 302 corresponds to the second isolation column 402, and the third light-emitting device 303 corresponds to the third isolation column 403. The orthographic projection of the first isolation column 401 on the substrate 1 surrounds the orthographic projection of the first light-emitting device 301 on the substrate 1; the orthographic projection of the second isolation column 402 on the substrate 1 surrounds the orthographic projection of the second light-emitting device 302 on the substrate 1; and the orthographic projection of the third isolation column 403 on the substrate 1 surrounds the orthographic projection of the third light-emitting device 303 on the substrate 1.

[0150] In a possible implementation, a first isolation column 401, a second isolation column 402, and a third isolation column 403 are formed in steps, and after forming the first isolation column 401, a plurality of first light-emitting devices 301 are prepared; after forming the second isolation column 402, a plurality of second light-emitting devices 302 are prepared; and after forming the third isolation column 403, a plurality of third light-emitting devices 303 are prepared.

[0151] Here, taking the display panel in Preparation Example 1 as an example, it specifically includes S24-1-1 to S24-1-5.

[0152] S24-1-1, such as Fig.12d As shown, the transfer electrode material layer 4 ′ is etched once to form a plurality of undercut structures 120 ; the orthographic projections of the undercut structures 120 on the base substrate 1 are located between the orthographic projections of the anodes 31 of the adjacent light emitting devices 3 on the base substrate 1 .

[0153] S24-1-2, such as Fig.12e As shown, an insulating layer 51 is formed on the side of the transfer electrode material layer 4 ′ having the undercut structure 120 away from the pixel definition material layer PDL′. The orthographic projection of the insulating layer 51 on the base substrate 1 covers the orthographic projection of the undercut structure 120 on the base substrate 1 .

[0154] S24-1-3, such as Fig.12f As shown, the transfer electrode material layer 4' and the pixel defining material layer PDL' having the undercut structure 120 are subjected to secondary etching to form a plurality of first openings penetrating the transfer electrode material layer 4' and the pixel defining material layer PDL' to expose the anodes 31 of the plurality of first light-emitting devices 301 and obtain the first isolation columns 401 overlapped with the plurality of first light-emitting devices 301.

[0155] After forming the first isolation column 401 and before forming the second isolation column 402, the step of forming a plurality of first light emitting devices 301 is also included, such as Figure 12g As shown: First, the light-emitting material layer and cathode layer of multiple first light-emitting devices 301 are sequentially formed on the side of the transfer electrode material layer 4' away from the pixel definition material layer PDL'. Here, an open mask can be used to evaporate the entire light-emitting material layer and cathode layer. Secondly, a photolithography or etching process can be used to remove the light-emitting material layer and cathode layer outside the first sub-pixel area to form multiple first light-emitting devices 301. Multiple first light-emitting devices 301 and first isolation columns 401 are all located in the first sub-pixel area.

[0156] Optionally, before removing the light-emitting material layer and cathode layer outside the first sub-pixel region, a packaging material layer (such as an inorganic packaging material layer) is formed on the side of the cathode layer of the plurality of first light-emitting devices 301 away from the substrate 1. Here, an open mask can be used to evaporate the entire packaging material layer, and the packaging material layer is used to protect the cathode layer and light-emitting material layer of the plurality of first light-emitting devices 301. The light-emitting material layer, cathode layer and packaging material layer outside the first sub-pixel region are removed to form a plurality of first light-emitting devices 301.

[0157] In this embodiment, the isolation column 40 and the light emitting device 3 are prepared step by step, and an open mask can be used, which is more cost-effective than a fine mask (FMM) with a higher cost.

[0158] S24-1-4, such as Figure 12h As shown, the transfer electrode material layer 4' and the pixel defining material layer PDL' having the undercut structure 120 are etched three times to form a plurality of second openings penetrating the transfer electrode material layer 4' and the pixel defining material layer PDL' to expose the anodes 31 of the plurality of second light-emitting devices 302 and obtain second isolation columns 402 overlapped with the plurality of second light-emitting devices 302.

[0159] After forming the second isolation column 402 and before forming the third isolation column 403, the step of forming a plurality of second light emitting devices 302 is also included, such as Fig.12iAs shown: First, the light-emitting material layer and cathode layer of multiple second light-emitting devices 302 are sequentially formed on the side of the transfer electrode material layer 4' away from the pixel definition material layer PDL'. Here, an open mask can be used to evaporate the entire light-emitting material layer and cathode layer. Secondly, a photolithography or etching process can be used to remove the light-emitting material layer and cathode layer outside the second sub-pixel area to form multiple second light-emitting devices 302; the multiple second light-emitting devices 302 and the second isolation column 402 are all located in the second sub-pixel area.

[0160] Optionally, before removing the light-emitting material layer and cathode layer outside the second sub-pixel region, a packaging material layer (such as an inorganic packaging material layer) is formed on the side of the cathode layer of the plurality of second light-emitting devices 302 away from the substrate 1. Here, an open mask can be used to evaporate the entire packaging material layer, and the packaging material layer is used to protect the cathode layer and light-emitting material layer of the plurality of second light-emitting devices 302. The light-emitting material layer, cathode layer and packaging material layer outside the second sub-pixel region are removed to form a plurality of second light-emitting devices 302.

[0161] S24-1-5, such as Fig.12j As shown, the transfer electrode material layer 4' and the pixel defining material layer PDL' of the undercut structure 120 are etched four times to form a plurality of third openings penetrating the transfer electrode material layer 4' and the pixel defining material layer PDL' to expose the anodes 31 of the plurality of third light-emitting devices 303 and obtain third isolation columns 403 overlapped with the plurality of third light-emitting devices 303.

[0162] After forming the third isolation column 403, the step of forming a plurality of third light emitting devices 303 is also included, such as Figure 12k As shown: First, a plurality of light-emitting material layers and cathode layers of the third light-emitting devices 303 are sequentially formed on the side of the transfer electrode material layer 4' away from the pixel definition material layer PDL'. Here, an open mask can be used to evaporate the entire light-emitting material layer and cathode layer. Secondly, a photolithography or etching process can be used to remove the light-emitting material layer and cathode layer outside the third sub-pixel area to form a plurality of third light-emitting devices 303; the plurality of third light-emitting devices 303 and the third isolation column 403 are all located in the third sub-pixel area.

[0163] Optionally, before removing the light-emitting material layer and cathode layer outside the third sub-pixel region, a packaging material layer (such as an inorganic packaging material layer) is formed on the side of the cathode layer of the plurality of third light-emitting devices 303 away from the substrate 1. Here, an open mask can be used to evaporate the entire packaging material layer, and the packaging material layer is used to protect the cathode layer and light-emitting material layer of the plurality of third light-emitting devices 303. The light-emitting material layer, cathode layer and packaging material layer outside the third sub-pixel region are removed to form a plurality of second light-emitting devices 303.

[0164] The final formation is Figure 12k The display panel shown in the figure, wherein a first isolation column 401 surrounding the first light-emitting device 301 is arranged around the first light-emitting device 301, a second isolation column 402 surrounding the second light-emitting device 302 is arranged around the second light-emitting device 302, and a third isolation column 403 surrounding the third light-emitting device 303 is arranged around the third light-emitting device 303, an insulating layer 51 is arranged between two adjacent isolation columns 40, and the orthographic projection of the insulating layer 51 on the base substrate 1 covers the orthographic projections of the two adjacent isolation columns 40 on the base substrate 1, so as to isolate the cathode 33 overlapped on the isolation column 40 and the isolated cathode 33 of other adjacent light-emitting devices 3.

[0165] Optionally, after the first inorganic encapsulation layer CVD1 is prepared, an organic encapsulation layer IJP and a second inorganic encapsulation layer CVD2 are sequentially formed on the side of the first inorganic encapsulation layer CVD1 away from the substrate 1, such as Figure 3 shown.

[0166] In another possible embodiment, the first isolation column 401, the second isolation column 402 and the third isolation column 403 are formed at one time, and then the first light-emitting device 301, the second light-emitting device 302 and the third light-emitting device 303 are formed in the first sub-pixel area, the second sub-pixel area and the third sub-pixel area respectively using the refined masks corresponding to the light-emitting devices 3 of different colors.

[0167] Here, taking the display panel in Preparation Example 1 as an example, it specifically includes S24-2-1 to S24-2-6.

[0168] S24-2-1, such as Fig.12d As shown, the transfer electrode material layer 4 ′ is etched once to form a plurality of undercut structures 120 ; the orthographic projections of the undercut structures 120 on the base substrate 1 are located between the orthographic projections of the anodes 31 of the adjacent light emitting devices 3 on the base substrate 1 .

[0169] S24-2-2, such as Fig.12eAs shown, an insulating layer 51 is formed on the side of the transfer electrode material layer 4 ′ having the undercut structure 120 away from the pixel definition material layer PDL′. The orthographic projection of the insulating layer 51 on the base substrate 1 covers the orthographic projection of the undercut structure 120 on the base substrate 1 .

[0170] S24-2-3, such as Fig.13a As shown, the transfer electrode material layer 4' and the pixel defining material layer PDL' having the undercut structure 120 are subjected to secondary etching to form a plurality of openings penetrating the transfer electrode material layer 4' and the pixel defining material layer PDL', for example, a plurality of first openings, a plurality of second openings and a plurality of third openings penetrating the transfer electrode material layer 4' and the pixel defining material layer PDL' are formed to expose the anodes 31 of the plurality of first light-emitting devices 301, the anodes 31 of the plurality of second light-emitting devices 302 and the anodes 31 of the plurality of third light-emitting devices 303, and obtain the pixel defining layer PDL and the transfer electrode layer 4, wherein the transfer electrode layer 4 includes a first isolation column 401, a second isolation column 402 and a third isolation column 403.

[0171] Following S24-2-3, the light-emitting layers 32 and cathodes 33 of a plurality of light-emitting devices 3 are sequentially formed on the side of the transfer electrode layer 4 away from the pixel defining layer PDL to obtain a plurality of light-emitting devices 3, such as Fig.13b Specifically, the following steps S24-2-4 to S24-2-6 are included.

[0172] S24-2-4, using a first fine mask (FMM) process, forming light-emitting layers 32 and cathodes 33 of a plurality of first light-emitting devices 301 in a plurality of first openings, thereby obtaining a plurality of first light-emitting devices 301. The first fine mask includes mask openings directly facing each of the first openings.

[0173] S24-2-5, using a second fine mask (FMM) process, forming light emitting layers 32 and cathodes 33 of multiple second light emitting devices 302 in multiple second openings to obtain multiple second light emitting devices 302. The second fine mask includes mask openings directly facing each second opening.

[0174] S24-2-6, using a third fine mask (FMM) process, forming light emitting layers 32 and cathodes 33 of a plurality of third light emitting devices 303 in a plurality of third openings, thereby obtaining a plurality of third light emitting devices 303. The third fine mask includes mask openings directly facing each of the third openings.

[0175] In some embodiments, the display panel of Preparation Example 2 is different from the display panel of Preparation Example 1 in that the prepared insulating structure 5 is different. Taking the display panel in Preparation Example 2 as an example, similar to Example 1, it includes S24-3-1 to S24-3-6.

[0176] S24-3-1, etching the transfer electrode material layer 4' once to form a plurality of undercut structures 120; the orthographic projections of the undercut structures 120 on the base substrate 1 are located between the orthographic projections of the anodes 31 of the adjacent light-emitting devices 3 on the base substrate 1.

[0177] S24-3-2, perform secondary etching on the transfer electrode material layer 4' and the pixel defining material layer PDL' having the bottom cut structure 120 to form a plurality of first openings penetrating the transfer electrode material layer 4' and the pixel defining material layer PDL' to expose the anodes 31 of the plurality of first light-emitting devices 301, and obtain first isolation columns 401 overlapped with the plurality of first light-emitting devices 301.

[0178] S24-3-3, the transfer electrode material layer 4' and the pixel defining material layer PDL' having the undercut structure 120 are etched three times to form a plurality of second openings penetrating the transfer electrode material layer 4' and the pixel defining material layer PDL' to expose the anodes 31 of the plurality of second light-emitting devices 302, and obtain second isolation columns 402 overlapped with the plurality of second light-emitting devices 302.

[0179] S24-3-4, etching the transfer electrode material layer 4' and the pixel defining material layer PDL' having the bottom cut structure 120 four times to form a plurality of third openings penetrating the transfer electrode material layer 4' and the pixel defining material layer PDL' to expose the anodes 31 of the plurality of third light-emitting devices 303, and obtain third isolation columns 403 overlapped with the plurality of third light-emitting devices 303.

[0180] In the above S24-4-2 to S24-3-4, an open mask can be used to evaporate the entire light emitting material layer and the cathode layer. Next, a photolithography or etching process can be used to remove the light emitting material layer and the cathode layer outside the sub-pixel region.

[0181] S24-3-5, an inorganic packaging material layer is formed on the side of each light-emitting device 3 facing away from the substrate 1. The light-emitting layer 32 and cathode 33 of at least one light-emitting device 3, as well as the inorganic packaging material layer, extend from the corresponding pixel opening to the surrounding retaining wall structure, and the light-emitting layer 32, cathode 33 and inorganic packaging material layer extending to the retaining wall structure constitute a stacked structure.

[0182] S24-3-6, etching the stacked structure between adjacent isolation columns 40 to form a first etching channel 52, and obtaining a first inorganic encapsulation layer CVD1.

[0183] Optionally, a photolithography or etching process may be used to remove the light emitting material layer, the cathode layer and the inorganic packaging material layer between two adjacent isolation pillars 40 to form a first etched channel 52 .

[0184] Optionally, laser may be used to remove the light emitting material layer, the cathode layer and the inorganic packaging material layer between two adjacent isolation pillars 40 to form a first etched channel 52 .

[0185] Similarly, the method of forming the isolation column 40 in steps and forming the isolation column 40 at one time in the display panel of preparation example 2 is the same as the steps of preparing the display panel of preparation example 1, and the repeated parts are not repeated here.

[0186] Optionally, after the first inorganic encapsulation layer CVD1 is prepared, an organic encapsulation layer IJP and a second inorganic encapsulation layer CVD2 are sequentially formed on a side of the first inorganic encapsulation layer CVD1 away from the base substrate 1 .

[0187] In some embodiments, the display panel of Preparation Example 3 is different from the display panel of Preparation Example 1 in that the pattern of the isolation column 40 is different and the prepared insulating structure 5 is different. Taking the display panel in Preparation Example 3 as an example, Fig.14a As shown, the isolation column 40 can be prepared by molding the isolation column 40 in one step, and the light emitting device 3 can be formed by using a fine mask (FMM). For details, please refer to the detailed description of S24-2-1 to S24-2-6 related to Example 1, which will not be repeated here.

[0188] After that, after forming each light emitting device 3, as shown in FIG. Fig.14b As shown, the isolation column 40 is etched by an etching process to form a second etched channel 53. The second etched channel 53 penetrates the isolation column 40 in the thickness direction of the substrate 1. The second etched channel 53 divides the isolation column 40 into a first half 40a and a second half 40b to isolate the cathodes 33 of adjacent light-emitting devices 3 and prevent the isolated cathodes 33 from being connected again through the conductive isolation column 40.

[0189] Optionally, after the first inorganic encapsulation layer CVD1 is prepared, an organic encapsulation layer IJP and a second inorganic encapsulation layer CVD2 are sequentially formed on a side of the first inorganic encapsulation layer CVD1 away from the base substrate 1 .

[0190] In some embodiments, the display panel of Preparation Example 4 is different from the display panel of Preparation Example 1 in that the pattern of the isolation column 40 is different, and the prepared insulating structure 5 is different. Taking the display panel in Preparation Example 4 as an example, the isolation column 40 can be prepared by forming the isolation column 40 in one step. For details, refer to the detailed description of S24-2-1 to S24-2-3 related to Example 1, which will not be repeated here.

[0191] The transfer electrode material layer 4' and the pixel definition material layer PDL' having the undercut structure 120 are etched twice to obtain the pixel definition layer PDL and the transfer electrode layer 4, wherein the transfer electrode layer 4 includes a first isolation column 401, a second isolation column 402 and a third isolation column 403. Fig.15a As shown, a partition structure 7 is formed on the side of the transfer electrode layer 4 (or the isolation column 40) facing away from the base substrate 1. The positive projection of the partition structure 7 on the base substrate 1 surrounds the positive projection of the light-emitting device 3 on the base substrate 1; the cathode 33 of at least one light-emitting device 3 extends from the corresponding pixel opening to the surrounding retaining wall structure, and is simultaneously isolated by the partition structure 7 and the isolation column 40, mainly through the partition structure 7. The isolation column 40 only isolates part 43 of the cathode 33, playing a role of auxiliary partition. The height of the isolation column 40 is lower than the height of the partition structure 7, and the partition structure 7 wraps the side surface of the isolation column 40 away from the overlap side of the cathode 33 and at least part of the surface of the isolation column 40 facing away from the base substrate 1. Afterwards, as Fig.15b As shown, the light-emitting layers 32 and cathodes 33 of the plurality of light-emitting devices 3 are sequentially formed on the side of the partition structure 7 away from the substrate 1 to obtain a plurality of first light-emitting devices 301, a plurality of second light-emitting devices 302, and a plurality of third light-emitting devices 303. Optionally, a plurality of light-emitting devices 3 may be formed using a fine mask (FMM), and specific details are provided for S24-2-4 to S24-2-6 related to Example 1, which will not be repeated here.

[0192] The embodiment of the present disclosure also provides a display device, which includes the display panel of any one of the above embodiments. The display device can be, for example, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a vehicle-mounted device, or any other product with a display function. Other essential components of the display device should be understood by those of ordinary skill in the art, and will not be described in detail here, nor should they be used as limitations to the present disclosure.

[0193] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A display panel, comprising a base substrate, a driving layer arranged on the base substrate, and a plurality of light-emitting devices arranged on a side of the driving layer away from the base substrate, wherein the driving layer comprises a plurality of pixel driving circuits for driving the plurality of light-emitting devices; at least one pixel driving circuit of the plurality of pixel driving circuits comprises at least a driving transistor; An anode of at least one of the plurality of light-emitting devices is electrically connected to a first power signal line, a cathode of at least one of the plurality of light-emitting devices is electrically connected to a first electrode of the driving transistor, a second electrode of the driving transistor is electrically connected to a second power signal line, and a first power voltage of the first power signal line is greater than a second power voltage transmitted by the second power signal line.

2. The display panel according to claim 1, wherein: The display panel further includes a pixel defining layer and a switching electrode layer arranged on a side of the pixel defining layer away from the driving layer; The pixel defining layer includes a plurality of pixel openings and a retaining wall structure for forming the plurality of pixel openings, and the plurality of pixel openings are used to define the plurality of light emitting devices; The transfer electrode layer includes an isolation column, and the orthographic projection of the retaining wall structure on the base substrate covers the orthographic projection of the isolation column on the base substrate; the cathode of the at least one light-emitting device extends from the corresponding pixel opening to the surrounding retaining wall structure and is separated by the isolation column; the isolation column overlaps the separated cathode and is electrically connected to the first electrode of the driving transistor; An insulating structure is arranged between two adjacent light-emitting devices, and the insulating structure isolates the cathodes of the two adjacent light-emitting devices.

3. The display panel according to claim 2, wherein: The isolation columns are arranged in one-to-one correspondence with the light-emitting devices, and the orthographic projections of the isolation columns on the base substrate surround the orthographic projections of the corresponding light-emitting devices on the base substrate; adjacent isolation columns are arranged at intervals.

4. The display panel according to claim 3, wherein: The insulating structure is an insulating layer; The insulating layer wraps the side surface of the isolation column away from the cathode overlap side and at least a portion of the surface of the isolation column away from the substrate.

5. The display panel according to claim 3, wherein: The display panel further comprises an encapsulation layer disposed on a side of the at least one light emitting device away from the base substrate; The light-emitting layer and cathode of the at least one light-emitting device, and the encapsulation layer all extend from the corresponding pixel opening to the surrounding retaining wall structure, and the light-emitting layer, the cathode and the encapsulation layer extending to the retaining wall structure form a stacked structure; The insulating structure is a first etching channel, and the first etching channel penetrates the stacked structure between two adjacent isolation pillars in the thickness direction of the substrate.

6. The display panel according to claim 2, wherein: The insulating structure is a second etching channel, and the second etching channel penetrates the isolation column in the thickness direction of the substrate; The isolation column comprises a first half and a second half; the first half and the second half are separated by the second etched channel; the orthographic projections of the first half and the second half on the substrate respectively surround the orthographic projections of different light emitting devices on the substrate; The display panel further includes an encapsulation layer disposed on a side of the at least one light emitting device away from the base substrate, the encapsulation layer falls into the second etched channel and wraps the side surfaces of the first half and the second half that are oppositely disposed.

7. The display panel according to claim 1, wherein: The display panel further comprises a pixel defining layer, a first switching electrode and a partition structure arranged on a side of the pixel defining layer away from the driving layer; the pixel defining layer comprises a plurality of pixel openings and a retaining wall structure for forming the plurality of pixel openings, and the plurality of pixel openings are used to define the plurality of light-emitting devices; The orthographic projection of the partition structure on the base substrate surrounds the orthographic projection of the corresponding light-emitting device on the base substrate; the cathode of at least one light-emitting device extends from the pixel opening to the surrounding retaining wall structure and is partitioned by the partition structure; The first switching electrode is arranged between the partition structure and the light emitting device, and the first switching electrode is overlapped with the cathode partitioned by the partition structure, and is electrically connected to the first electrode of the driving transistor.

8. The display panel according to claim 7, wherein: The first transfer electrode is an isolation column; the height of the isolation column is lower than the height of the partition structure, and the partition structure wraps the side surface of the isolation column away from the cathode overlap side and at least part of the surface of the isolation column away from the base substrate.

9. The display panel according to claim 2 or 8, wherein: The isolation column comprises a bottom, a main body and a partitioning part which are arranged in sequence in a direction away from the base substrate; the bottom and the partitioning part both protrude from the main body; The partition portion partitions the cathode of the at least one light emitting device extending to the retaining wall structure. The cathode of the at least one light emitting device overlaps the main body portion and is electrically connected to the first electrode of the driving transistor through the main body portion and the bottom.

10. The display panel according to claim 9, wherein: The display panel further comprises an encapsulation layer disposed on a side of the at least one light emitting device away from the base substrate, and the encapsulation layer fills the concave gap between the partition portion and the main body portion.

11. The display panel according to claim 2 or 8, wherein: The isolation column comprises a main body and a partition portion located on a side of the main body away from the base substrate; the partition portion protrudes from the main body; The partition portion partitions the cathode of the at least one light emitting device extending to the retaining wall structure. The cathode of the at least one light emitting device overlaps the main body portion and is electrically connected to the first electrode of the driving transistor through the main body portion.

12. The display panel according to claim 2 or 8, wherein: The display panel further includes a second switching electrode and a planarization layer arranged on a side of the driving layer close to the pixel defining layer; The second transfer electrode passes through the first connection via hole of the retaining wall structure and the second connection via hole of the planarization layer to electrically connect the first electrode of the driving transistor and the isolation column.

13. A method for preparing a display panel, for preparing the display panel as claimed in any one of claims 1 to 12; wherein: The method for preparing the display panel includes: Providing a substrate as described above; A driving layer is formed on the substrate; the driving layer comprises a plurality of pixel driving circuits for driving a plurality of light emitting devices; at least one pixel driving circuit of the plurality of pixel driving circuits comprises at least a driving transistor; A plurality of light-emitting devices are formed on a side of the driving layer away from the base substrate; wherein an anode of at least one of the plurality of light-emitting devices is electrically connected to a first power signal line, a cathode of at least one of the plurality of light-emitting devices is electrically connected to a first electrode of the driving transistor, a second electrode of the driving transistor is electrically connected to a second power signal line, and a first power voltage of the first power signal line is greater than a second power voltage transmitted by the second power signal line.

14. The method for preparing a display panel according to claim 13, wherein: Before forming the light-emitting layer of the light-emitting device, the method further comprises: forming a planarization layer on a side of the driving layer away from the base substrate; forming an anode of each of the light-emitting devices on a side of the planarization layer away from the driving layer; forming a pixel definition material layer and a switching electrode material layer in sequence on a side of the anode away from the planarization layer; Etching the switching electrode material layer and the pixel defining material layer to form a pixel defining layer and a switching electrode layer; The pixel defining layer includes a plurality of pixel openings and a retaining wall structure for forming the plurality of pixel openings, the plurality of pixel openings being used to define the plurality of light-emitting devices; the transfer electrode layer includes an isolation column, the orthographic projection of the retaining wall structure on the substrate covers the orthographic projection of the isolation column on the substrate; the cathode of at least one light-emitting device extends from the corresponding pixel opening to the surrounding retaining wall structure and is separated by the isolation column; the isolation column overlaps the separated cathode and is electrically connected to the first electrode of the driving transistor; an insulating structure is arranged between two adjacent light-emitting devices, and the insulating structure isolates the cathodes of the two adjacent light-emitting devices.

15. The method for preparing a display panel according to claim 14, wherein: The plurality of light emitting devices include a plurality of first light emitting devices, a plurality of second light emitting devices and a plurality of third light emitting devices; The switching electrode material layer and the pixel defining material layer are etched to form a pixel defining layer and a switching electrode layer, comprising: Etching the transfer electrode material layer once to form a plurality of undercut structures; the orthographic projections of the undercut structures on the substrate are located between the orthographic projections of the anodes of the adjacent light-emitting devices on the substrate; Performing secondary etching on the transfer electrode material layer and the pixel definition material layer having the undercut structure to form a plurality of first openings penetrating the transfer electrode material layer and the pixel definition material layer to expose anodes of the plurality of first light-emitting devices and obtain first isolation columns overlapped with the plurality of first light-emitting devices; Etching the transfer electrode material layer and the pixel definition material layer having the undercut structure three times to form a plurality of second openings penetrating the transfer electrode material layer and the pixel definition material layer to expose the anodes of the plurality of second light-emitting devices and obtain second isolation columns overlapped with the plurality of second light-emitting devices; The transfer electrode material layer and the pixel defining material layer of the undercut structure are etched four times to form a plurality of third openings penetrating the transfer electrode material layer and the pixel defining material layer to expose the anodes of the plurality of third light-emitting devices and obtain third isolation columns overlapped with the plurality of third light-emitting devices.

16. The method for preparing a display panel according to claim 15, wherein: After performing the secondary etching and before performing the tertiary etching, the method further includes: Sequentially forming the light-emitting material layer and the cathode layer of the plurality of first light-emitting devices on the side of the switching electrode material layer away from the pixel defining material layer; The light-emitting material layer and the cathode layer outside the first sub-pixel region are removed to form the plurality of first light-emitting devices; the plurality of first light-emitting devices and the first isolation column are both located in the first sub-pixel region.

17. The method for preparing a display panel according to claim 15, wherein: After performing the third etching and before performing the fourth etching, the method further includes: Sequentially forming the light-emitting material layer and the cathode layer of the plurality of second light-emitting devices on the side of the switching electrode material layer away from the pixel defining material layer; The light-emitting material layer and the cathode layer outside the second sub-pixel region are removed to form the plurality of second light-emitting devices; the plurality of second light-emitting devices and the second isolation column are both located in the second sub-pixel region.

18. The method for preparing a display panel according to claim 15, wherein: After four etchings, it also includes: Sequentially forming the light-emitting material layer and the cathode layer of the plurality of third light-emitting devices on the side of the switching electrode material layer away from the pixel defining material layer; The light-emitting material layer and the cathode layer outside the third sub-pixel region are removed to form a plurality of third light-emitting devices; the plurality of third light-emitting devices and the third isolation columns are both located in the third sub-pixel region.

19. The method for preparing a display panel according to claim 14, wherein: The switching electrode material layer and the pixel defining material layer are etched to form a pixel defining layer and a switching electrode layer, comprising: Etching the transfer electrode material layer once to form a plurality of undercut structures; the orthographic projections of the undercut structures on the substrate are located between the orthographic projections of the anodes of the adjacent light-emitting devices on the substrate; The transfer electrode material layer and the pixel defining material layer having the undercut structure are etched twice to form a plurality of openings penetrating the transfer electrode material layer and the pixel defining material layer to expose the anodes of the respective light-emitting devices and obtain the pixel defining layer and the transfer electrode layer.

20. The method for preparing a display panel according to claim 19, wherein: After forming the switching electrode layer, the method further includes: The light-emitting layers and cathodes of the plurality of light-emitting devices are sequentially formed on a side of the switching electrode layer away from the pixel defining layer to obtain the plurality of light-emitting devices.

21. The method for preparing a display panel according to claim 15 or 19, wherein: Before the secondary etching, it also includes: An insulating layer is formed on a side of the transfer electrode material layer having the undercut structure away from the pixel defining material layer; and an orthographic projection of the insulating layer on the base substrate covers an orthographic projection of the undercut structure on the base substrate.

22. The method for preparing a display panel according to claim 15 or 19, wherein: After forming each of the light-emitting devices, the method further comprises: An inorganic packaging material layer is formed on the side of the light-emitting device away from the substrate; the light-emitting layer and cathode of the at least one light-emitting device, and the inorganic packaging material layer are extended from the pixel opening to the surrounding retaining wall structure, and the light-emitting layer, the cathode and the inorganic packaging material layer extending to the retaining wall structure constitute a stacked structure; The stacked structure between adjacent isolation pillars is etched to form a first etching channel; the first etching channel penetrates the stacked structure between two adjacent isolation pillars in the thickness direction of the substrate.

23. The method for preparing a display panel according to claim 15 or 20, wherein: The light-emitting layer and cathode of the at least one light-emitting device extend from the pixel opening to the surrounding retaining wall structure, and the light-emitting layer and cathode extending to the retaining wall structure form a stacked structure; After forming each of the light-emitting devices, the method further comprises: The isolation column is etched to form a second etching channel; the second etching channel penetrates the isolation column in the thickness direction of the substrate; the second etching channel divides the isolation column into a first half and a second half.

24. The method for preparing a display panel according to claim 15 or 20, wherein: Before forming each of the light-emitting devices, the method further comprises: A partition structure is formed on the side of the transfer electrode layer away from the base substrate, and the partition structure wraps the side surface of the isolation column away from the pixel opening and at least a part of the surface of the isolation column away from the base substrate.

25. A display device, wherein: The invention comprises the display panel according to any one of claims 1 to 12.

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