Display panel, preparation method of display panel and electronic equipment
By setting a shielding layer in the non-display area of the display panel, the problem of mutual interference between the touch trace and the signal trace is solved, and the touch and display performance of the display panel is improved.
Patent Information
- Application Number
- CN202411537540.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-30
- Publication Date
- 2025-04-29
AI Technical Summary
In the existing display panel, the signals between the touch trace and the signal trace interfere with each other, affecting the touch and display performance of the display panel.
In the non-display area of the display panel, a shielding layer is provided, and the shielding trace is located between the touch trace and the signal trace. By setting the shielding trace, the forward projection of the touch trace on the substrate and the forward projection of the shielding trace at least partially overlap, thereby shielding the mutual interference of the shielding signals.
The shielding layer effectively blocks the signal interference between the touch trace and the signal trace, improving the touch and display performance of the display panel.
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Figure CN119907529A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular, to a display panel, a method for preparing a display panel, and an electronic device. Background Art
[0002] Organic Light Emitting Diode (OLED) and flat panel display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages such as high image quality, power saving, thin body and wide application range, becoming the mainstream in display panels.
[0003] However, there are still some problems with display panels that need to be solved urgently. Summary of the invention
[0004] In order to overcome the technical problems mentioned in the above technical background, an embodiment of the present application provides a display panel, wherein the display panel includes a display area and a non-display area at least partially surrounding the display area, and the display panel includes:
[0005] substrate;
[0006] An array signal layer, located on one side of the substrate, the array signal layer comprising a plurality of signal traces, at least one of the signal traces being located in the non-display area;
[0007] An isolation structure, located at a side of the array signal layer away from the substrate, the isolation structure encloses to form an isolation opening;
[0008] a light emitting unit, at least partly located in the isolation opening;
[0009] A touch layer is located on a side of the light emitting unit away from the substrate, the touch layer includes touch wiring, at least one of the touch wiring is located in the non-display area
[0010] A shielding layer is located between the touch layer and the array signal layer, the shielding layer includes a shielding line, the shielding line is located in the non-display area, and the orthographic projection of the touch line on the substrate at least partially overlaps with the orthographic projection of the shielding line on the substrate.
[0011] In some possible implementations, the non-display area includes a first non-display area and a second non-display area located on a side of the first non-display area away from the display area, the first non-display area is provided with a first shielding structure, and the second non-display area is provided with a second shielding structure;
[0012] Preferably, the display panel includes a frame area, the non-display area includes the frame area, and the shielding wiring is located in the frame area;
[0013] Preferably, an orthographic projection of the first shielding structure on the substrate overlaps with an orthographic projection of the second shielding structure on the substrate.
[0014] In some possible implementations, along a direction away from the substrate, the first shielding structure includes a first shielding layer and a second shielding layer stacked in sequence, the first shielding layer includes a first shielding trace, the second shielding layer includes a second shielding trace, the orthographic projections of the first shielding trace and the second shielding trace on the substrate form a first pattern, and the orthographic projection of the touch trace located in the first non-display area on the substrate at least partially overlaps with the first pattern;
[0015] Preferably, the orthographic projection of the touch control trace located in the first non-display area on the substrate is located within the first pattern;
[0016] Preferably, the material of the second shielding trace is the same as that of the isolation structure;
[0017] Preferably, the second shielding trace is arranged on the same layer as the isolation structure.
[0018] In some possible implementations, the light-emitting unit includes a first electrode, a light-emitting portion, and a second electrode, which are sequentially stacked in a direction away from the substrate;
[0019] Preferably, the material of the first shielding wire is the same as that of the first electrode;
[0020] Preferably, the first shielding wire is arranged in the same layer as the first electrode.
[0021] In some possible implementations, along the thickness direction of the substrate, a first exhaust hole is provided on the first shielding trace, a second exhaust hole is provided on the second shielding trace, and an orthographic projection of the first exhaust hole on the substrate is outside an orthographic projection of the second exhaust hole on the substrate;
[0022] Preferably, the display panel further comprises a first insulating layer located between the first electrode and the isolation structure, and a third exhaust hole is provided on the first insulating layer along the thickness direction of the substrate;
[0023] Preferably, the third exhaust hole is communicated with the second exhaust hole;
[0024] Preferably, the center of the orthographic projection of the third exhaust hole on the substrate coincides with the center of the orthographic projection of the second exhaust hole on the substrate.
[0025] In some possible implementations, the display panel further includes a pixel defining layer located between the first electrode and the isolation structure, the isolation structure is located on a side of the pixel defining layer away from the substrate, the pixel defining layer includes a pixel opening exposing at least a portion of the first electrode, and the pixel opening is connected to the isolation opening;
[0026] Preferably, the pixel defining layer extends from the display area to the non-display area, and the pixel defining layer is reused as the first insulating layer.
[0027] In some possible implementations, along a direction away from the substrate, the second shielding structure includes a third shielding layer and a fourth shielding layer stacked in sequence, the third shielding layer includes a third shielding trace, the fourth shielding layer includes a fourth shielding trace, the orthographic projections of the third shielding trace and the fourth shielding trace on the substrate form a second pattern, and the orthographic projection of the touch trace located in the second non-display area on the substrate at least partially overlaps with the second pattern;
[0028] Preferably, the orthographic projection of the touch control trace located in the second non-display area on the substrate is located within the second pattern.
[0029] In some possible implementations, the display panel further includes a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer stacked in sequence in a direction away from the substrate, the third shielding trace is located in the third conductive layer, and the fourth shielding trace is located in the fourth conductive layer;
[0030] Preferably, the display panel further comprises a first insulating layer located on a side of the fourth shielding layer away from the substrate, and a fourth exhaust hole is provided on the first insulating layer along a thickness direction of the substrate;
[0031] Preferably, along the thickness direction of the substrate, a fifth exhaust hole is provided on the fourth shielding trace, and the orthographic projection of the fifth exhaust hole on the substrate at least partially overlaps with the orthographic projection of the fourth exhaust hole on the substrate;
[0032] Preferably, the center of the orthographic projection of the fifth exhaust hole on the substrate coincides with the center of the orthographic projection of the fourth exhaust hole on the substrate;
[0033] Preferably, the signal wiring is located in the first conductive layer and / or the second conductive layer.
[0034] In some possible implementations, the display panel further includes a pixel defining layer located between the substrate and the isolation structure, the pixel defining layer including a pixel opening exposing at least a portion of the first electrode of the light emitting unit;
[0035] Preferably, the pixel defining layer extends from the display area to the non-display area, and the pixel defining layer is reused as the first insulating layer;
[0036] Preferably, the display panel also includes a first planarization layer and a second planarization layer stacked in sequence in a direction away from the substrate, the first planarization layer extends from the display area to the non-display area, the first planarization layer is located between the third shielding layer and the fourth shielding layer, and the second planarization layer is located between the fourth shielding layer and the first insulating layer.
[0037] In some possible implementations, the display panel further includes an encapsulation unit located on a side of the light-emitting unit away from the substrate, and at least a portion of the encapsulation unit extends from a side of the isolation structure toward the isolation opening to a side of the isolation structure away from the substrate;
[0038] Preferably, the encapsulation unit is arranged at intervals on a side of the isolation structure away from the substrate;
[0039] Preferably, a gap exists between the packaging unit located at a side of the isolation structure away from the substrate and a side of the isolation structure away from the substrate.
[0040] In some possible implementations, the display panel further includes a second encapsulation layer located on a side of the encapsulation unit away from the substrate;
[0041] Preferably, the display panel further comprises a third encapsulation layer located on a side of the second encapsulation layer away from the substrate, and the touch layer is located on a side of the third encapsulation layer away from the substrate;
[0042] Preferably, the materials of the encapsulation unit and the third encapsulation layer both include inorganic materials;
[0043] Preferably, the material of the second encapsulation layer includes organic material.
[0044] In some possible implementations, the isolation structure includes a first isolation portion and a second isolation portion which are sequentially stacked in a direction away from the substrate, and an orthographic projection of a side of the first isolation portion away from the substrate on the substrate is located within an orthographic projection of the second isolation portion on the substrate;
[0045] Preferably, the second electrode of the light-emitting unit is electrically connected to the first isolation portion; and / or the isolation structure further comprises a third isolation portion located on a side of the first isolation portion facing the substrate, and the second electrode of the light-emitting unit is electrically connected to the third isolation portion;
[0046] Preferably, the material of the third isolation portion includes molybdenum; and / or the material of the first isolation portion includes aluminum; and / or the material of the second isolation portion includes titanium.
[0047] In some possible implementations, the present application further provides a method for preparing a display panel, wherein the display panel includes a display area and a non-display area at least partially surrounding the display area, and the method includes:
[0048] providing a substrate;
[0049] forming an array signal layer on one side of the substrate, the array signal layer comprising a plurality of signal traces, at least one of the signal traces being located in the non-display area;
[0050] An isolation structure and a shielding layer are formed on a side of the array signal layer away from the substrate, wherein the isolation structure encloses an isolation opening, and the shielding layer includes a shielding wire, and the shielding wire is located in the non-display area;
[0051] forming at least a portion of a light emitting unit in the isolation opening;
[0052] A touch layer is formed on a side of the light-emitting unit away from the substrate, the touch layer includes touch traces, at least one of the touch traces is located in the non-display area, and the orthographic projection of the touch trace on the substrate at least partially overlaps with the orthographic projection of the shielding trace on the substrate.
[0053] In some possible implementations, the step of forming an isolation structure and a shielding layer on a side of the array signal layer away from the substrate includes:
[0054] A third conductive layer, a first planarization layer, a fourth conductive layer and a second planarization layer are sequentially formed on a side of the array signal layer away from the substrate, wherein the third conductive layer includes a third shielding layer, and the fourth conductive layer includes a fourth shielding layer;
[0055] Forming a first electrode material layer on a side of the second planarization layer away from the substrate, and patterning the first electrode material layer to form a plurality of first electrodes located in the display area and a first shielding layer including a plurality of first shielding traces located in the non-display area;
[0056] forming a pixel defining material layer and an isolation material layer in sequence on a side of the first electrode away from the substrate;
[0057] Performing patterning on the isolation material layer to respectively form an isolation structure located in the display area and a second shielding layer located in the non-display area and including a plurality of second shielding traces;
[0058] The pixel defining material layer is patterned to form a pixel defining layer located in the display area and a first insulating layer located in the non-display area.
[0059] In some possible implementations, the present application further provides an electronic device, which includes the display panel described in the present application, or includes a display panel prepared by the method for preparing the display panel described in the present application.
[0060] Compared with the prior art, this application has the following beneficial effects:
[0061] The present application provides a display panel, a method for preparing a display panel, and an electronic device. By setting a shielding layer between a touch layer and an array signal layer in a non-display area, mutual interference of signals between touch lines and signal lines can be shielded, thereby improving the touch performance and display performance of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0062] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0063] Figure 1 A schematic top view of a display panel provided in an embodiment of the present application;
[0064] Figure 2 Provided in the embodiments of this application Figure 1 One of the cross-sectional diagrams of AA;
[0065] Figure 3 Provided in the embodiments of this application Figure 1 The second schematic cross-sectional view of AA;
[0066] Figure 4 Provided in the embodiments of this application Figure 1 The third schematic diagram of the cross section of AA;
[0067] Figure 5 Provided in the embodiments of this application Figure 1 The fourth schematic cross-sectional view of AA;
[0068] Figure 6 Provided in the embodiments of this application Figure 1 The fifth schematic cross-sectional view of AA;
[0069] Figure 7 Provided in the embodiments of this application Figure 1The sixth schematic diagram of the cross section of AA;
[0070] Figure 8 Provided in the embodiments of this application Figure 1 Sectional diagram of AA in the figure 7;
[0071] Fig. 9 Provided in the embodiments of this application Figure 1 The eighth schematic diagram of the cross section of AA;
[0072] Fig.10 A schematic diagram of a process for preparing a display panel provided in an embodiment of the present application;
[0073] Fig.11 A cross-sectional schematic diagram of sequentially forming a third conductive layer, a first planarization layer, a fourth conductive layer, and a second planarization layer on a side of an array signal layer away from a substrate provided in an embodiment of the present application;
[0074] Fig.12 A cross-sectional schematic diagram of forming a first electrode and a first shielding layer on a side of the second planarization layer away from the substrate provided in an embodiment of the present application;
[0075] Fig.13 A cross-sectional view of sequentially forming a pixel defining material layer and an isolation material layer on a side of the first electrode away from the substrate provided in an embodiment of the present application;
[0076] Fig.14 The cross-sectional view of the isolation material layer after patterning provided in the embodiment of the present application;
[0077] Fig.15 This is a schematic cross-sectional view of a pixel defining material layer after patterning provided in an embodiment of the present application.
[0078] Figure numerals: 1, substrate; 2, array signal layer; 201, signal routing; 3, shielding layer; 301, first shielding structure; 302, second shielding structure; 31, first shielding routing; 311, first exhaust hole; 32, second shielding routing; 321, second exhaust hole; 33, third shielding routing; 34, fourth shielding routing; 341, fifth exhaust hole; 4, touch layer; 41, touch routing; 5, isolation structure; 51, first isolation part; 52, second isolation part; 53, third isolation part; 6, isolation opening opening; 7, second electrode; 8, light-emitting portion; 9, first electrode; 10, light-emitting unit; 11, first insulating layer; 111, third exhaust hole; 112, fourth exhaust hole; 12, pixel defining layer; 121, pixel opening; 13, first planarization layer; 15, second planarization layer; 16, first conductive layer; 17, second conductive layer; 18, third conductive layer; 19, fourth conductive layer; 20, encapsulation unit; 21, second encapsulation layer; 22, third encapsulation layer; 23, pixel defining material layer; 24, isolation material layer. DETAILED DESCRIPTION
[0079] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.
[0080] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0081] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0082] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the inventive product is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.
[0083] It should be noted that, in the absence of conflict, different features in the embodiments of the present application may be combined with each other.
[0084] Improving the density of light-emitting units in a display panel (i.e., pixel density) is an important way to improve display effects. However, the display panels currently made using fine metal evaporation mask (FMM) technology cannot further increase the density of light-emitting units due to technical limitations. The inventors have found through long-term research that in order to solve the technical problem that the density of light-emitting units cannot be further increased, an isolation structure is set in some display panels. When the light-emitting material layer and the second electrode are evaporated in the entire layer, the light-emitting material layer and the second electrode can be disconnected at the isolation structure. Through multiple evaporation and multiple etching processes (i.e., light-emitting unit patterning), light-emitting units of different colors can be formed in different isolation openings.
[0085] Among them, patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, PCT / CN2024 / 099072, CN117979755A, CN1179 98900A, CN117062489A, CN117580403A, CN116583155A, CN116669477A, CN117396039A, CN116669480A, CN116600606A, and CN117500332A record relevant technical solutions of isolation structures, and their contents are incorporated into this application by reference for reference.
[0086] A display panel in the related art includes a substrate, an array signal layer located on one side of the substrate, an isolation structure located on a side of the array signal layer away from the substrate, a light-emitting unit located in an isolation opening formed by the isolation structure, and a touch layer located on a side of the light-emitting unit away from the substrate. The display panel includes a display area and a non-display area. Part of the touch wiring of the touch layer and part of the signal wiring of the array signal layer are located in the non-display area. Signals between the touch wiring and the signal wiring located in the non-display area crosstalk with each other, thereby affecting the touch performance and display performance of the display panel.
[0087] In order to solve the above-mentioned technical problems, the inventor innovatively designed the following technical solutions, and the specific implementation solutions of the present application will be described in detail below in conjunction with the accompanying drawings. It should be noted that the defects existing in the solutions in the above-mentioned prior art are the results obtained by the inventor after practice and careful research. Therefore, the discovery process of the above-mentioned technical problems and the solutions proposed in this embodiment below for the above-mentioned problems should be the contributions made by the inventor to the present application in the process of invention and creation, and should not be understood as the technical content known to those skilled in the art.
[0088] See also Figure 1 and Figure 2 This embodiment provides a display panel, which includes a display area AA and a non-display area AB that at least partially surrounds the display area AA. The display panel includes a substrate 1, an array signal layer 2, an isolation structure 5, a light-emitting unit 10, a touch layer 4 and a shielding layer 3.
[0089] The array signal layer 2 is located on one side of the substrate 1 . The array signal layer 2 includes a plurality of signal wirings 201 . At least one signal wiring 201 is located in the non-display area AB.
[0090] The signal line 201 can transmit signals in the display panel. For example, the signal line 201 can be a scan signal line, a reset signal line, etc.
[0091] The isolation structure 5 is located on a side of the array signal layer 2 away from the substrate 1 . The isolation structure 5 encloses an isolation opening 6 . At least a portion of the light emitting unit 10 is located in the isolation opening 6 .
[0092] The touch layer 4 is located at a side of the light emitting unit 10 away from the substrate 1 . The touch layer 4 includes touch traces 41 . At least one touch trace 41 is located in the non-display area AB.
[0093] The touch control wiring 41 may include a touch control receiving wiring and a touch control transmitting wiring, and the touch control receiving wiring and the touch control transmitting wiring may realize the touch control function of the display panel.
[0094] The shielding layer 3 is located between the touch layer 4 and the array signal layer 2 . The shielding layer 3 includes shielding traces. The shielding traces are located in the non-display area AB. The orthographic projection of the touch trace 41 on the substrate 1 at least partially overlaps with the orthographic projection of the shielding traces on the substrate 1 .
[0095] The shielding line has the function of shielding signals. Specifically, a shielding line is arranged between the touch line 41 and the signal line 201 in the non-display area AB of the display panel, and the orthographic projection of the touch line 41 on the substrate 1 at least partially overlaps with the orthographic projection of the shielding line on the substrate 1. The signal affected by the signal line 201 on the touch line 41 can be shielded, and the signal affected by the touch line 41 on the signal line 201 can also be shielded. That is, the mutual influence between the touch line 41 and the signal line 201 can be reduced, and the crosstalk problem between the touch line 41 and the signal line 201 can be improved.
[0096] Based on the above design, this embodiment can shield the mutual interference of signals between the touch line 41 and the signal line 201 by setting a shielding layer 3 between the touch layer 4 and the array signal layer 2 in the non-display area AB, thereby improving the touch performance and display performance of the display panel.
[0097] For some possible implementations, see Figure 3 The non-display area AB includes a first non-display area AB1 and a second non-display area AB2 located on a side of the first non-display area AB1 away from the display area AA. The first non-display area AB1 is provided with a first shielding structure 301, and the second non-display area AB2 is provided with a second shielding structure 302.
[0098] Optionally, the display panel includes a frame area, the non-display area AB includes the frame area, and the shielding wiring is located in the frame area.
[0099] Optionally, an orthographic projection of the first shielding structure 301 on the substrate 1 overlaps with an orthographic projection of the second shielding structure 302 on the substrate 1 .
[0100] The shielding wiring is arranged at the frame position of the display panel to shield the mutual influence of signals between the signal wiring 201 and the touch wiring 41 at the frame position.
[0101] For some possible implementations, see again Figure 3, along the direction away from the substrate 1, the first shielding structure 301 includes a first shielding layer and a second shielding layer which are stacked in sequence, the first shielding layer includes a first shielding trace 31, the second shielding layer includes a second shielding trace 32, the first shielding trace 31 and the second shielding trace 32 are both located in the first non-display area AB1, the orthographic projections of the first shielding trace 31 and the second shielding trace 32 on the substrate 1 constitute a first pattern, and the orthographic projection of the touch trace 41 located in the first non-display area AB1 on the substrate 1 at least partially overlaps with the first pattern.
[0102] Since the orthographic projection of the touch line 41 located in the first non-display area AB1 on the substrate 1 at least partially overlaps with the first pattern, the first shielding line 31 and the second shielding line 32 can shield the touch line 41 and the signal line 201 located in the first non-display area AB1, thereby reducing the mutual interference between the touch line 41 and the signal line 201 located in the first non-display area AB1.
[0103] Preferably, the orthographic projection of the touch line 41 located in the first non-display area AB1 on the substrate 1 is located within the first pattern. In this way, the first shielding line 31 and the second shielding line 32 have a better shielding effect on the touch line 41 and the signal line 201 located in the first non-display area AB1.
[0104] Preferably, see again Figure 3 The material of the second shielding trace 32 is the same as that of the isolation structure 5 and they are arranged in the same layer.
[0105] In this way, while forming the isolation structure 5 located in the display area AA, the second shielding wiring 32 located in the first non-display area AB1 can be formed, so there is no need to set up a special process for forming the second shielding wiring 32, thereby reducing the cost of forming the second shielding wiring 32.
[0106] For some possible implementations, see again Figure 3 The light-emitting unit 10 includes a first electrode 9 , a light-emitting portion 8 , and a second electrode 7 which are sequentially stacked in a direction away from the substrate 1 .
[0107] The setting of the isolation structure 5 enables the display panel to form film layers of light-emitting units 10 of different colors in different isolation openings 6 without the need for a fine metal mask. When forming a light-emitting material layer, the light-emitting material layer will be separated by the isolation structure 5 to form a plurality of light-emitting portions 8 arranged at intervals. When forming a second electrode material layer, the second electrode material layer will be separated by the isolation structure 5 to form a plurality of second electrodes 7 arranged at intervals. The isolation structure 5 includes a conductive material. The second electrode 7 is electrically connected to the isolation structure 5. A first electrode 9, a light-emitting portion 8 and a second electrode 7 form a light-emitting unit 10. Among them, the first electrode 9 can be an anode, and the second electrode 7 can be a cathode.
[0108] In this way, different light-emitting units 10 can be made independent of each other, thereby improving the crosstalk between adjacent light-emitting units 10 and improving the display effect of the display panel. At the same time, due to the presence of the isolation structure 5, the light-emitting material layer and the second electrode 7 layer in the light-emitting unit 10 of each color in the display panel can be first prepared on the entire surface and then patterned, thereby eliminating the need for a fine metal mask, thereby saving the manufacturing cost of the display panel.
[0109] Optionally, the material of the first shielding trace 31 is the same as that of the first electrode 9 and they are arranged in the same layer.
[0110] In this way, while forming the first electrode 9 located in the display area AA, the first shielding wiring 31 located in the first non-display area AB1 can be formed, so there is no need to set up a special process for forming the first shielding wiring 31, thereby reducing the cost of forming the first shielding wiring 31.
[0111] For some possible implementations, see Figure 4 Along the thickness direction of the substrate 1 , a first exhaust hole 311 is provided on the first shielding trace 31 , and a second exhaust hole 321 is provided on the second shielding trace 32 . The orthographic projection of the first exhaust hole 311 on the substrate 1 is located outside the orthographic projection of the second exhaust hole 321 on the substrate 1 .
[0112] Optionally, the display panel further includes a first insulating layer 11 located between the first electrode 9 and the isolation structure 5 , and a third exhaust hole 111 is provided on the first insulating layer 11 along the thickness direction of the substrate 1 .
[0113] There is a certain amount of water vapor in the film layer on the side of the first shielding layer facing the substrate 1. If the water vapor is not discharged in time, the quality of the display panel may be affected. In this embodiment, by setting a first exhaust hole 311 on the first shielding wiring 31, setting a second exhaust hole 321 on the second shielding wiring 32, and setting a third exhaust hole 111 on the first insulating layer 11, the water vapor in the film layer on the side of the first shielding layer facing the substrate 1 can be discharged through the first exhaust hole 311, the third exhaust hole 111, and the second exhaust hole 321 in sequence, so that the water vapor in the film layer on the side of the first shielding layer facing the substrate 1 can be discharged in time, thereby improving the quality of the display panel.
[0114] In addition, staggering the first exhaust hole 311 and the second exhaust hole 321 can make the orthographic projections of the first shielding wire 31 and the second shielding wire 32 on the substrate 1 form an uninterrupted pattern, thereby more effectively shielding the touch wire 41 and the signal wire 201.
[0115] Preferably, see again Figure 4The third exhaust hole 111 is connected to the second exhaust hole 321. In this way, it is easier for water vapor to be discharged from the third exhaust hole 111 and the second exhaust hole 321, so that the water vapor in the film layer of the first shielding layer facing the substrate 1 can be further discharged in time.
[0116] Preferably, the center of the orthographic projection of the third exhaust hole 111 on the substrate 1 coincides with the center of the orthographic projection of the second exhaust hole 321 on the substrate 1. In this way, the water vapor in the film layer of the first shielding layer facing the substrate 1 can be further and more timely discharged.
[0117] For some possible implementations, see again Figure 4 The display panel also includes a pixel defining layer 12 located between the first electrode 9 and the isolation structure 5. The isolation structure 5 is located on the side of the pixel defining layer 12 away from the substrate 1. The pixel defining layer 12 includes a pixel opening 121 that exposes at least a portion of the first electrode 9. The pixel opening 121 is connected to the isolation opening 6.
[0118] Preferably, the pixel defining layer 12 extends from the display area AA to the non-display area AB, and the pixel defining layer 12 is reused as the first insulating layer 11 .
[0119] In this way, the first insulating layer 11 in the non-display area AB can be formed while the pixel defining layer 12 in the display area AA is formed, so there is no need to set up a special process for forming the first insulating layer 11, thereby reducing the cost of forming the first insulating layer 11.
[0120] For some possible implementations, see Figure 5 , along the direction away from the substrate 1, the second shielding structure 302 includes a third shielding layer and a fourth shielding layer which are stacked in sequence, the third shielding layer includes a third shielding trace 33, the fourth shielding layer includes a fourth shielding trace 34, the third shielding trace 33 and the fourth shielding trace 34 are both located in the second non-display area AB2, the orthographic projections of the third shielding trace 33 and the fourth shielding trace 34 on the substrate 1 constitute a second pattern, and the orthographic projection of the touch trace 41 located in the second non-display area AB2 on the substrate 1 at least partially overlaps with the second pattern.
[0121] Since the orthographic projection of the touch line 41 located in the second non-display area AB2 on the substrate 1 at least partially overlaps with the second pattern, the third shielding line 33 and the fourth shielding line 34 can shield the touch line 41 and the signal line 201 located in the second non-display area AB2, thereby reducing the mutual interference between the touch line 41 and the signal line 201 located in the second non-display area AB2.
[0122] Preferably, the orthographic projection of the touch line 41 located in the second non-display area AB2 on the substrate 1 is located within the second pattern. In this way, the third shielding line 33 and the fourth shielding line 34 can provide a better shielding effect between the touch line 41 and the signal line 201 .
[0123] For some possible implementations, see Figure 6 The display panel also includes a first conductive layer 16, a second conductive layer 17, a third conductive layer 18 and a fourth conductive layer 19 which are stacked in sequence in a direction away from the substrate 1, the third shielding trace 33 is located in the third conductive layer 18, and the fourth shielding trace 34 is located in the fourth conductive layer 19.
[0124] The display panel further includes a buffer layer and a semiconductor layer stacked in sequence between the substrate 1 and the first conductive layer 16, wherein the semiconductor layer includes a source region, a drain region and a channel region, the first conductive layer 16 includes a gate and a first capacitor plate, the second conductive layer 17 includes a second capacitor plate, the first capacitor plate and the second capacitor plate form a capacitor, the third conductive layer 18 includes a drain and a source, the drain is electrically connected to the drain region, the source is electrically connected to the source region, the gate, the source and the drain form a driving transistor, and the driving transistor is electrically connected to the first electrode 9. In this way, the signal of the driving transistor can be transmitted to the first electrode 9.
[0125] The signal line 201 can be located in the first conductive layer 16 and / or the second conductive layer 17. When the first conductive layer 16 located in the display area AA is formed, the third shielding line 33 located in the non-display area AB can be formed. When the fourth conductive layer 19 located in the display area AA is formed, the fourth shielding line 34 located in the non-display area AB can be formed. Therefore, there is no need to set up a special process for forming the third shielding line 33 and the fourth shielding line 34, thereby reducing the cost of forming the third shielding line 33 and the fourth shielding line 34.
[0126] Preferably, see Figure 7 The display panel further includes a first insulating layer 11 located on a side of the fourth shielding layer away from the substrate 1 , and a fourth exhaust hole 112 is provided on the first insulating layer 11 along a thickness direction of the substrate 1 .
[0127] Optionally, along the thickness direction of the substrate 1 , a fifth exhaust hole 341 is provided on the fourth shielding trace 34 , and an orthographic projection of the fifth exhaust hole 341 on the substrate 1 at least partially overlaps with an orthographic projection of the fourth exhaust hole 112 on the substrate 1 .
[0128] There is a certain amount of water vapor in the film layer between the third shielding layer and the fourth shielding wiring 34. In this embodiment, by setting the fifth exhaust hole 341 on the fourth shielding wiring 34 and setting the fourth exhaust hole 112 on the first insulating layer 11, the water vapor in the film layer between the third shielding layer and the fourth shielding wiring 34 can be discharged through the fifth exhaust hole 341 and the fourth exhaust hole 112 in sequence, so that the water vapor in the film layer between the third shielding layer and the fourth shielding wiring 34 can be discharged in time, thereby improving the quality of the display panel.
[0129] Preferably, the center of the orthographic projection of the fifth exhaust hole 341 on the substrate 1 coincides with the center of the orthographic projection of the fourth exhaust hole 112 on the substrate 1. In this way, the water vapor in the film layer between the third shielding layer and the fourth shielding trace 34 can be discharged more timely.
[0130] Preferably, the display panel also includes a first planarization layer 13 and a second planarization layer 15 which are stacked in sequence in a direction away from the substrate 1, the first planarization layer 13 extends from the display area AA to the non-display area AB, the first planarization layer 13 is located between the third shielding layer and the fourth shielding layer, and the second planarization layer 15 is located between the fourth shielding layer and the first insulating layer 11.
[0131] The material of the first insulating layer 11 includes an inorganic material, and the materials of the first planarization layer 13 and the second planarization layer 15 include an organic material. Water vapor is easily transferred in a film layer including an organic material, but not easily transferred in a film layer including an inorganic material. Therefore, the water vapor in the first planarization layer 13 and the second planarization layer 15 can be discharged through the fifth exhaust hole 341 and the fourth exhaust hole 112.
[0132] Optionally, the orthographic projections of the first exhaust hole 311 , the second exhaust hole 321 , the third exhaust hole 111 , the fourth exhaust hole 112 , and the fifth exhaust hole 341 on the substrate 1 may all be rectangular, circular, or irregular in shape.
[0133] Optionally, the side lengths of the orthographic projections of the first exhaust hole 311, the second exhaust hole 321, the third exhaust hole 111, the fourth exhaust hole 112 and the fifth exhaust hole 341 on the substrate 1 are all greater than or equal to 5 μm and less than or equal to 30 μm, for example, they can be 5 μm, 10 μm, 15 μm, 20 μm, 25 μm or 30 μm, etc.
[0134] For some possible implementations, see Figure 8The display panel also includes a packaging unit 20 located on the side of the light-emitting unit 10 away from the substrate 1, at least part of the packaging unit 20 extends from the side of the isolation structure 5 toward the isolation opening 6 to the side of the isolation structure 5 away from the substrate 1, and the packaging units 20 are arranged at intervals on the side of the isolation structure 5 away from the substrate 1, and there is a gap between the packaging unit 20 located on the side of the isolation structure 5 away from the substrate 1 and the side of the isolation structure 5 away from the substrate 1.
[0135] During the patterning process of the light-emitting unit 10 , the first encapsulation layer is disconnected at the isolation structure 5 to form the encapsulation unit 20 . The encapsulation unit 20 can completely and independently encapsulate the corresponding light-emitting unit 10 , thereby improving the display characteristics of the display panel.
[0136] For some possible implementations, see Fig. 9 The display panel further includes a second encapsulation layer 21 located on a side of the encapsulation unit 20 away from the substrate 1 and a third encapsulation layer 22 located on a side of the second encapsulation layer 21 away from the substrate 1 . The touch layer 4 is located on a side of the third encapsulation layer 22 away from the substrate 1 .
[0137] Optionally, the materials of the encapsulation unit 20 and the third encapsulation layer 22 both include inorganic materials, and the material of the second encapsulation layer 21 includes organic materials.
[0138] For example, the encapsulation unit 20 and the third encapsulation layer 22 can be formed by chemical vapor deposition (CVD), and the second encapsulation layer 21 can be formed by inkjet printing (IJP). The second encapsulation layer 21 and the third encapsulation layer 22 can provide a better encapsulation effect on the light-emitting unit 10, thereby further improving the encapsulation quality of the display panel.
[0139] For some possible implementations, see again Figure 8 The isolation structure 5 includes a first isolation portion 51 and a second isolation portion 52 which are stacked in sequence in a direction away from the substrate 1 , and the orthographic projection of the side of the first isolation portion 51 away from the substrate 1 on the substrate 1 is located within the orthographic projection of the second isolation portion 52 on the substrate 1 .
[0140] Since the second isolation portion 52 is located on the side of the first isolation portion 51 away from the substrate, and the lateral width of the second isolation portion 52 is greater than the lateral width of the first isolation portion 51, the second isolation portion 52 disconnects the light-emitting functional layer and the second electrode 7 layer at the isolation structure 5. In this way, the isolation structure 5 formed by the first isolation portion 51 and the second isolation portion 52 can make it easier to package each light-emitting unit 10 independently.
[0141] Preferably, see again Figure 8The second electrode 7 of the light-emitting unit 10 is electrically connected to the first isolation portion 51; the first isolation portion 51 includes a conductive material, and the second electrode 7 corresponding to the light-emitting unit 10 extends to contact the side wall of the first isolation portion 51 to achieve electrical connection between the second electrode 7 corresponding to the light-emitting unit 10 and the first isolation portion 51.
[0142] Please see again Fig. 9 The isolation structure 5 further includes a third isolation portion 53 located on a side of the first isolation portion 51 facing the substrate 1 , and the second electrode 7 of the light emitting unit 10 is electrically connected to the third isolation portion 53 .
[0143] The third isolation portion 53 includes a conductive material, and the second electrode 7 corresponding to the light emitting unit 10 extends to contact the side wall of the third isolation portion 53 to achieve electrical connection between the second electrode 7 corresponding to the light emitting unit 10 and the third isolation portion 53 .
[0144] Specifically, the material of the third isolation portion 53 includes molybdenum; and / or the material of the first isolation portion 51 includes aluminum; and / or the material of the second isolation portion 52 includes titanium. In this way, when the isolation structure 5 separates the second electrode 7 layer into the second electrode 7, the second electrode 7 is more easily electrically connected to the first isolation portion 51 and / or the third isolation portion 53.
[0145] For some possible implementations, see Fig.10 The present application also provides a method for preparing a display panel, the display panel comprising a display area AA and a non-display area AB at least partially surrounding the display area AA, the method comprising:
[0146] S10: providing a substrate 1.
[0147] S11: forming an array signal layer 2 on one side of the substrate 1, wherein the array signal layer 2 comprises a plurality of signal wirings 201, and at least one signal wiring 201 is located in the non-display area AB.
[0148] S12: forming an isolation structure 5 and a shielding layer 3 on a side of the array signal layer 2 away from the substrate 1, wherein the isolation structure 5 encloses an isolation opening 6, and the shielding layer 3 includes a shielding trace, and the shielding trace is located in the non-display area AB.
[0149] S13 : forming at least a portion of the light emitting unit 10 in the isolation opening 6 .
[0150] S14: forming a touch layer 4 on a side of the light-emitting unit 10 away from the substrate 1, wherein the touch layer 4 includes touch traces 41, at least one touch trace 41 is located in the non-display area AB, and an orthographic projection of the touch trace 41 on the substrate 1 at least partially overlaps with an orthographic projection of the shielding trace on the substrate 1.
[0151] The shielding line has the function of shielding signals. Specifically, the shielding line is arranged between the touch line 41 and the signal line 201 in the non-display area AB of the display panel by the above method, and the orthographic projection of the touch line 41 on the substrate 1 at least partially overlaps with the orthographic projection of the shielding line on the substrate 1. The signal affected by the signal line 201 on the touch line 41 can be shielded, and the signal affected by the touch line 41 on the signal line 201 can also be shielded. That is, the mutual influence between the touch line 41 and the signal line 201 can be reduced, and the crosstalk problem between the touch line 41 and the signal line 201 can be improved.
[0152] In some possible implementations, the step of forming the isolation structure 5 and the shielding layer 3 on a side of the array signal layer 2 away from the substrate 1 includes:
[0153] See also Fig.11 A third conductive layer 18, a first planarization layer 13, a fourth conductive layer 19 and a second planarization layer 15 are sequentially formed on the side of the array signal layer 2 away from the substrate 1. The third conductive layer 18 includes a third shielding layer, and the fourth conductive layer 19 includes a fourth shielding layer.
[0154] The array signal layer 2 includes a first conductive layer 16 and a second conductive layer 17. When the third conductive layer 18 located in the display area AA is formed, the third shielding wiring 33 located in the non-display area AB can be formed. When the fourth conductive layer 19 located in the display area AA is formed, the fourth shielding wiring 34 located in the non-display area AB can be formed. Therefore, there is no need to set up a special process for forming the third shielding wiring 33 and the fourth shielding wiring 34, thereby reducing the cost of forming the third shielding wiring 33 and the fourth shielding wiring 34.
[0155] See also Fig.12 A first electrode material layer is formed on a side of the second planarization layer 15 away from the substrate 1, and the first electrode material layer is patterned to form a plurality of first electrodes 9 located in the display area AA and a first shielding layer including a plurality of first shielding traces 31 located in the non-display area AB.
[0156] The first shielding wiring 31 in the first non-display area AB1 can be formed while the first electrode 9 in the display area AA is formed, so there is no need to set up a special process for forming the first shielding wiring 31, thereby reducing the cost of forming the first shielding wiring 31.
[0157] See also Fig.13 A pixel defining material layer 23 and an isolation material layer 24 are sequentially formed on a side of the first electrode 9 away from the substrate 1 .
[0158] See also Fig.14, the isolation material layer 24 is patterned to form an isolation structure 5 located in the display area AA and a second shielding layer including a plurality of second shielding traces 32 located in the non-display area AB.
[0159] The second shielding wiring 32 in the first non-display area AB1 can be formed while the isolation structure 5 in the display area AA is formed, so there is no need to set up a special process for forming the second shielding wiring 32, thereby reducing the cost of forming the second shielding wiring 32.
[0160] See also Fig.15 , the pixel defining material layer 23 is patterned to form a pixel defining layer 12 located in the display area AA and a first insulating layer 11 located in the non-display area AB.
[0161] The first insulating layer 11 in the non-display area AB can be formed while the pixel defining layer 12 in the display area AA is formed, so there is no need to set up a special process for forming the first insulating layer 11, thereby reducing the cost of forming the first insulating layer 11.
[0162] In summary, the display panel formed by the above method can form the first shielding layer and the second shielding layer in the first non-display area AB1 at a lower cost, and form the third shielding layer and the fourth shielding layer in the second non-display area AB2 at a lower cost, and can more effectively shield the mutual crosstalk of signals between the touch line 41 and the signal line 201 in the non-display area AB, thereby improving the touch performance and display performance of the display panel.
[0163] In some possible implementations, the present application further provides an electronic device, the electronic device comprising the display panel of the present application, or comprising a display panel prepared by the method for preparing a display panel of the present application. The electronic device may include a device with image processing capabilities, such as a server, a personal computer, a laptop computer, etc. Since the electronic device comprises the display panel of the present application, the display quality of the electronic device is better.
[0164] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0165] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, and these belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims.
Claims
1. A display panel, characterized in that: The display panel includes a display area and a non-display area at least partially surrounding the display area, and the display panel includes: substrate; An array signal layer, located on one side of the substrate, the array signal layer comprising a plurality of signal traces, at least one of the signal traces being located in the non-display area; An isolation structure, located at a side of the array signal layer away from the substrate, the isolation structure encloses to form an isolation opening; a light emitting unit, at least partly located in the isolation opening; A touch layer is located on a side of the light emitting unit away from the substrate, the touch layer includes touch wiring, at least one of the touch wiring is located in the non-display area A shielding layer is located between the touch layer and the array signal layer, the shielding layer includes a shielding line, the shielding line is located in the non-display area, and the orthographic projection of the touch line on the substrate at least partially overlaps with the orthographic projection of the shielding line on the substrate.
2. The display panel according to claim 1, characterized in that: The non-display area includes a first non-display area and a second non-display area located on a side of the first non-display area away from the display area, the first non-display area is provided with a first shielding structure, and the second non-display area is provided with a second shielding structure; Preferably, the display panel includes a frame area, the non-display area includes the frame area, and the shielding wiring is located in the frame area; Preferably, an orthographic projection of the first shielding structure on the substrate overlaps with an orthographic projection of the second shielding structure on the substrate.
3. The display panel according to claim 2, characterized in that: Along a direction away from the substrate, the first shielding structure includes a first shielding layer and a second shielding layer stacked in sequence, the first shielding layer includes a first shielding trace, the second shielding layer includes a second shielding trace, the orthographic projections of the first shielding trace and the second shielding trace on the substrate form a first pattern, and the orthographic projection of the touch trace located in the first non-display area on the substrate at least partially overlaps with the first pattern; Preferably, the orthographic projection of the touch control trace located in the first non-display area on the substrate is located within the first pattern; Preferably, the material of the second shielding trace is the same as that of the isolation structure; Preferably, the second shielding trace is arranged on the same layer as the isolation structure.
4. The display panel according to claim 3, characterized in that: The light-emitting unit comprises a first electrode, a light-emitting portion, and a second electrode which are sequentially stacked in a direction away from the substrate; Preferably, the material of the first shielding wire is the same as that of the first electrode; Preferably, the first shielding wire is arranged in the same layer as the first electrode.
5. The display panel according to claim 4, characterized in that: Along the thickness direction of the substrate, a first exhaust hole is provided on the first shielding trace, a second exhaust hole is provided on the second shielding trace, and an orthographic projection of the first exhaust hole on the substrate is outside an orthographic projection of the second exhaust hole on the substrate; Preferably, the display panel further comprises a first insulating layer located between the first electrode and the isolation structure, and a third exhaust hole is provided on the first insulating layer along the thickness direction of the substrate; Preferably, the third exhaust hole is communicated with the second exhaust hole; Preferably, the center of the orthographic projection of the third exhaust hole on the substrate coincides with the center of the orthographic projection of the second exhaust hole on the substrate.
6. The display panel according to claim 5, characterized in that: The display panel further comprises a pixel defining layer located between the first electrode and the isolation structure, the isolation structure being located on a side of the pixel defining layer away from the substrate, the pixel defining layer comprising a pixel opening exposing at least a portion of the first electrode, the pixel opening being connected to the isolation opening; Preferably, the pixel defining layer extends from the display area to the non-display area, and the pixel defining layer is reused as the first insulating layer.
7. The display panel according to claim 2, characterized in that: Along a direction away from the substrate, the second shielding structure includes a third shielding layer and a fourth shielding layer stacked in sequence, the third shielding layer includes a third shielding trace, the fourth shielding layer includes a fourth shielding trace, the orthographic projections of the third shielding trace and the fourth shielding trace on the substrate form a second pattern, and the orthographic projection of the touch trace located in the second non-display area on the substrate at least partially overlaps with the second pattern; Preferably, the orthographic projection of the touch control trace located in the second non-display area on the substrate is located within the second pattern.
8. The display panel according to claim 7, characterized in that: The display panel further comprises a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer which are sequentially stacked in a direction away from the substrate, the third shielding trace is located in the third conductive layer, and the fourth shielding trace is located in the fourth conductive layer; Preferably, the display panel further comprises a first insulating layer located on a side of the fourth shielding layer away from the substrate, and a fourth exhaust hole is provided on the first insulating layer along a thickness direction of the substrate; Preferably, along the thickness direction of the substrate, a fifth exhaust hole is provided on the fourth shielding trace, and the orthographic projection of the fifth exhaust hole on the substrate at least partially overlaps with the orthographic projection of the fourth exhaust hole on the substrate; Preferably, the center of the orthographic projection of the fifth exhaust hole on the substrate coincides with the center of the orthographic projection of the fourth exhaust hole on the substrate; Preferably, the signal wiring is located in the first conductive layer and / or the second conductive layer.
9. The display panel according to claim 8, characterized in that: The display panel further comprises a pixel defining layer located between the substrate and the isolation structure, the pixel defining layer comprising a pixel opening exposing at least a portion of the first electrode of the light emitting unit; Preferably, the pixel defining layer extends from the display area to the non-display area, and the pixel defining layer is reused as the first insulating layer; Preferably, the display panel also includes a first planarization layer and a second planarization layer stacked in sequence in a direction away from the substrate, the first planarization layer extends from the display area to the non-display area, the first planarization layer is located between the third shielding layer and the fourth shielding layer, and the second planarization layer is located between the fourth shielding layer and the first insulating layer.
10. The display panel according to any one of claims 1 to 9, characterized in that: The display panel further comprises an encapsulation unit located at a side of the light emitting unit away from the substrate, and at least a portion of the encapsulation unit extends from a side of the isolation structure toward the isolation opening to a side of the isolation structure away from the substrate; Preferably, the encapsulation unit is arranged at intervals on a side of the isolation structure away from the substrate; Preferably, a gap exists between the packaging unit located at a side of the isolation structure away from the substrate and a side of the isolation structure away from the substrate.
11. The display panel according to claim 10, characterized in that: The display panel further comprises a second encapsulation layer located on a side of the encapsulation unit away from the substrate; Preferably, the display panel further comprises a third encapsulation layer located on a side of the second encapsulation layer away from the substrate, and the touch layer is located on a side of the third encapsulation layer away from the substrate; Preferably, the materials of the encapsulation unit and the third encapsulation layer both include inorganic materials; Preferably, the material of the second encapsulation layer includes organic material.
12. The display panel according to any one of claims 1 to 9, characterized in that: The isolation structure comprises a first isolation portion and a second isolation portion which are sequentially stacked in a direction away from the substrate, wherein an orthographic projection of a side of the first isolation portion away from the substrate on the substrate is located within an orthographic projection of the second isolation portion on the substrate; Preferably, the second electrode of the light-emitting unit is electrically connected to the first isolation portion; and / or the isolation structure further comprises a third isolation portion located on a side of the first isolation portion facing the substrate, and the second electrode of the light-emitting unit is electrically connected to the third isolation portion; Preferably, the material of the third isolation portion includes molybdenum; and / or the material of the first isolation portion includes aluminum; and / or the material of the second isolation portion includes titanium.
13. A method for preparing a display panel, characterized in that: The display panel includes a display area and a non-display area at least partially surrounding the display area, and the method includes: providing a substrate; forming an array signal layer on one side of the substrate, the array signal layer comprising a plurality of signal traces, at least one of the signal traces being located in the non-display area; An isolation structure and a shielding layer are formed on a side of the array signal layer away from the substrate, wherein the isolation structure encloses an isolation opening, and the shielding layer includes a shielding wire, and the shielding wire is located in the non-display area; forming at least a portion of a light emitting unit in the isolation opening; A touch layer is formed on a side of the light-emitting unit away from the substrate, the touch layer includes touch traces, at least one of the touch traces is located in the non-display area, and the orthographic projection of the touch trace on the substrate at least partially overlaps with the orthographic projection of the shielding trace on the substrate.
14. The method for preparing a display panel according to claim 13, characterized in that: The step of forming an isolation structure and a shielding layer on a side of the array signal layer away from the substrate comprises: A third conductive layer, a first planarization layer, a fourth conductive layer and a second planarization layer are sequentially formed on a side of the array signal layer away from the substrate, wherein the third conductive layer includes a third shielding layer, and the fourth conductive layer includes a fourth shielding layer; Forming a first electrode material layer on a side of the second planarization layer away from the substrate, and patterning the first electrode material layer to form a plurality of first electrodes located in the display area and a first shielding layer including a plurality of first shielding traces located in the non-display area; forming a pixel defining material layer and an isolation material layer in sequence on a side of the first electrode away from the substrate; Performing patterning on the isolation material layer to respectively form an isolation structure located in the display area and a second shielding layer located in the non-display area and including a plurality of second shielding traces; The pixel defining material layer is patterned to form a pixel defining layer located in the display area and a first insulating layer located in the non-display area.
15. An electronic device, characterized in that: The electronic device comprises the display panel according to any one of claims 1 to 12, or comprises a display panel prepared by the method for preparing a display panel according to claim 13 or 14.
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