Display panel, manufacturing method thereof, mother board and display device

Abstract

This application provides a display panel, its manufacturing method, a motherboard, and a display device, relating to the field of display technology. The display panel provided by this application includes a substrate, a first trace, and a packaging structure. At least a portion of the substrate's border area surrounds a display area, including a main frame area and a first cutting area. At least a portion of the array traces on the substrate are located in the display area. The first trace is disposed on the substrate and connected to the array traces, with at least a portion of the first trace located in the main frame area. The packaging structure is located on the side of the first trace away from the substrate, and the orthographic projection of the packaging structure onto the substrate covers the orthographic projection of the first trace onto the substrate. The orthographic projection of the packaging structure located in the first cutting area onto the substrate has a first boundary away from the display area, and the orthographic projection of the first trace onto the substrate has a second boundary away from the display area. The first boundary is located on the side of the second boundary away from the display area. Therefore, the display panel provided by this application is beneficial for improving the performance of the display device.

Description

Technical Field

[0001] This application belongs to the field of display technology, and more specifically, relates to a display panel, a method for manufacturing the same, a motherboard, and a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) are organic thin-film electroluminescent devices. Due to their advantages such as good display effect, good heat dissipation, low cost, and small thickness, they are widely used in electronic products such as mobile phones, televisions, tablets, laptops, desktop computers, automotive display terminals, wearable devices, and human-computer interaction terminals.

[0003] However, the performance and manufacturing process of the display device need further improvement. Summary of the Invention

[0004] The purpose of this application is to provide a display panel and its manufacturing method, motherboard and display device, so as to improve the performance / process performance of the display device.

[0005] To achieve the above objectives, the technical solution adopted in this application is as follows:

[0006] In a first aspect, a display panel is provided, comprising a substrate, a first trace, and a packaging structure. The substrate includes a display area and a bezel area, the bezel area at least partially surrounding the display area, the bezel area including a main frame area near the display area and a first dicing area away from the display area, the substrate including an array trace, at least a portion of the array trace being located in the display area; a first trace being disposed on the substrate and connected to the array trace, at least a portion of the first trace being located in the main frame area; a packaging structure being located on the side of the first trace away from the substrate, and the orthographic projection of the packaging structure onto the substrate covering the orthographic projection of the first trace onto the substrate. Wherein, at least a portion of the packaging structure is located in the first dicing area, the orthographic projection of the packaging structure located in the first dicing area onto the substrate has a first boundary away from the display area, and the orthographic projection of the first trace onto the substrate has a second boundary away from the display area, the first boundary being located on the side of the second boundary away from the display area.

[0007] With the above technical solution, at least a portion of the first trace is located in the main frame area, and the encapsulation structure can cover the first trace, avoiding exposed traces. In this way, the display panel provided by this application can avoid exposed first traces, which is beneficial to improving reliability and thus improving performance.

[0008] Therefore, the display panel provided in this application helps to improve the performance of the display device.

[0009] In some embodiments, the packaging structure includes a first packaging structure and a second packaging structure, which are connected together.

[0010] Optionally, the first package structure covers the surface of the first trace away from the substrate and two first sides disposed opposite each other along the extension direction perpendicular to the first trace.

[0011] Optionally, the second packaging structure covers the second side of the first trace away from the display area.

[0012] Optionally, the second packaging structure covers the first cut area.

[0013] Optionally, the array trace includes multiple layered sub-traces, with the first trace being layered with one of the sub-traces.

[0014] Optionally, the angle between the second side of the array trace away from the display area and the substrate is less than 90 degrees.

[0015] Optionally, along the thickness direction of the substrate, the surface of the first packaging structure facing away from the substrate is higher than the surface of the second packaging structure facing away from the substrate.

[0016] In this way, the first and second packaging structures together cover the first trace, which can prevent the first trace from being exposed.

[0017] Optionally, the display panel provided in this application further includes an isolation structure and a light-emitting unit. The isolation structure is located on the side of the array trace away from the substrate, and the isolation structure is located on the side of the second packaging structure facing the substrate. The isolation structure is located in the display area and defines an isolation opening. The light-emitting unit is disposed in the isolation opening. The second packaging structure is located on the side of the light-emitting unit away from the substrate and covers the light-emitting unit.

[0018] In this way, the display panel provided in this application can use the second packaging structure to cover the light-emitting unit and the isolation structure, and at the same time, it can use the second packaging structure to cover the hollow area, which helps to save process steps and thus improve the process performance of the display device.

[0019] Secondly, this application provides a display panel, including a substrate, array traces, traces, and a packaging structure. The substrate includes a display area and a bezel area, the bezel area at least partially surrounding the display area, the bezel area including a main frame area close to the display area and a first cut area away from the display area, the substrate including array traces, at least a portion of the array traces being located in the display area; a first trace being disposed on the substrate; a first packaging structure being located on the side of the first trace away from the substrate and covering at least a portion of the first trace; a second packaging structure being connected to the first packaging structure and covering the first cut area. One end of the first trace is connected to the array traces, and the other end of the first trace is spaced apart from a first edge of the first cut area away from the display area, and the other end of the first trace is located on the side of the first edge close to the display area.

[0020] Through the above technical solution, one end of the first trace is connected to the array trace, and the other end of the first trace is spaced apart from the first edge of the cutting area away from the display area. The other end of the first trace is located on the side of the first edge closer to the display area. The first and second encapsulation structures can cover the trace, preventing it from being exposed at the first edge of the cutting area away from the display area. In this way, the display panel provided by this application avoids exposing the first trace, which is beneficial for improving reliability and thus improving performance.

[0021] Therefore, the display panel provided in this application helps to improve the performance of the display device.

[0022] In some implementations, the other end of the first trace is located in the first cutting area. The second packaging structure covers both the first cutting area and the other end of the first trace, preventing the first trace from being exposed in the first cutting area. This allows for the first trace to remain within the first cutting area, reducing processing difficulty.

[0023] Thirdly, this application provides a method for manufacturing a display panel, the method comprising:

[0024] A substrate is provided, the substrate including a dicing region and a detection trace located at least in the dicing region, the substrate also including a first encapsulation material layer, the first encapsulation material layer being at least partially located in the dicing region, and the orthographic projection of the first encapsulation material layer on the substrate covering the orthographic projection of the detection trace on the substrate.

[0025] Remove a portion of the first encapsulation material layer in the cutting area to form a cutout area, so that at least a portion of the detection traces are exposed in the cutout area;

[0026] Remove the exposed portion of the detection traces in the cutout area;

[0027] A second encapsulation structure is formed on the substrate, such that the second encapsulation structure covers the cut-out area.

[0028] The above technical solution allows for the removal of at least a portion of the detection traces in the cutting area, followed by the use of a second encapsulation structure to cover the hollowed-out area. This prevents the detection traces from being exposed during subsequent cutting of the area, improving reliability and ultimately enhancing performance.

[0029] In some embodiments, the substrate includes:

[0030] Form an array of traces on the substrate;

[0031] A detection circuit and a detection trace are formed on the substrate. The detection circuit and the array trace are located on different sides of the cut area. The detection trace passes through the cut area and connects the detection circuit and the array trace.

[0032] A first encapsulation material layer is formed on the side of the array traces and detection traces that are away from the substrate.

[0033] In this way, the detection traces can be detected by the detection circuit array. When the detection circuit is removed from the cutting area in the subsequent process, the detection traces can be kept out of the open, which helps to improve reliability and thus improve performance.

[0034] Optionally, the substrate includes a screen area and an off-screen area, the cutting area includes a portion located in the screen area and a portion located in the off-screen area, the array traces are located in the screen area, and the detection circuit is located in the off-screen area.

[0035] In this way, the substrate can be cut in the cutting area to remove the area outside the screen and the detection circuit located in the area outside the screen.

[0036] In some embodiments, the substrate further includes a pixel definition layer covering the array traces; removing a portion of the first encapsulation material layer in the cut area to form a cutout region includes:

[0037] An isolation structure is formed on the pixel definition layer;

[0038] A first isolation opening is formed on the isolation structure, exposing the portion of the pixel definition layer located in the first isolation opening;

[0039] A first pixel opening is formed on the portion of the pixel definition layer located at the first isolation opening, while a cutout area is formed by removing the portion of the first encapsulation material layer in the cutting area.

[0040] In this way, the manufacturing method provided in this application can simultaneously remove part of the first encapsulation material layer in the cutting area to form a hollow area while processing the first pixel opening on the pixel definition layer, thereby forming the first encapsulation structure. This is beneficial to saving process steps and thus improving the process performance of the display device.

[0041] In some embodiments, after removing the portion of the first encapsulation material layer in the cutting area to form a cutout area, and before removing the exposed portion of the detection trace in the cutout area, the fabrication method further includes:

[0042] A first light-emitting unit is formed within the first isolation opening;

[0043] The first light-emitting unit is encapsulated using the first encapsulation part of the first encapsulation layer.

[0044] In this way, the manufacturing method provided in this application can form the first light-emitting unit according to the normal process flow, and removing the portion of the first encapsulation material layer in the cutting area to form a hollow area does not affect the normal process flow.

[0045] In some implementations, removing the exposed portion of the detection trace in the cutout area includes:

[0046] A second isolation opening is formed on the isolation structure to expose the portion of the pixel definition layer located in the second isolation opening, while removing the exposed portion of the detection trace in the cutout area.

[0047] In this way, the manufacturing method provided in this application can remove the exposed part of the detection trace in the hollow area while forming the second isolation opening on the isolation structure, which helps to save process flow and thus improve the process performance of the display device.

[0048] In some embodiments, before forming the second package structure on the substrate after removing the exposed portion of the detection trace in the cutout area, the fabrication method provided in this application further includes:

[0049] A second pixel opening is formed on the portion of the pixel definition layer located at the second isolation opening;

[0050] A second light-emitting unit is formed within the second isolation opening;

[0051] The second light-emitting unit is encapsulated using the second encapsulation part of the first encapsulation layer.

[0052] In this way, the manufacturing method provided in this application can form the second light-emitting unit according to the normal process flow, and removing the exposed part of the detection wiring in the hollow area does not affect the normal process flow.

[0053] In some embodiments, the fabrication method further includes, after removing at least a portion of the first encapsulation material layer in the cut area and before removing the exposed portion of the detection trace in the cutout area:

[0054] A second isolation opening is formed on the isolation structure, exposing the portion of the pixel definition layer located in the second isolation opening;

[0055] A second pixel opening is formed on the portion of the pixel definition layer located at the second isolation opening;

[0056] A second light-emitting unit is formed within the second isolation opening;

[0057] The second light-emitting unit is encapsulated using the second encapsulation part of the first encapsulation layer.

[0058] In this way, the manufacturing method provided in this application can form the second light-emitting unit according to the normal process flow, and removing the part of the first encapsulation material layer in the cutting area to form a hollow area does not affect the normal process flow.

[0059] In some implementations, removing the exposed portion of the detection trace in the cutout area includes:

[0060] A third isolation opening is formed on the isolation structure to expose the portion of the pixel definition layer located in the third isolation opening, while removing the exposed portion of the detection trace in the cutout area.

[0061] In this way, the manufacturing method provided in this application can remove the exposed part of the detection trace in the hollow area while forming the third isolation opening on the isolation structure, which helps to save process flow and thus improve the process performance of the display device.

[0062] Optionally, after detecting the exposed portion of the trace in the cutout area and before forming the second package structure on the substrate, the fabrication method further includes:

[0063] A third pixel opening is formed on the portion of the pixel definition layer located at the third isolation opening;

[0064] A third light-emitting unit is formed within the third isolation opening;

[0065] The third light-emitting unit is encapsulated using the third encapsulation part of the first encapsulation layer.

[0066] In this way, the manufacturing method provided in this application can form the third light-emitting unit according to the normal process flow, and removing the part of the wiring in the cutting area does not affect the normal process flow.

[0067] In some embodiments, the substrate further includes a pixel definition layer covering the array traces; removing a portion of the first encapsulation material layer in the cut area to form a cutout region includes:

[0068] An isolation structure is formed on the pixel definition layer;

[0069] A second isolation opening is formed on the isolation structure, exposing the portion of the pixel definition layer located in the second isolation opening;

[0070] A second pixel opening is formed on the portion of the pixel definition layer located at the second isolation opening, while a cutout area is formed by removing the portion of the first encapsulation material layer in the cutting area.

[0071] In this way, the manufacturing method provided in this application can simultaneously remove the portion of the first encapsulation material layer in the cutting area to form a hollow area while processing the second pixel opening on the pixel definition layer. This helps to save process steps and thus improve the process performance of the display device.

[0072] In some embodiments, after removing the portion of the first encapsulation material layer in the cutting area to form a cutout area, and before removing the exposed portion of the detection trace in the cutout area, the fabrication method further includes:

[0073] A second light-emitting unit is formed within the second isolation opening;

[0074] The second light-emitting unit is encapsulated using the second encapsulation part of the first encapsulation layer.

[0075] In this way, the manufacturing method provided in this application can form the second light-emitting unit according to the normal process flow, and removing at least a portion of the first encapsulation material layer in the cutting area does not affect the normal process flow.

[0076] In some implementations, removing the exposed portion of the detection trace in the cutout area includes:

[0077] A third isolation opening is formed on the isolation structure, while the exposed part of the detection trace in the hollow area is removed.

[0078] In this way, the manufacturing method provided in this application can remove the exposed part of the detection trace in the hollow area while forming the third isolation opening on the isolation structure, which helps to save process flow and thus improve the process performance of the display device.

[0079] Optionally, after removing the exposed portion of the detection traces in the cutout area and before forming the second package structure on the substrate, the fabrication method further includes:

[0080] A third pixel opening is formed on the portion of the pixel definition layer located at the third isolation opening;

[0081] A third light-emitting unit is formed within the third isolation opening;

[0082] The third light-emitting unit is encapsulated using the third encapsulation part of the first encapsulation layer.

[0083] In this way, the manufacturing method provided in this application can form the third light-emitting unit according to the normal process flow, and removing the exposed part of the detection wiring in the hollow area does not affect the normal process flow.

[0084] In some embodiments, after forming the isolation structure on the pixel definition layer and before forming the second isolation opening on the isolation structure, removing a portion of the first encapsulation material layer in the cutting area to form the cut-out area further includes:

[0085] A first isolation opening is formed on the isolation structure, exposing the portion of the pixel definition layer located in the first isolation opening;

[0086] A first pixel opening is formed on the portion of the pixel definition layer located at the first isolation opening;

[0087] A first light-emitting unit is formed within the first isolation opening;

[0088] The first light-emitting unit is encapsulated using the first encapsulation part of the first encapsulation layer.

[0089] In this way, the manufacturing method provided in this application can form the first light-emitting unit according to the normal process flow, and can form the first light-emitting unit before removing at least a portion of the first encapsulation material layer in the cutting area and removing the exposed portion of the detection trace in the hollow area, without affecting the normal process flow.

[0090] In some embodiments, the manufacturing method provided in this application further includes:

[0091] The substrate is cut in the cutting area, with the cutting direction perpendicular to the length direction of the detection trace.

[0092] In this way, the display panel can be obtained by cutting the substrate in the cutting area, and the exposed traces in the cutting area can be avoided.

[0093] Fourthly, this application provides a display panel manufactured by the method of any of the above embodiments. The display panel provided by this application has the same or similar technical effects as the above manufacturing methods, which will not be repeated here.

[0094] Fifthly, this application provides a motherboard that includes the display panel described in the above embodiments. The motherboard provided in this application can be cut to produce the aforementioned display panel, and has the same or similar technical effects as the aforementioned display panel, which will not be elaborated further here.

[0095] Sixthly, this application provides a display device that includes the display panel described in the above embodiments. The display device provided in this application has the same or similar technical effects as the display panel described above, and will not be repeated here. Attached Figure Description

[0096] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0097] Figure 1 This is one of the structural schematic diagrams of the display panel provided in the embodiments of this application;

[0098] Figure 2 for Figure 1 One of the magnified views of a section at point A in the middle;

[0099] Figure 3 For along Figure 2 One of the cross-sectional structural diagrams of the middle BB line;

[0100] Figure 4 This is a second schematic diagram of the structure of the display panel provided in the embodiments of this application;

[0101] Figure 5 For along Figure 4 One of the cross-sectional structural diagrams of the CC line;

[0102] Figure 6 For along Figure 4 Sectional view of the CC line, part two;

[0103] Figure 7 This is the third schematic diagram of the structure of the display panel provided in the embodiments of this application;

[0104] Figure 8 One of the schematic flowcharts of the manufacturing method provided in the embodiments of this application;

[0105] Figure 9 For along Figure 2 Sectional view of the middle BB line, part two;

[0106] Figure 10 For along Figure 2 Sectional view of the middle BB line, Part 3;

[0107] Figure 11 For along Figure 2 Sectional view of the middle BB line, part four;

[0108] Figure 12 for Figure 1 Second magnified view of a portion of point A in the middle;

[0109] Figure 13 For along Figure 12 Cross-sectional view of the DD line;

[0110] Figure 14 A second schematic flowchart illustrating the manufacturing method provided in this application embodiment;

[0111] Figure 15 The third schematic flowchart of the manufacturing method provided in the embodiments of this application;

[0112] Figure 16 This is one of the structural schematic diagrams of the display panel provided in the embodiments of this application during the manufacturing process;

[0113] Figure 17 This is the second schematic diagram of the structure of the display panel provided in the embodiments of this application during the manufacturing process;

[0114] Figure 18 This is the third schematic diagram showing the structure of the display panel during the manufacturing process, as provided in the embodiments of this application.

[0115] Figure 19 Fourth schematic flowchart of the manufacturing method provided in the embodiments of this application;

[0116] Figure 20 Fourth schematic diagram of the structure of the display panel provided in the embodiments of this application during the manufacturing process;

[0117] Figure 21 Fifth schematic diagram of the structure of the display panel provided in the embodiments of this application during the manufacturing process;

[0118] Figure 22 This is the sixth schematic diagram illustrating the structure of the display panel during the manufacturing process, as provided in the embodiments of this application.

[0119] Figure 23 Fifth schematic flowchart of the manufacturing method provided in the embodiments of this application;

[0120] Figure 24 This is the seventh schematic diagram of the structure of the display panel provided in the embodiments of this application during the manufacturing process;

[0121] Figure 25 This is the eighth schematic diagram of the structure of the display panel provided in the embodiments of this application during the manufacturing process;

[0122] Figure 26 A schematic flowchart of the manufacturing method provided in the embodiments of this application is shown in Figure 6.

[0123] Figure 27 Seventh schematic flowchart of the manufacturing method provided in the embodiments of this application;

[0124] Figure 28 This is a schematic diagram of the structure of the motherboard provided in an embodiment of this application.

[0125] The following are the labeling elements in the figure:

[0126] 100 - Display panel; 110 - Screen area; 111 - Display area; 112 - Bezel area; 1121 - Main frame area; 120 - Outside screen area; 130 - Cut-out area; 131 - First cut-out area; 132 - Second cut-out area;

[0127] 10-Substrate; 20-Trace; 30-First package structure; 40-Second package structure; 50-Anode; 60-Pixel definition layer; 61-First pixel opening; 62-Second pixel opening; 63-Third pixel opening; 70-Isolation structure; 71-First isolation opening; 72-Second isolation opening; 73-Third isolation opening; 81-First light-emitting unit; 82-Second light-emitting unit; 83-Third light-emitting unit; 90-First package layer;

[0128] 1000 - Master plate; 1010 - Mask; 1011 - Mask boundary. Detailed Implementation

[0129] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0130] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0131] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0132] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0133] Organic light-emitting diodes (OLEDs) are organic thin-film electroluminescent devices. Due to their advantages such as good display effect, good heat dissipation, low cost, and small thickness, they are widely used in electronic products such as mobile phones, televisions, tablets, laptops, desktop computers, automotive display terminals, wearable devices, and human-computer interaction terminals.

[0134] However, the performance and manufacturing process of the display device need further improvement.

[0135] The isolation structure described below is recorded in patent documents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, PCT / CN2024 / 099072, CN117979755A, CN117998900A, CN117062489A, CN117580403A, CN116583155A, CN116669477A, ​​CN117396039A, CN116669480A, CN116600606A, and CN117500332A. Please refer to these documents.

[0136] Please refer to the following: Figure 1 , Figure 2 , Figure 3 and Figure 4 In some embodiments, this application provides a display panel 100, which includes a substrate, the substrate including a substrate 10 and an array of traces disposed on one side of the substrate 10 in the thickness direction.

[0137] It should be noted that after the array traces are formed on the substrate 10, it is usually necessary to use a detection circuit to detect the array traces.

[0138] For example, the substrate of the display panel 100 includes a substrate 10 and array traces. The substrate includes a screen area 110, an outer screen area 120 and a cutting area 130. The cutting area 130 includes a portion located in the screen area 110 (first cutting area 131) and a portion located in the outer screen area 120 (first cutting area 131). The array traces are located in the screen area 110 and the detection circuit is located in the outer screen area 120.

[0139] The substrate also includes a display area 111 and a border area 112. The border area 112 at least partially surrounds the display area 111. The border area 112 includes a main frame area 1121 close to the display area 111 and a first cut area 131 away from the display area 111. At least a portion of the array traces are located in the display area 111.

[0140] It is understandable that the screen area 110 includes the display area 111 and the border area 112.

[0141] The inventors discovered that it is usually necessary to use detection traces to connect the detection circuit and the array traces. However, after the detection is completed, the detection traces need to be cut in the cutting area 130 to remove the screen area 120 containing the detection circuit, and the detection traces are easily exposed.

[0142] Please refer to the following: Figure 4 and Figure 5 The display panel 100 provided in this application embodiment further includes a first trace 20 and a packaging structure. The first trace 20 is disposed on the substrate, and at least a portion of the first trace 20 is located in the main frame area 1121. The packaging structure is located on the side of the first trace 20 away from the substrate, and the orthographic projection of the packaging structure on the substrate covers the orthographic projection of the first trace 20 on the substrate.

[0143] It is understandable that the first trace 20 is the part left after the detection trace was cut.

[0144] In the display panel 100 provided in this embodiment, at least a portion of the first trace 20 is located in the main frame area 1121. The encapsulation structure can cover the first trace 20, thereby preventing the first trace 20 from being exposed. Furthermore, at least a portion of the encapsulation structure is located in the first cutting area 131. The encapsulation structure located in the first cutting area 131 has a first boundary away from the display area 111 in its orthogonal projection onto the substrate. The first trace 20 has a second boundary away from the display area 111 in its orthogonal projection onto the substrate. The first boundary is located on the side of the second boundary away from the display area 111. In this way, the encapsulation structure can completely cover the first trace 20 in the first cutting area 131, preventing the first trace 20 from being exposed in the first cutting area 131.

[0145] Therefore, the display panel 100 provided in this application can avoid exposing the first trace 20, which is beneficial to improving reliability and thus improving performance.

[0146] Therefore, the display panel 100 provided in this application helps to improve the performance of the display device.

[0147] Optionally, the packaging structure includes a first packaging structure 30 and a second packaging structure 40, which are connected together. The first packaging structure 30 is an inorganic layer formed after array wiring is fabricated on the substrate 10.

[0148] The first package structure 30 can cover the first trace 20, and the second package structure 40 can cover the first cutting area. The first package structure 30 and the second package structure 40 can jointly cover the first trace 20, thereby avoiding the first trace 20 from being exposed.

[0149] For example, the first package structure 30 covers the surface of the first trace 20 away from the substrate and two first sides disposed opposite each other along the extension direction perpendicular to the first trace 20.

[0150] For example, the second encapsulation structure 40 covers the second side of the first trace 20 away from the display area 111.

[0151] For example, the second packaging structure 40 covers the first cut area 131.

[0152] For example, the array trace includes multiple layered sub-traces, with the first trace 20 being layered with one of the sub-traces.

[0153] For example, the angle between the second side of the array trace away from the display area 111 and the substrate is less than 90 degrees.

[0154] For example, along the thickness direction of the substrate, the surface of the first packaging structure 30 facing away from the substrate is higher than the surface of the second packaging structure 40 facing away from the substrate.

[0155] In some embodiments, the display panel 100 provided in this application further includes an isolation structure 70 and a light-emitting unit. The isolation structure 70 is located on the side of the array traces away from the substrate, and the isolation structure 70 is located on the side of the second encapsulation structure 40 facing the substrate. The isolation structure 70 is located in the display area 111, and the isolation structure 70 defines an isolation opening, in which the light-emitting unit is disposed. The second encapsulation structure 40 is located on the side of the light-emitting unit away from the substrate and covers the light-emitting unit.

[0156] In this way, the display panel 100 provided in this application can use the second encapsulation structure 40 to cover the light-emitting unit and the isolation structure 70, and can also use the second encapsulation structure 40 to cover the hollow area, which helps to save process steps and thus improve the process performance of the display device.

[0157] It is understandable that the second encapsulation structure 40 is formed by vapor deposition of light-emitting units and inkjet printing (IJP) of the display panel 100, followed by chemical vapor deposition (CVD).

[0158] In other embodiments, please refer to [the relevant documentation]. Figure 4 , Figure 5 and Figure 6 This application provides a display panel 100. Similar to the previous embodiment, the display panel 100 of this application also includes a substrate and a first trace 20. The substrate includes a display area 111 and a border area 112. The border area 112 surrounds the display area 111 and includes a main frame area 1121 near the display area 111 and a first cut area 131 away from the display area 111. The array trace is disposed on one side of the substrate 10 in the thickness direction, and at least a portion of the array trace is located in the display area 111.

[0159] Unlike the previous embodiment, the display panel 100 further includes a first encapsulation structure 30 and a second encapsulation structure 40. A first trace 20 is disposed on the substrate. The first encapsulation structure 30 is located on the side of the first trace 20 facing away from the substrate and covers at least a portion of the first trace 20. The second encapsulation structure 40 is connected to the first encapsulation structure 30 and covers the first dicing area 131. One end of the first trace 20 is connected to the array trace, and the other end of the first trace 20 is spaced apart from the first edge of the first dicing area 131 away from the display area 111. The other end of the first trace 20 is located on the side of the first edge closer to the display area 111.

[0160] In the display panel 100 of this application embodiment, one end of the first trace 20 is connected to the array trace, and the other end of the first trace 20 is spaced apart from the first edge of the cutting area 130 away from the display area 111. The other end of the first trace 20 is located on the side of the first edge closer to the display area 111. The first encapsulation structure 30 and the second encapsulation structure 40 can cover the first trace 20, preventing it from being exposed at the first edge of the cutting area 131 away from the display area 111. In this way, the display panel 100 provided by this application can avoid exposing the first trace 20, which is beneficial for improving reliability and thus improving performance.

[0161] Therefore, the display panel 100 provided in this application helps to improve the performance of the display device.

[0162] Please refer to the following: Figure 4 and Figure 6 In some embodiments, the other end of the first trace 20 is located in the first cutting area 131. The second packaging structure 40 covers both the first cutting area 131 and the other end of the first trace 20, preventing the first trace 20 from being exposed in the first cutting area 131. This allows for the first trace 20 to remain in the first cutting area 131, reducing processing difficulty.

[0163] Please see Figure 5 In some other embodiments, the other end of the first trace 20 is located in the main frame area 1121, that is, the entire first trace 20 is located in the main frame area 1121. The display panel 100 of this embodiment is the same as the display panel 100 of the first embodiment.

[0164] Please see Figure 7 In some embodiments, the display panel provided in this application further includes a pixel definition layer 60, an isolation structure 70, a light-emitting unit, and a first encapsulation layer 90. The pixel definition layer 60 is disposed on one side of the substrate in the thickness direction, and the isolation structure 70 is disposed on the side of the pixel definition layer 60 away from the substrate, and the isolation structure 70 surrounds and forms a plurality of isolation openings.

[0165] The multiple isolation openings may include a first isolation opening 71, a second isolation opening 72, and a third isolation opening 73. The light-emitting units may include a first light-emitting unit 81, a second light-emitting unit 82, and a third light-emitting unit 83. The first light-emitting unit 81 is disposed in the first isolation opening 71, the second light-emitting unit 82 is disposed in the second isolation opening 72, and the third light-emitting unit 83 is disposed in the third isolation opening 73. The first encapsulation layer 90 includes a first encapsulation portion, a second encapsulation portion, and a third encapsulation portion. The first encapsulation portion covers the first light-emitting unit 81, the second encapsulation portion covers the second light-emitting unit 82, and the third encapsulation portion covers the third light-emitting unit 83.

[0166] Optionally, the display panel provided in this application embodiment further includes a second encapsulation layer (not shown in the figure) and a third encapsulation layer (not shown in the figure), wherein the second encapsulation layer is located on the side of the first encapsulation layer 90 away from the substrate, and the third encapsulation layer is located on the side of the second encapsulation layer away from the substrate.

[0167] Optionally, the first encapsulation layer 90 can be an inorganic layer formed by chemical vapor deposition (CVD).

[0168] Alternatively, the second encapsulation layer can be an organic layer formed after inkjet printing (IJP).

[0169] Optionally, the third encapsulation layer can be an inorganic layer formed by chemical vapor deposition (CVD). The second encapsulation structure 40 can be a part of the third encapsulation layer.

[0170] Please refer to the following: Figure 8 , Figure 9 , Figure 10 , Figure 11 , Figure 12 and Figure 13 The embodiments of this application also provide a method for manufacturing a display panel 100, the method comprising the following steps:

[0171] S1, a substrate is provided, wherein the substrate includes a dicing region 130 and a detection trace located at least in the dicing region 130, and the substrate also includes a first encapsulation material layer, the first encapsulation material layer being at least partially located in the dicing region 130, and the orthographic projection of the first encapsulation material layer on the substrate covering the orthographic projection of the detection trace on the substrate.

[0172] S2, a portion of the first encapsulation material layer in the cutting area 130 is removed to form a cutout area, so that at least a portion of the detection traces in the cutout area are exposed, and the remaining portion of the first encapsulation material layer forms the first encapsulation structure 30.

[0173] S3, removes the exposed portion of the detection trace in the cutout area.

[0174] S4, a second packaging structure 40 is formed on the substrate, such that the second packaging structure 40 covers the cutout area.

[0175] S5, the substrate is cut in cutting area 130, with the cutting direction perpendicular to the length direction of the detection trace. For example, as... Figure 12 As shown, the substrate is cut along line EE, with line EE perpendicular to the length direction of the detection trace. The portion remaining after cutting the detection trace is the first trace 20.

[0176] The manufacturing method provided in this application embodiment can remove the exposed portion of the detection traces in the cut-out area, and then cover the cut-out area using the second encapsulation structure 40. Furthermore, the manufacturing method provided in this application embodiment can obtain the display panel 100 by cutting the substrate in the cutting area 130. In this way, the manufacturing method provided in this application embodiment can avoid exposing the detection traces when cutting the cutting area 130, which is beneficial to improving reliability and thus improving performance.

[0177] Please see Figure 14 In some embodiments, step S1, providing the substrate, includes:

[0178] S11, an array trace is formed on the substrate 10. Optionally, the substrate includes a screen area 110 and an off-screen area 120, the cutting area 130 includes a portion located in the screen area 110 (first cutting area 131) and a portion located in the off-screen area 120 (second cutting area 132), the array trace is located in the screen area 110, and the detection circuit is located in the off-screen area 120.

[0179] S12, a detection circuit and a detection trace are formed on the substrate 10, wherein the detection circuit and the array trace are located on different sides of the cut region 130, and the detection trace passes through the cut region 130 and connects the detection circuit and the array trace.

[0180] S13, a first packaging material layer is formed on the side of the array traces and detection traces away from the substrate 10.

[0181] In this way, the detection traces can be detected by the detection circuit. When the detection circuit is removed from the cutting area 130 in the future, the part left after the detection trace (the first trace 20) is not exposed, which helps to improve reliability and thus improve performance.

[0182] In addition, the substrate can be cut in the cutting area 130 to remove the outer area 120 and the detection circuit located in the outer area 120.

[0183] Please refer to the following: Figure 15 , Figure 16 , Figure 17 as well as Figure 18 In some embodiments, the substrate further includes a pixel define layer (PDL) 60 covering the array traces. The pixel define layer 60 is disposed on one side in the substrate thickness direction, and the anode 50 is located between the pixel define layer 60 and the substrate 10. Step S2, removing a portion of the first encapsulation material layer in the cutting area 130 to form a cutout area, includes:

[0184] S21, an isolation structure 70 is formed on the pixel definition layer 60.

[0185] S22, a first isolation opening 71 is formed on the isolation structure 70, exposing the portion of the pixel definition layer 60 located in the first isolation opening 71.

[0186] S23, a first pixel opening 61 is formed on the portion of the pixel definition layer 60 located at the first isolation opening 71, and at the same time, a hollow area is formed on the portion of the first encapsulation material layer in the cutting area 130 by removing the first encapsulation material layer.

[0187] In this way, the manufacturing method provided in this application embodiment can simultaneously remove a portion of the first encapsulation material layer in the cutting area 130 to form a hollow area while processing the first pixel opening 61 on the pixel definition layer 60. This is beneficial for saving process steps and thus improving the process performance of the display device.

[0188] In some embodiments, after step S2, removing the portion of the first encapsulation material layer in the cutting area 130 to form a hollow area, and before step S3, removing the exposed portion of the detection trace in the hollow area, the manufacturing method provided in this application embodiment further includes:

[0189] S24, a first light-emitting unit 81 is formed within the first isolation opening 71.

[0190] S25, the first light-emitting unit 81 is packaged using the first packaging part of the first packaging layer 90.

[0191] In other words, step S2, removing the portion of the first encapsulation material layer in the cutting area 130 to form a hollow area, also includes:

[0192] S24, a first light-emitting unit 81 is formed within the first isolation opening 71.

[0193] S25, the first light-emitting unit 81 is packaged using the first packaging part of the first packaging layer 90.

[0194] In this way, the manufacturing method provided in this application embodiment can form the first light-emitting unit 81 according to the normal process flow, and removing the first encapsulation material layer in the cutting area 130 to form a hollow area does not affect the normal process flow.

[0195] Please refer to the following: Figure 19 , Figure 20 , Figure 21 as well as Figure 22 In some embodiments, step S3, removing the exposed portion of the detection trace in the cutout area, includes:

[0196] S31, a second isolation opening 72 is formed on the isolation structure 70 to expose the portion of the pixel definition layer 60 located in the second isolation opening 72, while removing the exposed portion of the detection trace in the cutout area.

[0197] In this way, the manufacturing method provided in this application embodiment can remove the exposed part of the detection trace in the hollow area while forming the second isolation opening 72 on the isolation structure 70. This is beneficial to saving process flow and thus improving the process performance of the display device.

[0198] In some embodiments, after step S3, removing the exposed portion of the detection trace in the cutout area, and before step S4, forming the second packaging structure 40 on the substrate, the manufacturing method provided in this application embodiment further includes:

[0199] A second pixel opening 62 is formed on the portion of the pixel definition layer 60 located at the second isolation opening 72.

[0200] A second light-emitting unit 82 is formed within the second isolation opening 72.

[0201] The second light-emitting unit 82 is encapsulated using the second encapsulation part of the first encapsulation layer 90.

[0202] In other words, step S3, removing the exposed portion of the detection trace in the cutout area, also includes:

[0203] S32, a second pixel opening 62 is formed on the portion of the pixel definition layer 60 located at the second isolation opening 72.

[0204] S33, a second light-emitting unit 82 is formed within the second isolation opening 72.

[0205] S34, the second light-emitting unit 82 is packaged using the second packaging part of the first packaging layer 90.

[0206] In this way, the manufacturing method provided in this application embodiment can form the second light-emitting unit 82 according to the normal process flow, and removing the exposed part of the detection wiring in the hollow area does not affect the normal process flow.

[0207] In some embodiments, after step S2, removing the portion of the first encapsulation material layer in the cutting area 130 to form a hollow area, and before step S3, removing the exposed portion of the detection trace in the hollow area, the manufacturing method provided in this application embodiment further includes:

[0208] A second isolation opening 72 is formed on the isolation structure 70, exposing the portion of the pixel definition layer 60 located in the second isolation opening 72;

[0209] A second pixel opening 62 is formed on the portion of the pixel definition layer 60 located at the second isolation opening 72;

[0210] A second light-emitting unit 82 is formed within the second isolation opening 72;

[0211] The second light-emitting unit 82 is encapsulated using the second encapsulation part of the first encapsulation layer 90.

[0212] In other words, unlike step S31 of the manufacturing method in the previous embodiment, the manufacturing method provided in this application does not remove the exposed portion of the detection trace in the hollow area when forming the second isolation opening 72 on the isolation structure 70.

[0213] In this way, the manufacturing method provided in this application embodiment can form the second light-emitting unit 82 according to the normal process flow, and removing the first encapsulation material layer in the cutting area 130 to form a hollow area does not affect the normal process flow.

[0214] Please refer to the following: Figure 7 , Figure 23 , Figure 24 as well as Figure 25 In some embodiments, step S3, removing the exposed portion of the detection trace in the cutout area, includes:

[0215] S31', a third isolation opening 73 is formed on the isolation structure 70, exposing the portion of the pixel definition layer 60 located in the third isolation opening 73, while removing the exposed portion of the detection trace in the cutout area.

[0216] In this way, the manufacturing method provided in this application can remove the exposed part of the detection trace in the hollow area while forming the third isolation opening 73 on the isolation structure 70, which helps to save process flow and thus improve the process performance of the display device.

[0217] In some embodiments, after step S3, removing the exposed portion of the detection trace in the cutout area, and before step S4, forming the second packaging structure 40 on the substrate, the manufacturing method provided in this application embodiment further includes:

[0218] A third pixel opening 63 is formed on the portion of the pixel definition layer 60 located at the third isolation opening 73;

[0219] A third light-emitting unit 83 is formed within the third isolation opening 73;

[0220] The third light-emitting unit 83 is packaged using the third packaging section of the first packaging layer 90.

[0221] In other words, step S3, removing the exposed portion of the detection trace in the cutout area, also includes:

[0222] S32', a third pixel opening 63 is formed on the portion of the pixel definition layer 60 located at the third isolation opening 73.

[0223] S33' forms a third light-emitting unit 83 within the third isolation opening 73.

[0224] S34', the third light-emitting unit 83 is packaged using the third packaging part of the first packaging layer 90.

[0225] In this way, the manufacturing method provided in this application embodiment can form the third light-emitting unit 83 according to the normal process flow, and removing the exposed part of the detection wiring in the hollow area does not affect the normal process flow.

[0226] Please see Figure 26 In some embodiments, in step S2, removing a portion of the first encapsulation material layer in the cutting area 130 to form a cutout area includes:

[0227] S21' forms an isolation structure 70 on the pixel definition layer 60.

[0228] S22', a second isolation opening 72 is formed on the isolation structure 70, exposing the portion of the pixel definition layer 60 located in the second isolation opening 72.

[0229] S23', a second pixel opening 62 is formed on the portion of the pixel definition layer 60 located at the second isolation opening 72, while a hollow area is formed on the portion of the first encapsulation material layer in the cutting area 130 by removing the first encapsulation material layer.

[0230] In this way, the manufacturing method provided in this application can simultaneously remove a portion of the first encapsulation material layer in the cutting area 130 to form a hollow area while processing the second pixel opening 62 on the pixel definition layer 60. This helps to save process steps and thus improve the process performance of the display device.

[0231] It is understood that, prior to S22', i.e., before the second isolation opening 72 is formed on the isolation structure 70, the manufacturing method provided in this application includes:

[0232] A first isolation opening 71 is formed on the isolation structure 70, exposing the portion of the pixel definition layer 60 located in the first isolation opening 71;

[0233] A first pixel opening 61 is formed on the portion of the pixel definition layer 60 located at the first isolation opening 71;

[0234] A first light-emitting unit 81 is formed within the first isolation opening 71;

[0235] The first light-emitting unit 81 is packaged using the first packaging part of the first packaging layer 90.

[0236] In other words, after forming the isolation structure 70 on the pixel definition layer 60 and before forming the second isolation opening 72 on the isolation structure 70, step S2, removing the portion of the first encapsulation material layer in the cutting area 130 to form the cutout area, further includes:

[0237] A first isolation opening 71 is formed on the isolation structure 70, exposing the portion of the pixel definition layer 60 located in the first isolation opening 71;

[0238] A first pixel opening 61 is formed on the portion of the pixel definition layer 60 located at the first isolation opening 71;

[0239] A first light-emitting unit 81 is formed within the first isolation opening 71;

[0240] The first light-emitting unit 81 is packaged using the first packaging part of the first packaging layer 90.

[0241] In this way, the manufacturing method provided in this application can form the first light-emitting unit 81 according to the normal process flow, and can form the first light-emitting unit 81 before removing the portion of the first encapsulation material layer in the cutting area 130 to form the hollow area and removing the exposed portion of the detection wiring in the hollow area, without affecting the normal process flow.

[0242] In some embodiments, after step S2, removing the portion of the first encapsulation material layer in the cutting area 130 to form a hollow area, and before step S3, removing the exposed portion of the detection trace in the hollow area, the manufacturing method provided in this application embodiment further includes:

[0243] S24', a second light-emitting unit 82 is formed within the second isolation opening 72;

[0244] S25', the second light-emitting unit 82 is encapsulated using the second encapsulation part of the first encapsulation layer 90.

[0245] In this way, the manufacturing method provided in this application can form the second light-emitting unit 82 according to the normal process flow, and removing part of the first encapsulation material layer in the cutting area 130 to form a hollow area does not affect the normal process flow.

[0246] Please see Figure 27Based on the above embodiments, in step S3, removing the exposed portion of the detection trace in the cutout area includes:

[0247] S31``, a third isolation opening 73 is formed on the isolation structure 70, while the exposed portion of the detection trace in the cutout area is removed. When the third isolation opening 73 is formed on the isolation structure 70, the portion of the pixel definition layer 60 located in the third isolation opening 73 is exposed.

[0248] In this way, the manufacturing method provided in this application can remove the exposed part of the detection trace in the hollow area while forming the third isolation opening 73 on the isolation structure 70, which helps to save process flow and thus improve the process performance of the display device.

[0249] Based on the above embodiments, after step S3, removing the exposed portion of the detection trace in the cutout area, and before step S4, forming the second packaging structure 40 on the substrate, the manufacturing method provided in this application embodiment further includes:

[0250] A third pixel opening 63 is formed on the portion of the pixel definition layer 60 located at the third isolation opening 73;

[0251] A third light-emitting unit 83 is formed within the third isolation opening 73;

[0252] The third light-emitting unit 83 is packaged using the third packaging section of the first packaging layer 90.

[0253] In other words, step S3, removing the exposed portion of the detection trace in the cutout area, also includes:

[0254] S32``, a third pixel opening 63 is formed on the portion of the pixel definition layer 60 located at the third isolation opening 73.

[0255] S33``, a third light-emitting unit 83 is formed within the third isolation opening 73.

[0256] S34``, the third light-emitting unit 83 is packaged using the third packaging part of the first packaging layer 90.

[0257] In this way, the manufacturing method provided in this application can form the third light-emitting unit 83 according to the normal process flow, and removing the exposed part of the detection wiring in the hollow area does not affect the normal process flow.

[0258] It is understood that some of the display panels 100 provided in this application may be manufactured by the manufacturing method of any of the above embodiments.

[0259] Please see Figure 28The embodiments of this application also provide a motherboard 1000, which may include the display panel 100 of any of the above embodiments. The motherboard 1000 provided in the embodiments of this application can be cut into the above-described display panel 100, and has the same or similar technical effects as the above-described display panel 100, which will not be described in detail here.

[0260] Understandably, when processing the display panel 100 using the motherboard 1000, a mask 1010 can be set on the motherboard 1000, and a mask boundary 1011 can be set on the mask 1010. The mask boundary 1011 corresponds to the display area 111 of the display panel 100, and the area enclosed by the mask boundary 1011 is larger than the area of ​​the display area 111. The mask boundary 1011 surrounds the display area 111. In this way, light-emitting units and the like can be processed in the display area 111 of the display panel 100 through the mask boundary 1011.

[0261] Embodiments of this application also provide a display device, which includes the display panel 100 of any of the above embodiments. The display device provided in this application has the same or similar technical effects as the display panel 100 of the above embodiments, and will not be described again here.

[0262] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A display panel, characterized by, include: A substrate includes a display area and a border area, the border area at least partially surrounding the display area, the border area including a main frame area close to the display area and a first cut area away from the display area; The substrate includes an array of traces, and at least a portion of the array traces are located in the display area; A first trace is disposed on the substrate and connected to the array trace, and at least a portion of the first trace is located in the main frame area; The packaging structure is located on the side of the first trace away from the substrate, and the orthographic projection of the packaging structure on the substrate covers the orthographic projection of the first trace on the substrate. At least a portion of the encapsulation structure is located in the first cutting area. The encapsulation structure located in the first cutting area has a first boundary away from the display area in its orthogonal projection on the substrate. The first trace has a second boundary away from the display area in its orthogonal projection on the substrate. The first boundary is located on the side of the second boundary away from the display area. The packaging structure includes a first packaging structure and a second packaging structure. The first packaging structure and the second packaging structure are connected. The first packaging structure and the second packaging structure together cover the first trace. The second packaging structure covers the first cutting area. Along the thickness direction of the substrate, the surface of the first packaging structure facing away from the substrate is higher than the surface of the second packaging structure facing away from the substrate.

2. The display panel of claim 1, wherein, The first packaging structure covers the surface of the first trace away from the substrate and two first sides disposed opposite each other in a direction perpendicular to the extension of the first trace.

3. The display panel of claim 1, wherein, The second encapsulation structure covers the second side of the first trace away from the display area.

4. The display panel as described in claim 1, characterized in that, The array trace includes multiple layered sub-traces, with the first trace and one of the sub-traces being arranged on the same layer.

5. The display panel as described in claim 1, characterized in that, The angle between the second side of the array trace away from the display area and the substrate is less than 90 degrees.

6. The display panel as described in claim 1, characterized in that, The display panel also includes: An isolation structure is located on the side of the array trace away from the substrate and on the side of the second packaging structure facing the substrate. At least a portion of the isolation structure is located in the display area, and the isolation structure encloses and forms an isolation opening. A light-emitting unit is disposed in the isolation opening, and the second encapsulation structure is located on the side of the light-emitting unit away from the substrate and covers the light-emitting unit.

7. A display panel, characterized in that, include: A substrate includes a display area and a border area, the border area at least partially surrounding the display area, the border area including a main frame area close to the display area and a first cut area away from the display area; The substrate includes an array of traces, and at least a portion of the array traces are located in the display area; The first trace is located on the substrate; A first packaging structure is located on the side of the first trace away from the substrate and covers at least a portion of the first trace; The second packaging structure is connected to the first packaging structure and covers the first cutting area; Wherein, one end of the first trace is connected to the array trace, and the other end of the first trace is spaced apart from the first edge of the first cutting area away from the display area, and is located on the side of the first edge close to the display area; The first packaging structure and the second packaging structure together cover the first trace; Along the thickness direction of the substrate, the surface of the first packaging structure facing away from the substrate is higher than the surface of the second packaging structure facing away from the substrate.

8. The display panel as described in claim 7, characterized in that, The other end of the first trace is located in the first cutting area.

9. A method for manufacturing a display panel, characterized in that, include: A substrate is provided, the substrate including a diced region and a detection trace located at least in the diced region, the substrate further including a first encapsulation material layer, the first encapsulation material layer being at least partially located in the diced region, and the orthographic projection of the first encapsulation material layer on the substrate covering the orthographic projection of the detection trace on the substrate. Remove a portion of the first encapsulation material layer in the cutting area to form a cutout area, so that at least a portion of the detection wiring in the cutting area is exposed in the cutout area; Remove the exposed portion of the detection trace in the hollowed-out area; A second encapsulation structure is formed on the substrate, such that the second encapsulation structure covers the cutout area; The first encapsulation material layer and the second encapsulation structure together cover the detection traces; Along the thickness direction of the substrate, the surface of the first encapsulation material layer facing away from the substrate is higher than the surface of the second encapsulation structure facing away from the substrate.

10. The manufacturing method as described in claim 9, characterized in that, The provided substrate includes: Form an array of traces on the substrate; A detection circuit and a detection trace are formed on the substrate. The detection circuit and the array trace are located on different sides of the cut region. The detection trace passes through the cut region and connects the detection circuit and the array trace. The first encapsulation material layer is formed on the side of the array traces and the detection traces away from the substrate.

11. The manufacturing method as described in claim 10, characterized in that, The substrate includes a screen area and an outer area. The cutting area includes a portion located in the screen area and a portion located in the outer area. The array traces are located in the screen area, and the detection circuit is located in the outer area.

12. The manufacturing method as described in claim 9, characterized in that, The substrate further includes a pixel definition layer; the step of removing the portion of the first encapsulation material layer in the cutting area to form a hollow area includes: An isolation structure is formed on the pixel definition layer; A first isolation opening is formed on the isolation structure, exposing the portion of the pixel definition layer located in the first isolation opening; A first pixel opening is formed on the portion of the pixel definition layer located at the first isolation opening, while a hollow area is formed by removing the first encapsulation material layer from the portion of the cutting area.

13. The manufacturing method as described in claim 12, characterized in that, After removing the first encapsulation material layer to form a hollow area in the cutting area, and before removing the exposed portion of the detection trace in the hollow area, the manufacturing method further includes: A first light-emitting unit is formed within the first isolation opening; The first light-emitting unit is encapsulated using the first encapsulation part of the first encapsulation layer.

14. The manufacturing method as described in claim 12, characterized in that, The removal of the exposed portion of the detection trace in the hollowed-out area includes: A second isolation opening is formed on the isolation structure to expose the portion of the pixel definition layer located in the second isolation opening, while removing the exposed portion of the detection trace in the cutout area.

15. The manufacturing method as described in claim 14, characterized in that, After removing the exposed portion of the detection trace in the cutout area and before forming the second packaging structure on the substrate, the fabrication method further includes: A second pixel opening is formed on the portion of the pixel definition layer located at the second isolation opening; A second light-emitting unit is formed within the second isolation opening; The second light-emitting unit is encapsulated using the second encapsulation portion of the first encapsulation layer.

16. The manufacturing method as described in claim 12, characterized in that, After removing the first encapsulation material layer to form a hollow area in the cutting area, and before removing the exposed portion of the detection trace in the hollow area, the manufacturing method further includes: A second isolation opening is formed on the isolation structure, exposing the portion of the pixel definition layer located in the second isolation opening; A second pixel opening is formed on the portion of the pixel definition layer located at the second isolation opening; A second light-emitting unit is formed within the second isolation opening; The second light-emitting unit is encapsulated using the second encapsulation portion of the first encapsulation layer.

17. The manufacturing method as described in claim 16, characterized in that, The removal of the exposed portion of the detection trace in the hollowed-out area includes: A third isolation opening is formed on the isolation structure to expose the portion of the pixel definition layer located in the third isolation opening, while removing the exposed portion of the detection trace in the cutout area.

18. The manufacturing method as described in claim 17, characterized in that, After removing the exposed portion of the detection trace in the cutout area and before forming the second packaging structure on the substrate, the fabrication method further includes: A third pixel opening is formed on the portion of the pixel definition layer located at the third isolation opening; A third light-emitting unit is formed within the third isolation opening; The third light-emitting unit is encapsulated using the third encapsulation part of the first encapsulation layer.

19. The manufacturing method as described in claim 9, characterized in that, The substrate further includes a pixel definition layer; the step of removing the portion of the first encapsulation material layer in the cutting area to form a hollow area includes: An isolation structure is formed on the pixel definition layer; A second isolation opening is formed on the isolation structure, exposing the portion of the pixel definition layer located in the second isolation opening; A second pixel opening is formed on the portion of the pixel definition layer located at the second isolation opening, while the first encapsulation material layer is removed from the portion of the cutting area to form a hollow area.

20. The manufacturing method as described in claim 19, characterized in that, After removing the first encapsulation material layer to form a hollow area in the cutting area, and before removing the exposed portion of the detection trace in the hollow area, the manufacturing method further includes: A second light-emitting unit is formed within the second isolation opening; The second light-emitting unit is encapsulated using the second encapsulation portion of the first encapsulation layer.

21. The manufacturing method as described in claim 19, characterized in that, The removal of the exposed portion of the detection trace in the hollowed-out area includes: A third isolation opening is formed on the isolation structure, while the exposed portion of the detection trace in the hollowed-out area is removed.

22. The manufacturing method as described in claim 21, characterized in that, After removing the exposed portion of the detection trace in the cutout area and before forming the second packaging structure on the substrate, the fabrication method further includes: A third pixel opening is formed on the portion of the pixel definition layer located at the third isolation opening; A third light-emitting unit is formed within the third isolation opening; The third light-emitting unit is encapsulated using the third encapsulation part of the first encapsulation layer.

23. The manufacturing method as described in claim 19, characterized in that, After forming the isolation structure on the pixel definition layer and before forming the second isolation opening on the isolation structure, the step of removing the portion of the first encapsulation material layer in the cutting area to form the hollow area further includes: A first isolation opening is formed on the isolation structure, exposing the portion of the pixel definition layer located in the first isolation opening; A first pixel opening is formed on the portion of the pixel definition layer located at the first isolation opening; A first light-emitting unit is formed within the first isolation opening; The first light-emitting unit is encapsulated using the first encapsulation part of the first encapsulation layer.

24. The manufacturing method as described in claim 9, characterized in that, The manufacturing method further includes: The substrate is cut in the cutting area, with the cutting direction perpendicular to the length direction of the detection trace.

25. A display panel, characterized in that, The display panel is manufactured by the manufacturing method according to any one of claims 9 to 24.

26. A mother plate, characterized in that, The motherboard includes a plurality of display panels as described in any one of claims 1 to 8, 25.

27. A display device, characterized in that, The display device includes a display panel as described in any one of claims 1 to 8 and 25.

Images