Display mother board, display panel and display device
By designing the first insulating layer covering the side of the detection lead on the OLED display motherboard, the problem of corrosion in the cutting section of the OLED display panel is solved, and the reliability and display performance of the display panel are improved.
Patent Information
- Application Number
- CN202411514138.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-28
- Publication Date
- 2025-04-29
AI Technical Summary
The metal at the cutting section of the OLED display panel is easily corroded, resulting in low reliability of the display panel.
A display motherboard is designed, including a substrate, a detection lead and a first insulating layer. The side surface of the detection lead is covered by the first insulating layer, through this structure, the detection lead is prevented from being exposed after cutting, and water and oxygen corrosion is prevented.
It effectively prevents corrosion of detection leads and other metal layers set on the same layer, and improves the reliability and display performance of the display panel.
Smart Images

Figure CN119907546A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a display motherboard, a display panel and a display device. Background Art
[0002] Organic Light Emitting Diode (OLED) display technology is regarded as the most promising new flat panel display technology of the next generation. Compared with liquid crystal display technology, OLED display technology has the advantages of low energy consumption, low cost, self-luminescence, wide viewing angle and fast response speed. However, currently OLED display panels are formed by cutting display motherboards, and the metal at the cut section of OLED display panels is easily corroded, and the reliability of OLED display panels is low. Summary of the invention
[0003] Based on this, it is necessary to provide a display motherboard, a display panel and a display device to address the problem of low reliability of current display panels.
[0004] A display motherboard, the display motherboard having a display area and a non-display area surrounding at least a portion of the display area, and the display motherboard comprises:
[0005] substrate;
[0006] A detection lead is provided on the substrate and located in the non-display area, the detection lead has a top surface opposite to the substrate and a side surface intersecting with the top surface, the side surface is located between two opposite ends of the detection lead itself in an extending direction, and the side surface extends in a direction intersecting with the extending direction of the detection lead;
[0007] A first insulating layer covers a side of the detection lead facing away from the substrate, and at least a portion of the side surface of the detection lead is covered by the first insulating layer.
[0008] In the above-mentioned display motherboard, the side surface extends in a direction intersecting with the extension direction of the detection lead, that is, the side surface extends along the direction of cutting the detection lead. In this way, when the non-display area is cut from the side away from the display area, the periphery of the non-display area can be cut off to form a display panel.
[0009] In addition, at least part of the side surfaces of the detection lead in the display motherboard are covered by the first insulating layer. After the display motherboard is cut, the side surfaces of the detection lead covered by the first insulating layer remain in the final display panel. At least part of the side surfaces of the detection lead in the display panel are still covered by the first insulating layer. At least part of the side surfaces of the detection lead will not be exposed, thereby preventing water and oxygen from corroding the detection lead and preventing water and oxygen from entering other metal layers arranged on the same layer as the detection lead to affect the display performance of the display panel, thereby improving the reliability of the display panel.
[0010] In some embodiments, a spacing groove is formed on the detection lead, the side surface structure forms a groove wall of the spacing groove close to the display area, and the first insulating layer at least partially fills the spacing groove and covers at least part of the side surface;
[0011] Optionally, the spacing groove penetrates the detection lead along a thickness direction of the detection lead and / or a width direction of the detection lead.
[0012] In some embodiments, the display motherboard has a to-be-cut area, and the orthographic projection of the to-be-cut area on the substrate is located within the orthographic projection of the spacing groove on the substrate;
[0013] Optionally, an extension direction of the to-be-cut area intersects with an extension direction of the detection lead.
[0014] In some embodiments, the detection lead includes a first detection lead and a second detection lead, the first detection lead is spaced apart from the second detection lead in its extension direction, and the spacing groove is located between the first detection lead and the second detection lead.
[0015] In some embodiments, the first insulating layer includes a first portion and a second portion, the first portion covers a side of the first detection lead and the second detection lead facing away from the substrate, and the second portion is connected to the first portion and fills the spacing groove.
[0016] In some embodiments, the display motherboard includes an array substrate, the array substrate includes the substrate and a first metal layer disposed on the substrate, and the detection lead is disposed on the same layer as the first metal layer and is connected to each other;
[0017] Optionally, the display area includes a transistor, and one electrode of the transistor is located in the first metal layer.
[0018] In some embodiments, the first insulating layer is disposed on the same layer as at least one insulating layer in the array substrate;
[0019] Optionally, the array substrate includes a capacitor dielectric layer and an interlayer insulating layer, the first insulating layer includes a second layer and a third layer stacked in sequence in a direction away from the substrate, the second layer is arranged in the same layer as the capacitor dielectric layer, and the third layer is arranged in the same layer as the interlayer insulating layer;
[0020] Optionally, the array substrate includes a gate insulation layer, a capacitor dielectric layer and an interlayer insulation layer, the first insulation layer includes a first layer, a second layer and a third layer stacked in sequence along a direction away from the substrate, the first layer is arranged on the same layer as the gate insulation layer, the second layer is arranged on the same layer as the capacitor dielectric layer, and the third layer is arranged on the same layer as the interlayer insulation layer.
[0021] In some embodiments, the display motherboard further includes a conductive structure, which is disposed on the first insulating layer and connects the detection leads on opposite sides of the spacing groove along the extending direction of the detection leads;
[0022] Optionally, the conductive structure comprises a second metal conductive layer and a third metal conductive layer stacked in a direction away from the substrate, and an orthographic projection of the third metal conductive layer on the substrate covers an orthographic projection of the second metal conductive layer on the substrate;
[0023] Optionally, the conductive structure includes a first metal conductive layer, a second metal conductive layer and a third metal conductive layer stacked in a direction away from the substrate, and the orthographic projections of the first metal conductive layer and the third metal conductive layer on the substrate respectively cover the orthographic projection of the second metal conductive layer on the substrate.
[0024] In some embodiments, a first through hole and a second through hole are formed on the first insulating layer, and the first through hole and the second through hole are respectively located at two opposite sides of the spacing groove along the extending direction of the detection lead;
[0025] One end of the conductive structure at least partially extends into the first through hole to be connected to the detection lead on one side of the spacing groove, and the other end of the conductive structure at least partially extends into the second through hole to be connected to the detection lead on the other side of the spacing groove.
[0026] In some embodiments, the display motherboard includes an isolation structure and a light-emitting element disposed in the display area, the isolation structure encloses an isolation opening, and the light-emitting element is at least partially disposed in the isolation opening;
[0027] Optionally, the isolation structure comprises an isolation body and a blocking portion stacked in a direction away from the substrate, and at least a portion of an orthographic projection outer contour of the blocking portion on the substrate is located at a periphery of an orthographic projection outer contour of the isolation body on the substrate;
[0028] Optionally, the light emitting element comprises a first electrode, a light emitting functional portion and a second electrode stacked in a direction away from the substrate, and the second electrode is electrically connected to the isolation structure;
[0029] Optionally, the isolation structure and the conductive structure are arranged in the same layer.
[0030] In some embodiments, the display motherboard further includes a second insulating layer, wherein the second insulating layer covers a side of the conductive structure facing away from the substrate;
[0031] Optionally, the display motherboard includes a light emitting element disposed in the display area and a first packaging layer covering the light emitting element, and the second insulating layer is disposed on the same layer as the first packaging layer;
[0032] Optionally, the display motherboard further includes a light emitting material layer covering between the conductive structure and the second insulating layer;
[0033] Optionally, the display motherboard further includes an electrode material layer covering between the conductive structure and the second insulating layer.
[0034] A display panel, the display panel having a display area and a non-display area surrounding the display area, and the display panel comprises:
[0035] substrate;
[0036] A first detection lead is provided on the substrate and is located in the non-display area; the first detection lead has a top surface opposite to the substrate and a side surface intersecting the top surface, and the side surface is located on a side of the first detection lead away from the display area along its own extension direction;
[0037] A first insulating layer covers a side of the first detection lead facing away from the substrate and extends to cover the side surface.
[0038] In some embodiments, a stepped space is formed between the side surface and the substrate, and the first insulating layer covers a side of the first detection lead facing away from the substrate and fills the stepped space.
[0039] In some embodiments, the first insulating layer includes a first portion and a second portion, the first portion covers a side of the first detection lead facing away from the substrate, and the second portion fills the stepped space.
[0040] In some embodiments, the display panel includes an array substrate, the array substrate includes the substrate and a first metal layer disposed on the substrate, and the detection lead is disposed on the same layer as the first metal layer and is connected to each other;
[0041] Optionally, the display area includes a transistor, and one electrode of the transistor is located in the first metal layer.
[0042] In some embodiments, the display panel further includes a first conductive structure, the first conductive structure is disposed on the first insulating layer, one end of the first conductive structure at least partially passes through the first insulating layer and is connected to the first detection lead, and the other end of the first conductive structure is used to be connected to the detection pad;
[0043] Optionally, the first conductive structure comprises a second metal conductive layer and a third metal conductive layer stacked in a direction away from the substrate, and at least a portion of an orthographic projection outer contour of the third metal conductive layer on the substrate is located outside an orthographic projection outer contour of the second metal conductive layer on the substrate;
[0044] Optionally, the first conductive structure includes a first metal conductive layer, a second metal conductive layer and a third metal conductive layer stacked in a direction away from the substrate, and at least part of the orthographic outer contours of the first metal conductive layer and the third metal conductive layer on the substrate are located outside the orthographic outer contour of the second metal conductive layer on the substrate.
[0045] In some embodiments, a first through hole corresponding to the first detection lead is formed on the first insulating layer, and the first conductive structure at least partially extends into the first through hole and contacts and conducts with the first detection lead.
[0046] In some embodiments, the display panel further comprises an electrical isolation structure and a light-emitting element disposed in the display area, the isolation structure encloses an isolation opening, and the light-emitting element is at least partially disposed in the isolation opening;
[0047] Optionally, the isolation structure comprises an isolation body and a blocking portion stacked in a direction away from the substrate, and at least a portion of an orthographic projection outer contour of the blocking portion on the substrate is located at a periphery of an orthographic projection outer contour of the isolation body on the substrate;
[0048] Optionally, the light emitting element comprises a first electrode, a light emitting functional portion and a second electrode stacked in a direction away from the substrate, and the second electrode is electrically connected to the isolation structure;
[0049] Optionally, the isolation structure and the first conductive structure are arranged in the same layer.
[0050] In some embodiments, the display panel further includes a second insulating layer, wherein the second insulating layer covers a side of the first conductive structure facing away from the substrate;
[0051] Optionally, a side of the second insulating layer facing away from the substrate is sunken to form a plurality of grooves corresponding to the depressions on the first conductive structure;
[0052] Optionally, the display panel includes a light emitting element disposed in the display area and a first encapsulation layer covering the light emitting element, and the second insulating layer is disposed on the same layer as the first encapsulation layer;
[0053] Optionally, the display panel further includes a light emitting material layer covering between the first conductive structure and the second insulating layer;
[0054] Optionally, the display panel further includes an electrode material layer covering between the first conductive structure and the second insulating layer.
[0055] A display device comprises the above-mentioned display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0056] In order to more clearly illustrate the technical solutions in the embodiments or exemplary embodiments of the present application, the drawings required for use in the description of the embodiments or exemplary embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0057] Figure 1 This is a schematic structural diagram showing a perspective of a motherboard in some embodiments of the present application;
[0058] Figure 2 A schematic cross-sectional view of a non-display area of a display motherboard in some embodiments of the present application;
[0059] Figure 3 A schematic cross-sectional view showing a display area of a motherboard in some embodiments of the present application;
[0060] Figure 4 Schematic cross-sectional view of an array substrate in some embodiments of the present application;
[0061] Figure 5 It is a schematic cross-sectional view of a display panel in some embodiments of the present application.
[0062] Explanation of reference numerals: 200, display motherboard; 201, display area; 202, non-display area; 204, detection pad; 100, display panel; 10, array substrate; 11, substrate; 12, step space; 20, transistor; 21, semiconductor layer; 22, gate insulating layer; 23, first metal layer; 24, capacitor dielectric layer; 25, second metal layer; 26, interlayer insulating layer; 27, third metal layer; 28, planarization layer; 30, detection lead; 32, first detection lead; 321, side; 34, second detection lead; 40, spacing groove ; 50. first insulating layer; 51. first through hole; 52. first part; 53. second through hole; 54. second part; 60. conductive structure; 62. first metal conductive layer; 64. second metal conductive layer; 65. third metal conductive layer; 66. first conductive structure; 67. second conductive structure; 70. isolation structure; 72. isolation opening; 73. insulator; 75. blocking part; 80. light-emitting element; 82. first electrode; 84. light-emitting functional part; 86. second electrode; 92. second insulating layer; 94. first packaging layer; a. area to be cut. DETAILED DESCRIPTION
[0063] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present application more thorough and comprehensive.
[0064] It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, they do not represent any order, quantity or importance, but are only used to distinguish different components. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the present application, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element. "Including" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects.
[0065] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0066] Organic Light Emitting Diode (OLED) display technology is regarded as the most promising new flat panel display technology of the next generation. Compared with liquid crystal display technology, OLED display technology has the advantages of low energy consumption, low cost, self-luminescence, wide viewing angle and fast response speed. In the process of making the OLED display panel 100, the display motherboard 200 is first made, and then the display motherboard 200 is cut to obtain the display panel 100. A detection lead 30 connected between the display area 201 and the detection pad 204 is formed on the display motherboard 200, so that the detection pad 204 and the display area 201 are connected through the detection lead 30. The detection pad 204 is subsequently connected to the detection circuit, and a voltage can be applied to the electronic device of the display area 201 to detect whether the display performance of the display area 201 is qualified. After the detection is completed, the display motherboard 200 is cut along the cutting line to form the display panel 100. During the cutting process, the detection leads 30 on the display motherboard 200 are cut off and the portion with the detection pads 204 is removed, so that the frame of the display panel 100 is narrower.
[0067] However, after cutting, the detection lead 30 is exposed at the cut section of the display panel 100, and external water vapor can easily penetrate and corrode the cut section of the detection lead 30, affecting other metal layers arranged on the same layer as the detection lead 30. For example, water vapor can penetrate into the first metal layer 23 on the same layer as the detection lead 30, affecting the normal performance of the thin film transistor 20 or the capacitor in the array substrate 10, and the stability of the display panel 100 is poor.
[0068] To solve at least one of the above problems, the embodiments of the present application provide a display motherboard 200, a display panel 100 and a display device, and each embodiment will be described below in conjunction with the accompanying drawings.
[0069] First, see Figure 1-Figure 2 According to some embodiments of the present application, a display motherboard 200 is provided, and the display motherboard 200 is cut to form a display panel 100. It can be understood that the display motherboard 200 is cut to form a plurality of display panels 100, or the display motherboard 200 is cut to form a display panel 100, and the display motherboard 200 is the original screen body that is cut to form the display panel 100.
[0070] The display motherboard 200 has a display area 201 and a non-display area 202 surrounding at least part of the display area 201. The non-luminous non-display area 202 is reserved on the display motherboard 200 for arranging electronic devices such as wiring around the periphery of the display area 201. The display motherboard 200 includes a substrate 11, a detection lead 30 and a first insulating layer 50. The detection lead 30 is arranged on the substrate 11 and located in the non-display area 202, so as to connect the detection circuit of the outside world through the detection lead 30, and then apply a voltage to the display motherboard 200 to perform display performance detection. The first insulating layer 50 covers the side of the detection lead 30 facing away from the substrate 11, so that the detection lead 30 is covered by the first insulating layer 50 to protect the detection lead 30.
[0071] The detection lead 30 has a top surface opposite to the substrate 11 and a side surface 321 intersecting with the top surface, and the side surface 321 is located between two opposite ends of the detection lead 30 along its own extension direction. Among them, the detection lead 30 extends between the display area 201 and the binding area of the non-display area 202, and the side surface 321 between the two opposite ends of the detection lead 30 along its own extension direction is located between the display area 201 and the binding area. In addition, the side surface 321 extends in a direction intersecting with the extension direction of the detection lead 30, that is, the side surface 321 extends in the direction of cutting the detection lead 30, so that when the non-display area 202 is cut from the side of the side surface 321 away from the display area 201, the periphery of the non-display area 202 can be cut off to form the display panel 100.
[0072] In addition, at least part of the side surface 321 of the detection lead 30 in the display motherboard 200 is covered by the first insulating layer 50. After the display motherboard 200 is cut, the side surface 321 of the detection lead 30 covered by the first insulating layer 50 remains in the final display panel 100. At least part of the side surface 321 of the detection lead 30 in the display panel 100 is still covered by the first insulating layer 50. At least part of the side surface 321 of the detection lead 30 will not be exposed, thereby preventing water and oxygen from corroding the detection lead 30, and preventing water and oxygen from entering other metal layers arranged on the same layer as the detection lead 30 to affect the display performance of the display panel 100, thereby improving the reliability of the display panel 100.
[0073] According to some embodiments of the present application, a spacing groove 40 is provided on the detection lead 30, and the side surface 321 is structured to form a groove wall of the spacing groove 40 close to the display area 201. The first insulating layer 50 is at least partially filled in the spacing groove 40 and covers at least part of the side surface 321. In this way, the first insulating layer 50 not only covers the detection lead 30, but also enters the spacing groove 40 of the detection lead 30 to cover at least part of the side surface 321 of the detection lead 30. In the process of cutting the display motherboard 200, the detection lead 30 is cut off from the spacing groove 40, and the first insulating layer 50 located in the spacing groove 40 is exposed at the cutting section surface, and at the same time, the first insulating layer 50 still covers the groove wall of the spacing groove 40, that is, it still covers at least part of the side surface 321 of the detection lead 30.
[0074] In this way, in the display panel 100 formed after cutting the display motherboard 200, the first insulating layer 50 still covers the side 321 of the detection lead 30, which can prevent water and oxygen from corroding the detection lead 30, and prevent water and oxygen from entering other metal layers arranged on the same layer as the detection lead 30 to affect the display performance of the display panel 100, thereby improving the reliability of the display panel 100.
[0075] It can be understood that one end of the detection lead 30 is connected to the wiring of the display area 201, and the end of the detection lead 30 away from the display area 201 along its own extension direction is provided with a detection pad 204, and the detection pad 204 is used as a terminal of an external circuit to connect the display motherboard 200 to the detection circuit for display performance detection. After the detection is completed, the display motherboard 200 can be cut from the detection lead 30, and the detection pad 204 can be separated from the display area 201 to obtain a display panel 100 that does not include the detection pad 204, and the non-display area 202 of the display panel 100 has fewer components and a narrower frame.
[0076] Optionally, the spacing groove 40 penetrates the detection lead 30 along the thickness direction of the detection lead 30, so that the first insulating layer 50 entering the spacing groove 40 can cover the entire side 321 of the detection lead 30 along the thickness direction of the detection lead 30 to form a larger coverage area, thereby increasing the wrapping range of the first insulating layer 50 on the side 321 of the detection lead 30, and further improving the reliability of the display panel 100.
[0077] Optionally, the spacing groove 40 penetrates the detection lead 30 along the width direction of the detection lead 30, so that the first insulating layer 50 entering the spacing groove 40 can cover the entire side 321 of the detection lead 30 along the width direction of the detection lead 30 to form a larger coverage area, thereby increasing the wrapping range of the first insulating layer 50 on the side 321 of the detection lead 30, and further improving the reliability of the display panel 100.
[0078] Optionally, the spacing groove 40 penetrates the detection lead 30 in both the thickness direction and the width direction of the detection lead 30, so that the first insulating layer 50 entering the spacing groove 40 can cover the entire side 321 of the detection lead 30 in both the thickness direction and the width direction of the detection lead 30. After the display motherboard 200 is cut from the spacing groove 40, only the first insulating layer 50 is exposed on the cut section at the spacing groove 40, and the cut section of the detection lead 30 of the first insulating layer 50 will not be directly exposed. In this way, the entire side 321 of the detection lead 30 can be completely wrapped by the first insulating layer 50, preventing part of the side 321 of the detection lead 30 from being exposed and corroded, thereby increasing the wrapping range of the first insulating layer 50 on the side 321 of the detection lead 30, and further improving the reliability of the display panel 100.
[0079] Specifically in some embodiments, the display motherboard 200 has an area a to be cut, and the orthographic projection of the area a to be cut on the substrate 11 is located within the orthographic projection of the spacing groove 40 on the substrate 11, that is, when cutting the display motherboard 200, the cutting is performed from the spacing groove 40, and the spacing groove 40 is filled with a first insulating layer 50. After cutting, the first insulating layer 50 wraps the side 321 of the detection lead 30 to prevent the side 321 of the detection lead 30 from being directly exposed, thereby preventing water and oxygen from corroding the metal layer of the display panel 100.
[0080] Optionally, the extension direction of the to-be-cut region a intersects with the extension direction of the detection lead 30 , so that during the cutting process, the display motherboard 200 is cut from the cutting region a to obtain a display panel 100 that does not include the detection pad 204 .
[0081] According to some embodiments of the present application, the detection lead 30 includes a first detection lead 32 and a second detection lead 34, the first detection lead 32 is spaced apart from the second detection lead 34 in its extension direction, and the spacing groove 40 is located between the first detection lead 32 and the second detection lead 34. Equivalently, the detection lead 30 is divided into two parts, the first detection lead 32 and the second detection lead 34, and the spacing groove 40 is formed between the first detection lead 32 and the second detection lead 34, so that the first insulating layer 50 is filled in the spacing groove 40 between the first detection lead 32 and the second detection lead 34. In the subsequent cutting process, the display motherboard 200 is cut from the spacing groove 40, and the side where the second detection lead 34 is located is separated from the side where the first detection lead 32 is located. The display panel 100 formed after the final cutting only includes the first detection lead 32, and does not include the second detection lead 34.
[0082] Specifically, the first detection lead 32 is connected to the display area 201, and the second detection lead 34 is connected to the detection pad 204. After cutting, the screen body where the second detection lead 34 and the detection pad 204 are located is separated from the screen body where the first detection lead 32 and the display area 201 are located, thereby obtaining a display panel 100 including the display area 201 and the first detection lead 32.
[0083] Furthermore, the first insulating layer 50 includes a first part 52 and a second part 54, the first part 52 covers the side of the first detection lead 32 and the second detection lead 34 facing away from the substrate 11, and the second part 54 is connected to the first part 52 and filled in the spacing groove 40, so that the first part 52 covers the top surface of the first detection lead 32 and the second detection lead 34 facing away from the substrate 11, and the second part 54 covers the side 321 of the first detection lead 32 facing the second detection lead 34. The first insulating layer 50 can cover the top surface of the first detection lead 32 and the side 321 of the first detection lead 32. After the display motherboard 200 is cut from the spacing groove 40 to obtain the display panel 100, all directions of the first detection lead 32 in the display panel 100 are wrapped by the first insulating layer 50, thereby preventing the first detection lead 32 from being corroded, thereby improving the reliability of the display panel 100.
[0084] See also Figure 1-Figure 3 According to some embodiments of the present application, the display motherboard 200 includes an array substrate 10, the array substrate 10 includes a substrate 11 and a first metal layer 23 arranged on the substrate 11, and the detection lead 30 is arranged on the same layer as the first metal layer 23 and is interconnected.
[0085] That is to say, the display motherboard 200 is provided with an array substrate 10, and the array substrate 10 includes a substrate 11, a semiconductor layer 21, a gate insulating layer 22, a first metal layer 23, a capacitor dielectric layer 24, a second metal layer 25, an interlayer insulating layer 26, a third metal layer 27 and a planarization layer 28 which are stacked in sequence.
[0086] When the first metal layer 23 of the array substrate 10 is manufactured in the display area 201, the detection lead 30 is formed in the non-display area 202 at the same time, and there is no need to separately manufacture the detection lead 30, so the manufacturing process is simple and convenient. At the same time, the detection lead 30 is connected to the transistor 20, and after a voltage is applied to the detection lead 30 through an external detection circuit, the transistor 20 can work under the voltage drive, and then the light-emitting element 80 connected to the transistor 20 can be controlled to emit light, so as to detect whether the display performance of the display motherboard 200 is qualified.
[0087] Furthermore, the display area 201 includes a transistor 20 , and one electrode of the transistor 20 is located in the first metal layer 23 .
[0088] That is, the array substrate 10 includes a substrate 11, a semiconductor layer 21, a gate insulating layer 22, a first metal layer 23, a capacitor dielectric layer 24, a second metal layer 25, an interlayer insulating layer 26, a third metal layer 27 and a planarization layer 28 which are stacked in sequence. Devices of the pixel driving circuit, such as transistors 20 and capacitors, are arranged in the above-mentioned film layers.
[0089] According to some embodiments of the present application, the first insulating layer 50 is arranged in the same layer as at least one insulating layer in the array substrate 10. The array substrate 10 is provided with multiple metal layers and multiple insulating layers that insulate and isolate two adjacent metal layers. In the process of manufacturing the display motherboard 200, the first insulating layer 50 can be arranged in the same layer as at least one insulating layer in the array substrate 10. For example, after forming the first metal layer 23 and the detection lead 30 in the same layer, the insulating layer covering the first metal layer 23 and the first insulating layer 50 covering the detection lead 30 are continuously manufactured in the same layer, so that the manufacturing process can be simplified. It can be understood that the first metal layer 23 includes several layers of sub-insulating layers, the array substrate 10 includes a gate insulating layer 22, a capacitor dielectric layer 24 and an interlayer insulating layer 26, and the several layers of sub-insulating layers are arranged in the same layer as at least one of the gate insulating layer 22, the capacitor dielectric layer 24 and the interlayer insulating layer 26.
[0090] Optionally, the array substrate 10 includes a capacitor dielectric layer 24 and an interlayer insulating layer 26, and the first insulating layer 50 includes a second layer and a third layer stacked in sequence in a direction away from the substrate 11, the second layer is arranged on the same layer as the capacitor dielectric layer 24, and the third layer is arranged on the same layer as the interlayer insulating layer 26. The first insulating layer 50 formed in this way includes two layers, and the manufacturing process of the first insulating layer 50 is merged into the manufacturing process of the array substrate 10, and does not need to be molded separately, thereby simplifying the molding process.
[0091] Also optionally, the array substrate 10 includes a gate insulating layer 22, a capacitor dielectric layer 24 and an interlayer insulating layer 26, and the first insulating layer 50 includes a first layer, a second layer and a third layer stacked in sequence along a direction away from the substrate 11, the first layer is arranged on the same layer as the gate insulating layer 22, the second layer is arranged on the same layer as the capacitor dielectric layer 24, and the third layer is arranged on the same layer as the interlayer insulating layer 26. The first insulating layer 50 formed in this way includes three layers, and the manufacturing process of the first insulating layer 50 is merged into the manufacturing process of the array substrate 10, and does not need to be formed separately, thereby simplifying the molding process.
[0092] As described above, the detection lead 30 is provided with a spacing groove 40 and then filled with the first insulating layer 50, so as to protect the cut section of the display panel 100 and prevent the detection lead 30 from being exposed at the cut section. However, after the spacing groove 40 is provided on the detection lead 30, if the spacing groove 40 penetrates the detection lead 30 along the width and thickness directions of the detection lead 30, the detection lead 30 will be cut into two disconnected parts, and the signal cannot be transmitted normally.
[0093] In order to solve this problem, in some embodiments of the present application, the display motherboard 200 also includes a conductive structure 60, which is arranged on the first insulating layer 50 and connects the detection leads 30 on opposite sides of the spacing groove 40 along the extension direction of the detection lead 30. In this way, the detection leads 30 on opposite sides of the spacing groove 40 are connected by the conductive structure 60. Even if the spacing groove 40 that passes through the width direction and thickness direction of the detection lead 30 is opened, it can ensure that the detection lead 30 is normally conductive to transmit the circuit signal, thereby ensuring that the detection process is carried out normally.
[0094] At the same time, the spacing groove 40 penetrates the detection lead 30 along the width direction and the thickness direction of the detection lead 30, and the first insulating layer 50 is filled in the spacing groove 40. After the display motherboard 200 is cut from the spacing groove 40, there will be no detection lead 30 at the cut section, and the entire side 321 of the detection lead 30 is completely wrapped by the first insulating layer 50, and the reliability of the display panel 100 is higher. It can be understood that in some other embodiments, the spacing groove 40 may not penetrate the width direction of the detection lead 30, or the spacing groove 40 may not penetrate the thickness direction of the detection lead 30, or the detection lead 30 may not penetrate the width direction and the thickness direction of the detection lead 30, and the spacing groove 40 is connected to the detection lead 30 on both sides of the extension direction of the detection lead 30. In this case, the conductive structure 60 may be provided, or the conductive structure 60 may not be provided, which is not limited here.
[0095] Optionally, the conductive structure 60 includes a second metal conductive layer 64 and a third metal conductive layer 65 stacked in a direction away from the substrate 11, the orthographic projection of the third metal conductive layer 65 on the substrate 11 covers the orthographic projection of the second metal conductive layer 64 on the substrate 11, and the third metal conductive layer 65 is larger in area than the second metal conductive layer 64.
[0096] Alternatively, the conductive structure 60 includes a first metal conductive layer 62, a second metal conductive layer 64, and a third metal conductive layer 65 stacked in a direction away from the substrate 11, and the orthographic projections of the first metal conductive layer 62 and the third metal conductive layer 65 on the substrate 11 are both located outside the orthographic projection of the second metal conductive layer 64 on the substrate 11, which is equivalent to the three forming a film layer structure with an "I"-shaped cross section. For example, the materials of the first metal conductive layer 62, the second metal conductive layer 64, and the third metal conductive layer 65 are Mo, Al, and Ti, respectively.
[0097] Specifically, the first insulating layer 50 is provided with a first through hole 51 and a second through hole 53, and the first through hole 51 and the second through hole 53 are respectively located on opposite sides of the spacing groove 40 along the extending direction of the detection lead 30. One end of the conductive structure 60 at least partially extends into the first through hole 51 and is connected to the detection lead 30 on one side of the spacing groove 40, and the other end of the conductive structure 60 at least partially extends into the second through hole 53 and is connected to the electrode lead on the other side of the spacing groove 40. In this way, the opposite ends of the conductive structure 60 are respectively in contact with the detection leads 30 on both sides of the spacing groove 40, thereby conducting the two parts of the detection leads 30 blocked by the spacing groove 40, for example, conducting the first detection lead 32 and the second detection lead 34 on both sides of the spacing groove 40, while improving the reliability of the display panel 100 after cutting, and ensuring that the detection process before cutting can be carried out normally.
[0098] It can be understood that during the cutting process, the display motherboard 200 is cut along the cutting area a, and the conductive structure 60 will also be cut, including the first conductive structure 66 located above the first detection lead 32 and the second conductive structure 67 located above the second detection lead 34. The first conductive structure 66 and the second conductive structure 67 on the display motherboard 200 are connected, and the first detection lead 32 and the second detection lead 34 can be connected, thereby ensuring that the detection lead 30 is connected to smoothly perform the detection process. After the detection is completed, the display motherboard 200 is cut, the first conductive structure 66 and the second conductive structure 67 are separated, and the first conductive structure 66 remains in the display panel 100.
[0099] See also Figure 1-Figure 4 According to some embodiments of the present application, the display motherboard 200 includes an isolation structure 70 and a light-emitting element 80 disposed in the display area 201 . The isolation structure 70 encloses an isolation opening 72 , and the light-emitting element 80 is at least partially disposed in the isolation opening 72 .
[0100] The isolation structure 70 is arranged on the array substrate 10, and the isolation structure 70 has an isolation opening 72 for limiting the light-emitting element 80. The position of the isolation opening 72 is the position of the sub-pixel. During the manufacturing process of the light-emitting element 80, the various film layers in the light-emitting element 80 can be evaporated on the entire surface. At the edge of the isolation structure 70, due to the existence of the step difference, the various film layers of the light-emitting element 80 will be disconnected, so that independent light-emitting elements 80 are formed in each separated opening. In this way, the preparation of the light-emitting element 80 does not require a mask plate, the manufacturing cost is reduced, and the opening area is increased.
[0101] Optionally, the isolation structure 70 includes an isolation body 73 and a blocking portion 75 stacked in a direction away from the substrate 11, and the orthographic projection of the blocking portion 75 on the substrate 11 covers the orthographic projection of the isolation body 73 on the substrate 11, that is, the isolation structure 70 is wide at the top and narrow at the bottom, thereby increasing the isolation effect of the isolation structure 70 on the light-emitting element 80.
[0102] Optionally, the light emitting element 80 includes a first electrode 82, a light emitting functional layer, and a second electrode 86 stacked in a direction away from the substrate 11, and the second electrode 86 is electrically connected to the isolation structure 70. For example, the first electrode 82 may be an anode, and the second electrode 86 may be a cathode. The light emitting functional layer may include a first functional layer, a light emitting layer, and a second functional layer, and the first functional layer, the light emitting layer, and the second functional layer are sequentially stacked on the first electrode 82. The first functional layer may include a hole injection layer, a hole transport layer, an electron blocking layer, etc., and the second functional layer may include an electron injection layer, an electron transport layer, a hole blocking layer, etc.
[0103] It should be noted that, in some embodiments of the present disclosure, the cathodes of sub-pixels can be independently controlled, that is, the cathodes of different sub-pixels will not be electrically connected together directly or indirectly. For example, the cathodes of the sub-pixels can be connected to the external circuit through a separately arranged wiring, or connected to the external circuit through an isolation structure 70 (which can be arranged to include a wiring composed of a conductive portion); or, the cathodes of the respective sub-pixels can be electrically connected to each other to serve as a common electrode. For example, these cathodes can be indirectly connected together through the conductive portion of the isolation structure 70, and then connected to an external control circuit (such as a common electrode line).
[0104] The composition, preparation and other contents of the isolation structure 70 and the light-emitting element 80 mentioned in this embodiment are further described in patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 100935, PCT / CN2024 / 102785, PCT / CN2024 / 099419, PCT / CN2024 / 099072, and CN116685174A for reference.
[0105] Optionally, the isolation structure 70 and the conductive structure 60 are arranged in the same layer, so that when the isolation structure 70 is prepared in the display area 201, the conductive structure 60 covering the first insulating layer 50 can be formed in the non-display area 202 at the same time. The preparation process of the conductive structure 60 does not require a separate design process, and the production process is simple and convenient.
[0106] It should be noted that, in some other embodiments, after the first electrode 82 is provided in the display area 201, a pixel defining layer is provided on the first electrode 82, and then a light-emitting material is evaporated in the pixel opening of the pixel defining layer through a precision mask (FMM), and finally a second electrode 86 is deposited to form the light-emitting element 80. The light-emitting element 80 of the display area 201 can be manufactured by a precision mask, or by providing an isolation structure 70 and eliminating the precision mask. The structure of the display area 201 and the molding method of the light-emitting element 80 are not limited here.
[0107] According to some embodiments of the present application, the display motherboard 200 further includes a second insulating layer 92 , and the second insulating layer 92 covers the side of the conductive structure 60 facing away from the substrate 11 , so as to insulate and protect the conductive structure 60 through the second insulating layer 92 .
[0108] The side of the second insulating layer 92 facing away from the substrate 11 is sunken with a plurality of grooves corresponding to the depressions on the conductive structure 60. During the manufacturing process, the conductive structure 60 covers the first insulating layer 50 and the detection lead 30, and the detection lead 30 is provided with a spacing groove 40, and the first insulating layer 50 is provided with a first through hole 51 and a second through hole 53. The conductive structure 60 is sunken to form depressions corresponding to the spacing groove 40, the first through hole 51 and the second through hole 53, and the second insulating layer 92 covers the conductive structure 60, and the second insulating layer 92 forms a plurality of grooves corresponding to the depressions on the conductive structure 60.
[0109] The display motherboard 200 includes a light emitting element 80 disposed in a display area 201 and a first encapsulation layer 94 covering the light emitting element 80, and a second insulating layer 92 is disposed in the same layer as the first encapsulation layer 94. When the first encapsulation layer 94 covering the light emitting element 80 is manufactured in the display area 201, the second insulating layer 92 covering the conductive structure 60 can be manufactured in the non-display area 202 at the same time, and there is no need to design a separate process for preparing the second insulating layer 92, so the manufacturing process is simple and convenient.
[0110] Optionally, the display motherboard 200 further includes a light emitting material layer covering between the conductive structure 60 and the second insulating layer 92. When the light emitting element 80 is manufactured through the isolation structure 70, the light emitting functional layer will extend to cover the isolation structure 70, and at the same time, the light emitting material for manufacturing the light emitting functional layer will also extend to cover the top of the conductive structure 60 in the non-display area 202, forming a light emitting material layer on the conductive structure 60.
[0111] Optionally, the display motherboard 200 further includes an electrode material layer covering between the conductive structure 60 and the second insulating layer 92. When the light emitting element 80 is manufactured through the isolation structure 70, the second electrode 86 will extend to cover the isolation structure 70, and at the same time, the electrode material used to manufacture the second electrode 86 in the non-display area 202 will also extend to cover the top of the conductive structure 60, forming an electrode material layer on the conductive structure 60.
[0112] Second, see Figure 1 and Figure 5 According to some embodiments of the present application, a display panel 100 is also provided, wherein the display panel 100 has a display area 201 and a non-display area 202 surrounding the display area 201. The display panel 100 includes a substrate 11, a first detection lead 32 and a first insulating layer 50. The first detection lead 32 is provided on the substrate 11 and is located in the non-display area 202. Before cutting, the first detection lead 32 can be connected to an external detection circuit, thereby applying a voltage to the display motherboard 200 to perform display performance detection. The first insulating layer 50 covers the side of the first detection lead 32 facing away from the substrate 11, so that the first detection lead 32 is covered by the first insulating layer 50 to protect the first detection lead 32.
[0113] Furthermore, the first detection lead 32 has a top surface opposite to the substrate 11 and a side surface 321 intersecting the top surface, and the side surface 321 is located on the side of the first detection lead 32 away from the display area 201 along its own extension direction, that is, the side surface 321 is located at the end of the first detection lead 32 away from the display area 201, facing the outer side wall of the entire display panel 100. The first insulating layer 50 covers the side of the first detection lead 32 facing away from the substrate 11 and extends to cover the side surface 321, so that the first insulating layer 50 can cover the side surface 321 of the first detection lead 32 facing the outer side wall of the display panel 100, and can prevent water and oxygen from corroding the first detection lead 32, and prevent water and oxygen from entering other metal structures arranged on the same layer as the first detection lead 32 to affect the display performance of the display panel 100, thereby improving the reliability of the display panel 100.
[0114] Furthermore, a stepped space 12 is formed between the side surface 321 and the substrate 11, and the first insulating layer 50 covers the side of the first detection lead 32 facing away from the substrate 11 and fills the stepped space 12. This is equivalent to the side surface 321 and the substrate 11 intersecting to form a stepped space 12, and the first insulating layer 50 is filled in the stepped space 12. The first insulating layer can cover the side surface 321 of the first detection lead 32 and the gap between the first detection lead 32 and the substrate 11, thereby preventing external water and oxygen from penetrating into the display panel 100 through the first detection lead 32 and the gap between the first detection lead 32 and the substrate 11, thereby further improving the stability of the display panel 100.
[0115] The first insulating layer 50 includes a first portion 52 and a second portion 54. The first portion 52 covers the side of the first detection lead 32 facing away from the substrate 11, and the second portion 54 is connected to the first portion 52 and filled in the stepped space 12. In this way, the first portion 52 covers the side of the first detection lead 32 facing away from the substrate 11, and the second portion 54 covers the side surface 321 of the first detection lead 32. The first insulating layer 50 can cover the top surface of the first detection lead 32 and the side surface 321 of the first detection lead 32. All positions of the first detection lead 32 in the display panel 100 are wrapped by the first insulating layer 50, thereby preventing the first detection lead 32 from being corroded, thereby improving the reliability of the display panel 100.
[0116] According to some embodiments of the present application, the display motherboard 200 includes an array substrate 10, the array substrate 10 includes a substrate 11 and a first metal layer 23 arranged on the substrate 11, and the detection leads 30 are arranged in the same layer as the first metal layer 23 and are connected to each other.
[0117] That is to say, the display motherboard 200 is provided with an array substrate 10, and the array substrate 10 includes a substrate 11, a semiconductor layer 21, a gate insulating layer 22, a first metal layer 23, a capacitor dielectric layer 24, a second metal layer 25, an interlayer insulating layer 26, a third metal layer 27 and a planarization layer 28 which are stacked in sequence.
[0118] When the first metal layer 23 of the array substrate 10 is manufactured in the display area 201, the detection lead 30 is formed in the non-display area 202 at the same time, and there is no need to separately manufacture the detection lead 30, so the manufacturing process is simple and convenient. At the same time, the detection lead 30 is connected to the transistor 20, and after a voltage is applied to the detection lead 30 through an external detection circuit, the transistor 20 can work under the voltage drive, and then the light-emitting element 80 connected to the transistor 20 can be controlled to emit light, so as to detect whether the display performance of the display motherboard 200 is qualified.
[0119] Furthermore, the display area 201 includes a transistor 20 , and one electrode of the transistor 20 is located in the first metal layer 23 .
[0120] That is, the array substrate 10 includes a substrate 11, a semiconductor layer 21, a gate insulating layer 22, a first metal layer 23, a capacitor dielectric layer 24, a second metal layer 25, an interlayer insulating layer 26, a third metal layer 27 and a planarization layer 28 which are stacked in sequence. Devices of the pixel driving circuit, such as transistors 20 and capacitors, are arranged in the above-mentioned film layers.
[0121] According to some embodiments of the present application, the first insulating layer 50 is arranged in the same layer as at least one insulating layer in the array substrate 10. The array substrate 10 is provided with multiple metal layers and multiple insulating layers that insulate and isolate two adjacent metal layers. In the process of manufacturing the display motherboard 200, the first insulating layer 50 can be arranged in the same layer as at least one insulating layer in the array substrate 10. For example, after forming the first metal layer 23 and the detection lead 30 in the same layer, the insulating layer covering the first metal layer 23 and the first insulating layer 50 covering the detection lead 30 are continuously manufactured in the same layer, so that the manufacturing process can be simplified. It can be understood that the first metal layer 23 includes several layers of sub-insulating layers, the array substrate 10 includes a gate insulating layer 22, a capacitor dielectric layer 24 and an interlayer insulating layer 26, and the several layers of sub-insulating layers are arranged in the same layer as at least one of the gate insulating layer 22, the capacitor dielectric layer 24 and the interlayer insulating layer 26.
[0122] Optionally, the array substrate 10 includes a capacitor dielectric layer 24 and an interlayer insulating layer 26, and the first insulating layer 50 includes a second layer and a third layer stacked in sequence in a direction away from the substrate 11, the second layer is arranged on the same layer as the capacitor dielectric layer 24, and the third layer is arranged on the same layer as the interlayer insulating layer 26. The first insulating layer 50 formed in this way includes two layers, and the manufacturing process of the first insulating layer 50 is merged into the manufacturing process of the array substrate 10, and does not need to be molded separately, thereby simplifying the molding process.
[0123] Also optionally, the array substrate 10 includes a gate insulating layer 22, a capacitor dielectric layer 24 and an interlayer insulating layer 26, and the first insulating layer 50 includes a first layer, a second layer and a third layer stacked in sequence along a direction away from the substrate 11, the first layer is arranged on the same layer as the gate insulating layer 22, the second layer is arranged on the same layer as the capacitor dielectric layer 24, and the third layer is arranged on the same layer as the interlayer insulating layer 26. The first insulating layer 50 formed in this way includes three layers, and the manufacturing process of the first insulating layer 50 is merged into the manufacturing process of the array substrate 10, and does not need to be formed separately, thereby simplifying the molding process.
[0124] As described above, the detection lead 30 is provided with a spacing groove 40 and then filled with the first insulating layer 50, so as to protect the cut section of the display panel 100 and prevent the detection lead 30 from being exposed at the cut section. However, after the spacing groove 40 is provided on the detection lead 30, if the spacing groove 40 penetrates the detection lead 30 along the width and thickness directions of the detection lead 30, the detection lead 30 will be cut into two disconnected parts, and the signal cannot be transmitted normally.
[0125] In some embodiments of the present application, the display panel 100 further includes a first conductive structure 66, which is disposed on the first insulating layer 50, and one end of the first conductive structure 66 at least partially passes through the first insulating layer 50 to be connected to the first detection lead 32, and the other end of the first conductive structure 66 is used to be connected to the detection pad 204. In this way, the first conductive structure 66 is disposed above the first insulating layer 50, and when the display motherboard 200 is not cut, the first detection lead 32 and the detection pad 204 can be connected through the first conductive structure 66, so that the first detection lead 32 can be connected to the detection pad 204, so as to transmit a voltage to the display area 201.
[0126] See also Figure 2 and Figure 5 It can be understood that during the process of cutting the display motherboard 200, the display motherboard 200 is cut from the to-be-cut area a, and the conductive structure 60 in the display motherboard 200 will also be cut, including the first conductive structure 66 located above the first detection lead 32 and the second conductive structure 67 located above the second detection lead 34. The first conductive structure 66 and the second conductive structure 67 on the display motherboard 200 are connected, and the first detection lead 32 and the second detection lead 34 can be connected, thereby ensuring that the detection lead 30 is connected to smoothly perform the detection process. After the detection is completed, the display motherboard 200 is cut, the first conductive structure 66 and the second conductive structure 67 are separated, and the first conductive structure 66 remains in the display panel 100.
[0127] That is, the first conductive structure 66 is a structure remaining in the display panel 100 after the conductive structure 60 in the display motherboard 200 is cut. In the display motherboard 200 before cutting, the first conductive structure 66 is connected to the second conductive structure 67, and the second conductive structure 67 is connected to the second detection lead 34, so that the first conductive structure 66 and the detection pad 204 at the end of the second detection lead 34 can be conductively connected.
[0128] Optionally, the first conductive structure 66 includes a second metal conductive layer 64 and a third metal conductive layer 65 which are stacked in a direction away from the substrate 11, and at least part of the orthographic outer contour of the third metal conductive layer 65 on the substrate 11 is located outside the orthographic outer contour of the second metal conductive layer 64 on the substrate 11, and the third metal conductive layer 65 is larger in area than the second metal conductive layer 64.
[0129] Alternatively, the first conductive structure 66 includes a first metal conductive layer 62, a second metal conductive layer 64, and a third metal conductive layer 65 stacked in a direction away from the substrate 11, and at least part of the orthographic projection outer contours of the first metal conductive layer 62 and the third metal conductive layer 65 on the substrate 11 are located outside the orthographic projection outer contour of the second technical layer on the substrate 11, which is equivalent to the three forming a film layer structure with an "I"-shaped cross section. For example, the materials of the first metal conductive layer 62, the second metal conductive layer 64, and the third metal conductive layer 65 are Mo, Al, and Ti, respectively.
[0130] Specifically, a first through hole 51 corresponding to the first detection lead 32 is opened on the first insulating layer 50, and the first conductive structure 66 at least partially extends into the first through hole 51 and contacts and conducts with the first detection lead 32, so that the first conductive structure 66 and the first detection lead 32 are connected through the first through hole 51, so that the first detection lead 32 can be connected to the external detection circuit through the first conductive structure 66.
[0131] See also Figure 4-Figure 5 According to some embodiments of the present application, the display panel 100 includes an isolation structure 70 and a light-emitting element 80 disposed in the display area 201 . The isolation structure 70 encloses an isolation opening 72 , and the light-emitting element 80 is at least partially disposed in the isolation opening 72 .
[0132] The isolation structure 70 is arranged on the array substrate 10, and the isolation structure 70 has an isolation opening 72 for limiting the light-emitting element 80. The position of the isolation opening 72 is the position of the sub-pixel. During the manufacturing process of the light-emitting element 80, the various film layers in the light-emitting element 80 can be evaporated on the entire surface. At the edge of the isolation structure 70, due to the existence of the step difference, the various film layers of the light-emitting element 80 will be disconnected, so that independent light-emitting elements 80 are formed in each isolation opening 72. In this way, the preparation of the light-emitting element 80 does not require a mask plate, the manufacturing cost is reduced, and the opening area is increased.
[0133] Optionally, the isolation structure 70 includes an isolation body 73 and a blocking portion 75 stacked in a direction away from the substrate 11, and at least a portion of the orthographic outer contour of the blocking portion 75 on the substrate 11 is located outside the orthographic outer contour of the isolation body 73 on the substrate 11, that is, the isolation structure 70 is wide at the top and narrow at the bottom, thereby increasing the isolation effect of the isolation structure 70 on the light-emitting element 80.
[0134] Optionally, the light emitting element 80 includes a first electrode 82, a light emitting functional layer, and a second electrode 86 stacked in a direction away from the substrate 11, and the second electrode 86 is electrically connected to the isolation structure 70. For example, the first electrode 82 may be an anode, and the second electrode 86 may be a cathode. The light emitting functional layer may include a first functional layer, a light emitting layer, and a second functional layer, and the first functional layer, the light emitting layer, and the second functional layer are sequentially stacked on the first electrode 82. The first functional layer may include a hole injection layer, a hole transport layer, an electron blocking layer, etc., and the second functional layer may include an electron injection layer, an electron transport layer, a hole blocking layer, etc.
[0135] It should be noted that, in some embodiments of the present disclosure, the cathodes of sub-pixels can be independently controlled, that is, the cathodes of different sub-pixels will not be electrically connected together directly or indirectly. For example, the cathodes of the sub-pixels can be connected to the external circuit through a separately arranged wiring, or connected to the external circuit through an isolation structure 70 (which can be arranged to include a wiring composed of a conductive portion); or, the cathodes of the respective sub-pixels can be electrically connected to each other to serve as a common electrode. For example, these cathodes can be indirectly connected together through the conductive portion of the isolation structure 70, and then connected to an external control circuit (such as a common electrode line).
[0136] The composition, preparation and other contents of the isolation structure 70 and the light-emitting element 80 mentioned in this embodiment are further described in patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 100935, PCT / CN2024 / 102785, PCT / CN2024 / 099419, PCT / CN2024 / 099072, and CN116685174A for reference.
[0137] See also Figure 4-Figure 5 Optionally, the isolation structure 70 and the first conductive structure 66 are arranged in the same layer, so that when the isolation structure 70 is prepared in the display area 201, the first conductive structure 66 covering the first insulating layer 50 can be formed in the non-display area 202 at the same time. The preparation process of the first conductive structure 66 does not require a separate design process, and the manufacturing process is simple and convenient.
[0138] It should be noted that, in some other embodiments, after the first electrode 82 is provided in the display area 201, a pixel defining layer is provided on the first electrode 82, and then a light-emitting material is evaporated in the pixel opening of the pixel defining layer, and finally the second electrode 86 is deposited to form the light-emitting element 80. The light-emitting element 80 of the display area 201 can be manufactured by a precision mask plate, or by providing an isolation structure 70 and eliminating the precision mask plate. The structure of the display area 201 and the molding method of the light-emitting element 80 are not limited here.
[0139] According to some embodiments of the present application, the display panel 100 further includes a second insulating layer 92 , which covers a side of the first conductive structure 66 facing away from the substrate 11 , so as to insulate and protect the first conductive structure 66 through the second insulating layer 92 .
[0140] The side of the second insulating layer 92 facing away from the substrate 11 is sunken with a plurality of grooves corresponding to the depression on the first conductive structure 66. During the manufacturing process, the first conductive structure 66 covers the first insulating layer 50 and the first detection lead 32, and a step space 12 is formed between the first detection lead 32 and the substrate 11, and a first through hole 51 is opened on the first insulating layer 50. The first conductive structure 66 is sunken to form a depression corresponding to the position of the step space 12 and the first through hole 51, and the second insulating layer 92 covers the first conductive structure 66, and the second insulating layer 92 forms a plurality of grooves corresponding to the depression on the first conductive structure 66.
[0141] The display panel 100 includes a light emitting element 80 disposed in a display area 201 and a first encapsulation layer 94 covering the light emitting element 80, and a second insulating layer 92 is disposed in the same layer as the first encapsulation layer 94. When the first encapsulation layer 94 covering the light emitting element 80 is manufactured in the display area 201, the second insulating layer 92 covering the conductive structure 60 can be manufactured in the non-display area 202 at the same time, and there is no need to design a separate process for preparing the second insulating layer 92, so the manufacturing process is simple and convenient.
[0142] Optionally, the display panel 100 further includes a light emitting material layer covering between the first conductive structure 66 and the second insulating layer 92. When the light emitting element 80 is manufactured through the isolation structure 70, the light emitting functional layer will extend to cover the isolation structure 70, and at the same time, the light emitting material for manufacturing the light emitting functional layer will also extend to cover the top of the first conductive structure 66 in the non-display area 202, forming a light emitting material layer on the first conductive structure 66.
[0143] Optionally, the display panel 100 further includes an electrode material layer covering between the conductive structure 60 and the second insulating layer 92. When the light emitting element 80 is manufactured through the isolation structure 70, the second electrode 86 will extend to cover the isolation structure 70, and at the same time, the electrode material for manufacturing the second electrode 86 will also extend to cover the top of the first conductive structure 66 in the non-display area 202, forming an electrode material layer on the first conductive structure 66.
[0144] In a third aspect, an embodiment of the present application provides a display device, which includes the display panel 100 described in any of the above embodiments.
[0145] The display device can be a laptop computer, a mobile phone, a wireless device, a personal digital assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a watch, a clock, a calculator, a television monitor, a flat-panel display, a computer monitor, a car display (e.g., an odometer display, etc.), a navigator, a cockpit controller and / or display, a display of a camera view (e.g., a display of a rearview camera in a vehicle), an electronic photo, an electronic billboard or sign, a projector, etc.
[0146] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0147] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.
Claims
1. A display motherboard, characterized in that: The display motherboard has a display area and a non-display area surrounding at least a portion of the display area, and the display motherboard includes: substrate; A detection lead is provided on the substrate and located in the non-display area, the detection lead has a top surface opposite to the substrate and a side surface intersecting with the top surface, the side surface is located between two opposite ends of the detection lead itself in an extending direction, and the side surface extends in a direction intersecting with the extending direction of the detection lead; A first insulating layer covers a side of the detection lead facing away from the substrate, and at least a portion of the side surface of the detection lead is covered by the first insulating layer.
2. The display motherboard according to claim 1, characterized in that: A spacing groove is provided on the detection lead, the side surface structure forms a groove wall of the spacing groove close to the display area, and the first insulating layer at least partially fills the spacing groove and covers at least a part of the side surface; Optionally, the spacing groove penetrates the detection lead along a thickness direction of the detection lead and / or a width direction of the detection lead.
3. The display motherboard according to claim 2, characterized in that: The display motherboard has a to-be-cut area, and the orthographic projection of the to-be-cut area on the substrate is located within the orthographic projection of the spacing groove on the substrate; Optionally, an extension direction of the to-be-cut area intersects with an extension direction of the detection lead.
4. The display motherboard according to claim 2, characterized in that: The detection leads include a first detection lead and a second detection lead. The first detection lead is spaced apart from the second detection lead in its extension direction, and the spacing groove is located between the first detection lead and the second detection lead.
5. The display motherboard according to claim 4, characterized in that: The first insulating layer includes a first portion and a second portion, the first portion covers a side of the first detection lead and the second detection lead facing away from the substrate, and the second portion is connected to the first portion and filled in the spacing groove.
6. The display motherboard according to any one of claims 1 to 5, characterized in that: The display motherboard includes an array substrate, the array substrate includes the substrate and a first metal layer arranged on the substrate, the detection lead and the first metal layer are arranged in the same layer and are connected to each other; Optionally, the display area includes a transistor, and one electrode of the transistor is located in the first metal layer.
7. The display motherboard according to claim 6, characterized in that: The first insulating layer is disposed on the same layer as at least one insulating layer in the array substrate; Optionally, the array substrate includes a capacitor dielectric layer and an interlayer insulating layer, the first insulating layer includes a second layer and a third layer stacked in sequence in a direction away from the substrate, the second layer is arranged in the same layer as the capacitor dielectric layer, and the third layer is arranged in the same layer as the interlayer insulating layer; Optionally, the array substrate includes a gate insulation layer, a capacitor dielectric layer and an interlayer insulation layer, the first insulation layer includes a first layer, a second layer and a third layer stacked in sequence along a direction away from the substrate, the first layer is arranged on the same layer as the gate insulation layer, the second layer is arranged on the same layer as the capacitor dielectric layer, and the third layer is arranged on the same layer as the interlayer insulation layer.
8. The display motherboard according to any one of claims 2 to 5, characterized in that: The display motherboard further comprises a conductive structure, which is disposed on the first insulating layer and is connected to the detection leads on opposite sides of the spacing groove along the extending direction of the detection leads; Optionally, the conductive structure comprises a second metal conductive layer and a third metal conductive layer stacked in a direction away from the substrate, and an orthographic projection of the third metal conductive layer on the substrate covers an orthographic projection of the second metal conductive layer on the substrate; Optionally, the conductive structure includes a first metal conductive layer, a second metal conductive layer and a third metal conductive layer stacked in a direction away from the substrate, and the orthographic projections of the first metal conductive layer and the third metal conductive layer on the substrate respectively cover the orthographic projection of the second metal conductive layer on the substrate.
9. The display motherboard according to claim 8, characterized in that: A first through hole and a second through hole are formed on the first insulating layer, and the first through hole and the second through hole are respectively located at two opposite sides of the spacing groove along the extending direction of the detection lead; One end of the conductive structure at least partially extends into the first through hole to be connected to the detection lead on one side of the spacing groove, and the other end of the conductive structure at least partially extends into the second through hole to be connected to the detection lead on the other side of the spacing groove.
10. The display motherboard according to claim 8, characterized in that: The display motherboard includes an isolation structure and a light-emitting element disposed in the display area, the isolation structure encloses an isolation opening, and the light-emitting element is at least partially disposed in the isolation opening; Optionally, the isolation structure comprises an isolation body and a blocking portion stacked in a direction away from the substrate, and at least a portion of an orthographic projection outer contour of the blocking portion on the substrate is located at a periphery of an orthographic projection outer contour of the isolation body on the substrate; Optionally, the light emitting element comprises a first electrode, a light emitting functional portion and a second electrode stacked in a direction away from the substrate, and the second electrode is electrically connected to the isolation structure; Optionally, the isolation structure and the conductive structure are arranged in the same layer.
11. The display motherboard according to claim 8, characterized in that: The display motherboard further comprises a second insulating layer, wherein the second insulating layer covers a side of the conductive structure facing away from the substrate; Optionally, the display motherboard includes a light emitting element disposed in the display area and a first packaging layer covering the light emitting element, and the second insulating layer is disposed on the same layer as the first packaging layer; Optionally, the display motherboard further includes a light emitting material layer covering between the conductive structure and the second insulating layer; Optionally, the display motherboard further includes an electrode material layer covering between the conductive structure and the second insulating layer.
12. A display panel, characterized in that: The display panel has a display area and a non-display area surrounding the display area, and the display panel includes: substrate; A first detection lead is provided on the substrate and is located in the non-display area; the first detection lead has a top surface opposite to the substrate and a side surface intersecting the top surface, and the side surface is located on a side of the first detection lead away from the display area along its own extension direction; A first insulating layer covers a side of the first detection lead facing away from the substrate and extends to cover the side surface.
13. The display panel according to claim 12, characterized in that: A stepped space is formed between the side surface and the substrate, and the first insulating layer covers a side of the first detection lead facing away from the substrate and fills the stepped space.
14. The display panel according to claim 13, characterized in that: The first insulating layer includes a first portion and a second portion, the first portion covers a side of the first detection lead facing away from the substrate, and the second portion fills the stepped space.
15. The display panel according to claim 12, characterized in that: The display panel comprises an array substrate, the array substrate comprises the substrate and a first metal layer arranged on the substrate, the detection lead and the first metal layer are arranged in the same layer and are connected to each other; Optionally, the display area includes a transistor, and one electrode of the transistor is located in the first metal layer.
16. The display panel according to any one of claims 12 to 15, characterized in that: The display panel further includes a first conductive structure, which is disposed on the first insulating layer, and one end of the first conductive structure at least partially passes through the first insulating layer to be connected to the first detection lead, and the other end of the first conductive structure is used to be connected to the detection pad; Optionally, the first conductive structure comprises a second metal conductive layer and a third metal conductive layer stacked in a direction away from the substrate, and at least a portion of an orthographic projection outer contour of the third metal conductive layer on the substrate is located outside an orthographic projection outer contour of the second metal conductive layer on the substrate; Optionally, the first conductive structure includes a first metal conductive layer, a second metal conductive layer and a third metal conductive layer stacked in a direction away from the substrate, and at least part of the orthographic outer contours of the first metal conductive layer and the third metal conductive layer on the substrate are located outside the orthographic outer contour of the second metal conductive layer on the substrate.
17. The display panel according to claim 16, characterized in that: A first through hole corresponding to the first detection lead is formed on the first insulating layer, and the first conductive structure at least partially extends into the first through hole and contacts and conducts with the first detection lead.
18. The display panel according to claim 16, characterized in that: The display panel further comprises an electrical isolation structure and a light emitting element disposed in the display area, the isolation structure encloses an isolation opening, and the light emitting element is at least partially disposed in the isolation opening; Optionally, the isolation structure comprises an isolation body and a blocking portion stacked in a direction away from the substrate, and at least a portion of an orthographic projection outer contour of the blocking portion on the substrate is located at a periphery of an orthographic projection outer contour of the isolation body on the substrate; Optionally, the light emitting element comprises a first electrode, a light emitting functional portion and a second electrode stacked in a direction away from the substrate, and the second electrode is electrically connected to the isolation structure; Optionally, the isolation structure and the first conductive structure are arranged in the same layer.
19. The display panel according to claim 16, characterized in that: The display panel further comprises a second insulating layer, wherein the second insulating layer covers a side of the first conductive structure facing away from the substrate; Optionally, a side of the second insulating layer facing away from the substrate is sunken to form a plurality of grooves corresponding to the depressions on the first conductive structure; Optionally, the display panel includes a light emitting element disposed in the display area and a first encapsulation layer covering the light emitting element, and the second insulating layer is disposed on the same layer as the first encapsulation layer; Optionally, the display panel further includes a light emitting material layer covering between the first conductive structure and the second insulating layer; Optionally, the display panel further includes an electrode material layer covering between the first conductive structure and the second insulating layer.
20. A display device, characterized in that: A display panel comprising any one of claims 12-19.
Citation Information
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