Measuring device and measuring method for measuring dropped voltage in optical system, optical system and lithographic system

Abstract

The invention relates to a measuring device (400) for an optical system (300), comprising: an input node (K1) for receiving a voltage (V2) dropped in the optical system (300); a capacitive voltage divider (410) connectable to the input node (K1) and comprising a series circuit consisting of at least two capacitors (C1, C2) comprising a measurement capacitor (C2) wherein the capacitive voltage divider (410) is designed to provide a measurement voltage (V3) dropped at the measurement capacitor (C2), the measured voltage is lower than the voltage (V2) received at the input node (K1) and is proportional to the voltage (V2) received at the input node (K1); and a controllable first switch (S1) coupled between the input node (K1) and the capacitive voltage divider (410) and designed to connect the capacitive voltage divider (410) to the input node (K1) based on a control signal (SE1).

Description

Technical Field

[0001] The present invention relates to a measuring device for measuring a voltage drop in an optical system, an optical system comprising such a measuring device, and a lithographic apparatus comprising such an optical system. Furthermore, the present invention relates to a measuring method for measuring a voltage drop in an optical system.

[0002] The content of the priority application DE 10 2022 210 274.6 is hereby fully incorporated by reference. Background Art

[0003] Microlithography apparatuses comprising actuatable optical elements, such as microlens arrays or micromirror arrays, are known. Microlithography is used to produce microstructured components, such as integrated circuits. The microlithography process is performed using a lithography apparatus, which comprises an illumination system and a projection system.

[0004] Driven by the desire for ever smaller structures in the production of integrated circuits, EUV lithography equipment is currently being developed that uses light with a wavelength in the range of 0.1 nm to 30 nm, in particular 13.5 nm. Since most materials absorb light of this wavelength, in such EUV lithography equipment, reflective optical units, i.e. mirrors, must be used instead of refractive optical units, i.e. lens elements, as previously used.

[0005] The image of the mask (reticle) illuminated by the illumination system is projected by a projection system onto a substrate (e.g. a silicon wafer) which is coated with a photosensitive layer (photoresist) and arranged in the image plane of the projection system so that the mask structure is transferred to the photosensitive coating of the substrate. Actuable optical elements can be used to improve the imaging of the mask on the substrate. For example, wavefront aberrations during exposure can be compensated, which lead to an enlarged and / or blurred image representation.

[0006] For example, MEMS actuators (MEMS; micro-electromechanical systems) or PMN actuators (PMN; lead magnesium niobate) can be used as actuators. PMN actuators enable distance positioning in the submicrometer range or in the subnanometer range. In this case, a DC voltage applied to an actuator (which has actuator elements stacked one above the other) causes the actuator to experience a force that causes a specific linear expansion. The position set by a DC voltage (DC; direct current) can be adversely affected by external electromechanical crosstalk at the fundamentally occurring resonance points of the actuator driven by the DC voltage. A MEMS mirror and an actuator suitable for driving a MEMS mirror are described, for example, in DE 10 2016 213 025 A1.

[0007] For precise actuator control, such as for multiple MEMS mirrors, a class A amplifier is advantageous as an output stage because of the low signal distortion. However, such actuators require relatively high drive voltages.

[0008] In contrast, data processing systems for optical systems, such as control loops, require signals in a significantly lower voltage range. Therefore, in order to be able to properly measure the voltage drop across the actuator and to break the voltage down to the necessary signal processing levels, a measurement circuit is used, usually based on a resistor divider. The resistor divider enables the voltage to be scaled down from a higher level to a lower level so that it can be properly processed.

[0009] However, especially in drive devices or amplifier circuits for driving actuators with high voltages and requiring the lowest possible power losses, the resistor divider must be designed with a very high resistance. However, the resistor noise depends linearly on the size of the resistor. This means that the larger the resistor, the greater the noise power. Moreover, such large resistor values ​​of at least 10 megohms, preferably at least 70 megohms, are usually not available in ASIC circuits or are available only at very high cost. Summary of the invention

[0010] Against this background, it is an object of the present invention to improve the measurement of voltage drops in optical systems.

[0011] According to a first aspect, a measuring device for an optical system is provided. The measuring device comprises:

[0012] an input node for receiving a voltage dropped in the optical system,

[0013] a capacitive voltage divider connectable to the input node, having a series circuit formed by at least two capacitors including a measuring capacitor, wherein the capacitive voltage divider is configured to provide a measuring voltage dropped across the measuring capacitor that is less than and proportional to the voltage received at the input node, and

[0014] A controllable switch is coupled between the input node and the capacitive voltage divider and is configured to connect the capacitive voltage divider to the input node according to a control signal.

[0015] The measuring device is in particular a measuring branch or part of a control loop of a drive device for driving an actuator of an optical system. The voltage dropped in the optical system is, for example, a drive voltage for the actuator, which is provided by the drive device, for example an amplifier circuit or an output stage.

[0016] The present measuring device with its capacitive voltage divider results in low power losses, which are significantly lower than the power losses of conventional resistive voltage dividers, and low noise. This is particularly advantageous when integrating the measuring device in a measuring branch or control loop of a drive device with high voltages and low currents. The lower power losses allow the cooling system of the optical system to be simplified, which saves costs.

[0017] The present measuring device may also be referred to as a measuring circuit or a measuring circuit with an integrated capacitive voltage divider. The present capacitive voltage divider is switched via a plurality of switches (eg transistors). Therefore, the capacitive voltage divider may also be referred to as a switched capacitive voltage divider.

[0018] The actuator is in particular a MEMS actuator, a capacitive actuator, such as a PMN actuator (PMN; lead magnesium niobate), or a PZT actuator (PZT; lead zirconate titanate), or a LiNbO3 (lithium niobate) actuator. The actuator is in particular configured to actuate an optical element of the optical system. Examples of such optical elements include lens elements, mirrors and adaptive mirrors.

[0019] The optical system is preferably a projection optical unit of a lithography apparatus or a projection exposure apparatus. However, the optical system may also be an illumination system. The projection exposure apparatus may be an EUV lithography apparatus. EUV stands for "extreme ultraviolet" and indicates a wavelength of the working light between 0.1 nm and 30 nm. The projection exposure apparatus may also be a DUV lithography apparatus. DUV stands for "deep ultraviolet" and indicates a wavelength of the working light between 30 nm and 250 nm.

[0020] According to one embodiment, the capacitive voltage divider is coupled between the first switch and ground, the first capacitor of the series circuit is coupled between the first switch and a connection node connecting the first capacitor and a measuring capacitor, the measuring capacitor is coupled between the connection node and ground, the second switch is coupled in parallel with the first capacitor between the first switch and the connection node, and the third switch is coupled in parallel with the measuring capacitor between the connection node and ground.

[0021] Depending on the switch state (on / off), the first switch is configured to connect the capacitive voltage divider to the first node and thus to the drive device or to decouple it from the latter. In order to set the desired switch state, the first switch is driven by a control signal, which is also referred to as the first control signal hereinafter. The second switch is particularly configured to short-circuit the first capacitor according to the switch state (on / off). The third switch is configured to short-circuit the measuring capacitor according to the switch state (on / off). The second switch and the third switch are driven by corresponding control signals. In an embodiment, the second switch and the third switch can also be driven with the same control signal, which is also referred to as the second control signal hereinafter. In the present case, ground can also be referred to as ground potential. In the present case, ground is a reference potential. The latter can but does not have to be connected to the ground potential.

[0022] According to another embodiment, the measuring device comprises a buffer storage capacitor connected between the output node and ground. The buffer storage capacitor can be connected in parallel with the measuring capacitor via a fourth switch coupled between the connection node and the output node. The buffer storage capacitor can also be embodied as a sample and hold circuit.

[0023] According to another embodiment, the buffer storage capacitor is configured for buffering and maintaining a voltage level of the measurement voltage between switching operations performed by the first switch, by the second switch, by the third switch and / or by the fourth switch.

[0024] In order to be able to provide the measurement voltage also on the output side, for example to another circuit part of the optical system, between or after the switching operations, a buffer storage capacitor is advantageous.

[0025] According to a further embodiment, the capacitance of the measuring capacitor is greater than the capacitance of the buffer storage capacitor.

[0026] Preferably, the capacitance of the measuring capacitor is at least ten times greater than the capacitance of the buffer storage capacitor. In order to reduce errors, the buffer storage capacitor has a significantly lower capacitance than the measuring capacitor.

[0027] According to a further embodiment, an impedance converter is connected to the output node.The impedance converter is configured to forward the measurement voltage provided at the buffer storage capacitor to at least one further circuit part of the optical system.

[0028] For example, the further circuit part is part of a control loop or a feedback loop of a drive device for driving an actuator.

[0029] In a further embodiment, the measuring device is part of or is connected to a diagnostic unit for performing a diagnostic of the optical system based on the voltage dropped across the actuator.

[0030] According to another embodiment, the first switch is formed as a field effect transistor, in particular as a MOSFET. In this case, preferably a plurality of field effect transistors are provided for setting the gate voltage of the field effect transistor forming the first switch. For example, two field effect transistors are provided for setting the gate voltage of the field effect transistor forming the first switch.

[0031] According to another embodiment, the capacitive voltage divider comprises a field effect transistor coupled between the first switch and the connection node, the field effect transistor forming the second switch and being formed in such a way that its parasitic capacitance constitutes the first capacitor. Furthermore, the capacitive voltage divider comprises a field effect transistor coupled between the connection node and ground, the field effect transistor forming the third switch.

[0032] Therefore, the field effect transistor coupled between the first switch and the connection node not only forms the second switch, but also forms the first capacitor. This saves components and thus saves costs. In addition, space is advantageously saved in this embodiment.

[0033] According to a further embodiment, the bootstrap circuit is connected between the source terminal of the field effect transistor forming the second switch, the connection node and the source terminal of the field effect transistor forming the third switch. The bootstrap circuit functions in particular as a protection circuit and is adapted to safely switch off the field effect transistor forming the second switch.

[0034] According to a further embodiment, the diode of the bootstrap circuit is connected in blocking direction between the source terminal of the field effect transistor forming the second switch and the source terminal of the field effect transistor forming the third switch. The resistor of the bootstrap circuit is connected between the source terminal of the field effect transistor forming the second switch and the connection node.

[0035] According to another embodiment, the fourth switch is formed as a MOSFET switch comprising a plurality of MOSFETs.

[0036] According to a second aspect, an optical system comprising a plurality of actuatable optical elements is proposed, wherein an actuator is assigned to each of the plurality of actuatable optical elements, wherein a driving device for driving the actuator is assigned to each actuator, the driving device comprising an output stage configured to amplify an input voltage into a driving voltage for the actuator using a quiescent current of the output stage, and a measuring device according to the first aspect or one of the embodiments of the first aspect is provided, the input node of the measuring device being configured to receive the driving voltage for the actuator, and the capacitive voltage divider of the measuring device being configured to provide a measurement voltage dropped across a measurement capacitor of the capacitive voltage divider, the measurement voltage being less than the driving voltage received at the input node and proportional to the driving voltage received at the input node.

[0037] The optical system comprises in particular a micromirror array and / or a microlens array having a plurality of optical elements which can be actuatable independently of one another.

[0038] In an embodiment, actuator groups may be defined, wherein all actuators of a group are assigned the same drive means.

[0039] According to one embodiment, the output stage comprises an amplifier of class A. Class A amplifiers exhibit only little signal distortion and thus provide precise actuator control.

[0040] According to one embodiment, the output stage comprises a class AB amplifier.The class AB amplifier is a suitable alternative to the proposed class A amplifier.

[0041] According to one embodiment, the optical system is in the form of an illumination optics unit or in the form of a projection optics unit of a lithographic apparatus.

[0042] According to a further embodiment, the optical system comprises a vacuum housing in which the actuatable optical element, the assigned actuator, the drive device and the measuring device are arranged.

[0043] According to a third aspect, a lithographic apparatus is proposed, comprising an optical system according to the second aspect or according to one of the embodiments of the second aspect.

[0044] The lithography equipment is, for example, an EUV lithography equipment or a DUV lithography equipment. The working light of the EUV lithography equipment is in the wavelength range of 0.1 nm to 30 nm, and the working light of the DUV lithography equipment is in the wavelength range of 30 nm to 250 nm.

[0045] According to a fourth aspect, a measuring method for measuring a voltage drop in an optical system by means of a measuring device according to the first aspect or according to one of the embodiments of the first aspect is proposed. The measuring method comprises the following steps:

[0046] a) switching on the first switch and switching off the second switch and the third switch during a first time period so that the first capacitor and the measuring capacitor are charged by means of the voltage received at the input node,

[0047] b) switching on the fourth switch during the second time period to charge the buffer storage capacitor so that the voltage dropped across the buffer storage capacitor corresponds to the voltage dropped across the measuring capacitor, and

[0048] c) During a third time period, the second switch and the third switch are turned on and the first switch and the fourth switch are turned off to discharge the first capacitor and the measuring capacitor to a predetermined level.

[0049] The method has the corresponding advantages already explained with respect to the measuring device according to the first aspect. The embodiments described with respect to the measuring device apply correspondingly to the proposed method.

[0050] In the present case, "one", "a" or "an" should not be understood as being limited to only one element. Instead, multiple elements may be provided, such as two, three or more. Any other number used herein should also not be understood as having the effect of limiting the exact stated number of elements. Instead, unless otherwise indicated, upward and downward numerical deviations are possible.

[0051] Other possible implementations of the present invention also include combinations not explicitly mentioned of features or embodiments described above or below with respect to the exemplary embodiments. Those skilled in the art will also add individual aspects as improvements or supplements to the corresponding basic forms of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Further advantageous configurations and aspects of the invention are the subject matter of the dependent claims and of the exemplary embodiments of the invention described below.The invention is explained in more detail below based on preferred embodiments with reference to the drawings.

[0053] Figure 1 shows a schematic meridional cross section of a projection exposure apparatus for EUV projection lithography;

[0054] Figure 2 A schematic diagram of one embodiment of an optical system is shown;

[0055] Figure 3 A schematic block diagram of another embodiment of an optical system is shown, the optical system comprising a drive device and a measuring device for measuring a voltage dropped in the optical system;

[0056] Figure 4 A schematic flow chart showing an embodiment of a measurement method for measuring a voltage drop in an optical system; and

[0057] Figure 5 A schematic block diagram of another embodiment of an optical system is shown, which comprises a drive device and a measuring device for measuring a voltage dropped in the optical system.

[0058] In the figures, identical or functionally identical elements have the same reference numerals unless otherwise indicated. Furthermore, it should be noted that the illustrations in the figures are not necessarily true to scale. DETAILED DESCRIPTION

[0059] Figure 1An embodiment of a projection exposure apparatus 1 (lithography apparatus), in particular an EUV lithography apparatus, is shown. An embodiment of an illumination system 2 of the projection exposure apparatus 1 has, in addition to a light source or radiation source 3, an illumination optical unit 4 for illuminating an object field 5 in an object plane 6. In an alternative embodiment, the light source 3 can also be provided as a module separate from the rest of the illumination system 2. In this case, the illumination system 2 does not comprise the light source 3.

[0060] A reticle 7 arranged in the object field 5 is exposed. The reticle 7 is held by a reticle holder 8. The reticle holder 8 is displaceable by a reticle displacement drive 9, in particular in a scanning direction.

[0061] For the purpose of explanation, Figure 1 A Cartesian coordinate system with an x-direction x, a y-direction y and a z-direction z is shown. The x-direction x extends vertically into the plane of the drawing. The y-direction y extends horizontally and the z-direction z extends vertically. The scanning direction is along Figure 1 The z direction z extends perpendicular to the object plane 6.

[0062] The projection exposure apparatus 1 comprises a projection optical unit 10. The projection optical unit 10 serves to image the object field 5 into an image field 11 in an image plane 12. The image plane 12 extends parallel to the object plane 6. Alternatively, angles between the object plane 6 and the image plane 12 other than 0° are also possible.

[0063] The structures on the reticle 7 are imaged onto a photosensitive layer of a wafer 13 arranged in the region of an image field 11 in an image plane 12. The wafer 13 is held by a wafer holder 14. The wafer holder 14 can be displaced, in particular in the y direction y, by a wafer displacement drive 15. It can be achieved that firstly the reticle 7 is moved by the reticle displacement drive 9 and secondly the wafer 13 is moved by the wafer displacement drive 15 so as to be synchronized with each other.

[0064] The light source 3 is an EUV radiation source. The light source 3 in particular emits EUV radiation 16, which is also referred to below as used radiation, illumination radiation or illumination light. The used radiation 16 has in particular a wavelength in the range between 5 nm and 30 nm. The light source 3 can be a plasma source, such as an LPP (abbreviation: laser produced plasma) source or a DPP (abbreviation: gas discharge produced plasma) source. It can also be a synchrotron-based radiation source. The light source 3 can be a FEL (abbreviation: free electron laser).

[0065] The illumination radiation 16 emitted from the light source 3 is focused by a light collector 17. The light collector 17 may be a light collector having one or more elliptical and / or hyperbolic reflective surfaces. The illumination radiation 16 may impinge on at least one reflective surface of the light collector 17 at grazing incidence (abbreviated as: GI) (that is, an angle of incidence greater than 45°) or at normal incidence (abbreviated as: NI) (that is, an angle of incidence less than 45°). The light collector 17 may firstly be constructed and / or coated to optimize its reflectivity for the radiation used and secondly to suppress extraneous light.

[0066] Downstream of the light collector 17, the illumination radiation 16 propagates through an intermediate focus in an intermediate focal plane 18. The intermediate focal plane 18 may represent a separation between the radiation source module comprising the light source 3 and the light collector 17 and the illumination optical unit 4.

[0067] The illumination optical unit 4 comprises a deflection mirror 19 and a first facet mirror 20 which is arranged downstream of the deflection mirror 19 in the beam path. The deflection mirror 19 can be a plane deflection mirror or, alternatively, a mirror which has a beam influencing effect that goes beyond a pure deflection effect. Alternatively or additionally, the deflection mirror 19 can be embodied as a spectral filter which separates the used light wavelength of the illumination radiation 16 from extraneous light having a wavelength deviating therefrom. If the first facet mirror 20 is arranged in a plane of the illumination optical unit 4 which is optically conjugate to the object plane 6 as a field plane, this facet mirror is also referred to as a field facet mirror. The first facet mirror 20 comprises a plurality of individual first facets 21 which can also be referred to as field facets. Only some of these first facets 21 are in the Figure 1 It is shown by way of example.

[0068] The first facet 21 can be implemented as a macro facet, in particular as a rectangular facet or as a facet with an arcuate or partially circular edge contour. The first facet 21 can be implemented as a plane facet or alternatively as a convexly or concavely curved facet.

[0069] As known, for example, from DE 10 2008 009 600 A1, the first facets 21 themselves can also be respectively composed of a plurality of individual mirrors, in particular a plurality of micromirrors. In particular, the first facet mirrors 20 can be in the form of a microelectromechanical system (MEMS system). For details, reference is made to DE 10 2008 009 600 A1.

[0070] The illuminating radiation 16 propagates horizontally, ie along the y-direction y, between the light collector 17 and the deflection mirror 19 .

[0071] In the beam path of the illumination optical unit 4, the second facet reflector 22 is arranged downstream of the first facet reflector 20. If the second facet reflector 22 is arranged in the pupil plane of the illumination optical unit 4, it is also called a pupil facet reflector. The second facet reflector 22 can also be arranged at a distance from the pupil plane of the illumination optical unit 4. In this case, the combination of the first facet reflector 20 and the second facet reflector 22 is also called a specular reflector. Specular reflectors are known from US 2006 / 0132747 A1, EP 1 614 008 B1 and US 6,573,978.

[0072] The second facet mirror 22 comprises a plurality of second facets 23. In the case of a pupil facet mirror, the second facets 23 are also called pupil facets.

[0073] The second facets 23 can likewise be macroscopic facets which can have, for example, circular, rectangular or hexagonal boundaries, or can alternatively be facets consisting of micromirrors. In this respect, reference is likewise made to DE 10 2008 009 600 A1.

[0074] The second facet 23 may have a planar or alternatively convexly or concavely curved reflective surface.

[0075] The illumination optical unit 4 thus forms a two-faceted system. This basic principle is also known as a fly's eye collector (or fly's eye integrator).

[0076] It may be advantageous to arrange the second facet mirror 22 imprecisely in a plane optically conjugate to the pupil plane of the projection optical unit 10. In particular, the second facet mirror 22 may be arranged tilted relative to the pupil plane of the projection optical unit 10, as described, for example, in DE 10 2017 220 586 A1.

[0077] The individual first facets 21 are imaged into the object field 5 by means of the second facet mirror 22. The second facet mirror 22 is the last beam-shaping mirror in the beam path upstream of the object field 5 or indeed the last mirror for the illumination radiation 16.

[0078] In a further embodiment (not shown) of the illumination optical unit 4, a transfer optical unit, which in particular contributes to the imaging of the first facet 21 into the object field 5, can be arranged in the beam path between the second facet mirror 22 and the object field 5. The transfer optical unit can have exactly one mirror, or alternatively two or more mirrors, which are arranged successively in the beam path of the illumination optical unit 4. The transfer optical unit can in particular comprise one or two normal incidence mirrors (NI mirrors) and / or one or two grazing incidence mirrors (GI mirrors).

[0079] exist Figure 1In the embodiment shown, the illumination optical unit 4 has, downstream of the light collector 17 , exactly three mirrors, in particular a deflection mirror 19 , a first facet mirror 20 and a second facet mirror 22 .

[0080] In another embodiment of the illumination optical unit 4 , the deflection mirror 19 can also be omitted and the illumination optical unit 4 can therefore then have exactly two mirrors downstream of the light collector 17 , specifically a first facet mirror 20 and a second facet mirror 22 .

[0081] The imaging of the first facet 21 into the object plane 6 by the second facet 23 or using the second facet 23 and the transfer optics is usually only an approximate imaging.

[0082] The projection optical unit 10 comprises a plurality of mirrors Mi which are numbered consecutively according to their arrangement in the beam path of the projection exposure apparatus 1 .

[0083] exist Figure 1 In the example shown, the projection optical unit 10 comprises six mirrors M1 to M6. Alternative solutions with four, eight, ten, twelve or any other number of mirrors Mi are also possible. The projection optical unit 10 is a doubly shielded optical unit. The penultimate mirror M5 and the last mirror M6 each have a passage opening for the illumination radiation 16. The projection optical unit 10 has an image-side numerical aperture which is greater than 0.5 and can also be greater than 0.6 and can be, for example, 0.7 or 0.75.

[0084] The reflective surface of the reflector Mi can be embodied as a free-form surface without an axis of rotational symmetry. Alternatively, the reflective surface of the reflector Mi can be designed as an aspherical surface with exactly one axis of rotational symmetry of the reflective surface shape. Just like the reflectors of the illumination optical unit 4, the reflector Mi can have a highly reflective coating for the illumination radiation 16. These coatings can be designed as multilayer coatings, in particular with alternating layers of molybdenum and silicon.

[0085] The projection optical unit 10 has a large object-image offset in the y direction y between the y coordinate of the center of the object field 5 and the y coordinate of the center of the image field 11. This object-image offset in the y direction y can have approximately the same magnitude as the z distance between the object plane 6 and the image plane 12.

[0086] In particular, the projection optical unit 10 may have a deformed configuration. It has different imaging ratios βx, βy in particular in the x-direction x and the y-direction y. The two imaging ratios βx, βy of the projection optical unit 10 are preferably (βx, βy) = (+ / -0.25, + / -0.125). A positive imaging ratio β means imaging without image inversion. A negative sign of the imaging ratio β means imaging with image inversion.

[0087] The projection optical unit 10 thus results in a reduction in size in the x-direction x, ie in a direction perpendicular to the scanning direction, by a ratio of 4:1.

[0088] The projection optical unit 10 results in a reduction in size of 8:1 in the y-direction y, ie in the scanning direction.

[0089] Other imaging ratios are likewise possible. Imaging ratios with the same sign and the same absolute value in the x-direction x and the y-direction y are also possible, for example with an absolute value of 0.125 or 0.25.

[0090] The number of intermediate image planes in the x-direction x and in the y-direction y in the beam path between the object field 5 and the image field 11 may be the same or may be different, depending on the embodiment of the projection optical unit 10. Examples of projection optical units with different numbers of such intermediate images in the x-direction x and in the y-direction y are known from US 2018 / 0074303 A1.

[0091] In each case, one of the second facets 23 is assigned to exactly one of the first facets 21 in order to form in each case an illumination channel for illuminating the object field 5. This can in particular produce an illumination according to the Köhler principle. The far field is decomposed into a plurality of object fields 5 by means of the first facets 21. The first facets 21 produce a plurality of images of the intermediate focus on the second facets 23 respectively assigned to them.

[0092] The first facets 21 are each imaged onto the reticle 7 and overlap each other via the assigned second facets 23 for the purpose of illuminating the object field 5. The illumination of the object field 5 is in particular as homogeneous as possible. It preferably has a homogeneity error of less than 2%. Field homogeneity can be achieved by overlaying different illumination channels.

[0093] The illumination of the entrance pupil of the projection optical unit 10 can be geometrically defined by the arrangement of the second facets 23. The intensity distribution in the entrance pupil of the projection optical unit 10 can be set by selecting the illumination channels, in particular the subset of the second facets 23, through which the light is guided. This intensity distribution is also referred to as illumination setting or illumination pupil filling.

[0094] An equally preferred pupil homogeneity in the region of the portion of the illumination pupil of the illumination optical unit 4 which is illuminated in a defined manner can be achieved by redistribution of the illumination channels.

[0095] Further aspects and details of the illumination of the object field 5 and in particular of the entrance pupil of the projection optical unit 10 are described below.

[0096] The projection optical unit 10 may in particular have a concentric entrance pupil. The latter may be accessible. It may also be inaccessible.

[0097] The entrance pupil of the projection optical unit 10 cannot usually be accurately illuminated by the second facet mirror 22. In the case of imaging the projection optical unit 10 by telecentrically imaging the center of the second facet mirror 22 onto the wafer 13, the aperture rays usually do not intersect at a single point. However, a region can be found in which the spacing of the aperture rays determined in pairs becomes minimal. This region represents the entrance pupil or a region conjugate therewith in real space. In particular, this region exhibits a finite curvature.

[0098] It may be the case that the projection optical unit 10 has different positions of the entrance pupil for the tangential beam path and for the sagittal beam path. In this case, an imaging element, in particular an optical component of the transfer optical unit, should be provided between the second facet mirror 22 and the reticle 7. With the aid of this optical element, different positions of the tangential entrance pupil and the sagittal entrance pupil can be taken into account.

[0099] exist Figure 1 In the arrangement of the components of the illumination optical unit 4 shown, the second facet mirror 22 is arranged in a region conjugate with the entrance pupil of the projection optical unit 10. The first facet mirror 20 is arranged tilted relative to the object plane 6. The first facet mirror 20 is arranged tilted relative to the arrangement plane defined by the deflection mirror 19. The first facet mirror 20 is arranged tilted relative to the arrangement plane defined by the second facet mirror 22.

[0100] Figure 2 A schematic diagram showing an embodiment of an optical system 300 for a lithographic apparatus or a projection exposure apparatus 1, for example Figure 1 In addition, for example, Figure 2 The optical system 300 in FIG. 3 can also be used in a DUV lithography device.

[0101] Figure 2 The optical system 300 in FIG. 3 has a plurality of actuatable optical elements 310. The optical system 300 is formed as a micro-mirror array, wherein the optical elements 310 are micro-mirrors. Each micro-mirror 310 can be actuated by means of the assigned actuator 200. For example, the corresponding micro-mirror 310 can be tilted around two axes and / or displaced on one, two or three spatial axes by means of the assigned actuator 200. For the sake of clarity, only the topmost row of reference numerals of these elements are depicted.

[0102] The drive device 100 drives the corresponding actuator 200 (see, for example, Figure 3 and Figure 4 ). The position of the corresponding micro-mirror 310 is thereby set. Figure 3 and Figure 4 The driving device 100 will be described.

[0103] Figure 3 1 shows a schematic block diagram of another embodiment of an optical system 300, the optical system 300 comprising a driving device 100 and a measuring device 400 for measuring a voltage V2 dropped in the optical system 300. Figure 3 and Figure 5 The embodiments are capacitive actuators, and in these Figure 3 and Figure 5 is depicted as a capacitor. Figure 3 The driving device 100 includes an output stage 110 and a providing device 120 .

[0104] The output stage 110 is configured to amplify the input voltage V1 into a drive voltage V2 for the actuator 200 using a quiescent current I1 of the output stage 110. The output stage 110 is preferably formed as a class A amplifier and includes a transistor. For example, the transistor is a field effect transistor (FET). Alternatively, the transistor may also be formed as a bipolar transistor. As an alternative to the class A amplifier, the output stage 110 may also be formed as a class AB amplifier.

[0105] The output stage 110 includes a node for receiving an input voltage V1, a node K1 for providing a driving voltage V2 to the actuator 200, and a transistor coupled between the input node and the node K2 for amplifying the input voltage V1 to the driving voltage V2. The providing device 120 is suitable for providing a quiescent current I1 for the output stage 120 and feeding it into the node K1. For this purpose, the providing device 120 includes, for example, a current mirror (not shown).

[0106] like Figure 3 As shown, the optical system 300 further comprises a measuring device 400. The measuring device 400 is suitable for measuring the driving voltage V2.

[0107] For this purpose, the measuring device 400 comprises an input node K1 for receiving the driving voltage V2, a capacitive voltage divider 410 connectable to the input node K1, and a controllable first switch S1 coupled between the input node K1 and the capacitive voltage divider 410. The controllable first switch S1 is configured to connect the capacitive voltage divider 410 to the input node K1 according to a first control signal SE1.

[0108] like Figure 3As shown, the capacitive voltage divider 410 is coupled between the first switch S1 and the ground, and includes a series circuit formed by two capacitors C1 and C2. The two capacitors C1 and C2 include a first capacitor C1 and a measuring capacitor C2. The capacitive voltage divider 410 is configured to provide a measurement voltage V3 that drops across the measuring capacitor C2, and the measurement voltage is less than and proportional to the driving voltage V2 received at the input node K1. Examples of the voltage range of the input voltage V1 are 0-5V, 0-3.3 V, and 0-1.8 V. Examples of the voltage range of the driving voltage V2 include 0-200V and 0-140V. Examples of the voltage range of the measuring voltage V3 are 0-5V, 0-3.3 V, and 0-1.8 V.

[0109] The first capacitor C1 is coupled between the first switch S1 and a connection node K2 connected to the first capacitor C1 and the measuring capacitor C2. The measuring capacitor C2 is coupled between the connection node K2 and ground.

[0110] In addition, the capacitive voltage divider 410 includes a second switch S2 and a third switch S3. The second switch S2 is connected in parallel with the first capacitor C1 between the first switch S1 and the connection node K2. The third switch S3 is connected in parallel with the measurement capacitor C2 between the connection node K2 and the ground. The second switch S2 has a function of short-circuiting the first capacitor C1 when turned on. Accordingly, the third switch S3 has a function of short-circuiting the measurement capacitor C2 when turned on. The resistor R2 is connected in series with the second switch S2. Accordingly, the resistor R3 is connected in series with the third switch S3.

[0111] also, Figure 3 The measuring device 400 in the embodiment comprises a buffer storage capacitor C3 connected between the output node K3 and the ground. The buffer storage capacitor C3 can be connected in parallel with the measuring capacitor C2 via a fourth switch S4 coupled between the connection node K2 and the output node K3. If the switch S4 is turned on, the buffer storage capacitor C3 is connected to the capacitive voltage divider 410. However, if the switch S4 is turned off, the capacitive voltage divider 410 and the buffer storage capacitor C3 are electrically decoupled from each other. Each of the switches S1, S2, S3 and S4 is in particular formed as a transistor, for example as a field effect transistor, preferably as a MOSFET.

[0112] The buffer storage capacitor C3 is configured to buffer store and maintain a current voltage level of the measurement voltage V3 between switching operations implemented by the first switch S1 , the second switch S2 , the third switch S3 , and the fourth switch S4 .

[0113] like Figure 3As shown, the first switch S1 and the fourth switch S4 can be controlled by means of a common control signal (control signal SE1). In a similar manner, the second switch S2 and the third switch S3 can also be controlled by means of a common control signal (control signal SE2).

[0114] like Figure 3 As shown, the measuring device 400 comprises an impedance converter 420 connected to the output node K3. The impedance converter 420 is configured to forward the measurement voltage V3 provided at the buffer storage capacitor C3 to at least one further circuit part (not shown) of the optical system 300. The capacitance of the measuring capacitor C2 is greater than the capacitance of the buffer storage capacitor C3. In particular, the capacitance of the measuring capacitor C2 is at least ten times greater than the capacitance of the buffer storage capacitor C3.

[0115] To this end, Figure 4 shows the measurement results for Figure 3 1 is a schematic flow chart of an embodiment of a method for measuring a decreased driving voltage V2 in an optical system 300.

[0116] according to Figure 4 The method comprises steps 401 to 404 and in particular by means of Figure 3 The measurement is performed using the measuring device 400 shown in FIG.

[0117] Step 401:

[0118] In a first time period, the first switch S1 is switched on and simultaneously the second switch S2 and the third switch S3 are switched off, so that the first capacitor C1 and the measuring capacitor C2 are charged by means of the drive voltage V2 received at the input node K1 .

[0119] The voltage dropped across capacitors C1 and C2 is divided according to the capacitive voltage divider 410 as follows:

[0120]

[0121] Step 402:

[0122] In the second time period, the fourth switch S4 is turned on to charge the buffer storage capacitor C3 so that the voltage dropped across the buffer storage capacitor C3 corresponds to the voltage V3 dropped across the measurement capacitor C2. In other words, the capacitor C3 is charged to the voltage of the capacitor C2 in this second time interval. The charge is distributed between the capacitors C2 and C3. In order to minimize the error, as mentioned above, the capacitance of the capacitor C3 is significantly lower than the capacitance of the capacitor C2.

[0123] The second time interval starts at the same time as the first time interval or after the first time interval.

[0124] Step 403:

[0125] The switches S1 to S4 may be turned off at a time after the first time interval and after the second time interval. Such a turning off of all switches S1 to S4 results in a decoupling of the capacitive voltage divider 410 from the driving device 100 and from downstream circuit parts including the buffer storage capacitor C3.

[0126] Step 404:

[0127] Afterwards, the second switch S2 and the third switch S3 are turned on in the third time period, while the first switch S1 and the fourth switch S4 are turned off in the third time period, so that the first capacitor C1 and the measuring capacitor C2 are discharged to a predetermined level. Afterwards, the measuring method can start again according to step 401 .

[0128] Figure 5 1 is a schematic block diagram showing another embodiment of an optical system 300, wherein the optical system 300 includes a driving device 100 and a measuring device 400 for measuring a voltage V2 dropped in the optical system 300. Figure 5 The embodiment is based on Figure 3 and covers embodiments according to Figure 3 all features of the embodiments of the present invention.

[0129] according to Figure 5 Embodiments and basis Figure 3 The exemplary embodiments of the present invention differ in particular in the design of some circuit parts of the measuring device 400 , which will be explained in detail below.

[0130] In accordance with Figure 5 In the embodiment of the present invention, the first switch S1 is formed as a MOSFET T1. Figure 5 The measuring device 400 includes a plurality of MOSFETs T2, T3 for setting a gate voltage of the MOSFET T1 forming the first switch S1. In other words, the MOSFETs T2 and T3 are used to drive the MOSFET T1 forming the first switch S1.

[0131] according to Figure 5 The capacitive voltage divider 410 comprises a field effect transistor T4, which is formed, for example, as a MOSFET, connected between the first switch S1 and the connection node K2. The MOSFET T4 forms the second switch S2 and is formed in particular in such a way that its parasitic capacitance constitutes the first capacitor C1 of the capacitive voltage divider 410. Furthermore, a field effect transistor T5 is connected between the connection node K2 and ground, which field effect transistor forms the third switch S3.

[0132] like Figure 5As shown, the capacitive voltage divider 410 comprises a bootstrap circuit R1, D1 connected between a source terminal of a field effect transistor T4 forming a second switch S2, a connection node K2 and a source terminal of a field effect transistor T5 forming a third switch S3.

[0133] The bootstrap circuit R1, D1 comprises a diode D1 and a resistor R1. The diode D1 of the bootstrap circuit R1, D1 is connected in a blocking direction between the source terminal of the MOSFET T4 forming the second switch S2 and the source terminal of the MOSFET T5 forming the third switch S3. The resistor R1 of the bootstrap circuit R1, D2 is connected between the source terminal of the MOSFET T4 forming the second switch S2 and the connection node K2.

[0134] In addition, according to Figure 5 Embodiments and basis Figure 3 The difference of the embodiment is the formation of the fourth switch S4. Figure 5 The fourth switch S4 is formed as a MOSFET switch including three MOSFETs T6, T7 and T8.

[0135] Although the present invention has been described based on exemplary embodiments, the present invention can be modified in various ways.

[0136] Reference numerals list

[0137] 1Projection exposure equipment

[0138] 2 Lighting System

[0139] 3 Light Source

[0140] 4 Illumination optical unit

[0141] 5. Physical Field

[0142] 6 Object Plane

[0143] 7. Mask Master

[0144] 8 Mask Master Holder

[0145] 9Mask displacement driver

[0146] 10 Projection optics unit

[0147] 11 Image Field

[0148] 12 Image plane

[0149] 13 Chip

[0150] 14 Wafer Holder

[0151] 15 Chip displacement driver

[0152] 16 Lighting Radiation

[0153] 17 light collector

[0154] 18 Intermediate focal plane

[0155] 19 Deflecting mirror

[0156] 20 First facet mirror

[0157] 21 First facet

[0158] 22 Second facet reflector

[0159] 23 Second facet

[0160] 100 Drive unit

[0161] 110 Output stage

[0162] 200 Actuator

[0163] 300 Optical System

[0164] 310 Optical Components

[0165] 400 Measuring devices

[0166] 410 Voltage Divider

[0167] 420 Impedance Converter

[0168] C1 capacitor

[0169] C2 Measuring capacitor

[0170] C3 Buffer storage capacitor

[0171] D1 diode

[0172] I1 Quiescent current

[0173] K1 Input Node

[0174] K2 connection node

[0175] K3 Output Node

[0176] M1 Reflector

[0177] M2 Reflector

[0178] M3 Reflector

[0179] M4 Reflector

[0180] M5 Reflector

[0181] M6 Reflector

[0182] R1 resistor

[0183] R2 resistor

[0184] R3 resistor

[0185] S1 First switch

[0186] S2 Second switch

[0187] S3 Third switch

[0188] S4 Fourth switch

[0189] SE1 control signal

[0190] SE2 control signal

[0191] T1 transistor

[0192] T2 transistor

[0193] T3 transistor

[0194] T4 transistor

[0195] T5 transistor

[0196] T6 transistor

[0197] T7 Transistor

[0198] T8 Transistor

[0199] V1 Input voltage

[0200] V2 voltage, driving voltage

[0201] V3 Measured voltage

Claims

1. A measuring device (400) for an optical system (300), comprising: an input node (K1) for receiving a voltage (V2) dropped in the optical system (300), A capacitive voltage divider (410) connectable to the input node (K1) having a series circuit formed by at least two capacitors (C1, C2) including a measuring capacitor (C2), wherein the capacitive voltage divider (410) is configured to provide a measuring voltage (V3) dropped across the measuring capacitor (C2), the measuring voltage being less than and proportional to the voltage (V2) received at the input node (K1), and a controllable first switch (S1) coupled between the input node (K1) and the capacitive voltage divider (410) and configured to connect the capacitive voltage divider (410) to the input node (K1) according to a control signal (SE1), The capacitive voltage divider (410) is coupled between the first switch (S1) and ground, the first capacitor (C1) of the series circuit is coupled between the first switch (S1) and a connection node (K2) connecting the first capacitor (C1) and the measuring capacitor (C2), the measuring capacitor (C2) is coupled between the connection node (K2) and ground, the second switch (S2) and the first capacitor (C1) are coupled in parallel between the first switch (S1) and the connection node (K2), and the third switch (S3) and the measuring capacitor (C2) are coupled in parallel between the connection node (K2) and ground.

2. The measuring device according to claim 1, further comprising: A buffer storage capacitor (C3) is connected between the output node (K3) and ground, and the buffer storage capacitor can be connected in parallel with the measuring capacitor (C2) via a fourth switch (S4) coupled between the connection node (K2) and the output node (K3).

3. The measuring device according to claim 2, in, The buffer storage capacitor (C3) is configured to buffer and maintain a voltage level of the measurement voltage (V3) between switching operations implemented by the first switch (S1), the second switch (S2), the third switch (S3) and / or the fourth switch (S4).

4. The measuring device according to claim 2 or 3, in, An impedance converter (420) is connected to the output node (K3), the impedance converter (420) being configured to forward the measurement voltage (V3) provided at the buffer storage capacitor (C3) to at least one further circuit part of the optical system (300).

5. The measuring device according to any one of claims 2 to 4, The capacitance of the measuring capacitor (C2) is greater than the capacitance of the buffer storage capacitor (C3), in particular at least ten times greater.

6. The measuring device according to any one of claims 1 to 5, in, The first switch (S1) is formed as a field effect transistor (T1), in particular a MOSFET, wherein a plurality of field effect transistors (T2, T3) are provided for setting a gate voltage of the field effect transistor (T1) forming the first switch (S1).

7. The measuring device according to any one of claims 1 to 6, in, The capacitive voltage divider (410) comprises: a field effect transistor (T4) coupled between the first switch (S1) and the connection node (K2), the field effect transistor forming the second switch (S2) and being formed in such a way that its parasitic capacitance constitutes the first capacitor (C1); and a field effect transistor (T6) coupled between the connection node (K2) and ground, the field effect transistor forming the third switch (S3).

8. The measuring device according to claim 7, in, A bootstrap circuit (R1, D1) is connected between a source terminal of the field effect transistor (T4) forming the second switch (S2), the connection node (K2), and a source terminal of the field effect transistor (T5) forming the third switch (S3).

9. The measuring device according to claim 8, in, The diode (D1) of the bootstrap circuit (R1, D1) is connected in the blocking direction between the source terminal of the field effect transistor (T4) forming the second switch (S2) and the source terminal of the field effect transistor (T5) forming the third switch (S3), and the resistor (R1) of the bootstrap circuit (R1, D1) is connected between the source terminal of the field effect transistor (T4) forming the second switch (S2) and the connection node (K2).

10. The measuring device according to any one of claims 2 to 9, in, The fourth switch (S4) is formed as a MOSFET switch including a plurality of MOSFETs.

11. An optical system (300), comprising a plurality of actuatable optical elements (310), wherein: Each of the plurality of actuatable optical elements (310) is assigned an actuator (200), wherein each actuator (200) is assigned a driving device (100) for driving the actuator (200), the driving device comprising an output stage (110), the output stage (110) being configured to amplify an input voltage (V1) into a driving voltage (V2) for the actuator (200) using a quiescent current (I1) of the output stage (110), and a measuring device according to any one of claims 1 to 10 is provided. (400), the input node (K1) of the measuring device (400) is configured to receive a drive voltage (V2) for the actuator (200), and the capacitive voltage divider (410) of the measuring device (400) is configured to provide a measurement voltage (V3) dropped across a measurement capacitor (C2) of the capacitive voltage divider (410), the measurement voltage being less than the drive voltage (V2) received at the input node (K1) and proportional to the drive voltage (V2) received at the input node (K1).

12. The optical system according to claim 11, in, The optical system (300) is in the form of an illumination optical unit (4) or a projection optical unit (10) of a lithographic apparatus (1).

13. A lithographic apparatus (1) comprising an optical system (300) according to claim 11 or 12.

14. A measurement method for measuring a voltage drop in an optical system (300) by means of a measurement device (400) according to any one of claims 1 to 10, comprising the following steps: a) switching on (401) the first switch (S1) and opening the second switch (S2) and the third switch (S3) during a first time period, so that the first capacitor (C1) and the measuring capacitor (C2) are charged by means of the voltage (V2) received at the input node (K1), b) switching on (402) the fourth switch (S4) during a second time period to charge the buffer storage capacitor (C3) so that the voltage (V3) dropped across the buffer storage capacitor (C3) corresponds to the voltage (V3) dropped across the measuring capacitor (C2), and c) turning on (404) the second switch (S2) and the third switch (S3) and turning off the first switch (S1) and the fourth switch (S4) within a third time period to discharge the first capacitor (C1) and the measuring capacitor (C2) to a predetermined level.

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