Optical module

CN119907936APending Publication Date: 2025-04-29HISENSE BROADBAND MULTIMEDIA TECH
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Patent Information

Application Number
CN202480003266.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-01-08
Filing Date
2024-08-20
Publication Date
2025-04-29

AI Technical Summary

Technical Problem

During the plug-in and unplugging process, existing optical modules are prone to cause the metal shrapnel to accidentally touch, causing the risk of short circuit, and are difficult to compatible with different electrical signal modes such as NRZ and PAM4.

Method used

An optical module is designed, and its circuit board is equipped with a first row of gold fingers and a second row of gold fingers. The surface of the gold finger has a height difference. By setting hollow areas and grooves in the projection area of ​​the gold finger, the impedance of the gold finger of high-frequency signal is reduced. At the same time, the DSP chip adopts NRZ and PAM4 electrical signal processing modes, and the DSP chip switch processing mode is controlled through the MCU to be compatible with different electrical signal modes.

Benefits of technology

It effectively avoids the mistouch of metal shrapnel during the plug-in and unplugging process, reduces the risk of short circuit, and realizes the compatibility of optical modules with NRZ and PAM4 electrical signals, improving the flexibility and safety of signal transmission.

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Abstract

Disclosed is an optical module including a circuit board including a first metal surface layer, a second metal surface layer, and a first metal intermediate layer. The first metal surface layer is provided with golden fingers, the golden fingers are provided with elastic sheets, the golden fingers comprise high-frequency signal golden fingers, and a gap is formed in one side of each golden finger. The first metal middle layer is located below the first metal surface layer, and a first insulation supporting layer is arranged between the first metal middle layer and the first metal surface layer. The first metal intermediate layer in the projection area of the high-frequency signal golden finger does not have the metal layer so as to form a hollow area. The first insulating supporting layer in a projection area on one side of the high-frequency signal golden finger is hollowed out to form a first groove.
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Description

optical modules

[0001] This application claims the priority of application number 202311089253.6 filed with the China Patent Office on August 28, 2023; the priority of application number 202420046936.7 filed with the China Patent Office on January 8, 2024; and the priority of application number 202311452391.6 filed with the China Patent Office on November 2, 2023; all of which are incorporated by reference into this application. Technical Field

[0002] The present disclosure relates to the field of optical fiber communication technology, and in particular to an optical module. Background Art

[0003] The optical module is usually a plug-in optical module, that is, the gold finger of the optical module needs to be plugged into the shrapnel of the cage to achieve plug-in connection between the optical module and the host computer.

[0004] Summary of the Invention

[0005] In one aspect, an embodiment of the present disclosure provides an optical module, comprising:

[0006] circuit boards;

[0007] A gold finger is formed at one end of the circuit board, and the gold finger is configured to transmit an electrical signal; the gold finger includes a first gold finger and a second gold finger; the circuit board includes:

[0008] A first metal surface layer is located on the upper surface of the circuit board and is provided with a first gold finger; the surface of the first gold finger is configured to be connected to the first spring to achieve electrical connection; a gap is provided on one side of the first gold finger, and the first gold finger includes a high-frequency signal gold finger;

[0009] The second metal surface layer is located on the lower surface of the circuit board; the second metal surface layer is provided with a second gold finger;

[0010] The first metal intermediate layer is located between the first metal surface layer and the second metal surface layer, is located below the first metal surface layer, and has a first insulating support layer between the first metal surface layer and the first metal surface layer; the first metal intermediate layer does not have a metal layer in the projection area of ​​the high-frequency signal gold finger; the first insulating support layer in the projection area on one side of the high-frequency signal gold finger is hollowed out;

[0011] The first gold fingers are arranged along the width direction of the circuit board to form a first row of gold fingers, and the first row of gold fingers is configured to be electrically connected to the first row of metal shrapnel on the first side wall of the host computer to transmit electrical signals;

[0012] The second gold fingers are arranged along the width direction of the circuit board to form a second row of gold fingers, and the second row of gold fingers are configured to be electrically connected to the second row of metal springs on the second side wall of the host computer to transmit electrical signals; the first side wall and the second side wall are two opposite side walls of the host computer; wherein there is a height difference between the surfaces of the first row of gold fingers and the second row of gold fingers, and the spacing between the first row of metal springs and the second row of metal springs is less than the thickness of the circuit board;

[0013] The first gold finger has a first contact point, which is configured to contact the first spring sheet; the second gold finger has a second contact point, which is configured to contact the second spring sheet in the second row of metal spring sheets; the first contact point and the second contact point are staggered so that the first spring sheet and the second spring sheet are staggered.

[0014] On the other hand, an embodiment of the present disclosure provides an optical module, including:

[0015] circuit boards;

[0016] Among them, the circuit board includes:

[0017] The first metal surface layer is located on the upper surface of the circuit board and is provided with a gold finger; the surface of the gold finger is configured to receive a spring to achieve electrical connection; a gap is provided on one side of the gold finger, and the gold finger includes a high-frequency signal gold finger;

[0018] a second metal surface layer, located on the lower surface of the circuit board;

[0019] The first metal intermediate layer is located between the first metal surface layer and the second metal surface layer, and is located below the first metal surface layer. A first insulating support layer is provided between the first metal surface layer and the first metal surface layer. There is no metal layer in the first metal intermediate layer within the projection area of ​​the high-frequency signal gold finger. The first insulating support layer in the projection area on one side of the high-frequency signal gold finger is hollowed out. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0021] FIG1 is a partial architecture diagram of an optical communication system according to some embodiments;

[0022] FIG2 is a partial structural diagram of a host computer according to some embodiments;

[0023] FIG3 is a structural diagram of an optical module according to some embodiments;

[0024] FIG4 is an exploded view of an optical module according to some embodiments;

[0025] FIG5 is a first assembly diagram of a spring and a circuit board according to some embodiments;

[0026] FIG6 is a cross-sectional view of a first assembly diagram of a spring and a circuit board according to some embodiments;

[0027] FIG7 is a second assembly diagram of a spring and a circuit board according to some embodiments;

[0028] FIG8 is a cross-sectional view of a second assembly diagram of a spring and a circuit board according to some embodiments;

[0029] FIG9 is a cross-sectional view of a third assembly diagram of a spring and a circuit board according to some embodiments;

[0030] FIG10 is a structural diagram of a circuit board according to some embodiments;

[0031] FIG11 is an exploded view of a circuit board according to some embodiments;

[0032] FIG12 is a structural diagram of a circuit board provided by some embodiments with the first metal surface layer removed;

[0033] FIG13 is a structural diagram of another circuit board provided by some embodiments without the first metal surface layer;

[0034] FIG14 is a schematic diagram of a reflection loss simulation result of a high-frequency signal gold finger according to some embodiments;

[0035] FIG15 is a schematic diagram of loss simulation results of a high-frequency signal gold finger according to some embodiments;

[0036] FIG16 is a schematic diagram of a TDR simulation structure of a high-frequency signal gold finger according to some embodiments;

[0037] FIG17 is a first structural diagram of a circuit board in an optical module according to an embodiment of the present disclosure;

[0038] FIG18 is an enlarged view of the first row of gold fingers in the optical module according to an embodiment of the present disclosure;

[0039] FIG19 is a second structural diagram of a circuit board in an optical module according to an embodiment of the present disclosure;

[0040] FIG20 is an enlarged view of the second row of gold fingers in the optical module according to an embodiment of the present disclosure;

[0041] FIG21 is a perspective structural diagram of a gold finger in an optical module according to an embodiment of the present disclosure;

[0042] FIG22 is a structural diagram of a first row of gold fingers on a first surface of an optical module according to an embodiment of the present disclosure;

[0043] FIG23 is a structural diagram of a second row of gold fingers on a second surface of an optical module according to an embodiment of the present disclosure;

[0044] FIG24 is a comparative structural diagram of the first row of gold fingers and the second row of gold fingers in the optical module provided by an embodiment of the present disclosure;

[0045] FIG25 is a first side view of the front end of the circuit board in the optical module provided by an embodiment of the present disclosure;

[0046] FIG26 is a second side view of the front end of the circuit board in the optical module provided by an embodiment of the present disclosure;

[0047] FIG27 is another perspective structural diagram of a gold finger in an optical module according to an embodiment of the present disclosure;

[0048] FIG28 is another perspective structural diagram of a gold finger in an optical module according to an embodiment of the present disclosure;

[0049] FIG29 is a partial structural diagram of an optical module provided according to some embodiments of the present disclosure;

[0050] FIG30 is a schematic diagram of a signal principle of an optical module according to some embodiments of the present disclosure;

[0051] FIG31 is a block diagram of switching different electrical signal modes in an optical module according to some embodiments of the present disclosure;

[0052] FIG32 is a schematic diagram of signal routing between a gold finger and a digital signal processor in an optical module according to some embodiments of the present disclosure;

[0053] FIG33 is a first top-layer routing diagram of a circuit board in an optical module according to some embodiments of the present disclosure;

[0054] FIG34 is an inner layer wiring diagram of a circuit board in an optical module according to some embodiments of the present disclosure;

[0055] FIG35 is a top view of wiring of a circuit board in an optical module according to some embodiments of the present disclosure;

[0056] FIG36 is a top view of a partial wiring diagram of a circuit board in an optical module according to some embodiments of the present disclosure;

[0057] FIG37 is a second top-layer routing diagram of a circuit board in an optical module according to some embodiments of the present disclosure;

[0058] FIG38 is a bottom layer routing diagram of a circuit board in an optical module according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0059] Optical communication technology enables information transmission between information processing devices. It loads information onto light and uses the propagation of light to achieve this transmission. Light loaded with information is an optical signal. The propagation of optical signals within information transmission equipment reduces optical power loss, enabling high-speed, long-distance, and low-cost information transmission. The information processed by information processing equipment exists in the form of electrical signals. Optical network terminals / gateways, routers, switches, mobile phones, computers, servers, tablets, and televisions are common information processing devices, and optical fibers and optical waveguides are common information transmission devices.

[0060] The conversion of optical signals and electrical signals between information processing equipment and information transmission equipment is achieved through optical modules. For example, an optical fiber is connected to the optical signal input end and / or optical signal output end of the optical module, and an optical network terminal is connected to the electrical signal input end and / or electrical signal output end of the optical module. A first optical signal from the optical fiber is transmitted into the optical module, and the optical module converts the first optical signal into a first electrical signal, which is then transmitted into the optical network terminal. A second electrical signal from the optical network terminal is transmitted into the optical module, and the optical module converts the second electrical signal into a second optical signal, which is then transmitted into the optical fiber. Since information processing devices can be connected to each other through an electrical signal network, at least one type of information processing device needs to be directly connected to the optical module, and not all types of information processing devices need to be directly connected to the optical module. The information processing device directly connected to the optical module is called the host computer of the optical module.

[0061] Figure 1 is a partial architecture diagram of an optical communication system according to some embodiments. As shown in Figure 1 , the optical communication system partially comprises a remote information processing device 1000 , a local information processing device 2000 , a host computer 100 , an optical module 200 , an optical fiber 101 , and a network cable 103 .

[0062] One end of optical fiber 101 extends toward remote information processing device 1000, and the other end connects to the optical interface of optical module 200. Optical signals can undergo total internal reflection within optical fiber 101, maintaining nearly their original optical power as they propagate in the direction of total internal reflection. Multiple total internal reflections within optical fiber 101 transmit optical signals from the direction of remote information processing device 1000 into optical module 200, or transmit light from optical module 200 toward remote information processing device 1000, enabling long-distance, low-power information transmission.

[0063] The number of optical fibers 101 may be one or more (two or more); the optical fiber 101 and the optical module 200 may be connected in a pluggable movable manner or in a fixed manner.

[0064] The host computer 100 has an optical module interface 102, which is configured to connect to the optical module 200, so that the host computer 100 establishes a unidirectional / bidirectional electrical signal connection with the optical module 200; the host computer 100 is configured to provide data signals to the optical module 200, or receive data signals from the optical module 200, or monitor and control the working status of the optical module 200.

[0065] The host computer 100 has an external electrical interface, such as a Universal Serial Bus (USB) interface and a network cable interface 104, which can be connected to an electrical signal network. For example, the network cable interface 104 is configured to connect to a network cable 103, thereby establishing a unidirectional / bidirectional electrical signal connection between the host computer 100 and the network cable 103.

[0066] Optical Network Unit (ONU), Optical Line Terminal (OLT), Optical Network Equipment (ONT) and data center servers are common host computers.

[0067] One end of the network cable 103 is connected to the local information processing device 2000 , and the other end is connected to the host computer 100 . The network cable 103 establishes an electrical signal connection between the local information processing device 2000 and the host computer 100 .

[0068] For example, the third electrical signal emitted by the local information processing device 2000 is transmitted to the host computer 100 through the network cable 103. The host computer 100 generates a second electrical signal based on the third electrical signal. The second electrical signal from the host computer 100 is transmitted into the optical module 200. The optical module 200 converts the second electrical signal into a second optical signal. The optical module 200 transmits the second optical signal into the optical fiber 101. The second optical signal is transmitted to the remote information processing device 1000 in the optical fiber 101.

[0069] For example, a first optical signal from the direction of the remote information processing device 1000 propagates through the optical fiber 101, and the first optical signal from the optical fiber 101 is transmitted into the optical module 200. The optical module 200 converts the first optical signal into a first electrical signal. The optical module 200 transmits the first electrical signal into the host computer 100. The host computer 100 generates a fourth electrical signal based on the first electrical signal, and the host computer 100 transmits the fourth electrical signal to the local information processing device 2000.

[0070] Optical modules are tools for converting optical signals into electrical signals. During this conversion process, the information remains unchanged, but the encoding and decoding methods of the information can change.

[0071] Figure 2 is a partial structural diagram of a host computer according to some embodiments. To clearly illustrate the connection between the optical module 200 and the host computer 100, Figure 2 only shows the structure of the host computer 100 related to the optical module 200. As shown in Figure 2, the host computer 100 also includes a PCB circuit board 105 disposed within the housing, a cage 106 disposed on the surface of the PCB circuit board 105, a heat sink 107 disposed on the cage 106, and an electrical connector (not shown) disposed within the cage 106. The heat sink 107 has a protruding structure that increases the heat dissipation area. A fin-like structure is a common protruding structure.

[0072] Optical module 200 is inserted into cage 106 of host computer 100. Cage 106 secures optical module 200, and heat generated by optical module 200 is transferred to cage 106 and then dissipated through heat sink 107. After optical module 200 is inserted into cage 106, the electrical interface of optical module 200 connects to the electrical connector inside cage 106.

[0073] Figure 3 is a structural diagram of an optical module according to some embodiments, and Figure 4 is an exploded view of an optical module according to some embodiments. As shown in Figures 3 and 4, the optical module 200 includes a housing, a circuit board 300 disposed within the housing, a light emitting component 400, and a light receiving component 500. However, the present disclosure is not limited thereto. In some embodiments, the optical module 200 includes either the light emitting component 400 or the light receiving component 500.

[0074] The housing includes an upper housing 201 and a lower housing 202 . The upper housing 201 covers the lower housing 202 to form the housing having two openings 204 and 205 . The outer contour of the housing is generally a square.

[0075] In some embodiments, the lower shell 202 includes a bottom plate 2021 and two lower side plates 2022 located on both sides of the bottom plate 2021 and arranged perpendicular to the bottom plate 2021; the upper shell 201 includes a cover plate 2011, which covers the two lower side plates 2022 of the lower shell 202 to form the above-mentioned shell.

[0076] In some embodiments, the lower shell 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and arranged perpendicularly to the base plate 2021; the upper shell 201 includes a cover plate 2011 and two upper side plates located on both sides of the cover plate 2011 and arranged perpendicularly to the cover plate 2011. The two upper side plates are combined with the two lower side plates 2022 to achieve the upper shell 201 covering the lower shell 202.

[0077] The direction of the line connecting the two openings 204 and 205 can be consistent with the length of the optical module 200, or it can be inconsistent with the length of the optical module 200. For example, opening 204 is located at the end of the optical module 200 (the right end in Figure 3), and opening 205 is also located at the end of the optical module 200 (the left end in Figure 3). Alternatively, opening 204 is located at the end of the optical module 200, while opening 205 is located on the side of the optical module 200. Opening 204 is an electrical interface, from which the gold fingers of the circuit board 300 extend and are inserted into the electrical connector of the host computer; opening 205 is an optical port, configured to receive the optical fiber 101, so that the optical fiber 101 can connect to the optical emitting component 400 and / or the optical receiving component 500 in the optical module 200.

[0078] The combined assembly of the upper and lower housings 201 and 202 facilitates the installation of components such as the circuit board 300, light emitting component 400, and light receiving component 500 within the housings. These components are encapsulated and protected by the upper and lower housings 201 and 202. Furthermore, during assembly of the circuit board 300, light emitting component 400, and light receiving component 500, positioning components, heat dissipation components, and electromagnetic shielding components are easily positioned, facilitating automated production.

[0079] In some embodiments, the upper shell 201 and the lower shell 202 are made of metal materials, which facilitates electromagnetic shielding and heat dissipation.

[0080] In some embodiments, the optical module 200 further includes an unlocking component 600 located outside its housing. The unlocking component 600 is configured to achieve a fixed connection between the optical module 200 and the host computer, or to release the fixed connection between the optical module 200 and the host computer.

[0081] For example, the unlocking member 600 is located on the outside of the two lower side panels 2022 of the lower housing 202 and includes engaging components that mate with the cage 106 of the host computer. When the optical module 200 is inserted into the cage 106, the engaging components of the unlocking member 600 secure the optical module 200 within the cage 106. When the unlocking member 600 is pulled, the engaging components of the unlocking member 600 move accordingly, thereby changing the connection between the engaging components and the host computer, thereby releasing the fixed engagement between the optical module 200 and the host computer, allowing the optical module 200 to be removed from the cage 106.

[0082] The circuit board 300 includes circuit traces, electronic components, and chips. The electronic components and chips are connected together according to the circuit design through the circuit traces to achieve functions such as power supply, electrical signal transmission, and grounding. Electronic components may include, for example, capacitors, resistors, transistors, and metal-oxide-semiconductor field-effect transistors (MOSFETs). Chips may include, for example, microcontroller units (MCUs), laser driver chips, transimpedance amplifiers (TIAs), limiting amplifiers, clock and data recovery chips (CDRs), power management chips, and digital signal processing (DSP) chips.

[0083] The circuit board 300 is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also realize the load-bearing function. For example, the rigid circuit board can stably carry the above-mentioned electronic components and chips; the rigid circuit board is also easy to insert into the electrical connector in the upper computer cage.

[0084] The circuit board 300 also includes gold fingers formed on its end surfaces. The gold fingers are composed of multiple independent pins. The circuit board 300 is inserted into the cage 106, and the gold fingers are electrically connected to the electrical connector inside the cage 106. The gold fingers can be provided only on one side of the circuit board 300 (such as the top surface shown in FIG4 ), or they can be provided on both the top and bottom surfaces of the circuit board 300 to provide more pins. The gold fingers are configured to establish an electrical connection with the host computer to achieve power supply, grounding, I2C signal transmission, data signal transmission, etc.

[0085] Of course, flexible circuit boards are also used in some optical modules. Flexible circuit boards are generally used in conjunction with rigid circuit boards to supplement rigid circuit boards.

[0086] The light emitting component 400 and / or the light receiving component 500 are located on the side of the circuit board 300 away from the gold finger; in some embodiments, the light emitting component 400 and the light receiving component 500 are physically separated from the circuit board 300, and then electrically connected to the circuit board 300 through corresponding flexible circuit boards or electrical connectors; in some embodiments, the light emitting component and / or the light receiving component can be directly set on the circuit board 300, can be set on the surface of the circuit board, and can also be set on the side of the circuit board.

[0087] Figure 5 illustrates a first assembly diagram of a spring clip and a circuit board according to some embodiments. Figure 6 illustrates a cross-sectional view of a first assembly diagram of a spring clip and a circuit board according to some embodiments. As shown in Figures 5 and 6, cage 106 includes spring clips 108, which are positioned to correspond to the gold fingers of optical module 200. Spring clips 108 include a first spring clip 181 and a second spring clip 182, with the two first spring clips 181 positioned between the two second spring clips 182.

[0088] Circuit board 300 includes a first metal surface layer, a second metal surface layer, and a metal intermediate layer group 305. The first metal surface layer is located on the upper surface of circuit board 300, the second metal surface layer is located on the lower surface of circuit board 300, and the metal intermediate layer group 305 is located between the first and second metal surface layers. Any two adjacent metal layers of circuit board 300 are connected by an insulating support layer, wherein the insulating support layer is made of resin. Gold fingers may be formed on circuit board 300.

[0089] In some examples, the gold finger may include a first gold finger and a second gold finger. The first metal surface is provided with a first gold finger, which may include a high-frequency signal gold finger 331 and a ground gold finger 332. The two high-frequency signal gold fingers 331 are located between the two ground gold fingers 332. The upper surface of the circuit board 300 and the lower surface of the circuit board 300 are arranged opposite to each other.

[0090] After the optical module 200 is inserted into the cage 106, the first spring clip 181 connects to the high-frequency signal finger 331, and the second spring clip 182 connects to the ground finger 332, completing the connection between the spring clip 108 and the fingers. The connection between the first spring clip 181 and the high-frequency signal finger 331 increases the thickness of the high-frequency signal finger 331 at the contact point. This creates a stub between the high-frequency signal finger 331 and the first spring clip 181, causing a sudden change in the impedance of the high-frequency signal finger 331. This causes reflections on the electrical signal after it is transmitted to the high-frequency signal finger 331, affecting the quality of electrical signal transmission.

[0091] To reduce the impedance mutation of the high-frequency signal gold finger 331 caused by the connection between the first spring 181 and the high-frequency signal gold finger 331, as shown in Figure 6, in some embodiments, the circuit board 300 includes a hollowed-out region 301. That is, the metal intermediate layer group 305 within the projection area of ​​the high-frequency signal gold finger 331 is, from top to bottom, without a metal layer in at least one layer, starting from the first layer, to form the hollowed-out region 301. The presence of the hollowed-out region 301 causes the metal layer to shift downward, increasing the thickness of the dielectric between the high-frequency signal gold finger 331 and the reference ground (the metal layer serves as the reference ground). According to the principle of impedance, a thicker dielectric layer increases the impedance, thereby reducing the impedance mutation of the high-frequency signal gold finger 331.

[0092] In some embodiments, the metal intermediate layer group 305 includes a first metal intermediate layer 351 . No metal layer exists in the first metal intermediate layer 351 within the projection area of ​​the high-frequency signal gold finger 331 , so as to form a hollow area 301 .

[0093] In some embodiments, the metal intermediate layer group 305 further includes at least one metal intermediate layer. Within the projection area of ​​the high-frequency signal gold finger 331, at least one metal intermediate layer, starting from the first layer, is free of metal layers, forming a hollowed-out region 301. The phrase "free of metal layers starting from the first layer, starting from the first layer, starting from the top, means that no metal layers are present from top to bottom. For example, the first layer is free of metal layers, while the second and subsequent layers are free of metal layers; or the first and second layers are free of metal layers, while the third and subsequent layers are free of metal layers.

[0094] To further reduce the impedance jump of the high-frequency signal gold finger 331, in some embodiments, the metal intermediate layer group 305 within the projection area of ​​the high-frequency signal gold finger 331 and the projection area of ​​one side of the high-frequency signal gold finger 331 is free of metal layers in at least one layer starting from the first layer, from top to bottom, to form a hollowed-out area 301. The one side of the high-frequency signal gold finger 331 can be the area between the high-frequency signal gold finger 331 and the ground gold finger 332, or the area between two adjacent high-frequency signal gold fingers 331.

[0095] In some embodiments, the metal intermediate layer group 305 in the projection area of ​​the high-frequency signal gold finger 331 and the projection areas on both sides of the high-frequency signal gold finger 331 has at least one metal layer removed from the first layer from top to bottom to form a hollow area 301 .

[0096] Figure 7 illustrates a second assembly diagram of a spring element and a circuit board according to some embodiments. Figure 8 illustrates a cross-sectional view of a second assembly diagram of a spring element and a circuit board according to some embodiments. As shown in Figures 7 and 8, in some embodiments, the circuit board 300 further includes a first recess 302. This recess 302 is formed by hollowing out the first insulating support layer within the projected area on one side of the high-frequency signal gold finger 331. The projected area on the side of the high-frequency signal gold finger 331 where the first recess 302 is located and the projected area on the side of the high-frequency signal gold finger 331 that forms the hollowed-out area 301 are the same projected area on the side of the high-frequency signal gold finger 331. The presence of the first recess 302 increases the proportion of air in the medium between the high-frequency signal gold finger 331 and the reference ground. The dielectric constant of the resin is greater than that of air. According to the principle of impedance, a smaller dielectric constant indicates a greater impedance, thereby reducing impedance variations in the high-frequency signal gold finger 331.

[0097] The hollowed-out area increases the thickness of the medium between the high-frequency signal gold finger and the reference ground, thereby increasing the impedance of the high-frequency signal gold finger, thereby reducing the impedance mutation of the high-frequency signal gold finger caused by the connection between the shrapnel and the high-frequency signal gold finger; the first groove reduces the dielectric constant of the medium between the high-frequency signal gold finger and the reference ground, thereby further increasing the impedance of the high-frequency signal gold finger, thereby further reducing the impedance mutation of the high-frequency signal gold finger caused by the connection between the shrapnel and the high-frequency signal gold finger.

[0098] On one side of the high-frequency signal gold finger 331 is the area between the high-frequency signal gold finger 331 and the ground gold finger 332. The first insulating support layer in the projected area between the high-frequency signal gold finger 331 and the ground gold finger 332 is hollowed out to form a first groove 302. On one side of the high-frequency signal gold finger 331 is the area between the two high-frequency signal gold fingers 331. The first insulating support layer in the projected area between the two high-frequency signal gold fingers 331 is hollowed out to form a first groove 302.

[0099] In some embodiments, all insulating support layers above the first metal layer in the projected area of ​​the high-frequency signal gold finger 331 are hollowed out to form a first groove 302. Specifically, the first groove 302 is provided in the projected area of ​​the high-frequency signal gold finger 331, and the bottom surface of the first groove 302 is a metal layer, which is the first metal layer. Hollowing out all insulating support layers above the first metal layer in the projected area of ​​the high-frequency signal gold finger 331 increases the dielectric thickness between the high-frequency signal gold finger 331 and the reference ground, increasing impedance and thereby reducing impedance mutations in the high-frequency signal gold finger 331. The metal layer at the bottom of the first groove 302 and the first metal layer in the projected area of ​​the high-frequency signal gold finger 331 are located on the same layer of the circuit board 300.

[0100] In some embodiments, the metal interlayer assembly 305 includes a first metal interlayer 351. No metal layer is present in the first metal interlayer 351 within the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331, thereby forming a hollowed-out region 301. The first insulating support layer 361 and the second insulating support layer 362 are hollowed out within the projection area on one side of the high-frequency signal gold finger 331 to form a first groove 302. The second insulating support layer 362 is connected to the first metal interlayer 351 and is located below the first metal interlayer 351.

[0101] In some embodiments, the metal intermediate layer group 305 further includes at least one metal intermediate layer. Within the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331, at least one metal intermediate layer, starting from the first layer, is free of metal layers, forming a hollow region 301. Specifically, within the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331, no metal layer exists between the high-frequency signal gold finger 331 and the metal layer at the bottom of the first groove 302, forming the hollow region 301. Within the projection area on one side of the high-frequency signal gold finger 331, all insulating support layers above the first metal layer are hollowed out to form the first groove 302. Specifically, the first groove 302 is provided on both sides of the high-frequency signal gold finger 331, and the metal layer at the bottom of the first groove 302 is the first metal layer. The first metal layer within the projection area of ​​the high-frequency signal gold finger and the first metal layer within the projection area on one side of the high-frequency signal gold finger are located on the same layer of the circuit board.

[0102] For example, the metal interlayer group 305 further includes a second metal interlayer 352. No metal layer is present in the first and second metal interlayers 351, 352 within the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331, thereby forming a hollowed-out area 301. The first, second, and third insulating support layers 361, 362, and 363 within the projection area on one side of the high-frequency signal gold finger 331 are hollowed out to form the first groove 302. The third insulating support layer 363 is connected to the second metal interlayer 352 and is located below the second metal interlayer 352.

[0103] For example, the metal intermediate layer group also includes a third metal intermediate layer 353, a fourth metal intermediate layer 354 and a fifth metal intermediate layer 355. There is no metal layer in the first metal intermediate layer 351, the second metal intermediate layer 352, the third metal intermediate layer 353 and the fourth metal intermediate layer 354 in the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331, so as to form a hollow area 301, but there is a metal layer in the fifth metal intermediate layer 355 in the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331; the first insulating support layer 361, the second insulating support layer 362, the third insulating support layer 363, the fourth insulating support layer 364 and the fifth insulating support layer 365 in the projection area on one side of the high-frequency signal gold finger 331 are hollowed out to form a first groove 302, that is, the bottom surface of the first groove 302 is the fifth metal intermediate layer 335. Among them, the fourth insulating support layer 364 is connected to the third metal intermediate layer 353 and is located below the third metal intermediate layer 353; the fifth insulating support layer 365 is connected to the fourth metal intermediate layer 354 and is located below the fourth metal intermediate layer 354. The fifth metal intermediate layer 335 is both the first metal layer in the projection area of ​​the high-frequency signal gold finger 331 and the first metal layer in the projection area on both sides of the high-frequency signal gold finger 331.

[0104] In some embodiments, the first insulating support layer within the projected areas on both sides of the high-frequency signal gold finger 331 is hollowed out to form the first groove 302. That is, the first insulating support layer within the projected area between any two adjacent high-frequency signal gold fingers 331, as well as within the projected area between the high-frequency signal gold finger 331 and the ground gold finger 332, is hollowed out to form the first groove 302.

[0105] In some embodiments, all insulating support layers above the first metal layer in the projection areas on both sides of the high-frequency signal gold finger 331 are hollowed out to form the first groove 302 .

[0106] The thicker the first groove 302, the thicker the dielectric between the high-frequency signal gold finger 331 and the reference ground, and the greater the impedance of the high-frequency signal gold finger 331. To further increase the impedance of the high-frequency signal gold finger 331, in some embodiments, the thickness of the first groove 302 is half the thickness of the circuit board 300. This thickness not only further increases the impedance of the high-frequency signal gold finger 331 but also ensures the flexural strength of the circuit board 300.

[0107] Figure 9 is a cross-sectional view of a third assembly diagram of a spring and a circuit board, according to some embodiments. As shown in Figure 9, in some embodiments, circuit board 300 further includes a second groove 304. Specifically, the insulating support layer, excluding the first insulating support layer, above the first metal layer within the projection area of ​​the high-frequency signal gold finger 331 is partially hollowed out to form second groove 304. The presence of second groove 304 replaces all resin with all air as the dielectric between the high-frequency signal gold finger 331 and the reference ground. The dielectric constant of resin is greater than that of air. According to the principle of impedance, a smaller dielectric constant indicates a greater impedance, thereby reducing the impedance jump of the high-frequency signal gold finger 331.

[0108] The hollowed-out area increases the thickness of the medium between the high-frequency signal gold finger and the reference ground, increases the impedance of the high-frequency signal gold finger, and reduces the impedance mutation of the high-frequency signal gold finger caused by the connection between the shrapnel and the high-frequency signal gold finger; the first groove reduces the dielectric constant of the medium between the high-frequency signal gold finger and the reference ground, further increases the impedance of the high-frequency signal gold finger, and further reduces the impedance mutation of the high-frequency signal gold finger caused by the connection between the shrapnel and the high-frequency signal gold finger; the second groove reduces the dielectric constant of the medium between the high-frequency signal gold finger and the reference ground, further increases the impedance of the high-frequency signal gold finger, and further reduces the impedance mutation of the high-frequency signal gold finger caused by the connection between the shrapnel and the high-frequency signal gold finger.

[0109] In some embodiments, all insulating support layers above the first metal layer within the projection area of ​​the high-frequency signal gold finger 331, except for the first insulating support layer, are hollowed out to form a second groove 304. This means that there is no insulating support layer, only a gap, between the first insulating support layer within the projection area of ​​the high-frequency signal gold finger 331 and the metal layer (i.e., the fifth metal intermediate layer 335) at the bottom of the first groove 302. Hollowing out all insulating support layers above the first metal layer within the projection area of ​​the high-frequency signal gold finger 331, except for the first insulating support layer, increases the proportion of air in the medium between the high-frequency signal gold finger 331 and the reference ground, reducing the dielectric constant and increasing the impedance, thereby reducing the impedance jump of the high-frequency signal gold finger 331.

[0110] In some embodiments, the metal intermediate layer group 305 includes a first metal intermediate layer 351, and there is no metal layer in the first metal intermediate layer 351 in the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331 to form a hollow area 301; the first insulating support layer 361 and the second insulating support layer 362 in the projection area on one side of the high-frequency signal gold finger 331 are hollowed out to form a first groove 302; the second insulating support layer 362 in the projection area of ​​the high-frequency signal gold finger 331 is hollowed out to form a second groove 304.

[0111] In some embodiments, the metal intermediate layer group 305 further includes at least one metal intermediate layer, and at least one metal intermediate layer in the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331, starting from the first layer, has no metal layer from top to bottom, so as to form a hollow area 301, that is, in the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331, there is no metal layer between the high-frequency signal gold finger 331 and the metal layer on the bottom surface of the first groove 302, so as to form a hollow area 301; all insulating support layers above the first metal layer in the projection area on one side of the high-frequency signal gold finger 331 are hollowed out to form a first groove 302, that is, the first grooves 302 are provided on both sides of the high-frequency signal gold finger 331, and the metal layer on the bottom surface of the first groove 302 is the first metal layer; all insulating support layers above the first metal layer in the projection area of ​​the high-frequency signal gold finger 331, except the first insulating support layer 361, are hollowed out to form a second groove 304.

[0112] For example, the metal intermediate layer group 305 also includes a second metal intermediate layer 352, and there is no metal layer in the first metal intermediate layer 351 and the second metal intermediate layer 352 in the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331 to form a hollow area 301; the first insulating support layer 361, the second insulating support layer 362 and the third insulating support layer 363 in the projection area on one side of the high-frequency signal gold finger 331 are hollowed out to form a first groove 302; the second insulating support layer 362 and the third insulating support layer 363 in the projection area of ​​the high-frequency signal gold finger 331 are hollowed out to form a second groove 304.

[0113] For example, the metal intermediate layer group further includes a third metal intermediate layer 353, a fourth metal intermediate layer 354 and a fifth metal intermediate layer 355. The first metal intermediate layer 351, the second metal intermediate layer 352, the third metal intermediate layer 353 and the fourth metal intermediate layer 354 in the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331 do not have metal layers to form a hollow area 301, but the fifth metal intermediate layer 355 in the projection area of ​​the high-frequency signal gold finger 331 and the projection area on one side of the high-frequency signal gold finger 331 does not have metal layers. In the metal layer; the first insulating support layer 361, the second insulating support layer 362, the third insulating support layer 363, the fourth insulating support layer 364 and the fifth insulating support layer 365 in the projection area on one side of the high-frequency signal gold finger 331 are hollowed out to form a first groove 302, that is, the bottom surface of the first groove 302 is the fifth metal intermediate layer 335; the second insulating support layer 362, the third insulating support layer 363, the fourth insulating support layer 364 and the fifth insulating support layer 365 in the projection area of ​​the high-frequency signal gold finger 331 are hollowed out to form a second groove 304.

[0114] Figure 10 is a structural diagram of a circuit board according to some embodiments. Figure 11 is an exploded view of a circuit board according to some embodiments. Figure 12 is a structural diagram of a circuit board according to some embodiments with the first metal surface layer removed. As shown in Figures 10 and 11, in some embodiments, the ends of the first groove 302 are aligned with the ends of the projection of the first spring clip 181 onto the high-frequency signal gold finger 331, so that the length of the first groove 302 is equal to the projection of the first spring clip 181 onto the high-frequency signal gold finger 331. The length of the first groove 302 is equal to the projection of the first spring clip 181 onto the high-frequency signal gold finger 331. This increases the impedance of the high-frequency signal gold finger 331 from the point of contact with the first spring clip 181 to the end of the high-frequency signal gold finger 331, thereby reducing the impedance jump of the high-frequency signal gold finger 331 caused by the connection between the first spring clip 181 and the high-frequency signal gold finger 331. This ensures the impedance continuity of the high-frequency signal gold finger and the transmission quality of the high-frequency signal.

[0115] One or both sides of the high-frequency signal gold finger 331 can be hollowed out to form the first groove 302. The first groove 302 then includes at least one recessed portion. The wider the recessed portion, the greater the proportion of air in the medium between the high-frequency signal gold finger 331 and the reference ground, and the greater the impedance of the region between the contact point between the high-frequency signal gold finger 331 and the first spring 181 and the end of the high-frequency signal gold finger 331. To increase the impedance of the region between the contact point between the high-frequency signal gold finger 331 and the first spring 181 and the end of the high-frequency signal gold finger 331, in some embodiments, the width of the recessed portion is the width of the gap between the gold fingers on either side of the recessed portion.

[0116] For example, the first groove 302 includes a first recessed portion 321 located between the high-frequency signal gold finger 331 and the ground gold finger 332 . The width of the first recessed portion 321 is equal to the width of the gap between the high-frequency signal gold finger 331 and the ground gold finger 332 .

[0117] For example, the first groove 302 includes a second recessed portion 322 . The second recessed portion 322 is located between two adjacent high-frequency signal gold fingers 331 . The width of the second recessed portion 322 is equal to the width of the gap between the two adjacent high-frequency signal gold fingers 331 .

[0118] For example, the first groove 302 includes a first recessed portion 321 and a second recessed portion 322 . The width of the first recessed portion 321 is the width of the gap between the high-frequency signal gold finger 331 and the ground gold finger 332 , and the width of the second recessed portion 322 is the width of the gap between two adjacent high-frequency signal gold fingers 331 .

[0119] FIG13 is a structural diagram of another circuit board provided in accordance with some embodiments, wherein the first metal surface layer is removed. Because the electric field lines of the high-frequency signal gold finger 331 diverge in the surrounding area, to further increase the impedance of the high-frequency signal gold finger 331, as shown in FIG13, in some embodiments, the first insulating support layer in the projected area between the high-frequency signal gold finger 331 and the edge of the circuit board 300 is hollowed out to form a third groove 306. The third groove 306 is located in the projected area of ​​the first spring 181 on the circuit board 300. As a result, the proportion of air in the medium between the high-frequency signal gold finger 331 and the reference ground increases, and the impedance of the area between the contact point of the high-frequency signal gold finger 331 and the first spring 181 and the end of the high-frequency signal gold finger 331 increases. This, in turn, reduces the impedance mutation of the high-frequency signal gold finger 331 caused by the connection between the first spring 181 and the high-frequency signal gold finger 331.

[0120] In some embodiments, all insulating support layers above the first metal layer in the projected area between the high-frequency signal gold finger 331 and the edge of the circuit board 300 are hollowed out to form a third groove 306, that is, a third groove 306 is provided between the high-frequency signal gold finger 331 and the edge of the circuit board 300, and the bottom surface of the third groove 306 is a metal layer, wherein the metal layer on the bottom surface of the third groove 306 and the first metal layer in the projected area on one side of the high-frequency signal gold finger 331 are located on the same layer of the circuit board 300.

[0121] In some embodiments, the third groove 306 extends outward so that the third groove 306 communicates with the first groove 302, increasing the proportion of air in the medium between the high-frequency signal gold finger 331 and the reference ground, thereby increasing the impedance of the area between the contact point between the high-frequency signal gold finger 331 and the first elastic member 181 and the end of the high-frequency signal gold finger 331. For example, the first groove 302 includes a first recessed portion 321, and the third groove 306 communicates with the first recessed portion 321; the first groove 302 includes a third groove 306, and the third groove 306 communicates with the second recessed portion 322; the first groove 302 includes a first recessed portion 321 and a second recessed portion 322, and the third groove 306 communicates with the first recessed portion 321 and the second recessed portion 322, respectively.

[0122] The third groove 306 is located at the end of the high-frequency signal gold finger 331, away from the beginning of the high-frequency signal gold finger 331. That is, the third groove 306 is away from the projection area of ​​the spring 108 on the circuit board 300. This increases the impedance of the area between the contact point between the high-frequency signal gold finger 331 and the first spring 181 and the beginning of the high-frequency signal gold finger 331, and also increases the impedance of the area between the contact point between the high-frequency signal gold finger 331 and the first spring 181 and the end of the high-frequency signal gold finger 331, resulting in impedance mismatch at the contact point of the high-frequency signal gold finger 331. To avoid this problem, in some embodiments, the third groove 306 is located in the projection area of ​​the spring 108 on the circuit board 300. The third groove 306 is located in the projection area of ​​the spring 108 on the circuit board 300, which only increases the impedance of the area between the contact point between the high-frequency signal gold finger 331 and the first spring 181 and the end of the high-frequency signal gold finger 331, improving impedance matching at the contact point of the high-frequency signal gold finger 331.

[0123] The above describes the circuit board from the perspective of its formation. The following describes it from the perspective of its final form. To address the impedance mutation issue of the high-frequency signal gold finger 331, a first groove 302 is provided on one side of the high-frequency signal gold finger 331. The bottom surface of the first groove 302 is a metal layer. The metal layer at the bottom of the first groove 302 is located between the first metal surface layer and the second metal surface layer. Within the projection area of ​​the high-frequency signal gold finger 331, there is no metal layer between the high-frequency signal gold finger 331 and the metal layer at the bottom of the first groove 302. The high-frequency signal gold finger 331 is disposed on the surface of the first insulating support layer.

[0124] As shown in FIG8 , within the projection area of ​​the high-frequency signal gold finger 331 , at least one insulating support layer is provided between the first insulating support layer 361 and the metal layer at the bottom surface of the first groove 302 .

[0125] As shown in FIG. 9 , within the projection area of ​​the high-frequency signal gold finger 331 , there is no insulating support layer between the first insulating support layer 361 and the metal layer at the bottom of the first groove 302 , but only a gap, thereby forming a second groove 304 .

[0126] As shown in FIG12 , a third groove 306 is provided between the high-frequency signal gold finger 331 and the edge of the circuit board 300 , and the bottom surface of the third groove 306 is a metal layer.

[0127] Figure 14 is a schematic diagram of the reflection loss simulation results of a high-frequency signal gold finger, according to some embodiments. As shown in Figure 14, the horizontal axis represents frequency, and the vertical axis represents first decibels, where the first decibel represents the ratio of the power of the reflected signal at the first port to the power of the incident signal at the first port. a1 represents the reflection loss simulation result of the high-frequency signal gold finger after optimization, and a2 represents the reflection loss simulation result of the high-frequency signal gold finger before optimization. The reflection loss of the high-frequency signal gold finger after optimization is greater than the reflection loss of the high-frequency signal gold finger before optimization.

[0128] Figure 15 is a schematic diagram of loss simulation results for a high-frequency signal gold finger, according to some embodiments. As shown in Figure 15 , the horizontal axis represents frequency, and the vertical axis represents second decibels, where second decibels represents the ratio of the power of the outgoing signal at the second port to the power of the incident signal at the first port. b1 represents the loss simulation result of the optimized high-frequency signal gold finger, and b2 represents the reflection loss simulation result of the optimized high-frequency signal gold finger. The loss of the optimized high-frequency signal gold finger is less than that of the optimized high-frequency signal gold finger.

[0129] Figure 16 is a schematic diagram of a TDR simulation structure for a high-frequency signal gold finger, according to some embodiments. As shown in Figure 16 , the horizontal axis represents time, and the vertical axis represents impedance. c1 represents the TDR simulation result of the optimized high-frequency signal gold finger, and c2 represents the TDR loss simulation result of the high-frequency signal gold finger before optimization. The impedance of the optimized high-frequency signal gold finger is greater than that of the high-frequency signal gold finger before optimization, and is closer to 100Ω.

[0130] In some embodiments, the optical module includes a circuit board. The circuit board includes a first metal surface layer, a second metal surface layer, and a first metal intermediate layer. The first metal intermediate layer is a first metal layer below the first metal surface layer. The first metal surface layer is located on the upper surface of the circuit board, and the second metal surface layer is located on the lower surface of the circuit board. The upper and lower surfaces of the circuit board are arranged opposite each other. The first metal intermediate layer is located between the first and second metal surface layers, and the first metal intermediate layer is located below the first metal surface layer. A first insulating support layer is provided between the first metal intermediate layer and the first metal surface layer. The first metal surface layer is provided with a gold finger, the surface of which is configured to receive a spring to achieve an electrical connection. The gold finger includes a high-frequency signal gold finger. The first metal intermediate layer is free of metal within the projection area of ​​the high-frequency signal gold finger, forming a hollowed-out area. The presence of the hollowed-out area causes the metal layer to move downward, increasing the dielectric thickness between the high-frequency signal gold finger and the reference ground, thereby increasing the impedance of the high-frequency signal gold finger. A gap is provided on one side of the gold finger to expose the first insulating support layer between two adjacent gold fingers. The first insulating support layer is hollowed out within the projection area of ​​one side of the high-frequency signal gold finger to form a first groove. The presence of the first groove increases the proportion of air in the medium between the high-frequency signal gold finger and the reference ground, reducing the dielectric constant of the medium between the high-frequency signal gold finger and the reference ground, thereby increasing the impedance of the high-frequency signal gold finger. In some embodiments, the hollowed-out area increases the thickness of the medium between the high-frequency signal gold finger and the reference ground, increasing the impedance of the high-frequency signal gold finger, thereby reducing the impedance mutation of the high-frequency signal gold finger caused by the connection between the spring and the high-frequency signal gold finger. The first groove reduces the dielectric constant of the medium between the high-frequency signal gold finger and the reference ground, further increasing the impedance of the high-frequency signal gold finger, and further reducing the impedance mutation of the high-frequency signal gold finger caused by the connection between the spring and the high-frequency signal gold finger, thereby ensuring the impedance continuity of the high-frequency signal gold finger and the transmission quality of the high-frequency signal.

[0131] Generally, to ensure a standardized and aesthetically pleasing gold finger design, it's typically centered along one edge of the circuit board, with the upper and lower gold fingers aligned. The corresponding socket in the host computer cage is also designed accordingly, for example, with the metal springs that electrically connect the host computer cage to the gold fingers aligned vertically. This facilitates gold finger design and circuit board production and processing. However, in practice, circuit boards are typically thin, typically around 1mm. This results in the metal springs in the host computer socket being relatively close together. This can lead to accidental contact between the metal springs when removing the optical module from the host computer. In some cases, hot-plugging the optical module while it's powered on can create a dangerous short circuit in electrical appliances.

[0132] Figure 17 is a schematic diagram of the structure of a circuit board in an optical module according to an embodiment of the present disclosure. Figure 18 is an enlarged view of the first row of gold fingers in an optical module according to an embodiment of the present disclosure. Figure 19 is a schematic diagram of the structure of a circuit board in an optical module according to an embodiment of the present disclosure. Figure 20 is an enlarged view of the second row of gold fingers in an optical module according to an embodiment of the present disclosure. Figure 19 is a 180° flip of the perspective shown in Figure 17. Referring to Figures 17-20, a circuit board 300 has a first surface 302a and a second surface 303. In some examples of the present disclosure, the first surface 302a and the second surface 303 may be opposite surfaces of the circuit board 300. For example, using the orientation shown in Figure 17 as an example, the first surface 302a may be the top surface of the circuit board 300 in Figure 17, and the second surface may be the bottom surface of the circuit board 300 in Figure 17. Of course, in some examples, using the perspective shown in Figure 19 as an example, the first surface may be the bottom surface in Figure 19, and the second surface 303 may be the top surface in Figure 19.

[0133] In some examples of the embodiments of the present disclosure, the gold fingers 301a may include: a first row of gold fingers 3011 and a second row of gold fingers 3012. The first row of gold fingers 3011 may be disposed on the first surface 302a and arranged along the width direction of the circuit board 300 (e.g., the direction indicated by the y-axis in FIG. 17 ). In some examples of the embodiments of the present disclosure, the first row of gold fingers 3011 is configured to be electrically connected to a first row of metal shrapnel on a first side wall of the host computer. In some examples, the first side wall of the host computer may be a side wall opposite to the first surface 302a of the circuit board 300. It can be understood that in some examples of the embodiments of the present disclosure, the second row of gold fingers 3012 can be set on the second surface 303, and the second row of gold fingers 3012 can also be arranged along the width direction of the circuit board 300, and the second row of gold fingers 3012 is configured to be electrically connected to the second metal springs on the second side wall of the upper computer. In some examples, the second side wall of the upper computer can be the side wall opposite to the second surface 303 of the circuit board 300; that is, in some embodiments of the present disclosure, after the optical module is electrically connected to the upper computer, the circuit board is located between the first row of metal springs and the second row of metal springs.

[0134] In some examples of the embodiments of the present disclosure, there is a height difference between the surfaces of the first row of gold fingers and the surfaces of the second row of gold fingers. For example, when forming the first and second rows of gold fingers on the first and second surfaces of a circuit board, due to certain processing errors in the processing process, the surfaces of the first and second rows of gold fingers may be uneven, resulting in a height difference between the surfaces of the first and second rows of gold fingers. During the process of pulling the circuit board out from between the first and second rows of metal domes, friction between the surfaces of the first row of gold fingers and the first row of metal domes, and friction between the surfaces of the second row of gold fingers and the second row of metal domes, may cause the first row of gold fingers to pull the first row of metal domes toward the second row of metal domes, and the second row of gold fingers to pull the second row of metal domes toward the first row of metal domes, which may easily cause accidental contact between the first and second rows of metal domes.

[0135] Furthermore, to ensure the stability of the electrical connection between the circuit board and the host computer, the spacing between the first and second rows of metal domes is typically smaller than the thickness of the circuit board. This ensures that when the circuit board is inserted between them, the first and second rows of metal domes create an interference fit around the circuit board. Circuit boards are typically thin, typically around 1mm. Consequently, even after the circuit board is removed from between them, the closely spaced first and second rows of metal domes may accidentally touch each other.

[0136] Figure 21 is a perspective diagram of a gold finger structure in an optical module according to an embodiment of the present disclosure. Referring to Figure 21 , in some examples of the present disclosure, the first gold finger in the first row of gold fingers 3011 has a first contact 3013, which is configured to contact the first spring in the first row of metal springs. In some embodiments of the present disclosure, the first gold finger can be any gold finger in the first row of gold fingers 3011; in some examples, the first gold finger can also be a gold finger in the first row of gold fingers 3011 that is electrically connected to the first spring.

[0137] That is, the first row of gold fingers 3011 includes multiple first gold fingers along the arrangement direction. It is understood that in some examples, some of the multiple first gold fingers may be data signal gold fingers, such as high-speed gold fingers that transmit high-speed data signals, or low-speed gold fingers that transmit low-speed data signals; while another portion of the multiple first gold fingers may be power gold fingers, such as those that provide power to various electrical components on the circuit board. The arrangement of the multiple gold fingers along the width of the circuit board can be arranged according to relevant protocols and is not limited in this embodiment of the present disclosure.

[0138] It can be understood that the first contact 3013 can be the point or area where the first gold finger contacts the first spring. For ease of understanding, as shown in Figure 9, in some embodiments of the present disclosure, the first contact 3013 is represented by an elliptical dot. It should be noted that the shape of the first contact 3013 can also be other shapes. In the embodiments of the present disclosure, the elliptical dot is only shown as a specific example and does not limit the shape of the first contact.

[0139] In some examples of the embodiments of the present disclosure, the second gold finger of the second row of gold fingers 3012 has a second contact 3014, which is configured to contact the second spring of the second row of metal springs. It is understood that the configuration of the second contact 3014 can be the same as or similar to the configuration of the first contact 3013 in the previous embodiments of the present disclosure. For details, please refer to the detailed description of the previous embodiments of the present disclosure, and this embodiment of the present disclosure will not be repeated here.

[0140] In some embodiments of the present disclosure, the first contact and the second contact are staggered.

[0141] In some examples, the first gold finger of the first row of gold fingers 3011 can be translated by a preset distance relative to the second gold finger of the second row of gold fingers 3012. For example, as shown in FIG9 , the first gold finger of the first row of gold fingers 3011 can be translated along the direction indicated by the positive direction of the x-axis in FIG21 , thereby making the first contact point and the second contact point. It is understood that in some examples, to increase the density of gold fingers, after the first row of gold fingers 3011 are translated, the first gold finger and the second gold finger can have a partial overlapping area. In this way, the gap between adjacent gold fingers can be reduced, thereby increasing the density of gold fingers.

[0142] It is understandable that in other examples, the second gold fingers of the second row of gold fingers 3012 may be translated by a preset distance relative to the first row of gold fingers 3011 , so that the first contact and the second contact are misaligned.

[0143] The first and second contacts are offset, meaning that after the first gold fingers of the first row of gold fingers 3011 are translated a preset distance relative to the second gold fingers of the second row of gold fingers 3012, the first contacts 3013 and the second contacts 3014 do not overlap. This allows the first spring clips on the first side wall of the socket and the second spring clips on the second side wall to be completely offset, thereby preventing the first and second spring clips from accidentally touching each other after the circuit board is removed from between them, thereby improving the safety of the optical module.

[0144] As shown in Figure 21, in some examples of the embodiments of the present disclosure, the first gold finger of the first row of gold fingers and the second gold finger of the second row of gold fingers are staggered along the width direction of the circuit board, so that the first contact and the second contact are staggered along the arrangement direction of the first row of gold fingers 3011.

[0145] In some embodiments of the present disclosure, the arrangement direction of the first row of gold fingers 3011 and the arrangement direction of the second row of gold fingers 3012 can be the same, similar, or consistent. For example, the arrangement direction of the first row of gold fingers 3011 and the second row of gold fingers 3012 can both be along the width direction of the circuit board 300. For example, using Figure 21 as an example, the first row of gold fingers 3011 and the second row of gold fingers 3012 can be arranged along the direction indicated by the x-axis in Figure 21.

[0146] In some examples of the embodiments of the present disclosure, the first contact is located in the interval between two adjacent second contacts. That is, the interval between two adjacent second contacts is the first contact, and correspondingly, the interval between two adjacent first contacts is the second contact.

[0147] In some examples of the present disclosure, the first contact is located outside the second contact corresponding to the outermost second finger of the second row of gold fingers 3012. For example, as shown in FIG21 , the leftmost first contact in FIG21 is located to the left of the leftmost second contact.

[0148] In other words, in some optional examples of the embodiments of the present disclosure, as shown in Figure 21, the first contact 3013 and the second contact 3014 are misaligned along the width direction of the circuit board (for example, the direction shown by the x-axis in Figure 21), and there may be no misalignment between the first contact and the second contact along the length direction of the circuit board (for example, the direction shown by the y-axis in Figure 21).

[0149] Figure 22 is a structural diagram of the first row of gold fingers on the first surface of an optical module according to an embodiment of the present disclosure. Referring to Figure 22 , in some examples of the present disclosure, when designing the first row of gold fingers 3011 on the first surface 302a, the first row of gold fingers 3011 can be shifted by a predetermined distance along the width of the circuit board 300, thereby offsetting the first contact from the second contact on the second row of gold fingers.

[0150] In some examples, along the width direction of the circuit board 300, the circuit board 300 has a first side 304a and a second side 305. Along the arrangement direction of the first row of gold fingers 3011, a first gold finger in the first row of gold fingers 3011 facing the first side 304a is spaced apart from the first side 304a by a first distance d1, and a first gold finger in the first row of gold fingers 3011 facing the second side 305a is spaced apart from the second side 305a by a second distance d2. The first distance d1 is greater than the second distance d2. In other words, the first row of gold fingers 3011 can be shifted as a whole toward the second side by a predetermined distance.

[0151] In some examples of the embodiments of the present disclosure, the overall width of the circuit board 300 may be 16.34 mm to 16.50 mm, wherein the first distance d1 may be 1.15 mm to 1.31 mm, and the second distance d2 may be 0.73 mm to 0.89 mm. In some optional examples, as shown in FIG. 22 , the distance between the first gold finger in the first row of gold fingers 3011 facing the first side 304 a and the central axis i of the circuit board 300 is 7.0 mm, and the distance between the first gold finger in the first row of gold fingers 3011 facing the second side 305 a and the central axis i of the circuit board 300 may be 7.4 mm. That is, in one specific example, the first row of gold fingers 3011 may be shifted 0.4 mm toward the second side 305 a along the width of the circuit board 300.

[0152] FIG23 is a structural diagram of the second row of gold fingers on the second surface of the optical module provided according to an embodiment of the present disclosure. In some examples of the present disclosure, when designing the second row of gold fingers 3012 on the second surface 303, the second row of gold fingers 3012 can be designed to be normally symmetrical. In this way, since the first row of gold fingers is designed to be translated by a preset distance, the first contact and the second contact are misaligned. Of course, in other examples, as shown in FIG23 , the second row of gold fingers 3012 can also be translated as a whole along the width direction of the circuit board 300 by a preset distance. In particular, the translation direction of the second row of gold fingers 3012 along the width direction of the circuit board 300 can be opposite to the translation direction of the first row of gold fingers.

[0153] In some examples, along the arrangement direction of the second row of gold fingers 3012, a third distance d3 is defined between a second gold finger in the second row of gold fingers 3012 facing the first side surface 304a and the first side surface 304a, and a fourth distance d4 is defined between a second gold finger in the second row of gold fingers 3012 facing the second side surface 305a and the second side surface 305a; the fourth distance d4 is greater than the third distance d3. In other words, in some examples of the presently disclosed embodiments, the second row of gold fingers 3012 can be entirely translated toward the first side surface 304a by a predetermined distance, thereby completely misaligning the second contact points with the first contact points. Specifically, a first contact point is located within the gap between two adjacent second contacts, and correspondingly, a second contact point is located within the gap between two adjacent first contacts.

[0154] It is understood that in some embodiments of the present disclosure, the distance that the second row of gold fingers 3012 translates toward the first side 304a can be the same as or similar to the distance that the first row of gold fingers translates toward the second side 305a. This ensures that the first and second contacts are completely misaligned, preventing accidental contact between the first and second springs, and improving the safety of hot-plugging the optical module.

[0155] Figure 24 shows a comparison of the first and second rows of gold fingers in an optical module according to an embodiment of the present disclosure. Referring to Figure 24 , in some examples according to the present disclosure, the first distance d1 is greater than the third distance d3, and the fourth distance d4 is greater than the second distance d2. The first distance d1 and the second distance d2 have a first difference, and the fourth distance d4 and the third distance d3 have a second difference.

[0156] In some examples of the disclosed embodiments, the first difference can be 0.4 mm, meaning the first row of gold fingers 3011 is shifted 0.4 mm toward the second side 305a. It is understood that in other examples, the second difference can also be 0.4 mm, meaning the second row of gold fingers 3012 is shifted 0.4 mm toward the first side 304a. In this way, the offset distance between the first contact and the second contact along the arrangement direction of the first row of gold fingers 3011 is 0.8 mm, meaning the offset distance between the first and second rows of gold fingers 3011 and 3012 is the sum of the first difference and the second difference.

[0157] It should be noted here that the numerical values ​​and numerical ranges involved in the embodiments of the present invention are approximate values. Due to the influence of the manufacturing process, there may be a certain range of errors. Those skilled in the art may consider this part of the error to be negligible.

[0158] In some embodiments of the present disclosure, the first row of gold fingers 3011 and the second row of gold fingers 3012 are respectively translated so that the first contacts and the second contacts are misaligned along the arrangement direction of the first row of gold fingers 3011. In this way, the first row of gold fingers 3011 and the second row of gold fingers 3012 only need to be translated a small distance to meet the misalignment of the first contacts and the second contacts, which can reduce the space required to be occupied by the first row of gold fingers 3011 and the second row of gold fingers 3012, thereby reducing the size of the circuit board.

[0159] In other examples of the embodiments of the present disclosure, the width of the first gold finger of the first row of gold fingers 3011 and the width of the second gold finger of the second row of gold fingers 3012 can be the same or similar, and there is a first gap between two adjacent first gold fingers of the first row of gold fingers 3011, and there is a second gap between two adjacent second gold fingers of the second row of gold fingers 3012; wherein, the width of the first gold finger is the second gap, and the width of the second gold finger is greater than the first gap.

[0160] In some examples, the sum of the width of the first gold finger and the width of the first gap can be 0.8 mm, or in other examples, the sum of the width of the second gold finger and the width of the second gap can be 0.8 mm. This facilitates the design of the gold finger and the design of the first and second contacts on the gold finger, thereby increasing the density of the gold fingers and improving the transmission efficiency of high-speed signals in the optical module.

[0161] FIG25 is a side view 1 of the front end of the circuit board in the optical module provided in an embodiment of the present disclosure, and FIG26 is a side view 2 of the front end of the circuit board in the optical module provided in an embodiment of the present disclosure. FIG25 is a side view observed from the first side 304a, and FIG26 is a side view observed from the second side 305a. Referring to FIG25 and FIG26, the front end of the circuit board is conical, and the circuit board also has a first bevel 307, a second bevel 308, a third bevel 309 and a fourth bevel 310. The first bevel 307 is connected between the first side 304a and the front end face 306a of the circuit board, that is, the first bevel 307 can be a bevel formed at the angle between the first side 304a and the front end face 306a. In some examples, the angle between the first side 304a and the front end face 306a can be chamfered.

[0162] The second bevel 308 is connected between the first surface 302a and the front end surface 306a. In other words, the second bevel 308 can be formed between the first surface 302a and the front end surface 306a. In some examples, the angle between the first surface 302a and the front end surface 306a can be chamfered. In some examples of the embodiments of the present disclosure, the first row of gold fingers can be located at the rear end of the second bevel, that is, the first row of gold fingers can be provided on the first surface 302a.

[0163] The third inclined surface 309 is connected between the second side surface 305a and the front end surface 306a, wherein the formation method of the third inclined surface 309 can be the same as or similar to the formation method of the first inclined surface 307, and will not be repeated in the embodiment of the present disclosure.

[0164] The fourth inclined surface 310 is connected between the second surface 303 and the front end surface 306a. The formation of the fourth inclined surface 310 can be the same as or similar to the formation of the second inclined surface 308, and will not be further described in this embodiment. In some examples of the present embodiment, the second row of gold fingers can be located at the rear end of the fourth inclined surface 310, that is, the second row of gold fingers can be provided on the second surface 303.

[0165] In some examples, the first side surface 304a and the front end surface 306a form a first notch 3041 at the first bevel 307, which is the chamfering treatment of the aforementioned embodiment of the present disclosure, wherein the size of the first notch 3041 along the width direction of the circuit board is 0.25mm-0.45mm, and the inclination angle of the first bevel 307 relative to the first side surface 304a can be 45°.

[0166] In some other examples, the second side surface 305 a and the front end surface 306 a form a second notch 3051 at the third inclined surface 309 . As a specific example, the second notch 3051 may be symmetrical to the first notch 3041 .

[0167] In other examples of the embodiments of the present disclosure, the first surface 302a and the front end surface 306a form a third notch 3021 at the second bevel 308, and the dimension of the third notch 3021 along the length direction of the circuit board is 0.15mm-0.35mm, wherein the inclination angle of the second bevel 308 relative to the first surface 302a can also be 45°.

[0168] In some other examples, the second surface 303 and the front end surface 306 a form a fourth notch 3031 at the fourth inclined surface 310 . As a specific example, the fourth notch 3031 is symmetrical to the third notch 3021 .

[0169] Figure 27 is another perspective structural diagram of a gold finger in an optical module according to an embodiment of the present disclosure. In other examples of the present disclosure, as shown in Figure 27, the first contact and the second contact are offset along the extension direction of the gold finger 301a. Along the extension direction of the gold finger, the first contact is located on one side of the second contact.

[0170] In some examples of the embodiments of the present disclosure, the extension direction of the gold fingers may be the length direction of the circuit board (e.g., the direction shown by the y-axis in FIG. 27 ). That is, in some examples of the embodiments of the present disclosure, the first row of gold fingers 3011 and the second row of gold fingers 3012 may be staggered along the length direction of the circuit board, or the first contact 3013 and the second contact 3014 may be staggered.

[0171] As an optional example, as shown in FIG27 , the first row of gold fingers 3011 can be moved along the length of the circuit board as a whole toward the front face by a predetermined distance. In other examples, the first row of gold fingers 3011 can be moved along the length of the circuit board as a whole toward the front face by a predetermined distance, while the second row of gold fingers 3012 can be moved along the length of the circuit board as a whole toward the side facing away from the front face by a predetermined distance, thereby causing the first and second contacts to be misaligned along the length of the circuit board. In other words, the first contact can be located on the side of the second contact facing the front face.

[0172] It is understood that in other examples, the first row of gold fingers 3011 can be moved along the length of the circuit board as a whole, away from the front face, by a predetermined distance, while the second row of gold fingers 3012 can be moved along the length of the circuit board as a whole, toward the front face, by a predetermined distance, thereby offsetting the first and second contacts. In other words, the first contact can be located on the side of the second contact facing away from the front face. In this way, the first and second contacts are offset along the extension direction of the gold fingers 301, which can reduce the space required in the gold finger arrangement direction, thereby increasing the number of gold fingers 301 arranged, or reducing the width of the circuit board, thereby increasing the density of the gold finger arrangement.

[0173] Figure 28 is another perspective structural diagram of the gold fingers in an optical module according to an embodiment of the present disclosure. Referring to Figure 28 , in some alternative examples of the present disclosure, the first contact and the second contact are offset along the arrangement direction of the first row of gold fingers 3011; the first contact is located within the gap between two adjacent second contacts; or the first contact is located outside the second contact corresponding to the outermost second gold finger in the second row of gold fingers 3012; and the first contact and the second contact are offset along the extension direction of the gold fingers; the first contact is located on one side of the second contact along the extension direction of the gold fingers.

[0174] That is, in other examples of the embodiments of the present disclosure, the first contact and the second contact can be misaligned in both directions, that is, in the arrangement direction of the gold fingers, such as the width direction of the circuit board, the first contact and the second contact can be misaligned; in addition, the first contact and the second contact can also be misaligned in the extension direction of the gold fingers. It is understood that the misalignment in the arrangement direction of the gold fingers can be referred to the detailed description of the previous embodiments of the present disclosure, and the embodiments of the present disclosure will not be repeated. In addition, the misalignment in the extension direction of the gold fingers can also be referred to the detailed description of the previous embodiments of the present disclosure, and the embodiments of the present disclosure will not be repeated.

[0175] The optical module provided by the embodiment of the present disclosure forms a gold finger at one end of the circuit board. When the circuit board is placed in a cavity formed by the upper shell and the lower shell covering each other, the gold finger extends out of the electrical port at one end of the cavity, thereby facilitating the electrical connection between the circuit board and the host computer for transmitting electrical signals; a first row of gold fingers is provided on the first surface of the circuit board, the first row of gold fingers being arranged along the width direction of the circuit board, and the first row of gold fingers can be electrically connected to the first row of metal shrapnel on the first side wall of the host computer for transmitting electrical signals; a second row of gold fingers is provided on the second surface of the circuit board, the second row of gold fingers being arranged along the width direction of the circuit board, and the second row of gold fingers being arranged along the width direction of the circuit board. The two rows of gold fingers can be electrically connected to the second row of metal springs on the second side wall of the host computer to transmit electrical signals; the first surface and the second surface are two surfaces opposite to each other of the circuit board, the first side wall and the second side wall are two opposite side walls of the host computer, the surfaces of the first row of gold fingers and the second row of gold fingers have a height difference, and the spacing between the first row of metal springs and the second row of metal springs is less than the thickness of the circuit board; in this way, gold fingers can be formed on both surfaces opposite to each other of the circuit board, which can increase the number of gold fingers, ensure the signal transmission rate, and realize high-speed signal transmission; in addition, in the embodiment of the present disclosure, the first row of gold fingers The first gold finger of the first row of gold fingers has a first contact, and the first contact is configured to contact the first spring sheet of the first row of metal spring sheets; the second gold finger of the second row of gold fingers has a second contact, and the second contact is configured to contact the second spring sheet of the second metal spring sheet; in the embodiment of the present disclosure, the first contact and the second contact are staggered so that the first spring sheet and the second spring sheet are staggered; in this way, when the optical module is inserted into the host computer, the first spring sheet of the host computer cage contacts the first gold finger at the first contact, and the second spring sheet of the host computer contacts the second gold finger at the second contact; in the embodiment of the present disclosure, the first contact and the second The contacts are staggered so that the first spring piece and the second spring piece of the host computer cage are staggered. When the circuit board is pulled out from between the first spring piece and the second spring piece, when the height difference between the surfaces of the first row of gold fingers and the second row of gold fingers pulls up the first spring piece or the second spring piece, the staggered first spring piece and the second spring piece will not contact each other. Compared with the related art, it can avoid the situation where the first spring piece and the second spring piece of the host computer, which are closer than the thickness of the circuit board, are pulled up by the first row of gold fingers and the second row of gold fingers with a height difference on the surface, and then accidentally touch each other, thereby reducing the occurrence of dangerous situations and improving the safety of the use of optical modules.

[0176] In some examples, the first and second contacts are staggered along the arrangement of the first row of gold fingers, with the first contact located within the gap between two adjacent second contacts, or the first contact located outside the second contact corresponding to the second outermost gold finger in the second row of gold fingers. This complete staggering of the first and second contacts effectively prevents the socket's spring from accidentally contacting after the optical module is removed, and prevents the socket's spring from short-circuiting during hot-plugging of the optical module.

[0177] In some examples, the first contact and the second contact are staggered along the extension direction of the gold finger, and the first contact is located on one side of the second contact along the extension direction of the gold finger; in this way, the space required to be occupied along the arrangement direction of the gold finger can be reduced. On the one hand, the arrangement density of the gold finger can be improved, and the transmission performance of the optical module for high-speed signals can be improved. On the other hand, the width of the circuit board is reduced, and the width of the circuit board is reduced, thereby reducing the overall volume of the optical module.

[0178] In some examples of the disclosed embodiments, the first and second contacts can be staggered along the arrangement direction of the first gold fingers, and the first and second contacts can be staggered along the extension direction of the gold fingers. This improves the flexibility of gold finger staggering, and the first and second rows of gold fingers can be staggered according to actual needs, facilitating the staggered arrangement of the first and second contacts.

[0179] In other examples of the disclosed embodiments, the circuit board has a first side surface and a second side surface along the width direction of the circuit board. Along the arrangement direction of the first row of gold fingers, the first row of gold fingers can be moved as a whole toward the second side surface by a preset distance, such that a first distance between the first row of gold fingers and the first side surface is greater than a second distance between the second row of gold fingers and the second side surface. Along the arrangement direction of the second row of gold fingers, the second row of gold fingers can be moved as a whole toward the first side surface by a preset distance, such that a fourth distance between the second row of gold fingers and the second side surface is greater than a third distance between the second row of gold fingers and the first side surface. That is, when staggering the first and second contacts, the first row of gold fingers can be moved by a preset distance while the second row of gold fingers are simultaneously moved by a preset distance, with the translation direction of the first row of gold fingers being opposite to that of the second row of gold fingers. In this manner, the translation distances of both the first and second rows of gold fingers are relatively small, which can reduce the space required along the width direction of the circuit board, thereby facilitating reductions in the size of the circuit board and the size of the optical module.

[0180] In other examples of the disclosed embodiments, the front end of the circuit board is tapered, with the circuit board having a first bevel, a second bevel, a third bevel, and a fourth bevel. The first bevel is connected between the first side surface and the front end of the circuit board, and the second bevel is connected between the first surface and the front end. The third bevel is symmetrical with the first bevel, and the fourth bevel is symmetrical with the second bevel. In this way, when the optical module is inserted into the host computer, the front end of the circuit board is inserted into the socket, and the inclined first, second, third, and fourth bevels facilitate insertion between the upper and lower spring clips, thereby protecting the spring clips of the host computer socket.

[0181] Some embodiments of the present disclosure further provide an optical module, including:

[0182] Upper shell,

[0183] The lower shell is covered with the upper shell to form a cavity, and an electrical port is formed at one end of the cavity;

[0184] A circuit board is disposed in the cavity, and a gold finger is formed on one end of the circuit board, the gold finger extends out of the electrical port, and the gold finger is configured to transmit an electrical signal;

[0185] Among them, the gold fingers include:

[0186] A first row of gold fingers is provided on the first surface of the circuit board and arranged along the width direction of the circuit board. The first row of gold fingers is configured to be electrically connected to the first row of metal shrapnel on the first side wall of the host computer to transmit electrical signals;

[0187] A second row of gold fingers is provided on the second surface of the circuit board and arranged along the width direction of the circuit board. The second row of gold fingers is configured to be electrically connected to the second row of metal springs on the second side wall of the host computer to transmit electrical signals. The second surface and the first surface are two surfaces opposite to each other of the circuit board, and the first side wall and the second side wall are two side walls opposite to each other of the host computer. There is a height difference between the surfaces of the first row of gold fingers and the second row of gold fingers, and the spacing between the first row of metal springs and the second row of metal springs is less than the thickness of the circuit board.

[0188] The first gold finger of the first row of gold fingers has a first contact point, and the first contact point is configured to contact the first spring sheet of the first row of metal spring sheets; the second gold finger of the second row of gold fingers has a second contact point, and the second contact point is configured to contact the second spring sheet of the second row of metal spring sheets; the first gold finger and the second gold finger are staggered and partially overlapped, and the first contact point and the second contact point are staggered so that the first spring sheet and the second spring sheet are staggered; wherein,

[0189] Along the arrangement direction of the first row of gold fingers, the first contact is located in the interval between two adjacent second contacts; or the first contact is located outside the second contact corresponding to the outermost second gold finger in the second row of gold fingers;

[0190] Furthermore, along the extending direction of the gold finger, the first contact is located on one side of the second contact.

[0191] It can be understood that the optical module provided in the embodiment of the present disclosure can have the same or corresponding technical effects as the optical module in the aforementioned embodiment of the present disclosure. For details, please refer to the detailed description of the aforementioned embodiment of the present disclosure, and the embodiment of the present disclosure will not be repeated here.

[0192] Figure 29 is a partial structural diagram of an optical module provided according to some embodiments of the present disclosure. As shown in Figure 29, an MCU 302b and a DSP chip 303b are mounted on a circuit board 300. The DSP chip 303b and the MCU 302b are respectively connected to a gold finger 301b via signal lines. The electrical signal output by the host computer 100 is transmitted to the DSP chip 303b via the gold finger 301b. The DSP chip 303b transmits the electrical signal to the laser chip in the optical emission component 400 via the signal line, causing the laser chip to generate an optical signal, thereby achieving light emission.

[0193] The optical signal transmitted by the external optical fiber is converted into an electrical signal by the optical receiving component 500. The electrical signal is transmitted to the DSP chip 303b via the signal line. After the DSP chip 303b processes the electrical signal, it is transmitted to the gold finger 301b via the signal line. The gold finger 301b transmits the electrical signal to the host computer 100, realizing the reception of light.

[0194] In some embodiments, optical communication equipment primarily uses the NRZ code pattern for electrical signal transmission, using binary signals consisting of two levels, 0 and 1, for signal transmission. However, with the advent of the era of big data and cloud computing, higher requirements are being placed on the signal transmission rates of optical communication equipment. However, due to the limitations of electrical signal modulation and transmission rate, the binary NRZ code pattern, consisting of two levels, 0 and 1, is gradually unable to meet the current demand for high signal transmission rates. To meet the current signal transmission rate requirements, PAM4 signaling is beginning to be used for signal transmission.

[0195] Compared with NRZ signals, PAM4 code has four digital amplitude levels (such as 0, 1, 2, and 3). At the same baud rate, the bit rate can reach twice that of the NRZ code, greatly improving the transmission rate.

[0196] Taking a 50G optical module as an example, when the host computer 100 transmits electrical signals to the optical module, three methods can be used: 2×25G NRZ, 1×50G PAM4, and 1×50G NRZ. Since 1×50G NRZ has higher bandwidth requirements for the circuit board 300, 2×25G NRZ or 1×50G PAM4 signals are currently preferred.

[0197] In some embodiments, according to the transmission rate requirement of the optical module, such as 50 Gbs, the electrical signal transmitted between the host computer 100 and the gold finger 301b can be a 2×25G NRZ electrical signal or a 1×50G PAM4 electrical signal. When the optical module 200 receives the electrical signal transmitted by the host computer 100, the DSP chip 303b can only receive one type of electrical signal, such as a 2×25G NRZ electrical signal or a 1×50G PAM4 electrical signal, but cannot receive a 2×25G NRZ electrical signal and a 1×50G PAM4 electrical signal. That is, compatibility between NRZ electrical signals and PAM4 electrical signals cannot be achieved. This increases the number of optical modules connected to the host computer 100. In terms of user use, when the host computer 100 switches the output telecommunications number type, the inserted optical module needs to be switched, which increases the inconvenience of use and is not suitable for the development trend of high signal transmission rates.

[0198] In order to achieve compatibility of optical modules with NRZ electrical signals and PAM4 electrical signals, the present disclosure provides an optical module. The DSP chip in the optical module has an NRZ electrical signal processing mode and a PAM4 electrical signal processing mode. The DSP chip transmits NRZ electrical signals or PAM4 electrical signals via signal traces on a circuit board. The MCU controls the DSP chip to switch the electrical signal processing mode according to the type of electrical signal transmitted by the gold finger, so that the optical module can realize the input of NRZ electrical signals and PAM4 electrical signals, reducing the number of optical modules and providing convenience for user use. The input of NRZ electrical signals and PAM4 electrical signals can be freely switched according to the user's usage conditions.

[0199] Figure 30 is a schematic diagram of the signal principle of an optical module provided according to some embodiments of the present disclosure, and Figure 31 is a block diagram of switching different electrical signal modes in an optical module provided according to some embodiments of the present disclosure. As shown in Figures 30 and 31, to achieve compatible input of NRZ electrical signals and PAM4 electrical signals for the optical module, a register is set in MCU302b. MCU302b modifies the value of the register according to the type of electrical signal transmitted by the gold finger 301b. For example, when the electrical signal transmitted by the gold finger 301b is an NRZ electrical signal, MCU302b modifies the value of the register to 0. Then, MCU302b sends an NRZ mode instruction to DSP chip 303b based on the register value, so that DSP chip 303b switches to NRZ electrical signal processing mode. In this way, DSP chip 303b processes the received NRZ electrical signal, and the processed NRZ electrical signal is transmitted to optical emitting component 400, causing optical emitting component 400 to generate an optical signal.

[0200] When the electrical signal transmitted by the gold finger 301b is a PAM4 electrical signal, the MCU302b modifies the value of the register to 1, and then the MCU302b sends a PAM4 mode instruction to the DSP chip 303b according to the register value, so that the DSP chip 303b switches to the PAM4 electrical signal processing mode. In this way, the DSP chip 303b processes the received PAM4 electrical signal, and the processed PAM4 electrical signal is transmitted to the optical transmitting component 400, so that the optical transmitting component 400 generates an optical signal.

[0201] In some embodiments, in order to enable the DSP chip 303b to receive NRZ electrical signals and PAM4 electrical signals, the DSP chip 303b has a first electrical interface and a second electrical interface, and the gold finger 301b is connected to the first electrical interface or the second electrical interface through a signal trace laid out on the circuit board 300 to transmit the NRZ electrical signal or the PAM4 electrical signal to the DSP chip 303b.

[0202] In some embodiments, the DSP chip 303b is generally mounted on the circuit board 300 via a ball grid array (BGA) package, that is, BGA solder balls are soldered on the bottom surface of the DSP chip 303b. The BGA solder balls can be connected to the electrical interface of the DSP chip 303b via signal lines, and the BGA solder balls are soldered to the surface of the circuit board 300. In this way, the electrical signals transmitted by the circuit board 300 are transmitted to the DSP chip 303b via the BGA solder balls.

[0203] Figure 32 is a schematic diagram of the signal routing between the gold finger and the digital signal processor in an optical module according to some embodiments of the present disclosure. As shown in Figure 32, the circuit board 300 is a multi-layer board structure. The circuit board 300 generally includes a top layer 310b, a bottom layer 340, and an inner layer. The top layer 310b is located on the top surface of the circuit board 300, and the gold finger 301b is located on the top layer 310b; the bottom layer 340 is located on the bottom surface of the circuit board 300, and the inner layer is located between the top layer 310b and the bottom layer 340. The inner layer can be a single inner layer or at least two inner layers.

[0204] For example, the inner layer may include a first inner layer 320 and a second inner layer 330, the first inner layer 320 is located between the top layer 310b and the bottom layer 340, the second inner layer 330 is located between the first inner layer 320 and the bottom layer 340, the first inner layer 320 is a reference layer or a dielectric layer or a ground layer, and the second inner layer 330 is a signal layer.

[0205] When the gold finger 301b transmits an electrical signal to the DSP chip 303b through the signal trace on the circuit board 300, the signal trace can be laid out on the top layer 310b of the circuit board 300, one end of the signal trace is connected to the gold finger 301b, and the other end of the signal trace is connected to the electrical interface of the DSP chip 303b, so as to transmit the NRZ electrical signal or the PAM4 electrical signal to the DSP chip 303b through the signal trace.

[0206] If the electrical interface of the DSP chip 303b is located at the edge of the DSP chip 303b, the signal routing can be directly extended to the edge of the DSP chip 303b, and the connection between the DSP chip 303b and the signal routing can be achieved through BGA solder balls; if the electrical interface of the DSP chip 303b is located on the inner side of the DSP chip 303b, it is inconvenient to lay the signal routing under the DSP chip 303b, and the signal connection between the DSP chip 303b and the circuit board 300 can be achieved through vias.

[0207] For example, a first via and a second via are formed between the top layer 310b and the second inner layer 330. The first via is located on the outside of the DSP chip 303b, and the second via is located below the electrical interface of the DSP chip 303b. A signal line is arranged on the second inner layer 330. One end of the first via is connected to the signal trace on the top layer 310b, and the other end of the first via is connected to one end of the signal line, and the other end of the signal line is connected to the second via, and the second via is connected to the electrical interface of the DSP chip 303b. In this way, the signal connection between the DSP chip 303b and the gold finger 301b is realized through the signal trace on the top layer 310b, the first via, the signal line on the second inner layer 330, and the second via.

[0208] Figure 33 is a top-layer routing diagram of a circuit board in an optical module according to some embodiments of the present disclosure, and Figure 34 is an inner-layer routing diagram of a circuit board in an optical module according to some embodiments of the present disclosure. As shown in Figures 33 and 34, since the DSP chip 303b can receive NRZ electrical signals and PAM4 electrical signals transmitted by the gold finger 301b, in order to connect the gold finger 301b to the first electrical interface and the second electrical interface of the DSP chip 303b, a signal trace can be formed on the top layer 310b. One end of the signal trace is connected to the gold finger 301b, and the other end of the signal trace is directly connected to the first electrical interface. This allows the first electrical signal transmitted by the gold finger 301b to be transmitted to the DSP chip 303b via the signal trace on the top layer 310b. The first electrical signal can be a 2×25G NRZ NRZ electrical signal.

[0209] Since the NRZ electrical signal transmitted by the gold finger 301b is a 2×25G NRZ electrical signal, in order to transmit the 2×25G NRZ electrical signal to the DSP chip 303b through the signal routing, the first electrical interface of the DSP chip 303b includes a first electrical channel 3031 and a second electrical channel 3033. The signal routing on the top layer 310b includes a first signal routing 307b and a second signal routing 308b. One end of the first signal routing 307b is connected to the gold finger 301b, and the other end of the first signal routing 307b extends to the edge of the DSP chip 303b. The first signal routing 307b is connected to the first electrical channel 3031 to transmit the 1×25G NRZ electrical signal to the DSP chip 303b through the first signal routing 307b.

[0210] One end of the second signal trace 308b is connected to the gold finger 301b, and the other end of the second signal trace 308b extends to the edge of the DSP chip 303b. The second signal trace 308b is connected to the second electrical channel 303b3 to transmit the 1×25G NRZ electrical signal to the DSP chip 303b through the second signal trace 308b.

[0211] In some embodiments, the first signal trace 307b and the second signal trace 308b can be arranged side by side on the top layer 310b, and the first electrical channel 3031 and the second electrical channel 3033 are arranged side by side at the edge of the DSP chip 303b, so as to directly transmit the 2×25G NRZ electrical signal to the DSP chip 303b through the first signal trace 307b and the second signal trace 308b. After the DSP chip 303b receives the 2×25G NRZ electrical signal through the first electrical channel 3031 and the second electrical channel 3033, the DSP chip 303b processes the 2×25G NRZ electrical signal using the NRZ electrical signal processing mode, and transmits the processed 2×25G NRZ electrical signal to the optical emitting component 400, so that the optical emitting component 400 generates an optical signal.

[0212] In some embodiments, the 2×25G NRZ electrical signal transmitted by the gold finger 301b may contain noise. To filter out the noise, a first capacitor 304b and a second capacitor 306b are further formed on the top layer 310b. The first signal trace 307b passes through the first capacitor 304b and is connected to the first electrical channel 3031. In this way, the 1×25G NRZ electrical signal transmitted by the gold finger 301b is filtered by the first capacitor 304b and then transmitted to the DSP chip 303b through the first signal trace 307b.

[0213] The second signal trace 308b passes through the second capacitor 306b and is connected to the second electrical channel 303b3. In this way, the 1×25G NRZ electrical signal transmitted by the gold finger 301b is filtered by the second capacitor 306b and then transmitted to the DSP chip 303b through the second signal trace 308b. In this way, the 2×25G NRZ electrical signal is transmitted to the DSP chip 303b through the first signal trace 307b and the second signal trace 308b.

[0214] In some embodiments, a third signal trace may be formed on the top layer 310b. The third signal trace may be arranged side by side with the first signal trace 307b and the second signal trace 308b. Both ends of the third signal trace are connected to the gold finger 301b and the DSP chip 303b. The third signal trace is configured to transmit a second electrical signal, which may be a 1×50G PAM4 electrical signal.

[0215] The second electrical interface 3032 can be located at the edge of the DSP chip 303b. In this case, the third signal line is connected to the second electrical interface 3032. The 1×50G PAM4 electrical signal transmitted by the gold finger 301b is transmitted to the DSP chip 303b via the third signal line. After the DSP chip 303b receives the 1×50G PAM4 electrical signal through the second electrical interface 3032, the DSP chip 303b processes the 1×50G PAM4 electrical signal using the PAM4 electrical signal processing mode. The processed 1×50G PAM4 electrical signal is transmitted to the optical transmitting component 400, causing the optical transmitting component 400 to generate an optical signal.

[0216] In some embodiments, the second electrical interface 3032 may also be located on the inner side of the DSP chip 303b. In this case, a signal transmission line is arranged on an inner layer, and a first via is formed between the top layer 310b and the inner layer. The third signal line extends from the gold finger 301b to the first via. The third signal line is connected to one end of the signal transmission line through the first via. The 1×50G PAM4 electrical signal transmitted by the gold finger 301b is transmitted to the signal transmission line of the inner layer through the third signal line and the first via.

[0217] A second via is formed between the second electrical interface 3032 of the DSP chip 303b and the inner layer where the signal transmission line is located. The signal transmission line on the inner layer is connected to the second electrical interface 3032 through the second via. The 1×50G PAM4 electrical signal transmitted by the signal transmission line is transmitted to the DSP chip 303b through the second via. After the DSP chip 303b receives the 1×50G PAM4 electrical signal through the second electrical interface 3032, the DSP chip 303b processes the 1×50G PAM4 electrical signal using the PAM4 electrical signal processing mode. The processed 1×50G PAM4 electrical signal is transmitted to the optical emitting component 400, causing the optical emitting component 400 to generate an optical signal.

[0218] To filter out clutter in the 1×50G PAM4 electrical signal transmitted by the gold finger 301b, a third capacitor 305b is formed on the top layer 310b. The third signal line passes through the third capacitor 305b and is connected to the first via. In this way, the 1×50G PAM4 electrical signal transmitted by the gold finger 301b is filtered by the third capacitor 305b and then transmitted to the DSP chip 303b through the first via, the signal transmission line, and the second via.

[0219] In some embodiments, referring to Figure 34, the inner layer includes a second inner layer 330, a first via 3301b is formed between the second inner layer 330 and the top layer 310b, the first via 3301b is located on the outside of the DSP chip 303b, a signal transmission line 3302b is arranged on the second inner layer 330, a second via 3303b is formed between the second inner layer 330 and the second electrical interface 303b2 of the DSP chip 303b, one end of the signal transmission line 3302b is connected to the first via 3301b, and the other end of the signal transmission line 3302b is connected to the second via 3303b.

[0220] In this way, the 1×50G PAM4 electrical signal transmitted by the third signal trace is filtered by the third capacitor 305b, and the filtered 1×50G PAM4 electrical signal is transmitted to the signal transmission line 3302b through the first via 3301b. The 1×50G PAM4 electrical signal transmitted by the signal transmission line 3302b is transmitted to the second electrical interface 3032 of the DSP chip 303b through the second via 3303b, so that the 1×50G PAM4 electrical signal is transmitted to the DSP chip 303b.

[0221] In some embodiments, in order to reduce the loss of electrical signals caused by signal routing, the first signal routing 307b, the second signal routing 308b and the third signal routing are located on the top layer 310b. However, setting the first signal routing 307b, the second signal routing 308b and the third signal routing on the top layer 310b will occupy most of the area of ​​the top layer 310b, which is not conducive to the arrangement of other devices on the top layer 310b.

[0222] In order to reduce the area occupied by the signal routing, the first signal routing 307b and the third signal routing, or the second signal routing 308b and the third signal routing can be set to the same signal routing. For example, the first signal routing 307b and the third signal routing are the same signal routing, and branches are formed at one end of the first signal routing 307b close to the DSP chip 303b. One branch passes through the first capacitor 304b and is connected to the first electrical interface of the DSP chip 303b, so that the branch is configured to transmit the first electrical signal; the other branch passes through the third capacitor 305b and is connected to the second electrical interface of the DSP chip 303b, so that the branch is configured to transmit the second electrical signal.

[0223] Figure 35 is a top view of the routing of a circuit board in an optical module provided according to some embodiments of the present disclosure, and Figure 36 is a top view of a partial routing of a circuit board in an optical module provided according to some embodiments of the present disclosure. As shown in Figures 35 and 36, the end of the first signal trace 307b near the DSP chip 303b includes a first branch trace and a second branch trace. The first branch trace passes through the first capacitor 304b and is connected to the first electrical interface of the DSP chip 303b. The first branch trace is configured to transmit a first electrical signal; the second branch trace passes through the third capacitor 305b and is connected to the second electrical interface of the DSP chip 303b. The second branch trace is configured to transmit a second electrical signal. In this way, the first electrical signal and the second electrical signal can be transmitted through the first signal trace. The first electrical signal is an NRZ electrical signal, and the second electrical signal is a PAM4 electrical signal.

[0224] When the host computer 100 transmits an NRZ electrical signal to the gold finger 301b, the first signal trace 307b transmits a 1×25G NRZ electrical signal, which passes through the third capacitor 305b and the first capacitor 304b in sequence for filtering. The filtered 1×25G NRZ electrical signal is transmitted along the first branch trace to the first electrical channel 3031 of the DSP chip 303b. The 1×25G NRZ electrical signal transmitted by the second signal trace 308b passes through the second capacitor 306b. The 1×25G NRZ electrical signal is filtered by the second capacitor 306b and transmitted to the second electrical channel 3033 of the DSP chip 303b. As a result, a 2×25G NRZ electrical signal is transmitted to the DSP chip 303b through the first signal trace 307b and the second signal trace 308b.

[0225] When the host computer 100 transmits a PAM4 electrical signal to the gold finger 301b, the first signal trace 307b transmits a 1×50G PAM4 electrical signal, which passes through the third capacitor 305b for filtering. The filtered 1×50G PAM4 electrical signal is transmitted along the second branch trace. The 1×50G PAM4 electrical signal transmitted by the second branch trace passes through the first via 3301b and is transmitted to the signal transmission line 3302b. The 1×50G PAM4 electrical signal is transmitted to the second electrical interface 3032 of the DSP chip 303b through the signal transmission line 3302b and the second via 3303b, thereby transmitting the 1×50G PAM4 electrical signal to the DSP chip 303b through the first signal trace 307b.

[0226] In some embodiments, the second branch trace at one end of the first signal trace 307b can also transmit 1×25G NRZ electrical signals. The end of the second signal trace 308b close to the DSP chip 303b passes through a via and an inner layer signal transmission line to connect to the second electrical channel 303b3. The first branch trace at one end of the first signal trace 307b can also transmit 1×50G PAM4 electrical signals.

[0227] Since the first electrical signal is a 2×25G NRZ electrical signal and the second electrical signal is a 1×50G PAM4 electrical signal, the transmission rate of the first electrical signal is lower than the transmission rate of the second electrical signal. In order to reduce loss, the first electrical signal is transmitted to the DSP chip 303b along the first branch routing of the first signal routing 307b and the second signal routing 308b, so as to transmit the 2×25G NRZ electrical signal to the DSP chip 303b; the second electrical signal is transmitted to the DSP chip 303b along the second branch routing of the first signal routing 307b, so as to transmit the 1×50G PAM4 electrical signal to the DSP chip 303b.

[0228] In some embodiments, when a 1×25G NRZ electrical signal or a 1×50G PAM4 electrical signal is transmitted through the first signal trace 307b, in order to allow the NRZ electrical signal to be input into the DSP chip 303b through the first electrical interface and the PAM4 electrical signal to be input into the DSP chip 303b through the second electrical interface 3032, the DSP chip 303b can control the connection and disconnection of the first electrical interface and the second electrical interface 3032 according to the value of the register in the MCU 302b.

[0229] When the host computer 100 outputs an NRZ electrical signal, the MCU 302b modifies the register value to a first value, such as 0, and then the MCU 302b sends an NRZ mode instruction to the DSP chip 303b. After receiving the NRZ mode instruction, the DSP chip 303b controls the first electrical interface to be connected and the second electrical interface 303b2 to be disconnected. At the same time, the DSP chip 303b switches the working mode to the NRZ electrical signal processing mode. In this way, the 1×25G NRZ electrical signal transmitted by the first signal trace 307b passes through the third capacitor 305b and the first capacitor 304b and is transmitted along the first branch trace to the first electrical channel 303b1. The 1×25G NRZ electrical signal is input to the DSP chip 303b through the first electrical channel 303b1.

[0230] In some embodiments, the 1×25G NRZ electrical signal transmitted by the first signal trace 307b can pass through the third capacitor 305b, the first via 3301b, the signal transmission line 3302b and the second via 3303b along the second branch trace to the second electrical interface 3032. Since the second electrical interface 3032 is disconnected, the 1×25G NRZ electrical signal cannot be input into the DSP chip 303b through the second electrical interface 3032.

[0231] At the same time, the 1×25G NRZ electrical signal transmitted by the second signal trace 308b is transmitted to the second electrical channel 3033 through the second capacitor 306b. The 1×25G NRZ electrical signal is input to the DSP chip 303b through the second electrical channel 303b3. After the 2×25G NRZ electrical signal is input to the DSP chip 303b, the DSP chip 303b processes the 2×25G NRZ electrical signal through the NRZ electrical signal processing mode. The processed electrical signal is transmitted to the optical emitting component 400, causing the optical emitting component 400 to generate an optical signal.

[0232] When the host computer 100 outputs a PAM4 electrical signal, the MCU 302b modifies the register value to a second value, such as 1, and then sends a PAM4 mode instruction to the DSP chip 303b. After receiving the PAM4 mode instruction, the DSP chip 303b controls the first electrical interface to be disconnected and the second electrical interface 3032 to be connected. At the same time, the DSP chip 303b switches the working mode to the PAM4 electrical signal processing mode. In this way, the 1×50G PAM4 electrical signal transmitted by the first signal trace 307b passes through the third capacitor 305b, the first via 3301b, the signal transmission line 3302b, and the second via 3303b along the second branch trace to the second electrical interface 3032. The 1×50G PAM4 electrical signal is input to the DSP chip 303b via the second electrical interface 3032.

[0233] After the 1×50G PAM4 electrical signal is input to the DSP chip 303 b, the DSP chip 303 b processes the 1×50G PAM4 electrical signal through the PAM4 electrical signal processing mode, and transmits the processed electrical signal to the optical emitting component 400, so that the optical emitting component 400 generates an optical signal.

[0234] In some embodiments, the 1×50G PAM4 electrical signal transmitted by the first signal trace 307b can be sequentially transmitted through the third capacitor 305b and the first capacitor 304b along the first branch trace to the first electrical channel 3031. Since the first electrical channel 3031 is disconnected, the 1×50G PAM4 electrical signal cannot be input into the DSP chip 303b through the first electrical channel 3031.

[0235] In some embodiments, the first electrical interface and the second electrical interface 3032 of the DSP chip 303b may also be in an open state at all times. The first electrical interface is set to transmit only NRZ electrical signals, and the second electrical interface 3032 is set to transmit only PAM4 electrical signals. When the host computer outputs an NRZ electrical signal, the MCU302b modifies the value of the register to 0, and the MCU302b sends an NRZ mode instruction to the DSP chip 303b, and the DSP chip 303b switches the working mode to the NRZ electrical signal processing mode.

[0236] The 1×25G NRZ electrical signal transmitted by the first signal trace 307b passes through the third capacitor 305b and the first capacitor 304b and is transmitted along the first branch trace to the first electrical channel 3031. The 1×25G NRZ electrical signal is input to the DSP chip 303b via the first electrical channel 3031. The 1×25G NRZ electrical signal transmitted by the first signal trace 307b also passes through the third capacitor 305b, the first via 3301b, the signal transmission line 3302b, and the second via 3303b and is transmitted along the second branch trace to the second electrical interface 3032. Since the second electrical interface 3032 only transmits PAM4 electrical signals, the 1×25G NRZ electrical signal cannot be input to the DSP chip 303b via the second electrical interface 3032.

[0237] When the host computer outputs a PAM4 electrical signal, MCU302b modifies the register value to 1, and MCU302b sends a PAM4 mode instruction to DSP chip 303b. After receiving the PAM4 mode instruction, DSP chip 303b switches the working mode to PAM4 electrical signal processing mode.

[0238] The 1×50G PAM4 electrical signal transmitted by the first signal trace 307b passes through the third capacitor 305b, the first via 3301b, the signal transmission line 3302b, and the second via 3303b along the second branch trace to the second electrical interface 3032. The 1×50G PAM4 electrical signal is input to the DSP chip 303b through the second electrical interface 3032.

[0239] The 1×50G PAM4 electrical signal transmitted by the first signal trace 307b also passes through the third capacitor 305b and the first capacitor 304b and is transmitted along the first branch trace to the first electrical channel 3031. Since the first electrical interface only transmits NRZ electrical signals, the 1×50G PAM4 electrical signal cannot be input to the DSP chip 303b through the first electrical channel 3031.

[0240] In some embodiments, signal traces transmitting NRZ electrical signals and PAM4 electrical signals may also be arranged on other layers of the circuit board 300 . For example, signal traces transmitting NRZ electrical signals may be arranged on the top layer 310 b , and signal traces transmitting PAM4 electrical signals may be arranged on the bottom layer 340 .

[0241] FIG37 is a second top-layer routing diagram of a circuit board in an optical module according to some embodiments of the present disclosure, and FIG38 is a bottom-layer routing diagram of a circuit board in an optical module according to some embodiments of the present disclosure. As shown in Figures 37 and 38, a first gold finger 301b and a first signal line are provided on the top layer 310b of the circuit board 300. The first signal line includes a first signal trace 307b and a second signal trace 308b. The first signal trace 307b and the second signal trace 308b are respectively connected to the first gold finger 301b. The first signal trace 307b and the second signal trace 308b extend from the first gold finger 301b to the first electrical interface of the DSP chip 303b. The first signal trace 307b is directly connected to the first electrical channel 303b1 and is configured to transmit a 1×25G NRZ electrical signal. The second signal trace 308b is directly connected to the second electrical channel 303b3 and is configured to transmit a 1×25G NRZ electrical signal. In this way, the 2×25G output of the host computer 100 is transmitted through the first signal trace 307b and the second signal trace 308b. The NRZ electrical signal is transmitted to the DSP chip 303b.

[0242] After the DSP chip 303b receives the 2×25G NRZ electrical signal transmitted by the first signal line 307b and the second signal line 308b, the DSP chip 303b processes the 2×25G NRZ electrical signal through the NRZ electrical signal processing mode, and transmits the processed electrical signal to the optical transmitting component 400, so that the optical transmitting component 400 generates an optical signal.

[0243] 38 , a second gold finger 311 and a second signal line 309 b are provided on the bottom layer 340 of the circuit board 300. A via 3401 is provided between the bottom layer 340 and the top layer 310 b. One end of the second signal line 309 b is connected to the second gold finger 311, and the other end of the second signal line 309 b is connected to one end of the via 3401. The other end of the via 3401 is connected to the second electrical interface 303 b 2. In this way, when the host computer 100 outputs a PAM4 electrical signal, the second gold finger 311 transmits the 1×50G PAM4 electrical signal via the second signal line 309 b and the via 3401 to the second electrical interface 303 b 2, so that the 1×50G PAM4 electrical signal is input to the DSP chip 303 b through the second electrical interface 303 b 2.

[0244] In some embodiments, signal traces transmitting NRZ electrical signals may also be arranged on the bottom layer 340, and signal traces transmitting PAM4 electrical signals may also be arranged on the top layer 310b. As long as the NRZ electrical signals or PAM4 electrical signals transmitted by the host computer 100 can be transmitted to the DSP chip 303b, the DSP chip 303b processes the NRZ electrical signals or PAM4 electrical signals according to the corresponding electrical signal processing mode, so that the optical module can be compatible with the input NRZ electrical signals and PAM4 electrical signals.

[0245] The optical module provided by the present disclosure has a DSP chip with an NRZ electrical signal processing mode and a PAM4 electrical signal processing mode. The NRZ electrical signal or the PAM4 electrical signal is transmitted to the DSP chip through the signal traces on the circuit board. The DSP chip processes the received NRZ electrical signal through the NRZ electrical signal processing mode, or the DSP chip processes the received PAM4 electrical signal through the PAM4 electrical signal. This makes the optical module compatible with the input of NRZ electrical signals and PAM4 electrical signals, reducing the number of optical modules inserted into the host computer. The compatible optical module can enhance product competitiveness. In terms of user usage, the input mode of NRZ electrical signals and PAM4 electrical signals can be freely switched according to the user's usage conditions, thereby improving convenience.

[0246] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present disclosure.

Claims

1. An optical module, comprising: Circuit boards; Among them, a gold finger is formed at one end of the circuit board, and the gold finger is configured to transmit an electrical signal; the gold finger includes a first gold finger and a second gold finger; the circuit board includes: A first metal surface layer is located on the upper surface of the circuit board and is provided with the first gold finger; the surface of the first gold finger is configured to be connected to the spring to achieve electrical connection; a gap is provided on one side of the first gold finger, and the first gold finger includes a high-frequency signal gold finger; A second metal surface layer is located on the lower surface of the circuit board; the second metal surface layer is provided with the second gold finger; A first metal intermediate layer is located between the first metal surface layer and the second metal surface layer, is located below the first metal surface layer, and has a first insulating support layer between the first metal surface layer and the first metal surface layer; there is no metal layer in the first metal intermediate layer in the projection area of ​​the high-frequency signal gold finger; the first insulating support layer in the projection area on one side of the high-frequency signal gold finger is hollowed out; The first gold fingers are arranged along the width direction of the circuit board to form a first row of gold fingers, and the first row of gold fingers is configured to be electrically connected to a first row of metal springs on the first side wall of the host computer to transmit the electrical signal; the first row of metal springs includes the springs; The second gold fingers are arranged along the width direction of the circuit board to form a second row of gold fingers, and the second row of gold fingers are configured to be electrically connected to the second row of metal springs on the second side wall of the host computer to transmit electrical signals; the first side wall and the second side wall are two opposite side walls of the host computer; wherein the surfaces of the first row of gold fingers and the second row of gold fingers have a height difference, and the spacing between the first row of metal springs and the second row of metal springs is less than the thickness of the circuit board; The first gold finger has a first contact point, which is configured to contact the first spring sheet of the first row of gold fingers; the second gold finger has a second contact point, which is configured to contact the second spring sheet of the second row of metal spring sheets; the first contact point and the second contact point are staggered so that the first spring sheet and the second spring sheet are staggered.

2. The optical module according to claim 1, wherein: The second insulating support layer in the projection area on one side of the high-frequency signal gold finger is hollowed out, and the second insulating support layer in the projection area of ​​the high-frequency signal gold finger is hollowed out, wherein the second insulating support layer is connected to the first metal intermediate layer and is located below the first metal intermediate layer.

3. The optical module according to claim 1, wherein: The first insulating support layer in a projection area between the high-frequency signal gold finger and the edge of the circuit board is hollowed out.

4. The optical module according to claim 1, further comprising at least one metal intermediate layer; The at least one metal intermediate layer is located between the first metal intermediate layer and the second metal surface layer, and is connected to the first metal intermediate layer through an insulating support layer; the at least one metal intermediate layer in the projection area of ​​the high-frequency signal gold finger has no metal layer from top to bottom, starting from the first layer; all insulating support layers above the first metal layer in the projection area on one side of the high-frequency signal gold finger are hollowed out, wherein, The first metal layer in the high-frequency signal gold finger projection area and the first metal layer in the high-frequency signal gold finger side projection area are located on the same layer of the circuit board.

5. The optical module according to claim 1, wherein: The first insulating support layer in the projection area on the other side of the high-frequency signal gold finger is hollowed out.

6. The optical module according to claim 1, wherein: The first insulating support layer in the projection area on one side of the high-frequency signal gold finger is hollowed out to form a first groove, and two ends of the first groove are respectively flush with two ends of the projection area of ​​the spring on the high-frequency signal gold finger.

7. The optical module according to claim 1, wherein: The first insulating support layer in the projection area on one side of the high-frequency signal gold finger is hollowed out to form a first groove, and the first groove includes at least one recessed portion, and the width of the recessed portion is the width of the gap between the gold fingers on both sides of the recessed portion.

8. The optical module according to claim 7, wherein: The bottom surface of the first groove is a metal layer; in the projection area of ​​the high-frequency signal gold finger, there is no metal layer between the high-frequency signal gold finger and the metal layer on the bottom surface of the first groove; the high-frequency signal gold finger is arranged on the surface of the first insulating support layer; The second metal surface layer is located on the lower surface of the circuit board; the metal layer on the bottom surface of the first groove is located between the first metal surface layer and the second metal surface layer.

9. The optical module according to claim 8, wherein: In the high-frequency signal gold finger projection area, there is no insulating support layer between the first insulating support layer and the metal layer on the bottom surface of the first groove.

10. The optical module according to claim 8, wherein: A third groove is arranged between the high-frequency signal gold finger and the edge of the circuit board, and the bottom surface of the third groove is a metal layer.

11. The optical module according to claim 1, further comprising: Upper shell, A lower shell, which is covered with the upper shell to form a cavity, and an electrical port is formed at one end of the cavity; The circuit board is arranged in the cavity, and the gold finger extends out of the electrical port.

12. The optical module according to claim 11, wherein: The first gold finger and the second gold finger are staggered along the width direction of the circuit board, so that the first contact and the second contact are staggered along the arrangement direction of the first row of gold fingers; Along the arrangement direction of the first row of gold fingers, the first contact is located in the interval between two adjacent second contacts; or, the first contact is located on the outside of the second contact corresponding to the outermost second gold finger in the second row of gold fingers; when the circuit board is pulled out from between the first spring sheet and the second spring sheet, along the arrangement direction of the first row of gold fingers, the first spring sheet is located between two adjacent second spring sheets, or the first spring sheet is located on the outside of the outermost second spring sheet in the second row of metal spring sheets.

13. The optical module according to claim 11, wherein: The first gold finger and the second gold finger are arranged along the length direction of the circuit board, so that the first contact point and the second contact point are staggered along the extension direction of the gold finger; Along the extension direction of the gold finger, the first contact is located on one side of the second contact; when the circuit board is pulled out from between the first spring sheet and the second spring sheet, along the extension direction of the gold finger, the first spring sheet is located on one side of the second spring sheet.

14. The optical module according to claim 1, wherein: The first gold finger and the second gold finger are staggered along the width direction of the circuit board, so that the first contact and the second contact are staggered along the arrangement direction of the first row of gold fingers; Along the arrangement direction of the first row of gold fingers, the first contact is located in the interval between two adjacent second contacts; or, the first contact is located on the outside of the second contact corresponding to the outermost second gold finger in the second row of gold fingers; in a state where the circuit board is pulled out from between the first spring sheet and the second spring sheet, along the arrangement direction of the first row of gold fingers, the first spring sheet is located between two adjacent second spring sheets, or the first spring sheet is located on the outside of the outermost second spring sheet in the second row of metal spring sheets; Furthermore, the first gold finger and the second gold finger are arranged along the length direction of the circuit board, so that the first contact point and the second contact point are misaligned along the extension direction of the gold finger; Along the extension direction of the gold finger, the first contact is located on one side of the second contact; when the circuit board is extended from between the first spring sheet and the second spring sheet, along the extension direction of the gold finger, the first spring sheet is located on one side of the second spring sheet.

15. The optical module according to any one of claims 11 to 14, wherein: Along the width direction of the circuit board, the circuit board has a first side surface and a second side surface; Along the arrangement direction of the first row of gold fingers, there is a first gap between the first gold finger facing the first side surface and the first side surface. a distance, a first gold finger in the first row of gold fingers facing the second side surface has a second distance from the second side surface; the first distance is greater than the second distance; Along the arrangement direction of the second row of gold fingers, a second gold finger in the second row of gold fingers facing the first side surface has a third distance from the first side surface, and a second gold finger in the second row of gold fingers facing the second side surface has a fourth distance from the second side surface; the fourth distance is greater than the third distance; The first distance is greater than the third distance, and the fourth distance is greater than the second distance.

16. The optical module according to claim 15, wherein: The first distance has a first difference with the second distance, and the fourth distance has a second difference with the third distance; The first contact point and the second contact point are offset along the arrangement direction of the first row of gold fingers, and the offset distance between the first contact point and the second contact point is the sum of the first difference and the second difference.

17. The optical module according to claim 15, wherein: The front end of the circuit board is conical, and the circuit board also has a first inclined surface, a second inclined surface, a third inclined surface and a fourth inclined surface; The first inclined surface is connected between the first side surface and the front end surface of the circuit board, the second inclined surface is connected between the first surface and the front end surface, the third inclined surface is connected between the second side surface and the front end surface, and the fourth inclined surface is connected between the second surface and the front end surface; the first row of gold fingers is located at the rear end of the second inclined surface, and the second row of gold fingers is located at the rear end of the fourth inclined surface; the upper surface is configured as the first surface, and the lower surface is configured as the second surface.

18. The optical module according to claim 17, wherein: The first side surface and the front end surface form a first notch at the first inclined surface, and the dimension of the first notch along the width direction of the circuit board is 0.25 mm-0.45 mm; The second side surface and the front end surface form a second notch at the third inclined surface, and the second notch is symmetrical to the first notch; The first surface and the front end surface form a third notch at the second inclined surface, and the dimension of the third notch along the length direction of the circuit board is 0.15 mm-0.35 mm; The second surface and the front end surface form a fourth notch at the fourth inclined surface, and the fourth notch is symmetrical to the third notch.

19. The optical module according to any one of claims 11 to 14, wherein: The width of the first golden finger is the same as the width of the second golden finger, and there is a first gap between two adjacent first golden fingers, and there is a second gap between two adjacent second golden fingers; The width of the first golden finger is greater than the second gap, and the width of the second golden finger is greater than the first gap.

20. The optical module according to claim 1, wherein: The circuit board comprises: A top layer, located on the top surface of the circuit board, the gold finger is arranged on the top layer, a signal trace is formed on the top layer, the signal trace is connected to the gold finger, the signal trace is configured to transmit a first electrical signal or a second electrical signal, and the transmission rate of the first electrical signal is different from the transmission rate of the second electrical signal; the first metal surface layer is configured as the top layer, and the upper surface is configured as the top surface; A bottom layer is located on the bottom surface of the circuit board; the second metal surface layer is configured as the bottom layer; An inner layer, located between the top layer and the bottom layer, wherein a signal transmission line is arranged on the inner layer, and the signal transmission line is connected to the signal routing line through a via hole; the inner layer includes the first metal intermediate layer; An MCU is installed on the top layer, wherein a register is provided in the MCU, and the MCU is configured to modify the value of the register according to the type of the electrical signal transmitted by the golden finger; A digital signal processor is installed on the top layer, the digital signal processor is connected to the MCU control, the digital signal processor includes at least two electrical signal processing modes, and the digital processor is configured to switch the electrical signal processing mode according to the value of the register in the MCU; the digital signal processor includes a first electrical interface and a second electrical interface, the signal routing is directly connected to the first electrical interface, the signal routing is connected to the signal transmission line and the second electrical interface via the via, the first electrical interface is configured to transmit the first electrical signal, and the second electrical interface is configured to transmit the second electrical signal.

21. The optical module according to claim 20, wherein: The signal routing includes a first signal routing and a second signal routing, the first signal routing and the second signal routing are arranged side by side; the first signal routing includes a first branch routing and a second branch routing at one end close to the digital signal processor, the second branch routing is connected to the signal transmission line through the via, and the second branch routing is configured to transmit the second electrical signal; The first electrical interface includes a first electrical channel and a second electrical channel, the first branch routing is directly connected to the first electrical channel, the second signal routing is directly connected to the second electrical channel, the first branch routing and the second signal routing are configured to transmit a first electrical signal, and a transmission rate of the first electrical signal is lower than a transmission rate of the second electrical signal.

22. The optical module according to claim 21, wherein: A first capacitor and a third capacitor are also formed on the top layer, the first capacitor is connected to the first branch routing, the third capacitor is connected to the second branch routing, the first branch routing passes through the third capacitor and is connected to the first electrical channel, and the second branch routing passes through the third capacitor and is connected to the via and the signal transmission line.

23. The optical module according to claim 20, wherein: The signal routing includes a first signal routing, a second signal routing and a third signal routing, the first signal routing, the second signal routing and the third signal routing are arranged side by side, and the third signal routing is connected to the signal transmission line and the second electrical interface through the via hole; The first electrical interface includes a first channel and a second electrical channel, the first signal line is directly connected to the first electrical channel, and the second signal line is directly connected to the second electrical channel.

24. The optical module according to claim 20, wherein: The digital signal processor controls the connection and disconnection of the first electrical interface and the second electrical interface according to the value of the register in the MCU.

25. The optical module according to claim 24, wherein: When the value of the register in the MCU is a first value, controlling the first electrical interface to be connected and the second electrical interface to be disconnected; When the value of the register in the MCU is the second value, the first electrical interface is controlled to be disconnected and the second electrical interface is controlled to be connected.

26. The optical module according to claim 20, wherein: The first electrical interface is located at an edge of the digital signal processor, and the second electrical interface is located inside the digital signal processor.

27. The optical module according to claim 20, wherein: The first electrical signal is an NRZ electrical signal, and the second electrical signal is a PAM4 electrical signal.

28. An optical module, comprising: Circuit boards; Wherein, the circuit board comprises: A first metal surface layer is located on the upper surface of the circuit board and is provided with a gold finger; the surface of the gold finger is configured to be connected to a spring to achieve electrical connection; a gap is provided on one side of the gold finger, and the gold finger includes a high-frequency signal gold finger; A second metal surface layer is located on the lower surface of the circuit board; The first metal intermediate layer is located between the first metal surface layer and the second metal surface layer, and is located below the first metal surface layer. A first insulating support layer is arranged between the first metal surface layer and the first metal surface layer; there is no metal layer in the first metal intermediate layer within the projection area of ​​the high-frequency signal gold finger; and the first insulating support layer within the projection area on one side of the high-frequency signal gold finger is hollowed out.

29. The optical module according to claim 28, wherein: The second insulating support layer in the projection area on one side of the high-frequency signal gold finger is hollowed out, and the second insulating support layer in the projection area of ​​the high-frequency signal gold finger is hollowed out, wherein the second insulating support layer is connected to the first metal intermediate layer and is located below the first metal intermediate layer.

30. The optical module according to claim 28, wherein: The first insulating support layer in the projection area between the high-frequency signal gold finger and the edge of the circuit board is hollowed out.

31. The optical module according to claim 28, wherein: Also includes at least one metal intermediate layer; The at least one metal intermediate layer is located between the first metal intermediate layer and the second metal surface layer, and is connected to the first metal intermediate layer through an insulating support layer; the at least one metal intermediate layer in the high-frequency signal gold finger projection area has no metal layer from top to bottom, starting from the first layer; all insulating support layers above the first metal layer in the projection area on one side of the high-frequency signal gold finger are hollowed out, wherein the first metal layer in the projection area of ​​the high-frequency signal gold finger and the first metal layer in the projection area on one side of the high-frequency signal gold finger are located on the same layer of the circuit board.

32. The optical module according to claim 28, wherein: The first insulating support layer in the projection area on the other side of the high-frequency signal gold finger is hollowed out.

33. The optical module according to claim 28, wherein: The first insulating support layer in the projection area on one side of the high-frequency signal gold finger is hollowed out to form a first groove, and two ends of the first groove are respectively flush with two ends of the projection area of ​​the spring on the high-frequency signal gold finger.

34. The optical module according to claim 28, wherein: The first insulating support layer in the projection area on one side of the high-frequency signal gold finger is hollowed out to form a first groove, and the first groove includes at least one recessed portion, and the width of the recessed portion is the width of the gap between the gold fingers on both sides of the recessed portion.