System and method for gate leak detection for inverter for electric vehicle

Abstract

A system includes: an inverter configured to convert DC power from a battery to AC power to drive a motor, where the inverter includes: one or more controllers configured to provide a test signal to control a gate leakage detection operation; and a power module, the power module comprising: a phase switching member, the phase switching member comprising one or more phase power switching members; and a point of use controller configured to detect a gate leakage of the phase switching element based on the test signal.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 377,486 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,501 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,512 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 378,601 filed on October 6, 2022, and U.S. Non-Provisional Patent Application No. 18 / 169,401 filed on February 15, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Various embodiments of the present disclosure relate generally to systems and methods for gate leakage detection for an inverter for an electric vehicle, and more particularly to systems and methods for monitoring gate leakage of power device switches for an inverter for an electric vehicle. Background Art

[0004] Inverters, such as those used to drive motors in electric vehicles, are responsible for, for example, converting high voltage direct current (HVDC) to alternating current (AC) to drive the motor. In an inverter, gate leakage of power device switches can impair proper operation of the inverter.

[0005] The present disclosure is directed to overcoming one or more of these aforementioned challenges. Summary of the invention

[0006] In some aspects, the technology described herein relates to a system comprising: an inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: one or more controllers configured to provide a test signal to control a gate leakage detection operation; and a power module comprising: a phase switching element comprising one or more phase power switching elements; and a point-of-use controller configured to detect gate leakage of the phase switching element based on the test signal.

[0007] In some aspects, the technology described herein relates to a system wherein the one or more phase power switches include one or more silicon carbide grains.

[0008] In some aspects, the technology described herein relates to a system in which a power module is configured to connect to terminals of a battery and phase terminals of a motor.

[0009] In some aspects, the technology described herein relates to a system in which gate terminals of the one or more phase power switches are connected to a point-of-use controller within a power module.

[0010] In some aspects, the technology described herein relates to a system in which a point-of-use controller includes a resistor divider.

[0011] In some aspects, the technology described herein relates to a system in which a point-of-use controller includes a current-to-voltage converter.

[0012] In some aspects, the technology described herein relates to a system in which a point-of-use controller includes a switched capacitor amplifier circuit.

[0013] In some aspects, the technology described herein relates to a system that further includes a battery configured to supply DC power to an inverter and a motor configured to receive AC power from the inverter to drive the motor.

[0014] In some aspects, the technology described herein relates to a system comprising: a power module, the power module being for an inverter, the power module comprising: a phase switching device, the phase switching device comprising one or more phase power switching devices; and a point-of-use controller, the point-of-use controller being configured to detect gate leakage of the phase switching device.

[0015] In some aspects, the technology described herein relates to a system in which a point-of-use controller includes an embedded gate leakage measurement circuit configured to detect gate leakage of a phase switching device.

[0016] In some aspects, the technology described herein relates to a system in which drain terminals and source terminals of the one or more phase power switches are externally accessible and gate terminals of the one or more phase power switches are inaccessible from outside the power module.

[0017] In some aspects, the technology described herein relates to a system wherein the point-of-use controller is further configured to provide the detected gate leakage to one or more controllers of the inverter.

[0018] In some aspects, the techniques described herein relate to a system wherein the detected gate leakage is an amount of gate-to-source leakage current of the one or more phase power switches at a gate-to-source voltage.

[0019] In some aspects, the technology described herein relates to a system wherein the point of use controller is further configured to detect a signature leakage for the point of use controller and to detect a gate leakage for the point of use controller and the one or more phase power switches.

[0020] In some aspects, the technology described herein relates to a system that includes one or more point-of-use controllers for a power module, the one or more point-of-use controllers being configured to detect gate leakage of a power switch of the power module.

[0021] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to: receive a test voltage; apply a gate-to-source voltage to a power switching device based on the test voltage; and measure a gate current of the power switching device as detected gate leakage based on the gate-to-source voltage.

[0022] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to: apply a gate-to-source voltage of 0V; measure a gate current of the power switching device as 0A; and measure the current of the one or more point-of-use controllers as a characteristic gate leakage of the one or more point-of-use controllers.

[0023] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to provide the detected gate leakage to one or more controllers of an inverter including the power module.

[0024] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to provide the detected gate leakage to one or more controllers of a tester in an end-of-line test.

[0025] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to detect gate leakage of a power switch of the power module at each power-up cycle for the power module.

[0026] Other objects and advantages of the disclosed embodiments will be described in part in the following description, and in part will be obvious from the description, or can be understood by practicing the disclosed embodiments. The objects and advantages of the disclosed embodiments will be realized and achieved by means of the elements and combinations particularly pointed out in the appended claims.

[0027] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments, as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various exemplary embodiments and, together with the description, serve to explain the principles of the disclosed embodiments.

[0029] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter is depicted according to one or more embodiments.

[0030] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 An exemplary system infrastructure of a combined inverter and converter.

[0031] Figure 3 Describes a method for Figure 2 An exemplary system infrastructure for a controller of FIG.

[0032] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure for a point-of-use switching controller.

[0033] Figure 5 Describes a method for Figure 4 An exemplary system infrastructure of an upper power module.

[0034] Figure 6 An exemplary production line test system for detecting gate leakage of a power device switch is depicted in accordance with one or more embodiments.

[0035] Figure 7 An exemplary point-of-use test system for detecting gate leakage of a power device switch is depicted in accordance with one or more embodiments.

[0036] Figure 8 Depicted is a method for operating according to one or more embodiments Figure 7 An exemplary procedure for a point-of-use testing system.

[0037] Fig. 9 An exemplary gate leakage detector for detecting gate leakage of a power device switch according to one or more embodiments is depicted.

[0038] Fig.10 An exemplary process for detecting gate leakage for a point of use controller for a power device switch is depicted in accordance with one or more embodiments.

[0039] Fig.11 An exemplary process for detecting total gate leakage of a point-of-use controller and power device switches according to one or more embodiments is depicted.

[0040] Fig.12An exemplary process for requesting a temperature for use in detecting gate leakage of a power device switch is depicted in accordance with one or more embodiments. DETAILED DESCRIPTION

[0041] Both the foregoing general description and the following detailed description are exemplary and explanatory only and do not constrain the claimed features. As used herein, the terms "comprises," "comprising," "has," "having," "includes," "including," or other variations thereof are intended to encompass non-exclusive inclusions such that a process, method, article, or device that includes a series of elements includes not only those elements, but may also include other elements that are not explicitly listed or inherent to such process, method, article, or device. In the present disclosure, unless otherwise stated, relative terms (such as, for example, "about," "substantially," and "approximately") are used to indicate possible ±10% variations in the stated values. In the present disclosure, unless otherwise stated, any numerical value may include possible ±10% variations in the stated values.

[0042] The terms used below may be interpreted in their broadest reasonable manner, although they are being used in conjunction with a detailed description of certain specific examples of the present disclosure. Indeed, certain terms may even be emphasized below; however, any term intended to be interpreted in any constrained manner will be explicitly and specifically defined as such in this detailed description. For example, in the context of the present disclosure, a switching device may be described as a switching element or device, but may refer to any device for controlling power flow in a circuit. For example, a switching element may be, for example, a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT) or a relay, or any combination thereof, but is not limited thereto.

[0043] Various embodiments of the present disclosure relate generally to systems and methods for gate leakage detection for an inverter for an electric vehicle, and more particularly to systems and methods for monitoring gate leakage of power device switches for an inverter for an electric vehicle.

[0044] Inverters (such as those used to drive motors in electric vehicles) are responsible for converting high voltage direct current (HVDC) into alternating current (AC) to drive the motor. A three-phase inverter may include a bridge having six power device switches (e.g., power transistors such as IGBTs or MOSFETs) that are controlled by pulse width modulation (PWM) signals generated by a controller. The inverter may include three-phase switches to control phase voltages, upper and lower gate drivers to control the switches, a PWM controller, and glue logic between the PWM controller and the gate driver. The PWM controller may generate signals to define the expected state of the system. The gate driver may send signals from the PWM controller to the phase switches. The phase switches may drive the phase voltages. The inverter may include an isolation barrier between a low voltage plane and a high voltage plane. The signal may be passed from the PWM controller to the phase switch by passing through an isolation barrier, which may employ optical, converter-based, or capacitor-based isolation. The PWM signal may be distorted when passing through the glue logic, which may include resistive, capacitive, or other types of filtering. Due to the electrical isolation barrier and other delays within the gate driver, the PWM signal may be distorted when passing through the gate driver. The PWM signal may be distorted when the signal is processed by the phase switching device via the gate driver output.

[0045] Gate drivers withstand common-mode transients that occur during field effect transistor (FET) switching and when one side of a floating high voltage terminal is shorted to ground or subjected to electrostatic discharge. These voltage transients can cause fast edges that can form common-mode current bursts through electrical isolation. Gate drivers may need to demonstrate common-mode transient immunity (CMTI) in order to be effective and safe.

[0046] The gate driver may have a high voltage domain in common with the voltage plane of the associated FET. Further, the high voltage plane may be supplied by a flyback converter, which may be isolated from the low voltage plane by a transformer. The high voltage domain power supply may be used to provide power to such a circuit that sources and sinks gate current to drive the FET and can detect FET faults, thereby acting on the faults and / or transmitting the faults to the low voltage domain. The gate driver may include an electrical channel dedicated to FET commands, and one or more bidirectional or unidirectional electrical channels dedicated to FET communications.

[0047] High current switching transients can form strong electromagnetic (EM) fields that can couple into nearby metal traces. The magnitude and frequency of the coupled current can depend on the layout of the FET packaging solution and the direction and length of the metal traces between the FET and the control integrated circuit (IC). For example, a typical value for the coupled current can be up to 1A at an AC frequency of up to 100MHz. Typically, within the circuit, the gate driver IC can be placed far enough away from the FET so that the high EM field is not directly coupled into the internal metal traces within the gate driver IC. The gate driver is placed at a distance from the EM field so that the induced current within the circuit is below the level that will cause the gate driver to malfunction, or a metal shield is placed between the gate driver and the source of the EM field to protect the gate driver circuit. The output terminals of the gate driver connected to the FET are exposed to the EM field at a point where the output terminals are no longer covered by the shield. The gate driver switches large currents (e.g., such as 5A to 15A) through these exposed terminals. The large currents switched are usually larger in magnitude than the EM induced current. The gate driver can overdrive the induced current to maintain control of the FET. The gate driver and the high side of the FET may share a common ground and gate control signal trace, both of which may be susceptible to coupled currents.

[0048] The gate driver can turn on low resistance switches to source and sink gate current. Sometimes a series resistor can be added to limit the gate current. The switched gate current can be greater than the coupling current in order to maintain control of their respective FETs.

[0049] The gate driver may be able to sense the FET operating voltage or current in order to provide feedback and react to faults. An overcurrent fault may typically be detected by sensing the FET drain to source voltage and comparing the sensed voltage to a reference value. The sensed voltage may be heavily filtered to reject coupled currents. Filtering may slow the response to a fault condition, causing a delay in response. For example, the rate of current increase due to a low resistance short may reach damaging levels before being detected by a heavily filtered drain to source voltage detection strategy. The resulting short may damage the FET or the vehicle before being detected and cut off.

[0050] According to one or more embodiments, a FET driver circuit may provide fast overcurrent detection by shunt current sensing, or by diverting a portion of the load current through a parallel FET that may have a current sensing circuit. Utilizing either strategy may require a "point of use IC" in which the sensing circuit is very close to the FET. Even if the point of use IC and the remote controller are resistant to EM fields, the communication between the point of use IC and the remote controller is still susceptible to induced currents. Point of use ICs have been implemented in low EM field applications, such as smart FETs for automotive applications. However, point of use ICs have not yet been used in high EM field applications. High EM fields can be fields that (i) induce a current within the IC that exceeds the operating current of the IC and causes a malfunction, or (ii) induce a differential voltage within the IC that exceeds the operating differential voltage and causes a malfunction. High EM fields can be, for example, fields greater than about 10A or about 100V.

[0051] As introduced above, for example, gate leakage can be an important precursor to destructively causing failures in power switches, such as switches that include silicon carbide (SiC) grains, and can be an important health check indicator before a power switch fails. An increase in gate leakage up to a certain point indicates that a healthy device has degraded to a point where destructive failure may occur. An increase in gate leakage current can occur in a linear or nonlinear manner and quickly lead to device destruction. For example, in a healthy SiC device, gate leakage is typically very low, such as tens of nA. The absolute value of the gate leakage current for a healthy device and for a degraded device is a function of the total gate area and gate dielectric quality for the MOSFET.

[0052] One or more embodiments may detect a resistive trace short or high leakage path between a point of use controller and a gate terminal of a power switch such as SiC.

[0053] Impact ionization and / or anode hole injection triggered by the high oxide electric field causes hole capture, which increases the gate leakage current and reduces the threshold voltage of the device. Using only electron capture (at lower gate voltages), the gate leakage current continues to decrease. Ion implantation is commonly used in SiC power MOSFET manufacturing, followed by high temperature annealing. The ion implantation process forms damage in the SiC crystal and thus affects the gate oxide reliability and robustness. The SiO2 layer grown on SiC has a large number of extrinsic defects that can accelerate the degradation of the gate oxide and cause early failure. When a gate driver is used with a SiC FET, it becomes difficult to keep track of the gate leakage because the gate of the SiC FET cannot be accessed externally. By using an integrated circuit enclosed with a SiC FET, the gate leakage current can be accurately determined and the system can be kept updated about the SiC and module health.

[0054] One or more embodiments may provide a non-intrusive method for gate leakage detection that can be used to determine the performance of SiC and modules throughout their useful life and during end-of-line testing. Gate leakage measurements may be compensated for temperature and system-level offset errors, which may improve the accuracy of the overall leakage measurement system. One or more embodiments may provide a system for gate leakage measurement, where aged SiC devices / modules may be accurately monitored over the useful life of the component, and where leakage data may be stored in system memory.

[0055] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter according to one or more embodiments is depicted. In the context of the present disclosure, the combined inverter and converter may be referred to as an inverter. Figure 1 As shown, the electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include a component for receiving electric power from an external source and outputting electric power to charge the battery 195 of the electric vehicle 100. For example, the inverter 110 may convert DC power from the battery 195 in the electric vehicle 100 into AC power to drive the motor 190 of the electric vehicle 100, but the embodiment is not limited thereto. For example, the inverter 110 may be bidirectional and may convert DC power into AC power, or convert AC power into DC power, such as during regenerative braking. The inverter 110 may be a three-phase inverter, a single-phase inverter, or a multi-phase inverter.

[0056] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 The electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include an inverter controller 300 ( Figure 314). The inverter 110 may include a low voltage upper phase controller 120 separated from a high voltage upper phase controller 130 by an electrical isolator 150, and an upper phase power module 140. The upper phase power module 140 may include a point-of-use upper phase controller 142 and an upper phase switch 144. The inverter 110 may include a low voltage lower phase controller 125 separated from a high voltage lower phase controller 135 by an electrical isolator 150, and a lower phase power module 145. The lower phase power module 145 may include a point-of-use lower phase controller 146 and a lower phase switch 148. The upper phase switch 144 and the lower phase switch 148 may be connected to a motor 190 and a battery 195. The electrical isolator 150 may be one or more of optical, converter-based, or capacitor-based isolation. For example, the electrical isolator 150 may be one or more capacitors having a value from about 20 fF to about 100 fF, having a breakdown voltage from about 6 kV to about 12 kV. The electrical isolator 150 may include a pair of capacitors, wherein one capacitor in the pair carries an inverted data signal from the other capacitor in the pair to form a differential signal that is rejected for common mode noise. The electrical isolator 150 may include more than one capacitor in series. The electrical isolator 150 may include one capacitor located on a first IC, or may include a first capacitor located on a first IC and a second capacitor located on a second IC that communicates with the first IC.

[0057] The inverter 110 may include a low voltage region (e.g., where the voltage is typically less than 5V) and a high voltage region (e.g., where the voltage may exceed 500V). The low voltage region may be separated from the high voltage region by an electrical isolator 150. The inverter controller 300 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the low voltage upper phase controller 120. The low voltage upper phase controller 120 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the high voltage upper phase controller 130. The low voltage upper phase controller 120 may send a signal to and receive a signal from the low voltage lower phase controller 125. The high voltage upper phase controller 130 may be in the high voltage region of the inverter 110. Therefore, the signal between the low voltage upper phase controller 120 and the high voltage upper phase controller 130 passes through the electrical isolator 150. The high voltage upper phase controller 130 may send signals to and receive signals from a point-of-use upper phase controller 142 in the upper phase power module 140. The point-of-use upper phase controller 142 may send signals to and receive signals from an upper phase switch 144. The upper phase switch 144 may be connected to a motor 190 and a battery 195. For example, the upper phase switch 144 and the lower phase switch 148 may be used to transfer energy from the motor 190 to the battery 195, from the battery 195 to the motor 190, from an external source to the battery 195, or from the battery 195 to an external source. The lower phase system of the inverter 110 may be similar to the upper phase system described above.

[0058] Figure 3 Describes a method for Figure 2 FIG. 3 is an exemplary system infrastructure of an inverter controller 300 . The inverter controller 300 may include one or more controllers.

[0059] The inverter controller 300 may include a set of instructions that can be executed to cause the inverter controller 300 to perform any one or more of the methods or computer-based functions disclosed herein. The inverter controller 300 may operate as a standalone device, or may be connected to other computer systems or peripheral devices, for example using a network.

[0060] In a networked deployment, the inverter controller 300 can operate in the capacity of a server, or as a client in a server-client user network environment, or as a peer computer system in a peer (or distributed) network environment. The inverter controller 300 can also be implemented as or incorporated into various devices, such as a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile device, a palmtop computer, a laptop computer, a desktop computer, a communication device, a wireless phone, a landline phone, a control system, a camera, a scanner, a fax machine, a printer, a pager, a personal trusted device, a network device, a network router, a switch or bridge, or any other machine capable of executing a set of instructions (sequentially or otherwise) (the set of instructions specifies the actions to be taken by the machine). In a specific implementation, the inverter controller 300 can be implemented using an electronic device that provides voice, video or data communication. Further, although the inverter controller 300 is illustrated as a single system, the term “system” should also be understood to include any collection of systems or subsystems that individually or jointly execute one or more sets of instructions to perform one or more computer functions.

[0061] like Figure 3 As shown, the inverter controller 300 may include a processor 302, such as a central processing unit (CPU), a graphics processing unit (GPU), or both. The processor 302 may be a component in a variety of systems. For example, the processor 302 may be part of a standard inverter. The processor 302 may be one or more general-purpose processors, digital signal processors, application-specific integrated circuits, field programmable gate arrays, servers, networks, digital circuits, analog circuits, combinations thereof, or other devices now known or later developed for analyzing and processing data. The processor 302 may implement a software program, such as a manually generated (i.e., programmed) code.

[0062] The inverter controller 300 may include a memory 304 that can communicate via a bus 308. The memory 304 may be a main memory, a static memory, or a dynamic memory. The memory 304 may include, but is not limited to, computer-readable storage media, such as various types of volatile and non-volatile storage media, including but not limited to random access memory, read-only memory, programmable read-only memory, electrically programmable read-only memory, electrically erasable read-only memory, flash memory, tape or disk, optical media, etc. In one specific implementation, the memory 304 includes a cache or random access memory for the processor 302. In an alternative specific implementation, the memory 304 is separated from the processor 302, such as a cache memory, system memory, or other memory of the processor. The memory 304 may be an external storage device or database for storing data. Examples include a hard drive, a compact disk ("CD"), a digital video disk ("DVD"), a memory card, a memory stick, a floppy disk, a universal serial bus ("USB") storage device, or any other device operable to store data. The memory 304 is operable to store instructions that can be executed by the processor 302. The functions, actions, or tasks illustrated in the figures or described herein may be performed by the processor 302 executing instructions stored in the memory 304. The functions, actions, or tasks are not related to a particular type of instruction set, storage medium, processor, or processing strategy, and may be performed by software, hardware, integrated circuits, firmware, microcode, etc. operating alone or in combination. Likewise, processing strategies may include multi-processing, multi-tasking, parallel processing, etc.

[0063] As shown, the inverter controller 300 may further include a display 310, such as a liquid crystal display (LCD), an organic light emitting diode (OLED), a flat panel display, a solid state display, a cathode ray tube (CRT), a projector, a printer, or other display devices known now or later developed for outputting the determined information. The display 310 may serve as an interface for a user to view the operation of the processor 302, or specifically serve as an interface with the software stored in the memory 304 or in the drive unit 306.

[0064] Additionally or alternatively, the inverter controller 300 may include an input device 312 configured to allow a user to interact with any of the components of the inverter controller 300. The input device 312 may be a numeric keypad, a keyboard or a cursor control device (such as a mouse or a joystick), a touch screen display, a remote control, or any other device operable to interact with the inverter controller 300.

[0065] The inverter controller 300 may also or alternatively include a drive unit 306 implemented as a disk or optical drive. The drive unit 306 may include a computer-readable medium 322 in which one or more sets of instructions 324 (e.g., software) may be embedded. Further, the instructions 324 may embody one or more of the methods or logics described herein. The instructions 324 may reside completely or partially within the memory 304 and / or within the processor 302 during execution by the inverter controller 300. The memory 304 and the processor 302 may also include computer-readable media as described above.

[0066] In some systems, the computer-readable medium 322 includes instructions 324 or receives and executes instructions 324 in response to a propagated signal, so that a device connected to the network 370 can transmit voice, video, audio, images, or any other data through the network 370. Further, the instructions 324 can be transmitted or received through the network 370 and / or using the bus 308 via the communication port or interface 320. The communication port or interface 320 can be part of the processor 302 or can be an independent component. The communication port or interface 320 can be formed in software or can be a physical connector in hardware. The communication port or interface 320 can be configured to connect to the network 370, external media, display 310, or any other component in the inverter controller 300, or a combination thereof. The connection to the network 370 can be a physical connection (such as a wired Ethernet connection) or can be established wirelessly, as described below. Similarly, additional connections to other components of the inverter controller 300 can be physical connections or can be established wirelessly. The network 370 can alternatively be directly connected to the bus 308.

[0067] Although the computer-readable medium 322 is shown as a single medium, the term "computer-readable medium" may include a single medium or multiple media (such as a centralized or distributed database and / or associated caches and servers) that store one or more sets of instructions. The term "computer-readable medium" may also include any medium capable of storing, encoding, or carrying a set of instructions for execution by a processor or causing a computer system to perform any one or more of the methods or operations disclosed herein. The computer-readable medium 322 may be non-transitory and may be tangible.

[0068] Computer readable medium 322 may include solid-state memory, such as a memory card or other package that accommodates one or more non-volatile read-only memories. Computer readable medium 322 may be random access memory or other volatile rewritable memory. Additionally or alternatively, computer readable medium 322 may include magneto-optical or optical media, such as a disk or tape or other storage device for capturing carrier signals (such as signals transmitted through a transmission medium). Digital file attachments to emails or other self-contained information archives or archive sets may be considered distribution media as tangible storage media. Therefore, the present disclosure is considered to include any one or more of computer-readable media or distribution media and other equivalents and successor media in which data or instructions may be stored.

[0069] In alternative implementations, dedicated hardware implementations (such as application specific integrated circuits, programmable logic arrays, and other hardware devices) may be constructed to implement one or more of the methods described herein. Applications that may include the apparatus and systems of various implementations may broadly include a variety of electronic and computer systems. One or more implementations described herein may use two or more specific interconnected hardware modules or devices with associated control and data signals that may be transmitted between and through the modules or as part of an application specific integrated circuit to implement functionality. Thus, the present system encompasses software, firmware, and hardware implementations.

[0070] The inverter controller 300 may be connected to a network 370. The network 370 may define one or more networks, including wired or wireless networks. The wireless network may be a cellular telephone network, an 802.11, 802.16, 802.20, or WiMAX network. Further, such networks may include public networks (such as the Internet), private networks (such as intranets), or combinations thereof and may utilize a variety of networking protocols that are now available or later developed, including but not limited to TCP / IP-based networking protocols. The network 370 may include a wide area network (WAN) (such as the Internet), a local area network (LAN), a campus area network, a metropolitan area network, a direct connection (such as through a universal serial bus (USB) port), or any other network that allows data communication. The network 370 may be configured to couple one computing device to another computing device to enable data communication between devices. The network 370 may generally be enabled to use any form of machine-readable media to transmit information from one device to another. The network 370 may include a communication method by which information can travel between computing devices. The network 370 may be divided into subnetworks. A subnetwork may allow access to all other components connected to it, or a subnetwork may restrict access between components. Network 370 may be considered a public or private network connection and may include, for example, a virtual private network or encryption or other security mechanisms employed over the public Internet.

[0071] According to various implementations of the present disclosure, the methods described herein may be implemented by a software program that can be executed by a computer system. Further, in an exemplary non-limiting implementation, the implementation may include distributed processing, component or object distributed processing, and parallel processing. Alternatively, a virtual computer system process may be constructed to implement one or more of the methods or functionalities described herein.

[0072] Although this specification describes components and functions that can be implemented in a specific implementation with reference to specific standards and protocols, the present disclosure is not limited to such standards and protocols. For example, standards for Internet and other packet-switched network transmissions (e.g., TCP / IP, UDP / IP, HTML, HTTP) represent examples of the prior art. Such standards are periodically replaced by faster or more efficient equivalents having substantially the same functionality. Therefore, alternative standards and protocols having the same or similar functionality as those disclosed herein are considered equivalents thereof.

[0073] It will be appreciated that, in one embodiment, the operations of the methods discussed are performed by an appropriate processor (or processors) of a processing (i.e., computer) system executing instructions (computer readable code) stored in a storage device. It will also be appreciated that the present disclosure is not limited to any particular implementation or programming technique, and that the present disclosure may be implemented using any suitable technique for implementing the functionality described herein. The present disclosure is not limited to any particular programming language or operating system.

[0074] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure of a point-of-use switching controller. For a three-phase inverter, each of the upper phase and the lower phase may include three phases related to phases A, B, and C. For example, the upper phase power module 140 may include an upper phase power module 140A for upper phase A, an upper phase power module 140B for upper phase B, and an upper phase power module 140C for upper phase C. The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switching element 144A. The upper phase power module 140B may include a point-of-use upper phase B controller 142B and an upper phase B switching element 144B. The upper phase power module 140C may include a point-of-use upper phase C controller 142C and an upper phase C switching element 144C. Each of the upper phase A switching member 144A, the upper phase B switching member 144B, and the upper phase C switching member 144C may be connected to the motor 190 and the battery 195 . Figure 4 Details of the upper phase power module 140 are depicted. Although not shown, the lower phase power module 145 may include a similar structure as the upper phase power module 140 for the lower phases A, B, and C.

[0075] Figure 5 Describes a method for Figure 4 Example system infrastructure for the upper power module. For example, Figure 5 Additional details of upper phase power module 140A are provided. Although not shown, upper phase power module 140B, upper phase power module 140C, and respective lower phase power modules of lower phase power module 145 may include components related to Figure 5 The upper phase power module 140A shown in FIG. 1 is similar in structure to the upper phase power module 140A shown in FIG. 1. In addition, the terms "upper", "lower", "northern", and "southern" as used in this disclosure are used for reference only, do not limit the elements to a particular orientation, and are generally interchangeable throughout the text. For example, the upper phase power module 140 may be referred to as a lower phase power module, a northern phase power module, a southern phase power module, a first phase power module, or a second phase power module.

[0076] The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switch 144A. The upper phase A switch 144A may include one or more sets of switches. Figure 5 As shown, the upper phase A switch 144A may include an upper phase A north switch 144A-N and an upper phase A south switch 144A-S. The point-of-use upper phase A controller 142A may include one or more memories, controllers, or sensors. For example, the point-of-use upper phase A controller 142A may include a communication manager 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. The point-of-use upper phase A controller 142A may include a controller 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. Figure 5 More or fewer components than those shown. For example, the point-of-use upper phase A controller 142A may include more or less than two switch controls and diagnostic controllers, and may include more than two thermal sensors.

[0077] The communication manager 405 may control inter-controller communications to and from the point-of-use upper phase A controller 142A and / or may control intra-controller communications between components of the point-of-use upper phase A controller 142A. The functional safety controller 410 may control safety functions of the point-of-use upper phase A controller 142A. For example, the test interface and controller 415 may control test functions of the point-of-use upper phase A controller 142A, such as end-of-line testing in manufacturing. The north thermal sensor 420A may sense the temperature at a first location in the point-of-use upper phase A controller 142A, and the south thermal sensor 420B may sense the temperature at a second location in the point-of-use upper phase A controller 142A. For example, the self-test controller 425 may control self-test functions of the point-of-use upper phase A controller 142A, such as during initialization of the point-of-use upper phase A controller 142A after an inverter 110 power-on event. The command manager 430 may control commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The waveform adjuster 435 may control the waveform timing and shape of the commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The memory 440 may include one or more volatile and non-volatile storage media for the operation of the point-of-use upper phase A controller 142A. The north switch control and diagnostic controller 450N may send one or more signals to the north switch 144A-N to control the operation of the north switch 144A-N, and may receive one or more signals from the north switch 144A-N that provide information about the north switch 144A-N. The south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-S to control the operation of the south switches 144A-S, and may receive one or more signals from the south switches 144A-S providing information about the south switches 144A-S. As described above, the terms "north" and "south" are used for reference only, and the north switch control and diagnostic controller 450N may send one or more signals to the south switches 144A-S, and the south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-N.

[0078] Figure 6 An exemplary production line test system for detecting gate leakage of a power device switch is depicted in accordance with one or more embodiments.

[0079] For example, gate-to-source leakage is an important precursor to failures that destructively cause power switching components (such as SiC) and can provide a health check indicator before the power switching component fails. An increase of 5 to 10 times in gate-to-source leakage indicates that a healthy device has been compromised and may cause system failure. For example, in a healthy power switching device, gate-to-source leakage is typically very low, such as a few nA. Possible root causes of increased gate-to-source leakage include impact ionization and / or anode hole injection triggered by high oxide electric fields that cause hole capture, which increases the gate leakage current and reduces the device gate-to-source threshold voltage. Using only electron capture (at lower gate voltages), the gate leakage current continues to decrease. The increase in gate-to-source leakage current can occur in a nonlinear manner and quickly cause device destruction.

[0080] Ion implantation is commonly used in the manufacture of SiC power MOSFETs, followed by high temperature annealing. The ion implantation process forms damage in the SiC crystal and thus affects the gate oxide reliability and robustness. The SiO2 layer grown on SiC has a large number of extrinsic defects that can accelerate the degradation of the gate oxide and cause early failure.

[0081] In order to avoid the possibility of catastrophic failure, any increase in gate to source leakage should be prevented or detected. Preventing an increase in gate to source leakage requires the ability to detect and log gate to source leakage current within the operating system to determine the root cause. After the root cause is determined, changes will then need to be made to the design and operation of the system into which the MOSFET operates, followed by re-measurements of gate to source leakage to verify that the design and operation changes have caused the desired results. A system for detecting gate to source leakage current should monitor the device after preventive measures have been implemented.

[0082] An increase in gate-to-source leakage of a power switch may cause failure of the device or may reduce the efficiency of the system. Therefore, it may be necessary to measure the gate leakage current under various operating conditions. When driving a SiC FET with an integrated gate driver, it may be difficult to measure the gate-to-source leakage because the gate of the SiC FET cannot be accessed externally. By using additional circuit blocks within the integrated gate driver enclosing the SiC FET, it may be possible to accurately determine the gate leakage current and monitor the health of the device.

[0083] One or more embodiments may provide a non-intrusive method for gate leakage detection that can be used to determine the performance of SiC and modules throughout their useful life and during end-of-line testing. One or more embodiments may provide a gate leakage measurement that is compensated for temperature and system-level offset errors. This compensation can improve the accuracy of the overall leakage measurement system. One or more embodiments may provide a method of gate leakage measurement where aged SiC devices or modules can be accurately monitored over the useful life of the component and where leakage data can be stored in system memory.

[0084] SiC FETs can be assembled into product packages. For example, Figure 6 As shown, the point-of-use controller 642 can be packaged in the power module 640 together with the north power switch 644-N and the south power switch 644-S. The point-of-use controller 642 can drive the north power switch 644-N and the south power switch 644-S and can include an embedded gate leakage measurement circuit (see Figure 7 ). For example, the point of use controller 642 may be a specific implementation of the point of use upper phase controller 142. For example, the power module 640 may be a specific implementation of the upper phase power module 140. For example, the north power switch 644-N and the south power switch 644-S may be a specific implementation of the upper phase A north switch 144A-N and the upper phase A south switch 144A-S.

[0085] like Figure 6 As shown, the drain (DRN) and source (SRC) of the north power switch 644-N and the south power switch 644-S can be accessed externally by the tester equipment. The corresponding gates of the north power switch 644-N and the south power switch 644-S can only be accessed by the use point controller 642 and cannot be accessed externally (outside the power module 640). VPS and VMS can be positive and negative supply voltages for the power module 640. For example, the tester can communicate with the north power switch 644-N and the south power switch 644-S using the SPI communication, CMD and / or MSG lines, and the use point controller 642.

[0086] like Figure 6 As shown, the test system 600 may include a tester resource 605, a tester load board 610, and a device under test 615. The test system 600 may be an end-of-line test station for individual components of the inverter 110. For example, in the inverter 110, the tester resource 605 may include the inverter controller 300, and may communicate with the low voltage upper phase controller 120 and the high voltage upper phase controller 130, for example. Figure 5As shown, in the inverter 110 , the above components may communicate with a test interface and controller 415 of a point-of-use upper phase controller 142 of the upper phase power module 140 .

[0087] The tester resources 605 may include tester digital resources 606 and tester hardware 607. The tester load board 610 may include a low voltage controller 620, a high voltage controller 630, and an electrical isolator 650. Figure 6 As shown, the tester digital resources 606 can interface with the low voltage controller 620. The tester hardware 607 can provide VPS and VMS power to the device under test 615 and can interface with the power module 640 using CMD and / or MSG lines. The tester resources 605 can include SRC and DRN connections to the device under test 615 and the power module 640. The high voltage controller 630 can interface with the device under test 615 and the power module 640.

[0088] One or more embodiments may provide a leakage measurement method that can measure the gate leakage of the north power switch 644-N and the south power switch 644-S without accessing the gate terminals outside the power module 640. The power module 640 can be designed to have a point-of-use controller 642 within the power module 640, and the point-of-use controller 642 can access the gate terminals. One or more embodiments may provide a leakage current measurement resolution of approximately 50nA, which can be ten times better than the leakage current measurement resolution using an isolated gate driver. One or more embodiments may provide a leakage measurement method that operates at -40C to 165C. One or more embodiments may detect gate leakage during mission mode operation of the power module 640. One or more embodiments may provide a gate leakage detection system that is designed for temperature and offset compensation. One or more embodiments may provide a gate leakage detection system that determines the amount of leakage current.

[0089] Figure 7 An exemplary point-of-use test system for detecting gate leakage of a power device switch is depicted in accordance with one or more embodiments.

[0090] like Figure 7As shown, the power module 640 may include a power switch 644 (M3) and a point of use controller 642. For example, the power switch 644 may include one or more of a north power switch 644-N or a south power switch 644-S. The point of use controller 642 may be measured as a standalone module before being added to the power module 640, and the point of use controller 642 may be used to measure aspects of the power module 640 after the point of use controller 642 has been added to the power module 640. One or more embodiments may provide a system that utilizes these two separate capabilities.

[0091] The gate leakage current present in the point of use controller 642 may be measured before the point of use controller 642 is added to the power module 640. The measurement results may be stored in a non-volatile memory within the point of use controller 642. The point of use controller 642 may then be added to the power module 640. The gate leakage current of both the point of use controller 642 and the power switch 644 may be measured. The measured values ​​may be stored in a non-volatile memory within the point of use controller 642.

[0092] A calculation may be performed whereby the gate leakage current present in the point of use controller 642 is subtracted from the gate leakage currents of both the point of use controller 642 and the power switch 644 to determine the gate leakage current of the power switch 644. One or more embodiments may ensure that leakage detection is not affected by system or circuit level offsets and is compensated for temperature.

[0093] This non-intrusive method for gate leakage detection can be used to determine the performance of the power switch 644 and the power module 640 throughout their service life and during end-of-line testing. In addition, gate leakage detection can be performed for every power-up cycle for the power module 640. Thus, gate leakage current can be detected during mission mode.

[0094] One or more embodiments may determine the direction of the gate leakage current, whether positive or negative. One or more embodiments may provide a gate leakage current detection accuracy of less than 50nA. One or more embodiments may store leakage data in a system memory, which may be periodically used by the inverter 110 to assess the health of the power switch 644 and the efficiency of the inverter 110. The range of leakage current detection may be changed by changing the gain of the system or by using an advanced offset correction method as described below.

[0095] Figure 8 Depicted is a method for operating according to one or more embodiments Figure 7 Example process 800 for a point-of-use testing system. Figure 7As shown, F1, F2 and F3 can be instruments that can apply voltage and measure current. For example, F2 can be an instrument as part of a test rig, and F1 and F3 can be circuits with integrated gate drivers that can apply voltage and measure leakage current.

[0096] For example, in operation 802, M1 and M2 may be in an off state and have a characteristic leakage (such as less than 1 μA). In operation 804, F1 and F3 may be set to V1, where V1 is a specified test voltage. Because F1 is equal to F3, the gate-to-source voltage of the power switching element 644 may be 0V. In operation 806, F2 may be set to 0V, causing the drain-to-source voltage of the power switching element 644 to be 0V. In operation 808, because the gate-to-source voltage and drain-to-source voltage of the power switching element 644 are 0V, the gate current (I3) of the power switching element 644 is equal to 0. In operation 810, F1 measures the current I4 (1) at the test voltage V1. I4 (1) is equal to I3 + I2 - I1, where the gate current (I3) of the power switching element 644 is equal to 0A, so that I4 (1) is equal to I2 - I1.

[0097] In operation 812, M1 and M2 may be in an off state and have a characteristic leakage. In operation 814, F1 is set to V1, where V1 is the specified test voltage set in operation 802, and F3 is set to 0V, and the gate-to-source voltage of the power switch 644 is equal to V1. In operation 816, F2 may be set to 0V, thereby causing the drain-to-source voltage of the power switch 644 to be 0V. In operation 818, because the gate-to-source voltage of the power switch 644 is equal to V1, the gate current (I3) of the power switch 644 may not be equal to 0A. In operation 820, F1 measures the current I4(2) at the test voltage V1. I4(2)=I3+I2-I1.

[0098] In operation 822, the gate leakage current of the power switch 644 at the specified gate-to-source voltage equal to V1 is equal to I4(2)-I4(1). Operations 810 to 822 may be repeated as desired for different specified test voltages (V1).

[0099] The point-of-use controller 642 controls the gate of the power switch 644. Therefore, in order to measure the gate current leakage of the power switch 644, it may be necessary to calculate the leakage of the point-of-use controller 642. The output stage of the point-of-use controller 642 may include large PMOS and NMOS devices. The PMOS and NMOS devices may be used to drive the gate terminal of the SiC power device to VPS (turn-on voltage) and VMS (turn-off voltage), respectively. VPS and VMS may be supply voltages for the point-of-use controller 642, and the output of the point-of-use controller 642 is connected to the gate of the power switch 644.

[0100] The gate to source leakage test may be performed at the gate to source voltage generated by the power switch gate leakage detector of the point of use controller 642. By properly selecting the positive and negative supply voltages for the power module 640, the necessary gate voltage may be generated for the gate of the power switch 644.

[0101] Because the gate of the power switch 644 is always connected to the point of use controller 642, the process 800 can determine the leakage for the point of use controller 642 while reducing any possible error leakage current from other leakage contributing devices connected to the gate of the power switch 644 and ideally reducing it to a value of 0. In addition, the drain and source terminals can be grounded so that the drain to source voltage of the power switch 644 is 0V. A gate leakage detector within the point of use controller 642 can use internal circuitry to find the leakage of the point of use controller 642 and save that value while ensuring that the gate to source voltage of the power switch 644 is 0V. This 0V gate to source voltage of the power switch 644 can be generated by the gate leakage detector within the point of use controller 642.

[0102] Next, a gate-to-source voltage can be applied to the gate of the power switch 644 using a gate leakage detector within the point-of-use controller 642. By adjusting the values ​​of the VPS and VMS supplies, the expected gate voltage can be generated. Now, the power switch 644 gate leakage and the drain-to-source leakage for the point-of-use controller 642 are measured and stored in the memory of the point-of-use controller 642.

[0103] Therefore, the gate leakage of the power switch 644 is the leakage for the point of use controller 642 minus the leakage for the point of use controller 642 and the power switch 644. This gate leakage of the power switch 644 can be positive or negative depending on the direction of the leakage current.

[0104] In addition, for example, during current measurement, the drain-to-source voltage across the driver module output should be kept constant, such as 0.5*(VPS-VMS). This ensures that correct leakage measurements are performed and can be performed by correctly selecting VPS and VMS values. Process 800 can be performed to measure gate leakage of power switch 644 during end-of-line product testing. Process 800 can be performed at various temperatures.

[0105] Fig. 9 An exemplary gate leakage detector 900 for detecting gate leakage of a power device switch according to one or more embodiments is depicted. The gate leakage detector 900 may be, for example, a component of the point-of-use controller 642, and may include a current-to-voltage converter, a switched capacitor amplifier circuit, and a resistor divider bank to form the necessary reference gate voltage.

[0106] like Fig. 9 As shown, transistors M1 to M5 can form a differential cascade amplifier and current source circuit. R1 and R2 resistors can generate a gate voltage based on supply values ​​VPS and VMS. Another input of the differential amplifier can be connected to the gate of the power switch 644 through the MOSFET switch M6. For example, the gate of the power switch 644 can also be connected to the output of the point of use controller 642, such as Figure 7 Also shown, transistors M4 and M5 can be current sources and biased with IREF. The differential pair M1 and M2 can be biased with IBIAS current.

[0107] Amplifier A1 may form a current-to-voltage converter, and the RFB feedback resistor may define the voltage at the output of amplifier A1. Amplifier A2 may form a switched capacitor amplifier circuit that boosts the output of A1 by adjusting the gain value. A2 may provide sufficient signal strength when the leakage current is too small. By adjusting the offset of A2, the output voltage may be controlled to half of the supply range when the signal is too large or too small. The output voltage of amplifier A2 may be fed to an ADC, and the output of the ADC may provide a gate leakage value.

[0108] The gate leakage detector 900 may include: a DC portion that sets the gate voltage for the power switch 644; and an AC portion that can maintain the output voltage level, i.e., a switched capacitor amplifier circuit. The gate voltage of M1 can be set by the R1 and R2 resistor divider and the (VPS-VMS) voltage supply. Due to negative feedback, the gate of M2 can be at the same level as M1. The gate of M2 can be connected to the gate terminal of the power switch 644 through the switch M6. M6 can be switched at the sampling frequency.

[0109] When M6 is in the on state, leakage current flows through M3, M4, and M5. Because M4 and M5 are biased with a constant current IREF, the leakage current flows through the lowest resistance path, which passes through the feedback resistor RFB. A proportional voltage is formed across the feedback resistor RFB, and this voltage is amplified by the switched capacitor amplifier circuits A1 and A2 with gain and offset settings.

[0110] If the current through M3 is interrupted, for example, if the current rises, the gate of M2 is pulled up and the gate-to-source voltage of M2 increases. Due to the increased gate-to-source voltage of M2, the drain of M2 is pulled down. Because the drain of M2 is connected to the gate of M3, the M3 gate is pulled down, which reduces the gate-to-source voltage of M3, and the current in M3 is always the sum of IREF and I_LEAK. The gates of M2 and M1 are held at a constant voltage set by resistors R1 and R2.

[0111] The range of leakage current is controlled by the value of the feedback resistor RFB and the voltage across the feedback resistor RFB. Specifically, Ileakage = RFB voltage / RFB resistor value. For example, to account for positive and negative leakage currents, half supply is the maximum voltage across RFB, which may be approximately 1.65V. For + / -5μA leakage current, RFB = 1.65 / 5μA, or 330kOhm.

[0112] The output voltage of amplifier A1 can be fed to a switched capacitor circuit A2 with gain and offset settings. If the leakage current is too low, the gain of amplifier A2 can be increased to get better signal strength. The output of A2 can be fed to an ADC to read the leakage current. The leakage current can be determined by the following formula: I_leakage = [(C1) / (C3*RFB)]*[Vout-(VCCL-VMS) / 3+(REF2+VMS)].

[0113] Fig.10 An exemplary process 1000 for detecting gate leakage for a point of use controller for a power device switch is depicted in accordance with one or more embodiments.

[0114] The process 1000 for detecting gate leakage of a point-of-use controller (e.g., point-of-use controller 642) for a power device switch (e.g., point-of-use upper phase controller 142) may begin at operation 1005. At operation 1010, the tester resource 605 may set VPS and VMS to the correct voltages. At operation 1015, the tester resource 605 may write default values, for example, via SPI, into a low voltage controller (such as low voltage upper phase controller 120). For example, the default values ​​may include values ​​for a hold register, a count register, a gain register, an offset register, and an address register.

[0115] At operation 1020, the point-of-use controller may receive default values. At operation 1025, the tester resource 605 may set the modes of the low voltage controller and the point-of-use controller to detect gate leakage of the point-of-use controller. For example, the point-of-use controller may perform the following steps: Figure 8 At operation 1030, the point-of-use controller may check whether point-of-use controller leakage data is available from the ADC of the point-of-use controller. At operation 1035, when the point-of-use controller leakage data is available, the point-of-use controller may transmit the point-of-use controller leakage data to the low voltage controller.

[0116] At operation 1040, the low voltage controller may set a notification to the tester resource 605 that the point of use controller leakage data is available. At operation 1045, the tester resource 605 may read the point of use controller leakage data and clear the notification. At operation 1050, the tester resource 605 may verify that the point of use controller leakage data is within the usable range. At operation 1055, if the point of use controller leakage data is not within the usable range, the tester resource 605 may update the default value and proceed to operation 1020 above. At operation 1060, if the point of use controller leakage data is within the usable range, the tester resource 605 may save the point of use controller leakage data. At operation 1065, the tester resource 605 may reset the mode of the low voltage controller and the point of use controller and proceed to operation 1105 of the total gate leakage process 1100.

[0117] Fig.11 Depicted is an example process 1100 for detecting total gate leakage of a point-of-use controller (eg, point-of-use controller 642 ) and a power device switch (eg, point-of-use upper phase controller 142 ) according to one or more embodiments.

[0118] At operation 1105, the tester resource 605 may write default values, for example, via SPI, into a low voltage controller, such as the low voltage upper phase controller 120. For example, the default values ​​may include values ​​for a hold register, a count register, a gain register, an offset register, and an address register. At operation 1110, the point-of-use controller may receive the default values. At operation 1115, for example, the tester resource 605 may set VPS and VMS to a desired gate-to-source voltage for a power switch, such as the power switch 644. For example, the tester resource 605 may set VPS and VMS for testing gate-to-source voltages of -8V, 10V, and 19V.

[0119] At operation 1120, the tester resource 605 may set the modes of the low voltage controller and the point of use controller to detect gate leakage of the point of use controller and the power switch. At operation 1125, for example, the point of use controller may perform the following steps: Figure 8 At operation 1130, the point-of-use controller may check whether total (point-of-use controller and power switch) leakage data is available from the ADC of the point-of-use controller. At operation 1135, when total leakage data is available, the point-of-use controller may transmit the total leakage data to the low voltage controller.

[0120] At operation 1140, the low voltage controller may set a notification to the tester resource 605 that the total leakage data is available. At operation 1145, the tester resource 605 may read the total leakage data and clear the notification. At operation 1150, the tester resource 605 may verify that the total leakage data is within a usable range. At operation 1155, if the total leakage data is not within a usable range, the tester resource 605 may update and send a default value and proceed to operation 1120 above. At operation 1160, if the total leakage data is within a usable range, the tester resource 605 may save the total leakage data.

[0121] At operation 1165, the tester resource 605 can determine whether an additional total gate leakage test with another gate-to-source voltage should be performed. For example, the total gate leakage process 1100 can be performed three times, with the gate-to-source voltage set to -8V for the first total gate leakage test, set to 10V for the second total gate leakage test, and set to 19V for the third total gate leakage test. If an additional total gate leakage test should be performed, the process 1100 can proceed to operation 1065 of the point of use controller leakage process 1000. If an additional total gate leakage test should not be performed, the process 1100 can proceed to operation 1205 of the temperature request process 1200.

[0122] Fig.12 Depicted is an example process 1200 for requesting a temperature for use in detecting gate leakage of a power device switch according to one or more embodiments.

[0123] At operation 1205, the tester resource 605 can set the mode of the low voltage controller and the point of use controller to detect the temperature of the point of use controller and / or the power device switch. At operation 1210, the point of use controller can check whether the point of use controller temperature data can be obtained from the point of use controller. At operation 1215, when the point of use controller temperature data is available, the point of use controller can transmit the point of use controller temperature data to the low voltage controller.

[0124] At operation 1220, the low voltage controller may set a notification to the tester resource 605 that the point-of-use controller temperature data is available. At operation 1225, the tester resource 605 may read the point-of-use controller temperature data, clear the notification, verify that the point-of-use controller temperature data is within a usable range, and save the point-of-use controller temperature data. The process 1200 for requesting a temperature for use in detecting gate leakage of a power device switch may end at operation 1230.

[0125] One or more embodiments may provide a gate leakage detection system that is dedicated to integrated circuit level leakage detection. One or more embodiments may provide a gate leakage detection system that is executed in a mission mode. One or more embodiments may provide a gate leakage detection system that has high accuracy and offset correction. One or more embodiments may provide a gate leakage detection system that has high resolution. One or more embodiments may provide a gate leakage detection system that is fast and efficient in terms of system reliability and efficiency. One or more embodiments may provide a gate leakage detection system that has stored data for increasing the efficiency of the inverter and the overall performance of the system. One or more embodiments may provide a gate leakage detection system that has offset and temperature compensation, wherein the leakage data is highly reliable and repeatable. One or more embodiments may provide a gate leakage detection system that is suitable for operation in a high electromagnetic field environment.

[0126] One or more embodiments may provide a gate leakage detection system for end-of-line gate leakage testing and for mission mode gate leakage testing. One or more embodiments may provide a gate leakage detection system that is integrated into a point-of-use controller, which can save board area. One or more embodiments may provide a gate leakage detection system that can be performed during mission mode. One or more embodiments may provide a non-invasive method for gate leakage detection when the gate terminal is not accessible outside the power module.

[0127] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered exemplary only, with the true scope and spirit of the invention being indicated by the following claims.

Claims

1. A system comprising: An inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: one or more controllers configured to provide a test signal to control a gate leakage detection operation; and A power module, the power module comprising: a phase switching element, the phase switching element comprising one or more phase power switching elements; and A point-of-use controller is configured to detect a gate leakage of the phase switching device based on the test signal. 2 . The system of claim 1 , wherein the one or more phase power switches comprise one or more silicon carbide grains.

3. The system according to claim 1, Wherein the power module is configured to be connected to terminals of the battery and phase terminals of the motor. 4 . The system of claim 1 , wherein gate terminals of the one or more phase power switches are connected to the point-of-use controller within the power module.

5. The system of claim 1, wherein the point of use controller comprises a resistor divider.

6. The system of claim 1, wherein the point-of-use controller comprises a current-to-voltage converter.

7. The system of claim 1, wherein the point-of-use controller comprises a switched capacitor amplifier circuit.

8. The system of claim 1, further comprising: the battery, the battery being configured to supply the DC power to the inverter; as well as The motor is configured to receive the AC power from the inverter to drive the motor.

9. A system comprising: A power module, wherein the power module is for an inverter and comprises: a phase switching element, the phase switching element comprising one or more phase power switching elements; and A point-of-use controller is configured to detect gate leakage of the phase switching device. 10 . The system of claim 9 , wherein the point-of-use controller comprises an embedded gate leakage measurement circuit configured to detect the gate leakage of the phase switching device.

11. The system of claim 9, wherein: The drain and source terminals of the one or more phase power switches are externally accessible, and Gate terminals of the one or more phase power switches are not accessible from outside the power module.

12. The system of claim 9, wherein the point of use controller is further configured to provide the detected gate leakage to one or more controllers of the inverter.

13. The system of claim 9, wherein the detected gate leakage is an amount of gate-to-source leakage current of the one or more phase power switches at a gate-to-source voltage.

14. The system of claim 9, wherein the point of use controller is further configured to detect a signature leakage for the point of use controller and to detect a gate leakage for the point of use controller and the one or more phase power switches.

15. A system comprising: One or more point-of-use controllers, the one or more point-of-use controllers being for the power module, the one or more point-of-use controllers being configured to: A gate leakage of a power switching element of the power module is detected.

16. The system of claim 15, wherein the one or more point-of-use controllers are further configured to: Receive test voltage; applying a gate-to-source voltage to the power switch based on the test voltage; as well as A gate current of the power switch is measured as detected gate leakage based on the gate-to-source voltage.

17. The system of claim 16, wherein the one or more point-of-use controllers are further configured to: applying the gate-to-source voltage of 0V; Measuring the gate current of the power switching element to be 0A; and A current of the one or more point-of-use controllers is measured as a characteristic gate leakage of the one or more point-of-use controllers.

18. The system of claim 15, wherein the one or more point-of-use controllers are further configured to: The detected gate leakage is provided to one or more controllers of an inverter including the power module.

19. The system of claim 15, wherein the one or more point-of-use controllers are further configured to: The detected gate leakage is provided to one or more controllers of the tester during end-of-line testing.

20. The system of claim 15, wherein the one or more point-of-use controllers are further configured to: The gate leakage of the power switch of the power module is detected at each power-up cycle for the power module.

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