Data writing method, device and equipment

Abstract

The invention provides a data writing method, device and equipment, belongs to the technical field of circuit design, and aims to reduce the probability that a program code of a slave equipment chip is mistakenly rewritten, the method is applied to slave equipment, and comprises the steps that in response to a received first writing request sent by a host and aiming at the slave equipment, to-be-verified information is acquired from the host; based on the to-be-verified information and the sending duration of the to-be-verified information, verifying the first write-in request; and under the condition that the verification of the first writing request is passed, obtaining to-be-written data and a target register address from the host, and writing the to-be-written data into a register corresponding to the target register address.

Description

Technical Field

[0001] The present disclosure relates to the technical field of circuit design, and in particular to a data writing method, device and equipment. Background Art

[0002] At present, in the process of programming an IC (integrated circuit), a host generally sends a slave device address to a slave device. If the slave device address is verified, the slave device starts programming, which may easily lead to the IC program code being rewritten by mistake. Summary of the invention

[0003] Based on the content of the background technology, the present disclosure proposes a data writing method, device and equipment.

[0004] In a first aspect of the present disclosure, a data writing method is provided, which is applied to a slave device, comprising:

[0005] In response to receiving a first write request sent by the host and directed to the slave device, obtaining information to be verified from the host;

[0006] Verifying the first write request based on the information to be verified and the sending time of the information to be verified;

[0007] When the first write request is verified to be successful, the data to be written and the target register address are obtained from the host, and the data to be written is written into the register corresponding to the target register address.

[0008] Optionally, the information to be verified includes first data to be verified and second data to be verified, the first data to be verified and the second data to be verified are different, and the verifying the first write request based on the information to be verified and a sending duration of the information to be verified includes:

[0009] Performing a first verification on the first write request using the first data to be verified and the sending duration of the first data to be verified;

[0010] In the case that the first verification is passed, the first write request is verified for a second time using the second data to be verified and the sending duration of the second data to be verified.

[0011] Optionally, the using the first data to be verified and the sending duration of the first data to be verified to perform a first verification on the first write request includes:

[0012] Matching the first data to be verified with a preset register address of the slave device, and obtaining a sending duration of the first data to be verified;

[0013] If the first data to be verified matches the preset register address, and the sending time length of the first data to be verified is less than the first preset time length, the first write request passes the first verification;

[0014] If the first data to be verified does not match the preset register address, or the sending time length of the first data to be verified is greater than or equal to the first preset time length, the first write request fails the first verification.

[0015] Optionally, the performing a second verification on the first write request by using the second data to be verified and a sending duration of the second data to be verified includes:

[0016] Matching the second data to be verified with the verification data in the preset register address of the slave device, and obtaining the sending duration of the second data to be verified;

[0017] If the second data to be verified matches the verification data, and the sending time of the second data to be verified is less than the second preset time, the first write request passes the second verification;

[0018] If the second data to be verified does not match the verification data, or the sending time length of the second data to be verified is greater than or equal to the second preset time length, the first write request fails the second verification.

[0019] Optionally, obtaining the information to be verified from the host includes:

[0020] Determining a sending duration of the first write request;

[0021] Pre-verifying the first write request based on a sending duration of the first write request;

[0022] If the first write request passes pre-verification, sending a reply signal to the host based on the first write request;

[0023] receiving information to be verified sent by the host based on the reply signal.

[0024] Optionally, acquiring the data to be written and the target register address from the host, and writing the data to be written into a register corresponding to the target register address includes:

[0025] Sending a verification-passed reply signal to the host, and receiving a second write request sent by the host;

[0026] Verifying the second write request based on the slave device address included in the second write request;

[0027] When the second write request is verified to be successful, the target register address and the data to be written sent by the host are received, and the data to be written is written into the register corresponding to the target register address.

[0028] A second aspect of the present disclosure provides a data writing method, which is applied to a host and includes:

[0029] Sending a first write request to a plurality of slave devices;

[0030] Based on the received reply signal returned by the target slave device, sending the information to be verified to the target slave device;

[0031] When receiving a verification pass signal sent based on the information to be verified, the data to be written and the target register address are sent to the target slave device, so that the target slave device writes the data to be written into the register corresponding to the target register address.

[0032] Optionally, the information to be verified includes first data to be verified and second data to be verified, and the first data to be verified and the second data to be verified are different; and sending the verification information to the target slave device includes:

[0033] Sending the first data to be verified to the target slave device;

[0034] When receiving a reply signal sent by the target slave device indicating that the first verification is passed, second data to be verified is sent to the target slave device.

[0035] Optionally, sending the data to be written and the target register address to the target slave device includes:

[0036] Sending a second write request to the target slave device;

[0037] When receiving a reply signal sent by the target slave device indicating that the second write request has been verified, the to-be-written data and the target register address are sent to the target slave device.

[0038] According to a third aspect of the present disclosure, a data writing device is provided, which is applied to a slave device, and includes:

[0039] an acquisition module, configured to acquire information to be verified from the host in response to receiving a first write request for the slave device sent by the host;

[0040] A verification module, configured to verify the first write request based on the information to be verified and a sending time of the information to be verified;

[0041] A writing module is used to obtain the data to be written and the target register address from the host when the first writing request is verified, and write the data to be written into the register corresponding to the target register address.

[0042] A fourth aspect of the present disclosure provides a data writing device, applied to a host, comprising:

[0043] A first sending module, used for sending a first write request to multiple slave devices;

[0044] A second sending module, configured to send the information to be verified to the target slave device based on the received reply signal returned by the target slave device;

[0045] The third sending module is used to send the data to be written and the target register address to the target slave device when receiving the verification pass signal sent based on the information to be verified, so that the target slave device writes the data to be written into the register corresponding to the target register address.

[0046] According to a fifth aspect of the present disclosure, an electronic device is provided, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes, the data writing method as described in the first aspect or the second aspect is implemented.

[0047] The data writing method provided by the present disclosure comprises: in response to receiving a first write request sent by a host and directed to the slave device, obtaining information to be verified from the host, wherein the first write request comprises an address of the slave device; verifying the write request based on the information to be verified and the sending time length of the information to be verified; if the write request verification passes, obtaining data to be written and a target register address from the host, and writing the data to be written into a register corresponding to the target register address;

[0048] Therefore, the present invention reduces the problem of the burning process being mistakenly started due to the inclusion of the slave device address in other commands, thereby causing the slave device code to be mistakenly rewritten, by verifying whether the write request is accurate based on the information to be verified and the sending duration of the information to be verified when the write request is received from the slave device, and then writing the data after the verification is passed.

[0049] The above description is only an overview of the technical solution of the present disclosure. In order to more clearly understand the technical means of the present disclosure, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present disclosure more obvious and easy to understand, the specific implementation methods of the present disclosure are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or related technologies, the following is a brief introduction to the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. It should be noted that the proportions in the drawings are only for illustration and do not represent the actual proportions.

[0051] Figure 1 The timing signal diagram when the TCON chip is powered on in the related art is shown;

[0052] Figure 2 The timing signal diagram when TCON sends instructions in the related art is shown;

[0053] Figure 3 A schematic diagram of an implementation environment of the data writing method provided by an embodiment of the present disclosure is shown;

[0054] Figure 4 A flowchart showing the steps of a method for writing data from a device side in an embodiment of the present disclosure is shown;

[0055] Figure 5 A flowchart showing the steps of a method for writing data on a host side in an embodiment of the present disclosure is shown;

[0056] Figure 6 A schematic diagram of a process of a data writing method provided by an embodiment of the present disclosure is shown;

[0057] Figure 7 A timing signal diagram of a verification process in an embodiment of the present disclosure is shown;

[0058] Figure 8 A schematic diagram of the structure of a data writing device proposed in an embodiment of the present disclosure is shown;

[0059] Fig. 9 A schematic structural diagram of a data writing device proposed in another embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0060] In order to make the above-mentioned purposes, features and advantages of the present disclosure more obvious and understandable, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0061] In the related art, the I2C (Inter-Integrated Circuit) communication protocol is widely used in the communication of multiple integrated circuits in digital systems due to its advantages such as fewer pins, simple hardware implementation, and strong scalability. I2C supports multiple slave devices, that is, multiple I2C slave devices can be connected to an I2C controller. These different I2C slave devices have different device addresses, so that the I2C master controller can access the specified device through the device address of the I2C device, and one I2C bus connects multiple I2C devices.

[0062] In most current circuit designs, the vast majority of ICs use the I2C protocol, and as a slave device, after identifying the corresponding device address, the IC responds to the host system, and continuously receives the instructions output by the Master, modifies the original register parameters, and writes to the DAC. There is no card control in this process, and the IC is easily in an activated state. For example, in actual applications, the Tcon IC or the front-end system acts as a Master to send I2C instructions during power-on or to achieve certain specific functions. There is a probability that the IC device address under the same I2C bus will be misidentified, resulting in abnormal output due to code tampering, resulting in abnormal display such as black screen and reduced brightness.

[0063] Reference Figure 1 and Figure 2 , Figure 1 and Figure 2 FIG. 1 shows a timing signal diagram of a TCON (Timing Controller) chip in the related art when I2C continues to send instructions during the power-on process, such as Figure 1 and Figure 2 As shown in the figure, after the TCON chip is powered on, based on the Tcon download code instruction, the instructions continuously sent by I2C include a set of data 0101100 corresponding to 0x6C, which is exactly the same as the address of LED Driver B802 in the slave IC. As a result, after B802 recognizes 0x6C, the code burning process is started, and subsequent instructions are continuously written into the DAC (digital-to-analog conversion), causing the code to be tampered with and problems such as a black screen.

[0064] In view of this, the present disclosure provides a data writing method, apparatus and device, which determines whether to write data by first verifying the information to be verified sent by the host and the sending duration of the information to be verified after the slave device identifies the corresponding device address, thereby avoiding the problem of incorrect activation of the slave device and then incorrect rewriting of the code in the slave device due to the corresponding data of the slave device address contained in other commands sent by the host.

[0065] First, the implementation environment of the data writing method provided by the present disclosure is introduced:

[0066] In this disclosure, reference is made to Figure 3 , Figure 3 A schematic diagram of a communication environment of a data writing method provided by an embodiment of the present disclosure is shown. Figure 3 As shown, the host is connected to multiple slave devices through an I2C bus. The I2C bus includes an SCL (Serial Clock Line) line and an SDA (Serial Data Line) line. The host can be an MCU (Microcontroller Unit), a TCON chip, etc. The host can send data to multiple slave devices through the SDA line, and the slave device can also send data to the host through the SDA line. The SCL line is used to provide a clock signal when the host and the slave device transmit data through the SDA line.

[0067] The following describes the data writing method provided by the embodiment of the present disclosure from the perspectives of the device and the host respectively:

[0068] First, the data writing method provided by the embodiment of the present disclosure is described from the perspective of the device. Specifically, referring to Figure 4 , Figure 4 The flowchart of the data writing method provided by the embodiment of the present disclosure is shown as follows: Figure 4 As shown, the data writing method is applied to a slave device, and the data writing method specifically includes:

[0069] S101 , in response to receiving a first write request sent by a host and directed to a slave device, obtaining information to be verified from the host.

[0070] Among them, the first write request may include the slave device address. When the slave device receives the first write request, it is matched with the device address of the current device; if it matches, a response signal is replied to the host, and then the slave device can subsequently receive commands or data sent by the host, etc. If it does not match, no response is given.

[0071] In this embodiment, the information to be verified is used to verify whether the host sends a write request, which can also be understood as verifying whether the first write request is sent by mistake. When the first write request is not sent by mistake, data is written to avoid the situation where the slave device writes data due to the write request sent by mistake, resulting in the code of the slave device being tampered with. Among them, the information to be verified can be a long string of data, or it can be a register address in the slave device, and of course it can include both, as long as the verification of the write request can be realized.

[0072] In one example, considering that the command transmitted on the I2C bus may have a set of data that is the same as the slave device address, the sending duration of the first write request can also be determined when the first write request is received. The sending duration refers to the time from the start of the SCL line timing to the time when the slave device receives the first write request. If the sending duration exceeds the regular sending duration of the slave device address, it means that data transmission is already in progress before the first write request is sent. The first write request may be a code in other data transmission processes, rather than a request to write data to the slave device. At this time, the slave device does not respond to the first write request. If the sending duration is the regular sending duration of the slave device address, it means that the first write request is valid, and the slave device sends a response signal to the host to enable the host to send the information to be verified.

[0073] S102: Verify the first write request based on the information to be verified and the sending time of the information to be verified.

[0074] In this embodiment, data for verification can be pre-stored in the slave device, and the verification data pre-stored in different slave devices can be the same or different. Furthermore, when the slave device receives the information to be verified, the information to be verified can be matched with the verification data to verify the first write request; at the same time, considering that the host may send a long string of codes, in order to avoid the situation where the information to be verified also overlaps, the sending duration of the information to be verified can also be determined. The sending duration of the information to be verified indicates the time from the slave device sending a response signal to the host to the slave device receiving the information to be verified, and the first write request is verified according to the sending duration.

[0075] Among them, the process of verifying the first write request according to the sending time of the information to be verified can be to determine whether the sending time of the information to be verified is within a preset time. In the normal data writing process, after the host receives the response signal from the device, it responds for a period of time and starts to send subsequent data. Therefore, the preset time can be set according to the normal data sending time. If the sending time of the information to be verified is within the preset time, it indicates that it is a normally sent write request. If the sending time of the information to be verified is greater than the preset time, it indicates that it may be a mistakenly sent write request.

[0076] Specifically, when the information to be verified can match the verification data pre-stored in the slave device, and the sending time of the information to be verified is within the preset time, it means that the first write request verification is passed, and the first write request is not a mistakenly sent request. A response signal can be sent to the host based on the first write request to perform the data writing step; if the information to be verified does not match the verification data pre-stored in the slave device, or the sending time of the information to be verified is greater than the preset time, it means that the first write request verification has failed, and the first write request is mistakenly sent. At this time, the first write request is not responded to.

[0077] Among them, the information to be verified may include multiple different data to be verified. The first write request can be verified multiple times according to the multiple data to be verified and the sending duration of each verification data. Through multiple verification processes, it is determined whether the first write request is sent by mistake, thereby avoiding the situation where the code in the slave device is mistakenly rewritten due to the mistaken sending of the write request.

[0078] S103, when the first write request is verified to be successful, obtaining the data to be written and the target register address from the host, and writing the data to be written into the register corresponding to the target register address.

[0079] Specifically, the first write request verification indicates that there is indeed a need to write data. At this time, the slave device can send a reply signal to the host, and then receive the data to be written and the target register address sent by the host according to the reply signal. After that, the data to be written can be written into the register corresponding to the target register address.

[0080] The data writing method provided in the present embodiment obtains information to be verified from the host upon receiving the first write request sent by the host, verifies the first write request according to the information to be verified and the sending time of the information to be verified, and writes data if the first write request is verified successfully. Since the write request is verified before the data is written according to the write request, the problem of the data writing process of the slave device being mistakenly triggered due to the long code sent by the host containing the slave device address, which causes the code in the slave device to be mistakenly tampered with.

[0081] In one embodiment, the information to be verified may include multiple data, and the slave device may verify the first write request multiple times based on the multiple data, so as to avoid the situation where the write request is sent incorrectly and improve the accuracy of the verification result. Specifically, the information to be verified includes first data to be verified and second data to be verified, and the first verification data and the second verification data are different. The specific steps for verifying the first write request may include: using the sending duration of the first data to be verified and the second data to be verified to perform a first verification on the first write request; if the first verification passes, using the sending duration of the second data to be verified and the second data to be verified to perform a second verification on the first write request.

[0082] In this embodiment, the slave device can verify the information to be verified by the data stored in the preset register, then the first data to be verified can be the address of the preset register in the slave device, and the second data to be verified can be the data in the preset register address, so that the slave device can verify the first data to be verified according to the address of the preset register, and verify the second data to be verified according to the data stored in the preset register, to achieve two verification processes, wherein the two verification processes are performed in sequence, first verifying according to the first data to be verified, and then performing the second verification if the verification passes. Wherein, if both the first verification and the second verification pass, it means that the first write request verification passes; and if the first verification or the second verification fails, it means that the first write request verification fails. Thus, the first write request can be verified once according to the preset register address in the slave device and the verification data stored in the preset register to verify whether the first write request is a mistakenly sent request, thereby avoiding the problem that the data contained in the code sent by the host is the same as the data corresponding to the write request, which causes the slave device to perform a data write process, thereby causing the slave device code to be mistakenly rewritten.

[0083] Among them, when the first data to be verified is verified according to the preset register address, the sending duration of the first data to be verified can also be obtained to determine whether the sending duration of the first data to be verified exceeds the normal data sending duration. In this way, it can be avoided that when the host sends a long string of codes, the long string of codes happens to include the preset register address, and the slave device verification passes, thereby improving the accuracy of the verification; similarly, when the second data to be verified is verified according to the data in the preset register, the sending duration of the second data to be verified can also be obtained to improve the accuracy of the verification.

[0084] In this embodiment, when verification is performed based on the sending duration of the information to be verified, it can be determined whether the sending duration is the normal sending duration of the information to be verified, thereby avoiding the situation where the host sends a long string of codes, and the long string of codes contains the slave device address and the preset protection register address, resulting in erroneous verification. Verification based on the sending duration can be to determine whether the sending duration can be matched, or to determine whether the sending duration is within a preset duration, which is the normal sending duration of the information to be verified. The preset duration can also be greater than the normal sending duration to avoid the situation where verification fails due to slow host response.

[0085] In one example, when the I2C communication protocol is adopted, the I2C bus includes a clock line SCL, and the sending duration of the first data to be verified or the second data to be verified can be determined based on the clock line SCL. Since each clock cycle of the SCL line can represent the transmission of one data bit, when verifying the first data to be verified, it can be determined how many clock cycles have passed from the device sending the response signal to receiving the first data to be verified. If the number of clock cycles corresponds to the number of bits of the preset register address, it means that the sending duration of the first data to be verified is the normal sending duration of the data to be verified. If the number of clock cycles does not correspond to the number of bits of the preset register address, it means that the sending duration of the first data to be verified is the normal sending duration of the data to be verified. Corresponding, it means that the sending duration of the first data to be verified is abnormal, which may be just one group in a long string of codes, rather than verification information for the slave device; similarly, when verifying the second data to be verified, it can be determined how many clock cycles have passed from the device sending the response signal to receiving the second data to be verified. If the number of clock cycles corresponds to the number of bits of the data stored in the preset register, it means that the sending duration of the second data to be verified is normal. If the number of clock cycles does not correspond to the number of bits of the preset register address, it means that the sending duration of the second data to be verified is abnormal, which may be just one group in a long string of codes, rather than verification information for the slave device.

[0086] In another example, the slave device can directly perform timing, and a preset time length can be set in advance. When the slave device sends a response signal, the timing starts to determine the sending time length of the first data to be verified or the second data to be verified, and compare it with the pre-stored preset time length, thereby realizing the verification process based on the sending time length of the information to be verified.

[0087] Specifically, the specific process of performing the first verification on the first write request using the first data to be verified and the sending duration of the first data to be verified may be: matching the first data to be verified with the preset register address of the slave device, and obtaining the sending duration of the first data to be verified; if the first data to be verified matches the preset register address, and the sending duration of the first data to be verified is less than the first preset duration, the first write request passes the first verification; if the first data to be verified does not match the preset register address, or the sending duration of the first data to be verified is greater than or equal to the first preset duration, the first write request fails the first verification.

[0088] In this embodiment, a protection register can be pre-configured for each slave device as a preset register. The protection register can be a protection register that is divided out of a portion of the existing memory of the slave device, or a new memory space can be added to the existing memory of the slave device as a protection register. In the case of pre-configured protection registers, when the slave device receives the first data to be verified, it can match the first data to be verified with the address of the protection register to determine whether the first data to be verified can match the address of the protection register. At the same time, the transmission duration of the first data to be verified can also be obtained to determine whether the first data to be verified is valid. Among them, the transmission duration of the first data to be verified is the duration from the slave device sending a response signal to the host to receiving the first data to be verified. The first preset duration can be the regular transmission duration of the register address, or it can be slightly longer than the regular transmission duration to eliminate the influence of the longer host response time.

[0089] If the first write request passes the first verification, a response signal may be returned to the host to receive the second data to be verified for a second verification. If the first write request fails the first verification, no response may be given.

[0090] Specifically, after the first verification is passed, the specific process of performing a second verification on the first write request using the second data to be verified and the sending duration of the second data to be verified can be: matching the second data to be verified with the verification data in the preset register address of the slave device, and obtaining the sending duration of the second data to be verified; if the second data to be verified matches the verification data, and the sending duration of the second data to be verified is less than the second preset duration, the first write request passes the second verification; if the second data to be verified does not match the verification data, or the sending duration of the second data to be verified is greater than or equal to the second preset duration, the first write request fails the second verification.

[0091] In this embodiment, if the first write request passes the first verification, a second verification is performed according to the verification data stored in the preset register address used in the first verification. The verification data can be pre-stored in the preset register, wherein, since the data transmitted during the I2C communication process is binary data, the verification data can be 8-bit, 16-bit or 32-bit binary data, which is not limited by the present disclosure. At the same time, the sending duration of the second data to be verified can be obtained. According to the validity of the second data to be verified, if the sending duration of the second data to be verified is greater than or equal to the second preset duration, it means that the sending duration of the second data to be verified exceeds the normal data sending duration, and the second data to be verified is invalid. Regardless of whether the second data to be verified matches the verification data, the first write request fails the verification; and if the sending duration of the second data to be verified is less than the second preset duration, it can be determined whether the first write request passes the second verification according to the matching result between the second data to be verified and the verification data pre-stored from the device.

[0092] Among them, the first preset time length and the second preset time length may be the same or different; for example, when the number of bits of the preset register address and the verification data is the same, the first preset time length and the second preset time length may be the same; when the number of bits of the preset register address and the verification data is different, the first preset time length and the second preset time length may be different.

[0093] It should be noted that in the I2C communication environment, the data sent by the host is actually sent to each slave device, but only the activated slave device can respond. Therefore, when configuring the register address of the protection register and the verification data stored in the protection register, they need to be different from the slave device address to avoid activating other slave devices during the verification process of the write request.

[0094] In one embodiment, it is possible to pre-verify whether the sending duration of the first write request is greater than a certain duration, and first determine whether the first write request is sent by mistake. If the verification is successful, it means that the first write request may not be sent by mistake, and further verification can be performed through subsequent steps; and if it is determined in advance that the first write request is sent by mistake, subsequent verification may not be performed to avoid wasting time. The process specifically includes: first, determining the sending duration of the first write request; then, based on the sending duration of the first write request, pre-verifying the first write request; if the first write request is pre-verified, sending a reply signal to the host based on the first write request; thereafter, receiving the information to be verified sent by the host based on the reply signal.

[0095] Among them, during the I2C communication process, when the SDA line jumps and data transmission is required, a start signal is sent, and data transmission starts directly after the start signal is sent. The sending duration of the first write request can be the duration from receiving the start signal to receiving the first write request. When the duration is long, it means that other data is sent before sending the first write request. In this case, the first write request may actually be only one group in a long string of codes sent by the host, rather than a data write request for the slave device. Therefore, the first write request can be pre-verified in advance according to the sending duration of the first write request. If the pre-verification fails, the subsequent verification steps may not be performed. If the verification passes, it cannot be determined whether the first write request is indeed a data write request for the slave device. Therefore, subsequent verification steps are required for further verification.

[0096] In this embodiment, the third preset time length may be smaller than the first preset time length and the second preset time length. Since the host does not need to interact with the slave device when sending the first write request, the third preset time length may be the sending time length of the first write request under normal circumstances, so that the first write request can be verified according to the third preset time length.

[0097] In one embodiment, in order to further improve the accuracy of verification, the host may resend a write request before data is written, and the probability of the slave device being mistakenly activated may be reduced by repeatedly confirming the write request. The specific process may be: first, a reply signal of verification success is sent to the host, and a second write request sent by the host is received; then, based on the address of the slave device included in the second write request, the second write request is verified; if the second write request is verified successfully, the target register address and the data to be written sent by the host are received, and the data to be written is written into the register corresponding to the target register address.

[0098] Specifically, when it is determined that the first write request has passed the verification, the second write request resent by the host can be received first. In this way, only when the address included in the second write request matches the address of the slave device, the subsequent data writing process is performed. The verification process of two write requests can avoid the problem of the slave device's code being accidentally rewritten due to the long string of code sent by the host including the same data as the slave device address.

[0099] Among them, during the I2C communication process, when the second write request is received, if the slave device address included in the second write request is consistent with the device address of this device, a response signal is replied to the host, and then the target register address sent by the host is received, and a response signal is replied. After that, the data sent by the host is received and the data is written into the target register address.

[0100] The data writing method provided in the present embodiment pre-verifies the first write request according to the sending duration of the first write request when the first write request is received; if the pre-verification passes, the first write request is verified twice according to the first data to be verified and the second data to be verified; if both verifications pass, a second write request sent by the host is received, and verification is performed again according to the second write request. Thus, the accuracy of the write request received from the device is ensured through multiple verification processes, thereby avoiding the problem that the data writing process of the slave device is mistakenly started due to the long string of code sent by the host including the slave device address, and then the code in the slave device is mistakenly tampered with.

[0101] This embodiment describes the data writing method provided by the present disclosure from the perspective of the host. Specifically, refer to Figure 5 , Figure 5 FIG. 4 shows a flow chart of steps of a data writing method provided by another embodiment of the present disclosure. Figure 5 As shown, the data writing method is applied to the host, specifically including:

[0102] S201, sending a first write request to multiple slave devices.

[0103] S202: Send information to be verified to the target slave device based on the received reply signal returned by the target slave device.

[0104] Specifically, when data needs to be written, the host will send a first write request to multiple slave devices, and the first write request includes a slave device address, so that each slave device can match the slave device address with its own device address. When matched, it will return a response signal to the host, and then the host can send information to be verified to the target slave device, wherein the data in the information to be verified is different from the device address of other slave devices, so that other slave devices can be avoided from being activated by mistake. In the case of failure of verification, in order to avoid occupying the I2C bus, the data transmission process can be stopped directly. When the host needs to send data to the slave device later, it will resend the start signal first, and then perform data transmission.

[0105] In this embodiment, the information to be verified may include the address of the slave device and may also include preset verification data. The information to be verified is sent to the target slave device so that the target slave device can verify the first write request. The verification process can refer to the relevant process of the above-mentioned slave device embodiment and will not be repeated here.

[0106] S203, when receiving a verification pass signal sent based on the information to be verified, sending the data to be written and the target register address to the target slave device, so that the target slave device writes the data to be written into the register corresponding to the target register address.

[0107] Specifically, when a reply signal is received from the slave device based on the information to be verified, indicating that the first write request verification is successful, the target register address and the data to be written can continue to be sent to the target slave device. The process can specifically be to first send the target register address to the target slave device, and then send the data to be written to the target slave device after receiving the reply signal returned by the target slave device, and then the target slave device can write data.

[0108] The data writing method provided by the embodiment of the present disclosure sends a first write request to multiple slave devices, and then sends information to be verified to the target slave device according to the reply signal returned by the target slave device based on the first write request. In this way, the target slave device can verify whether the first write request is erroneously sent data based on the information to be verified and the sending duration of the information to be verified, thereby avoiding the problem that the host sends a long string of code containing data identical to the slave device address, causing the slave device to write subsequent codes, resulting in the code of the slave device being erroneously rewritten.

[0109] In one embodiment, the information to be verified includes first data to be verified and second data to be verified, the first data to be verified is different from the second data to be verified, and the process of sending the information to be verified can specifically be: sending the first data to be verified to the target slave device; when receiving a reply signal sent by the target slave device indicating that the first verification is passed, sending the second data to be verified to the target slave device.

[0110] Among them, since the protection register and protection data can be pre-set from the device, the first data to be verified sent by the host can be the address of the protection register, so that the slave device can verify the first write request by matching the address of its own protection register with the first data to be verified; then, after the verification is passed, the second data to be verified is sent to the slave device. At this time, the second data to be verified can be the data stored in the protection register, so that the slave device can verify the second data to be verified according to the data stored in its own protection register, thereby realizing two verification processes through the first data to be verified and the second data to be verified. Among them, the specific process of using the first data to be verified and the second data to be verified to verify the first write request can refer to the above-mentioned embodiment from the perspective of the slave device, and will not be repeated here.

[0111] In one embodiment, the specific process of sending the data to be written and the target register address to the target slave device includes: sending a second write request to the target slave device; upon receiving a reply signal sent by the target slave device indicating that the second write request has been verified, sending the data to be written and the target register address to the target slave device.

[0112] In this embodiment, when a response signal based on the information to be verified is received from the target slave device, it indicates that the first write request has passed the verification. At this time, a second write request can be sent to the target slave device, so that the target slave device can confirm again whether there is a data write demand according to the second write request, and then send the data to be written and the target register address to the target slave device after the second write request is verified. The data to be written and the target register address can be sent twice, first sending the target register address to the target slave device, and after receiving the reply signal from the target slave device, sending the data to be written to the target slave device, so that the target slave device writes the data to be written into the target register address.

[0113] The data writing method provided in the present embodiment sends a first write request to the target slave device, and then sends information to be verified to the target slave device based on a reply signal of the target slave device. The first write request is verified by the first data to be verified and the second data to be verified in the information to be verified and the sending duration thereof. After the verification is passed, a second write request is sent to the target slave device. When the second write request verification is also passed, the target register address and the data to be written are sent to the target slave device. Thus, it is determined whether the write request is sent in error through multiple verification processes. After multiple verifications are passed, the data to be written is written to the target register address, so as to avoid the situation where the slave device mistakenly rewrites the code because the long string of code sent by the host contains the same data as the slave device address.

[0114] The data writing method provided by the embodiment of the present disclosure is introduced below with reference to a specific example:

[0115] Reference Figure 6 and Figure 7 , Figure 6 A schematic diagram of a data writing method provided by an embodiment of the present disclosure is shown. Figure 7 The timing signal diagram of the data writing process provided by the embodiment of the present disclosure is shown as follows: Figure 4 and Figure 5 As shown in the figure, when data needs to be written, the host sends data through the SDA line. At this time, the SDA line jumps from a low level to a high level, and the host outputs a start signal. At the same time, the SCL line jumps from a low level to a high level and outputs a clock signal. After that, the host uses the SDA line to send slave device addresses to multiple slave devices, and each pulse of the SCL line transmits data of one address bit. Figure 6As shown, the slave device address is 01101100, then the target slave device that matches the slave device address obtains the sending duration of the slave device address, and if the sending duration is greater than the third preset duration, the target slave device does not send a response signal; if the sending duration is less than the third preset duration, the target slave device replies with an ACK response to the host; thereafter, the host sends the first data to be verified 00000000 to the target slave device, and after receiving the first data to be verified, the target slave device can match the first data to be verified with the protection register address, and determine that the sending duration of the first data to be verified is greater than the first preset duration, if the first data to be verified does not match the protection register address or the sending duration of the first data to be verified is greater than the first preset duration, the slave device does not respond to the master device signal, and if the first data to be verified matches the protection register address and the sending duration of the first data to be verified is less than the first preset duration, the target slave device replies with a response signal ACK to the host;

[0116] Afterwards, when the host receives the response signal from the target slave device, it sends the second verification data 01100101 to the target slave device, and the target slave device matches the data stored in the protection register with the verification data, and determines the sending time of the second data to be verified; if the sending time of the second data to be verified is less than the second preset time and the second verification data can match the verification data stored in the slave device, it means that the first write request verification is successful. At this time, the target slave device replies ACK to the host for response; and if the sending time of the second data to be verified is greater than the second preset time, or the second data to be verified does not match the verification data stored in the slave device, it means that the first write request verification is unsuccessful. At this time, the target slave device does not respond.

[0117] When the first write request is verified, the host sends a second write request to the target slave device according to the received reply signal to carry out the data writing process; when the slave device address contained in the second write request matches its own device address, the target slave device returns a reply signal to the host; thereafter, the host sends the target register address to the target slave device, and upon receiving the reply signal from the target slave device, sends the data to be written to the target slave device; then, the target slave device can write the data to be written into the register corresponding to the target register address sent previously.

[0118] Based on the same inventive concept, the present disclosure also provides a data writing device, which is applied to a slave device, referring to Figure 8 , Figure 8 FIG. 4 shows a schematic diagram of the structure of a data writing device provided by an embodiment of the present disclosure, such as Figure 8 As shown, the device specifically includes:

[0119] An acquisition module 301, configured to acquire information to be verified from the host in response to receiving a first write request sent by the host and directed to the slave device;

[0120] A verification module 302, configured to verify the first write request based on the information to be verified and the sending time of the information to be verified;

[0121] The writing module 303 is used to obtain the data to be written and the target register address from the host when the first writing request verification is passed, and write the data to be written into the register corresponding to the target register address.

[0122] In an optional embodiment, the information to be verified includes first information to be verified and second information to be verified, and the verification module 302 specifically includes:

[0123] A first verification submodule, configured to perform a first verification on the first write request using the first data to be verified and the transmission time length of the first data to be verified;

[0124] The second verification submodule is used to perform a second verification on the first write request by using the second data to be verified and the sending time length of the second data to be verified if the first verification passes.

[0125] In an optional embodiment, the acquisition module 301 includes:

[0126] A determination submodule, used to determine the sending duration of the first write request;

[0127] A pre-verification module, configured to pre-verify the first write request based on a sending duration of the first write request;

[0128] A reply module, configured to send a reply signal to the host based on the first write request if the first write request pre-verification passes;

[0129] The first receiving module is used to receive the information to be verified sent by the host based on the reply signal.

[0130] In an optional embodiment, the writing module 303 includes:

[0131] A second receiving module is used to send a verification reply signal to the host and receive a second write request sent by the host;

[0132] A third verification submodule, configured to verify the second write request based on the slave device address included in the second write request;

[0133] The write submodule is used to receive the target register address and the data to be written sent by the host when the second write request verification is passed, and write the data to be written into the register corresponding to the target register address.

[0134] Based on the same inventive concept, the present disclosure also provides a data writing device, which is applied to a host, referring to Fig. 9 , Fig. 9 FIG. 4 shows a schematic diagram of a data writing device according to another embodiment of the present disclosure. Fig. 9 As shown, the device specifically includes:

[0135] A first sending module 401, configured to send a first write request to multiple slave devices;

[0136] The second sending module 402 is used to send the information to be verified to the target slave device based on the received reply signal returned by the target slave device;

[0137] The third sending module 403 is used to send the data to be written and the target register address to the target slave device when receiving the verification pass signal sent based on the information to be verified, so that the target slave device writes the data to be written into the register corresponding to the target register address.

[0138] In an optional embodiment, the information to be verified includes first data to be verified and second data to be verified, and the first data to be verified and the second data to be verified are different; the second sending module 402 includes:

[0139] A first sending submodule, used for sending first data to be verified to a target slave device;

[0140] The second sending submodule is used to send second data to be verified to the target slave device when receiving a reply signal sent by the target slave device indicating that the first verification is passed.

[0141] In an optional embodiment, the third sending module 403 includes:

[0142] A third sending submodule, used for sending a second write request to the target slave device;

[0143] The fourth sending submodule is used to send the data to be written and the target register address to the target slave device when receiving the reply signal sent by the target slave device indicating that the second write request has been verified.

[0144] Based on the same inventive concept, an embodiment of the present disclosure also provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, which implements the data writing method described in any of the above embodiments when executed by the processor.

[0145] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0146] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0147] The above is a detailed introduction to a data writing method, device and equipment provided by the present disclosure. Specific examples are used in this article to illustrate the principles and implementation methods of the present disclosure. The description of the above embodiments is only used to help understand the method of the present disclosure and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present disclosure, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present disclosure.

[0148] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. The present disclosure is intended to cover any variations, uses or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0149] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

[0150] References herein to "one embodiment," "embodiment," or "one or more embodiments" mean that a particular feature, structure, or characteristic described in conjunction with the embodiment is included in at least one embodiment of the present disclosure. In addition, please note that examples of the term "in one embodiment" do not necessarily all refer to the same embodiment.

[0151] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present disclosure can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0152] In the claims, any reference signs placed between brackets shall not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present disclosure may be implemented by means of hardware comprising a number of different elements and by means of a suitably programmed computer. In a unit claim enumerating a number of means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc. does not indicate any order. These words may be interpreted as names.

[0153] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A data writing method, characterized in that: Applied to a slave device, the method comprises: In response to receiving a first write request sent by the host and directed to the slave device, obtaining information to be verified from the host; Verifying the first write request based on the information to be verified and the sending time of the information to be verified; When the first write request is verified to be successful, the data to be written and the target register address are obtained from the host, and the data to be written is written into the register corresponding to the target register address.

2. The data writing method according to claim 1, characterized in that: The information to be verified includes first data to be verified and second data to be verified, the first data to be verified and the second data to be verified are different, and the verifying the first write request based on the information to be verified and the sending duration of the information to be verified includes: Performing a first verification on the first write request using the first data to be verified and the sending duration of the first data to be verified; In the case that the first verification is passed, the first write request is verified for a second time using the second data to be verified and the sending duration of the second data to be verified.

3. The data writing method according to claim 2, characterized in that: The first verification of the first write request using the first data to be verified and the sending duration of the first data to be verified includes: Matching the first data to be verified with a preset register address of the slave device, and obtaining a sending duration of the first data to be verified; If the first data to be verified matches the preset register address, and the sending time length of the first data to be verified is less than the first preset time length, the first write request passes the first verification; If the first data to be verified does not match the preset register address, or the sending time length of the first data to be verified is greater than or equal to the first preset time length, the first write request fails the first verification.

4. The data writing method according to claim 2, characterized in that: The second verification of the first write request using the second data to be verified and the sending time length of the second data to be verified includes: Matching the second data to be verified with the verification data in the preset register address of the slave device, and obtaining the sending duration of the second data to be verified; If the second data to be verified matches the verification data, and the sending time of the second data to be verified is less than the second preset time, the first write request passes the second verification; If the second data to be verified does not match the verification data, or the sending time length of the second data to be verified is greater than or equal to the second preset time length, the first write request fails the second verification.

5. The data writing method according to claim 1, characterized in that: The obtaining the information to be verified from the host comprises: Determining a sending duration of the first write request; Pre-verifying the first write request based on a sending duration of the first write request; If the first write request passes pre-verification, sending a reply signal to the host based on the first write request; receiving information to be verified sent by the host based on the reply signal.

6. The data writing method according to claim 1, characterized in that: The step of obtaining the data to be written and the target register address from the host, and writing the data to be written into the register corresponding to the target register address, comprises: Sending a verification-passed reply signal to the host, and receiving a second write request sent by the host; Verifying the second write request based on the slave device address included in the second write request; When the second write request is verified to be successful, the target register address and the data to be written sent by the host are received, and the data to be written is written into the register corresponding to the target register address.

7. A data writing method, characterized in that: Applied to a host, the method comprises: Sending a first write request to a plurality of slave devices; Based on the received reply signal returned by the target slave device, sending the information to be verified to the target slave device; When receiving a verification pass signal sent based on the information to be verified, the data to be written and the target register address are sent to the target slave device, so that the target slave device writes the data to be written into the register corresponding to the target register address.

8. The data writing method according to claim 7, characterized in that: The information to be verified includes first data to be verified and second data to be verified, and the first data to be verified and the second data to be verified are different; The sending verification information to the target slave device includes: Sending the first data to be verified to the target slave device; When receiving a reply signal sent by the target slave device indicating that the first verification is passed, second data to be verified is sent to the target slave device.

9. The data writing method according to claim 7, characterized in that: The sending the data to be written and the target register address to the target slave device comprises: Sending a second write request to the target slave device; When receiving a reply signal sent by the target slave device indicating that the second write request has been verified, the to-be-written data and the target register address are sent to the target slave device.

10. A data writing device, characterized in that: Applicable to slave devices, including: an acquisition module, configured to acquire information to be verified from the host in response to receiving a first write request for the slave device sent by the host; A verification module, configured to verify the first write request based on the information to be verified and a sending time of the information to be verified; A writing module is used to obtain the data to be written and the target register address from the host when the first writing request is verified, and write the data to be written into the register corresponding to the target register address.

11. A data writing device, characterized in that: Applied to the host, including: A first sending module, used for sending a first write request to multiple slave devices; A second sending module, configured to send the information to be verified to the target slave device based on the received reply signal returned by the target slave device; The third sending module is used to send the data to be written and the target register address to the target slave device when receiving the verification pass signal sent based on the information to be verified, so that the target slave device writes the data to be written into the register corresponding to the target register address.

12. An electronic device comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes, the data writing method according to any one of claims 1 to 6 or 7 to 9 is implemented.

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