Track allocation method based on GPU (Graphics Processing Unit) parallel acceleration

By constructing a cost chart under parallel acceleration and adopting a track allocation method with forward-looking search and backtracking strategies, the problem of difficult to quickly obtain a suitable track allocation scheme in the prior art is solved, and efficient track allocation and reduced wiring mismatch are achieved.

CN119917268AActive Publication Date: 2025-05-02FUZHOU UNIV
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Patent Information

Application Number
CN202411974672.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-30
Publication Date
2025-05-02
Estimated Expiration
2044-12-30

AI Technical Summary

Technical Problem

The prior art is difficult to obtain a suitable track allocation scheme through GPU parallel acceleration in a short time, and while ensuring the quality of track allocation, it is difficult to effectively reduce the mismatch between the overall wiring and the detailed wiring.

Method used

A track allocation method based on GPU parallel acceleration is proposed. By constructing the cost map corresponding to the evaluation indicators, a forward-looking search and backtracking strategy is used to find candidate solutions for wire allocation, and track redistribution is performed based on the track allocation results.

Benefits of technology

A track allocation solution without sacrificing the track allocation quality in a short time can effectively reduce the mismatch between the overall wiring and the detailed wiring and improve the efficiency of VLSI design.

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Abstract

The invention relates to a track allocation method based on GPU parallel acceleration, and belongs to the technical field of integrated circuit computer aided design. According to the method, a track distribution method considering a global line network and a local line network at the same time is provided, and several optimization methods are provided at the same time to optimize a candidate solution set of track distribution. In addition, the invention further provides an asynchronous parallel accelerated computing method, computing tasks distributed by wiring resources and tracks are subjected to fine granularity, and the algorithm running speed is increased while the result quality is not sacrificed. Experimental results under a plurality of benchmark tests prove that the method provided by the invention can effectively reduce the running time of the track distribution process, and a better track distribution solution can be obtained without sacrificing the quality of the track distribution result.
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Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuit computer-aided design, and in particular relates to a track allocation method based on GPU parallel acceleration. Background Art

[0002] Physical design is a key link in the design process of Very Large Scale Integration (VLSI), and it is also the most time-consuming step. Physical design usually includes stages such as electrical diagram partitioning, floorplanning, placement, clock tree synthesis, routing, and timing closure. As a key stage in VLSI physical design, routing is usually divided into two stages, general routing and detailed routing. The general routing stage performs routing from a global perspective, but ignores many design issues that need to be considered in detailed routing, which leads to a mismatch between general routing and detailed routing. Both academia and industry have tried to introduce the track allocation stage as the initial stage of detailed routing in the detailed routing process to reduce the mismatch between general routing and detailed routing. Introducing track allocation as the initial stage of detailed routing can effectively reduce the overlap between wire segments or between wire segments and obstacles while ensuring the connectivity of the wire network, reduce the mismatch between general routing and detailed routing, and provide a better initial solution for the detailed routing stage. With the advancement of VLSI process manufacturing technology, routability evaluation methods require more computational work to solve legal solutions that can meet all constraints due to the growing design complexity and increasingly complex design constraints, which leads to longer design cycles and slow convergence to the optimal target. With the rapid development of graphics processing units (GPUs), the application of GPU parallelism in complex constraints of VLSI design has received widespread attention. In recent years, researchers have proposed many strategies for track allocation, but they have not yet combined the track allocation problem with GPU parallelism to obtain a suitable track allocation solution in a shorter time. Therefore, a track allocation method based on GPU parallel acceleration is proposed to obtain a reasonable routability evaluation in a short time without sacrificing the quality of track allocation. Summary of the invention

[0003] The purpose of the present invention is to provide a track allocation method based on GPU parallel acceleration based on the independence and decomposability of the track allocation problem, which can obtain a track allocation solution without sacrificing the track allocation quality in a short time.

[0004] To achieve the above object, the technical solution of the present invention is: a track allocation method based on GPU parallel acceleration, comprising:

[0005] A track allocation method that considers both the global and local networks is proposed, which can be implemented as follows:

[0006] Extract wires from global and local nets;

[0007] The wiring area is divided into a plurality of overall wiring units according to the channel width. The wiring belt is composed of a row / column of overall wiring units. Each wiring belt includes a plurality of tracks for placing wires. The wiring belt is divided into a plurality of sub-wiring belts, and further cut and divided into segments.

[0008] Construct a cost graph corresponding to the evaluation index, adopt a forward search strategy to find the candidate solution set for wire allocation, and assign a corresponding selection probability to each candidate solution; use a backtracking strategy to find a new candidate solution set for the candidate solution set; and redistribute the wires based on the track allocation results.

[0009] In one embodiment of the present invention, it also includes:

[0010] A method based on asynchronous parallel acceleration computing is proposed to fine-grain the computing tasks of wiring resources and track allocation.

[0011] In one embodiment of the present invention, for a global network, a conductor is a straight line from the center of one overall wiring unit to the center of another overall wiring unit; for a local network, two straight Steiner trees are created for each local network, namely a vertical trunk Steiner tree and a horizontal trunk Steiner tree, the trunks of the two Steiner trees are respectively confirmed and the line lengths of the two Steiner trees are calculated through the distances from all pins to the trunks, and the trunk with the shorter line length is selected as the conductor extracted from the corresponding local network.

[0012] In one embodiment of the present invention, the evaluation index includes obstacle cost, overlap cost and line length cost.

[0013] In one embodiment of the present invention, the cost graph corresponding to the evaluation index is constructed as follows:

[0014] (1) Obstacle costs

[0015] For an obstacle b that occupies multiple tracks, consider the obstacle b as the sub-obstacle b corresponding to the tracks it occupies. t ; The calculation formula of obstacle cost is as follows:

[0016] bc it =olen(i,b t ),

[0017] Among them bc it Indicates the obstacle cost of whether wire i is on track t, olen(i,b t ) represents the wire i and the obstacle b tSince obstacles and tracks are bound and the positions of obstacles are fixed, a complete bipartite graph G of obstacle costs corresponding to the wire set and track set is constructed. b ;

[0018] (2) Overlapping costs

[0019] When some wires are assigned to the same track, overlapping costs will occur. Each wire has a corresponding set of wires that will overlap, so an adjacency table of overlapping costs is constructed; the overlapping cost is calculated as follows:

[0020] oc ii' =olen(i,i')

[0021] Among them, olen(i,i′) represents the overlapping cost between two different wires i and i′;

[0022] When multiple wires overlap in the same segment, the overlapping cost is calculated as follows:

[0023]

[0024] Among them, slen tk represents the length of the kth segment on track t, oc represents the overlap cost of the corresponding routing belt, onum tk represents the number of overlapping wires on the kth segment on track t, T represents the track set of the wiring tape, x it Used to save the wire allocation. If x it If it is 1, it means that the wire i is assigned to track t, I represents the wire set, S t represents the set of segments on track t, c ik Indicates whether wire i exists on the kth segment;

[0025] From the perspective of overlapping costs, the overlapping relationship between wires will affect the allocation of subsequent wires. The overlapping cost calculation formula is changed to:

[0026]

[0027] Among them, ilen i Indicates the length of wire i, tlen t represents the length of track t, slen tk represents the length of the kth segment on track t, S′ t A collection of segments that represent unassigned wires;

[0028] The result of the track allocation scheme only affects the segment set S′ that is not assigned to the wires. t, while the total length of the wire and the total length of the track will not change due to the change of the allocation scheme; therefore, in order to reduce the overlapping cost, it is necessary to reduce the total length of the unallocated wire segments;

[0029] For the wires to be allocated currently, the track where the segment where the wires are not allocated is given priority; without considering the obstacle cost and line length cost, the track allocation result before the segment can minimize the overlapping cost; therefore, the allocation order of the wires and the priority of the wires allocated to each track should be considered, the wire set should be sorted, and the allocation order of the wires should be determined;

[0030] (3) Line length cost

[0031] Pins and wires are components within a mesh. A mesh contains several pins and wires. During the track allocation phase, the placed wires will be connected to other components of the mesh where they are located. The sum of the Manhattan distances generated by connecting all components within a mesh is the wire length cost.

[0032] In one embodiment of the present invention, a forward-looking search strategy is adopted to find a candidate solution set for wire allocation, and a specific implementation method of allocating a corresponding selection probability to each candidate solution is as follows:

[0033] Before assigning each wire, a forward search is performed on each wire to perform probability assessment on conflicts between wires and tracks and between wires. The forward search uses the corresponding probability assessment values ​​between wires and tracks to further distinguish subsequent identical sub-states. The sum of the probabilities of wires being assigned to each track is 1.

[0034]

[0035] Where P i,t represents the probability of wire i being assigned to track t, and T(i) represents the set of tracks to which wire i can be assigned;

[0036] Some wires are mutually exclusive due to their overlapping relationship, and wires and obstacles are also mutually exclusive; therefore, the conflict between obstacle cost and overlapping cost can be alleviated through forward search;

[0037] According to the obtained obstacle cost bipartite graph G b , initialize the probability of assigning a track to each wire, and obtain the initial probability P i,j , the formula is as follows:

[0038]

[0039] Where i represents the wire, j and k are different track numbers, m represents the number of tracks that can be assigned to wire i, and n represents the number of tracks corresponding to the minimum obstacle cost set corresponding to wire i. The above formula represents the probability of being equally divided by the track where the minimum obstacle cost is located, thereby ensuring the minimization of the obstacle cost.

[0040] After initializing the probability, according to the previous overlapping relationship diagram, the updated probability is transmitted between the wires based on the initial probability; the probability update formula is as follows:

[0041]

[0042] Where V(i) represents the set of wires that overlap with wire i, P ix,t represents the probability of wire ix being assigned to track t, oc i,ix Indicates the overlapping relationship when wire i and wire ix are assigned to the same track, v i,t represents the weight of wire i assigned to different tracks;

[0043] v_sum i =∑(v max -v i,t ),if P i,t ≠0,

[0044] where v max It represents the maximum value of the weight set of the conductor. The above formula represents the difference addition of the weights of all tracks. The larger the product of the overlapping cost and probability on the track, the larger the expected value of the overlapping cost and the smaller the expected value of the probability assigned to the corresponding track.

[0045]

[0046] Among them, P′ i,t represents the updated wire assignment probability, and ε is the weight scaling factor used to maintain the proportion of the current weight and normalize the updated probability.

[0047] In one embodiment of the present invention, the specific implementation method of using the backtracking strategy to find a new candidate solution set is as follows:

[0048] During the track allocation process, an sl substate is created for each mapping between a wire and a track to save the wire allocation status; sl is represented as follows:

[0049] sl id ={slcost,id,bd0,bd1,...,bd t}

[0050] Among them, slcost represents the total cost value of each sub-state, id represents the index of the previous sub-state, and bd t Record the boundary coordinates of the wire set on each track in the corresponding sub-state; for each wire, use the sl state to save the state of the wire assigned to each track;

[0051] In the actual allocation process, when the sl sub-state of the previous layer plays the same update role on the wire allocation of the following steps, the sl sub-state with the largest corresponding probability evaluation value is selected for update;

[0052] Since forward search cannot fully predict the conflict between obstacle cost and overlapping cost, it is necessary to consider adopting a backtracking strategy of track exchange for the wire set when encountering a conflict; in the initial step, the update of the current sub-state is completed by selecting a suitable candidate state from the sub-state of the previous layer; at this time, if there is a conflict, a part of the wires will be selected for track exchange; specifically, according to the cost map corresponding to the constructed evaluation index, those tracks with the lowest probability of conflict after exchange are selected, and the wire sets are exchanged on these tracks; at the same time, the cost after exchange will also be updated accordingly; if the total cost after exchange is the same as the previous cost, it is considered that the two wire sets can be interchanged; otherwise, it will further backtrack and try other possible exchange schemes;

[0053] The substate is updated according to the endpoints of the wire and the boundary coordinates of the wire set of the previous substate. The cost update formula is as follows:

[0054] slcost it =slcost′ it +a×blkcost+β×olcost

[0055] Among them, slcost′ it represents the cost corresponding to the state of wire i being assigned to track t after the update, slcost it represents the cost corresponding to updating the state of the leading line i assigned to track t, a represents a very large constant, and β is set to 1.

[0056] In one embodiment of the present invention, track redistribution adopts a redistribution strategy, in which RE is used to represent the change in cost after the conductor ir is redistributed to the track; the calculation formula of RE is as follows:

[0057] RE=α×Δblkcost(ir,t,t′)+β×Δoverlapcost(ir,t,t′)+γ×Δwlcost(ir,t,t′)

[0058] where Δblkcost(ir,t,t′), Δoverlapcost(ir,t,t′), and Δwlcost(ir,t,t′) represent the changes in obstacle cost, overlap cost, and line length cost, respectively, when redistributing wire ir from track t to track t′, and α, β, and γ represent the weights of the corresponding costs.

[0059] In one embodiment of the present invention, the asynchronous parallel accelerated computing method includes:

[0060] (1) Preprocess and calculate each possible state of the obstacle cost and line length cost;

[0061] (2) The computing tasks assigned to the entire track are abstracted into a task timing diagram; each computing task is abstracted into a task node, and each task node has a corresponding predecessor node and successor node; according to the type of computing unit processed by the task, it is divided into CPU task node, GPU task node and heterogeneous task node. Heterogeneous task node indicates that the corresponding task needs to combine CPU parallelism and GPU parallelism; in heterogeneous task nodes, CPU tasks and GPU tasks also have dependencies; further, multiple asynchronous streams are introduced to reduce the waiting time of the GPU and allow each asynchronous stream to work independently.

[0062] In one embodiment of the present invention, the routing resources used by each routing belt are independent of each other, and the routing resources on each routing belt are dynamically allocated to a one-dimensional array by adopting a sparse row compression strategy.

[0063] Compared with the prior art, the present invention has the following beneficial effects: the present invention provides a track allocation method based on GPU parallel acceleration, which can obtain a track allocation solution without sacrificing the track allocation quality in a short time. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 This is a schematic diagram of a multi-layer wiring model.

[0065] Figure 2 Schematic diagram of evaluation indicators.

[0066] Figure 3 This is a schematic diagram of wire conflict.

[0067] Figure 4 Schematic diagram of parallel partitioning.

[0068] Figure 5 This is a schematic diagram of asynchronous scheduling. DETAILED DESCRIPTION

[0069] The technical solution of the present invention is described in detail below in conjunction with the accompanying drawings.

[0070] The present invention provides a track allocation method based on GPU parallel acceleration, comprising the following steps:

[0071] First, for global nets, a conductor is defined as a straight line from the center of one overall wiring unit to the center of another overall wiring unit. For local nets, two straight Steiner trees are created for each local net, namely a vertical trunk Steiner tree and a horizontal trunk Steiner tree. The trunks of the two trees are identified respectively and the wire lengths of the two trees are calculated by the distance from all pins to the trunks. The trunk with the shorter wire length is selected as the wire extracted from the local net. Figure 1 As shown, in the overall routing stage, the routing area is divided into multiple overall routing units according to the channel width, and each layer of the routing belt consists of a row (column) of overall routing units and contains several tracks for placing wires. Wires are extracted from the global and local nets, and the routing belt is divided into several subsets and cut, and further divided into segments.

[0072] Next, a cost graph corresponding to the evaluation indicators (obstacle cost, overlap cost, and line length cost) is constructed, and a forward search strategy is adopted to find a set of candidate solutions for wire assignment, and a corresponding selection probability is assigned to each candidate solution;

[0073] Then, a backtracking strategy is applied to the candidate solution set to find a new candidate solution set;

[0074] Finally, the conductors are reallocated based on the track allocation results.

[0075] The detailed implementation scheme of the present invention is introduced below.

[0076] See also Figure 2 ,Schematic diagram of evaluation indicators, the evaluation indicators include obstacle cost, overlapping cost, and line length cost.

[0077] 1. Obstacle cost:

[0078] For an obstacle b that occupies multiple tracks, the obstacle b and the tracks it occupies are considered as the sub-obstacles b corresponding to these tracks. t .

[0079] The barrier cost is calculated as follows:

[0080] bc it =olen(i,b t ), (1)

[0081] Among them bc it Indicates the obstacle cost of whether wire i is on track t, olen(i,b t ) represents the wire i and the obstacle b tSince obstacles and tracks are bound and the positions of obstacles are fixed, a complete bipartite graph G of obstacle costs corresponding to the wire set and track set can be constructed. b .

[0082] 2. Overlapping costs:

[0083] When some wires are assigned to the same track, overlapping costs will occur. Each wire has a corresponding set of wires that will overlap, so an adjacency table of overlapping costs can be constructed. The overlapping cost is calculated as follows:

[0084] oc ii' =olen(i,i') (2)

[0085] Among them, olen(i,i′) represents the overlapping cost between two different wires i and i′.

[0086] When multiple wires overlap in the same segment, the overlapping cost is calculated as follows:

[0087]

[0088] Among them, slen tk represents the length of the kth segment on track t, oc represents the overlap cost of the routing belt, onum tk represents the number of overlapping wires on the kth segment on track t, T represents the track set of the wiring tape, x it Used to save the wire allocation. If x it is 1, it means that wire i is assigned to track t, S t represents the set of segments on track t, c ik Indicates whether wire i exists on the kth segment.

[0089] From the perspective of overlapping costs, the overlapping relationship between wires will affect the allocation of subsequent wires. Combining formulas (3)-(5), the formula can be transformed into:

[0090]

[0091] Among them, ilen i Indicates the length of wire i, tlen t represents the length of track t, slen tk represents the length of the kth segment on track t, S′ t Represents a collection of segments that have no wires assigned to them.

[0092] Therefore, the result of the track allocation scheme only affects the segment set S′ of the unassigned wires. t, while the total length of the wire and the total length of the track will not change due to the change of the allocation scheme. Therefore, in order to reduce the overlapping cost, it is necessary to reduce the total length of the unallocated wire segments.

[0093] For the wires to be assigned, the track of the segment where the wires are not assigned is given priority. Without considering obstacles and line length costs, the track assignment result before the segment can minimize the overlap cost.

[0094] Therefore, the order of wire allocation and the priority of wire allocation to each track should be considered. The wire set is sorted to determine the order of wire allocation.

[0095] 3. Line length cost:

[0096] Pins and wires are components within a network. A network contains several pins and wires. During the track allocation phase, these placed wires will be connected to other components of the network in which they are located. The sum of the Manhattan distances generated by connecting all components within a network is the wire length cost.

[0097] 4. Look-ahead search:

[0098] Before allocating each wire, a forward search is performed on each wire to perform a probability assessment of the conflict between the wire and the track and between the wires.

[0099]

[0100] This stage uses the corresponding probability evaluation values ​​between wires and tracks to further distinguish the subsequent identical sub-states, and the sum of the probabilities of the wires being assigned to each track is 1.

[0101] Where P i,t represents the probability of wire i being assigned to track t, and T(i) represents the set of tracks to which wire i can be assigned.

[0102] Some wires are mutually exclusive due to their overlapping relationship, and wires and obstacles are also mutually exclusive. Therefore, the conflict between obstacle cost and overlapping cost can be alleviated through forward search.

[0103] According to the obtained obstacle cost bipartite graph G b , the probability of assigning a track to each wire can be initialized to obtain the initial probability P i,j , the formula is as follows:

[0104]

[0105] Where i represents the wire, j and k are different track numbers, m represents the number of tracks that can be assigned to wire i, and n represents the number of tracks corresponding to the minimum obstacle cost set corresponding to wire i. Formula (8) represents the probability of being divided equally by the track where the minimum obstacle cost is located. This ensures that the obstacle cost is minimized.

[0106] After initializing the probability, according to the previous overlapping relationship diagram, the updated probability is transmitted between the wires based on the initial probability. The probability update formula is as follows:

[0107]

[0108] Where V(i) represents the set of wires that overlap with wire i, P ix,t represents the probability of wire ix being assigned to track t, oc i,ix Indicates the overlapping relationship when wire i and wire ix are assigned to the same track, v i,t Represents the weight of wire i assigned to different tracks.

[0109]

[0110] where v max represents the maximum value of the weight set of the conductor. Formula (10) represents the difference addition of the weights of all tracks. The larger the product of the overlapping cost and probability on the track, the larger the expected value of the overlapping cost and the smaller the expected value of the probability assigned to the track.

[0111]

[0112] Among them, P′ i,j represents the updated wire assignment probability, and ε is the algorithm's built-in weight scaling factor, which is used to maintain the current weight ratio and normalize the updated probability.

[0113] 5. Candidate search phase:

[0114] During the track allocation process, an sl substate is created for each wire and track mapping to save the wire allocation status. sl is represented as follows:

[0115] sl id ={slcost,id,bd0,bd1,...,bd t} (12)

[0116] Among them, slcost represents the total cost value of each sub-state, id represents the index of the previous sub-state, and bd t Then record the boundary coordinates of the wire set on each track in this state. For each wire, use the sl state to save the state of the wire assigned to each track.

[0117] In the actual allocation process, when the sl sub-state of the previous layer plays the same update role on the wire allocation of the subsequent steps, the sl sub-state with the largest corresponding probability evaluation value is selected for update.

[0118] However, the above forward search cannot fully predict the conflict between obstacle cost and overlapping cost. Therefore, when a conflict occurs, it is necessary to consider a backtracking strategy of track exchange for the wire set.

[0119] In the initial step of the algorithm, the update of the current substate is completed by selecting a suitable candidate state from the substate of the previous layer. At this time, if there is a conflict (such as Figure 3 As shown in Figure 1), when considering both obstacle and line length costs, obstacle costs need to be given priority, which may occur at the expense of certain overlapping costs to ensure the optimal solution of obstacle costs. This is because in the previous track allocation process, many sub-states are equivalent, so it is not feasible to consider only the current wire in the allocation process. Further forward search of subsequent wires and backtracking of wire allocation for a certain number of steps are required. In order to more accurately evaluate and find better candidate solutions, the backtracking strategy combines forward search of subsequent allocation states. During the backtracking process, the algorithm selects a part of the wires for track exchange. Specifically, according to the constructed cost graph, the algorithm selects those tracks with the lowest probability of conflict after exchange, and exchanges the wire sets on these tracks. At the same time, the cost after exchange will be updated accordingly. If the total cost after exchange is the same as the previous cost, the two wire sets are considered to be interchangeable; otherwise, the algorithm will further backtrack and try other possible exchange schemes.

[0120] The sub-state is updated according to the endpoints of the wire and the boundary coordinates of the wire set of the previous sub-state. The cost update formula is as follows:

[0121] slcost′ it =slcost it +a×bc+β×oc (13)

[0122] Among them, slcost′ it Indicates the cost corresponding to the updated state (the state where wire i is assigned to track t), slcost it represents the cost corresponding to the state before the update, a represents a very large constant, and β is set to 1.

[0123] 6.Redistribution strategy:

[0124] During the track allocation process, after the track is exchanged, some non-critical wires will be allocated to a track with a higher cost, which will significantly increase the line length cost. In order to reduce the occurrence of this situation, a reallocation strategy is adopted. RE is used to represent the change in the cost of the wire ir after the track is reallocated. The calculation formula of RE is as follows:

[0125] RE=α×Δblkcost(ir,t,t′)+β×Δoverlapcost(ir,t,t′)+γ×Δwlcost(ir,t,t′) (14)

[0126] Wherein Δblkcost(ir,t,t′), Δoverlapcost(ir,t,t′), and Δwlcost(ir,t,t′) represent the changes in obstacle cost, overlap cost, and line length cost when redistributing wire ir from track t to track t′, respectively. α, β, and γ represent custom cost weights.

[0127] 7. Sub-wiring tape division:

[0128] like Figure 4 As shown in the figure, the routing belt is divided into several independent smaller subsets, called sub-routing belts, and the wire sets in the routing belt are divided, wherein the divided wire sets and the wires of other sub-routing belts will not overlap on the same track. The routing resources used by each sub-routing belt are independent of each other, and the division of sub-routing belts does not change the position of the wires or their relative allocation order, thereby improving the running speed of the algorithm without affecting the solution quality.

[0129] 8. Asynchronous parallel strategy:

[0130] Definition 1. Cost order of magnitude parallelism:

[0131] In track allocation, when allocating each wire, the calculation load of obstacle cost and line length cost is large, and a finer granularity division can be performed. Therefore, each possible state of obstacle cost and line length cost is pre-processed and calculated to avoid repeated calculations in the actual allocation process. The parallel granularity can reach the order of magnitude of the product of the number of wires and the number of tracks.

[0132] Definition 2. Asynchronous task node:

[0133] In the process of heterogeneous parallel computing, the computing tasks assigned to the entire track are abstracted into a task timing diagram. Each computing task is abstracted into a task node, and each task node has a corresponding predecessor node and successor node. According to the type of computing unit processed by the task, it can be divided into CPU task nodes, GPU task nodes and heterogeneous task nodes. Heterogeneous task nodes indicate that the task needs to combine CPU parallelism and GPU parallelism. In heterogeneous task nodes, there is also a certain dependency between CPU tasks and GPU tasks.

[0134] In the actual GPU parallel process, it is usually necessary to preprocess the data and transfer the data before performing GPU parallel computing on the GPU side. Figure 5 The following figure shows the running status of the task flow in three cases. The tasks marked in red represent GPU tasks, while those marked in blue represent CPU tasks. Task 1 and Task 2 are two tasks that do not have dependencies. The leftmost one shows the single serial execution process of the CPU and GPU. The CPU and GPU can only execute one task at a time. In the first task flow execution mode, Task 2 can only start execution after the entire Task 1 is executed. At this time, the CPU and GPU will waste time because of waiting for each other. Therefore, the second task flow execution mode is obtained through asynchronous adjustment to reduce its waiting time.

[0135] During the GPU task calculation process, all GPU tasks under a single CUDA stream will queue up for execution. For smaller-scale computing tasks, the GPU resources (core and memory bandwidth) may not be fully utilized. In order to further improve the utilization of the GPU, multiple CUDA streams are further introduced on this basis to reduce the GPU waiting time, allowing each CUDA stream to work independently and better utilize GPU resources.

[0136] Therefore, in this strategy, combined with CPU asynchrony, the CPU waiting time will be greatly reduced in the case of a single CUDA stream. On this basis, multiple asynchronous streams are created, and asynchronous management can better utilize the computing resources of the CPU and GPU, reduce the bottleneck of a single device, and improve the efficiency of parallel execution.

[0137] 9. Sparse row compression strategy

[0138] The routing resources on each routing strip are dynamically allocated to a one-dimensional array by adopting a sparse row compression (Compress Sparse Row, CSR) strategy. In order to achieve the ideal data transmission times, the use of dynamic data structures in the GPU requires the storage of complete data on the GPU to provide feasibility for task scheduling within the GPU. Due to the difference in the number of wires in each routing strip and the existence of a large number of sparse matrices, it is converted into a row compression method. A standard row compression structure consists of three parts: row offset, column index, and value.

[0139] The above are preferred embodiments of the present invention. Any changes made according to the technical solution of the present invention, as long as the resulting functions do not exceed the scope of the technical solution of the present invention, belong to the protection scope of the present invention.

Claims

1. A track allocation method based on GPU parallel acceleration, characterized in that: include: A track allocation method that considers both the global and local networks is proposed, which can be implemented as follows: Extract wires from global and local nets; The wiring area is divided into a plurality of overall wiring units according to the channel width. The wiring belt is composed of a row / column of overall wiring units. Each wiring belt includes a plurality of tracks for placing wires. The wiring belt is divided into a plurality of sub-wiring belts, and further cut and divided into segments. Construct a cost graph corresponding to the evaluation index, adopt a forward-looking search strategy to find a candidate solution set for wire allocation, and assign a corresponding selection probability to each candidate solution; A backtracking strategy is used to find a new candidate solution set for the candidate solution set; and the conductors are reallocated based on the track allocation results.

2. The track allocation method based on GPU parallel acceleration according to claim 1, characterized in that: Also includes: A method based on asynchronous parallel acceleration computing is proposed to fine-grain the computing tasks of wiring resources and track allocation.

3. The track allocation method based on GPU parallel acceleration according to claim 1, characterized in that: For the global line net, the conductor is a straight line from the center of one overall wiring unit to the center of another overall wiring unit; for the local line net, two straight Steiner trees are created for each local line net, namely the vertical trunk Steiner tree and the horizontal trunk Steiner tree, the trunks of the two Steiner trees are respectively confirmed and the line lengths of the two Steiner trees are calculated through the distances from all pins to the trunks, and the trunk with the shorter line length is selected as the conductor extracted from the corresponding local line net.

4. The track allocation method based on GPU parallel acceleration according to claim 1, characterized in that: Evaluation indicators include obstacle cost, overlap cost and line length cost.

5. The track allocation method based on GPU parallel acceleration according to claim 1 or 4, characterized in that: The cost map corresponding to the evaluation index is constructed as follows: (1) Obstacle costs For an obstacle b that occupies multiple tracks, consider the obstacle b as the sub-obstacle b corresponding to the tracks it occupies. t ; The calculation formula of obstacle cost is as follows: b.c. it =I am(i,b) t ), Among them bc it Indicates the obstacle cost of whether wire i is on track t, olen(i,b t ) represents the wire i and the obstacle b t Since obstacles and tracks are bound and the positions of obstacles are fixed, a complete bipartite graph G of obstacle costs corresponding to the wire set and track set is constructed. b ; (2) Overlapping costs When some wires are assigned to the same track, overlapping costs will occur. Each wire has a corresponding set of wires that will overlap, so an adjacency table of overlapping costs is constructed; the overlapping cost is calculated as follows: oh ii' =I am(i,i') Among them, olen(i,i′) represents the overlapping cost between two different wires i and i′; When multiple wires overlap in the same segment, the overlapping cost is calculated as follows: Among them, slen tk represents the length of the kth segment on track t, oc represents the overlap cost of the corresponding routing belt, onum tk represents the number of overlapping wires on the kth segment on track t, T represents the track set of the wiring tape, x it Used to save the wire allocation. If x it If it is 1, it means that the wire i is assigned to track t, I represents the wire set, S t represents the set of segments on track t, c ik Indicates whether wire i exists on the kth segment; From the perspective of overlapping costs, the overlapping relationship between wires will affect the allocation of subsequent wires. The overlapping cost calculation formula is changed to: Among them, ilen i Indicates the length of wire i, tlen t represents the length of track t, slen tk represents the length of the kth segment on track t, S′ t A collection of segments that represent unassigned wires; The result of the track allocation scheme only affects the segment set S′ that is not assigned to the wires. t , while the total length of the wire and the total length of the track will not change due to the change of the allocation scheme; therefore, in order to reduce the overlapping cost, it is necessary to reduce the total length of the unallocated wire segments; For the wires to be allocated currently, the track where the segment where the wires are not allocated is given priority; without considering the obstacle cost and line length cost, the track allocation result before the segment can minimize the overlapping cost; therefore, the allocation order of the wires and the priority of the wires allocated to each track should be considered, the wire set should be sorted, and the allocation order of the wires should be determined; (3) Line length cost Pins and wires are components within a mesh. A mesh contains several pins and wires. During the track allocation phase, the placed wires will be connected to other components of the mesh where they are located. The sum of the Manhattan distances generated by connecting all components within a mesh is the wire length cost.

6. The track allocation method based on GPU parallel acceleration according to claim 5, characterized in that: The specific implementation method of adopting the forward search strategy to find the candidate solution set of wire allocation and assigning the corresponding selection probability to each candidate solution is as follows: Before assigning each wire, a forward search is performed on each wire to perform probability assessment on conflicts between wires and tracks and between wires. The forward search uses the corresponding probability assessment values ​​between wires and tracks to further distinguish subsequent identical sub-states. The sum of the probabilities of wires being assigned to each track is 1. Where P i,t represents the probability of wire i being assigned to track t, and T(i) represents the set of tracks to which wire i can be assigned; Some wires are mutually exclusive due to their overlapping relationship, and wires and obstacles are also mutually exclusive; therefore, the conflict between obstacle cost and overlapping cost can be alleviated through forward search; According to the obtained obstacle cost bipartite graph G b , initialize the probability of assigning a track to each wire, and obtain the initial probability P i,j , the formula is as follows: Where i represents the wire, j and k are different track numbers, m represents the number of tracks that can be assigned to wire i, and n represents the number of tracks corresponding to the minimum obstacle cost set corresponding to wire i. The above formula represents the probability of being equally divided by the track where the minimum obstacle cost is located, thereby ensuring the minimization of the obstacle cost. After initializing the probability, according to the previous overlapping relationship diagram, the updated probability is transmitted between the wires based on the initial probability; the probability update formula is as follows: Where V(i) represents the set of wires that overlap with wire i, P ix,t represents the probability of wire ix being assigned to track t, oc i,ix Indicates the overlapping relationship when wire i and wire ix are assigned to the same track, v i,t represents the weight of wire i assigned to different tracks; v_sum i =∑(v max -v i,t ),if P i,t ≠0, where v max It represents the maximum value of the weight set of the wire. The above formula represents the difference addition of the weights of all tracks. The larger the product of the overlapping cost and probability on the track, the larger the expected value of the overlapping cost and the smaller the expected value of the probability assigned to the corresponding track. Among them, P′ i,t represents the updated wire assignment probability, and ε is the weight scaling factor used to maintain the proportion of the current weight and normalize the updated probability.

7. The track allocation method based on GPU parallel acceleration according to claim 1, characterized in that: The specific implementation method of using the backtracking strategy to find a new candidate solution set is as follows: During the track allocation process, an sl substate is created for each mapping between a wire and a track to save the wire allocation status; sl is represented as follows: sl id ={slcost,id,bd0,bd1,...,bd t } Among them, slcost represents the total cost value of each sub-state, id represents the index of the previous sub-state, and bd t Record the boundary coordinates of the wire set on each track in the corresponding sub-state; for each wire, use the sl state to save the state of the wire assigned to each track; In the actual allocation process, when the sl sub-state of the previous layer plays the same update role on the wire allocation of the following steps, the sl sub-state with the largest corresponding probability evaluation value is selected for update; Since forward search cannot fully predict the conflict between obstacle cost and overlapping cost, it is necessary to consider adopting a backtracking strategy of track exchange for the wire set when encountering a conflict; in the initial step, the update of the current sub-state is completed by selecting a suitable candidate state from the sub-state of the previous layer; at this time, if there is a conflict, a part of the wires will be selected for track exchange; specifically, according to the cost map corresponding to the constructed evaluation index, those tracks with the lowest probability of conflict after exchange are selected, and the wire sets are exchanged on these tracks; at the same time, the cost after exchange will also be updated accordingly; if the total cost after exchange is the same as the previous cost, it is considered that the two wire sets can be interchanged; otherwise, it will further backtrack and try other possible exchange schemes; The substate is updated according to the endpoints of the wire and the boundary coordinates of the wire set of the previous substate. The cost update formula is as follows: slcost it =slcost¢ it +a′blkcost+β×olcost Among them, slcost¢ it represents the cost corresponding to the state of wire i being assigned to track t after the update, slcost it represents the cost corresponding to updating the state of the leading line i assigned to track t, a represents a very large constant, and β is set to 1.

8. The track allocation method based on GPU parallel acceleration according to claim 1, characterized in that: Track redistribution adopts the redistribution strategy, in which RE is used to represent the change in cost after the conductor ir is redistributed to the track; the calculation formula of RE is as follows: RE=α×Δblkcost(ir,t,t′)+β×Δoverlapcost(ir,t,t′)+γ×Δwlcost(ir,t,t′) where Δblkcost(ir,t,t′), Δoverlapcost(ir,t,t′), and Δwlcost(ir,t,t′) represent the changes in obstacle cost, overlap cost, and line length cost, respectively, when redistributing wire ir from track t to track t′, and α, β, and γ represent the weights of the corresponding costs.

9. The track allocation method based on GPU parallel acceleration according to claim 2, characterized in that: The asynchronous parallel accelerated computing method comprises: (1) Preprocess and calculate each possible state of the obstacle cost and line length cost; (2) The computing tasks assigned to the entire track are abstracted into a task timing diagram; each computing task is abstracted into a task node, and each task node has a corresponding predecessor node and successor node; according to the type of computing unit processed by the task, it is divided into CPU task node, GPU task node and heterogeneous task node. Heterogeneous task node indicates that the corresponding task needs to combine CPU parallelism and GPU parallelism; in heterogeneous task nodes, CPU tasks and GPU tasks also have dependencies; further, multiple asynchronous streams are introduced to reduce the waiting time of the GPU and allow each asynchronous stream to work independently.

10. The track allocation method based on GPU parallel acceleration according to claim 1, characterized in that: The routing resources used by each routing belt are independent of each other. The routing resources on each routing belt are dynamically allocated to a one-dimensional array by adopting a sparse row compression strategy.

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