An address code allocation method and device

Abstract

The application discloses an address code allocation method and device applied to a cascade type high-voltage energy storage system, and the method comprises the following steps: polling and comparing the address code in the communication data stored in each address code storage unit according to the communication data sent by a controller or a previous-stage power unit module and received by a current power unit module; if a first result is obtained through comparison, assigning the address code to a special address code storage unit of the current power unit module; and if a second result is obtained through comparison, keeping the special address code storage unit of the current power unit module in an initialization state. Through the address code allocation method, the address code of each power unit module in a ring type communication link is automatically allocated, the hardware cost is not increased, the address code allocation method has high universality, the risk of address code setting error is effectively avoided, and the system reliability is further improved.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of energy storage system communication, in particular to an address code allocation method and device. BACKGROUND

[0002] With the proposal of the "double carbon" goal and the gradual deepening of energy structure transformation, the installed capacity and power generation proportion of new energy are increasing. The characteristics of high proportion of new energy and high proportion of power electronic equipment in new power systems put forward higher requirements for their stability and reliability, and the requirement for fast and flexible adjustment resource allocation is gradually increasing. Energy storage technology plays an important role in improving the consumption level of renewable energy such as wind power and photovoltaic power, relieving peak regulation pressure, and smoothing renewable energy output, and is one of the key technologies to promote the efficient use of renewable energy; it can also improve the flexible regulation capability of the power system and ensure the safe and stable operation of the power grid. Cascaded high-voltage energy storage system is an advanced energy storage technology, which has the advantages of high safety, high efficiency, fast response speed, large single machine capacity, long system life, etc., and is an important development direction of energy storage technology. Cascaded energy storage converter is a key equipment of cascaded high-voltage energy storage system. At present, the mainstream communication mode between the controller and the unit module of the cascaded energy storage converter is as follows: there are two optical fibers for communication between the controller and all unit modules, the number of communication optical fibers is twice the number of unit modules, and the controller and the unit module are arranged in different prefabricated cabins or different positions in the building. The amount of communication optical fiber is large.

[0003] The cascaded energy storage converter often adopts a ring communication technology scheme, and the key step for normal communication of the ring communication link is unit module address code allocation. The current unit module address code allocation method is: program fixed unit module address code and dial switch setting unit module address code. However, the existing technical solutions have the following disadvantages: first, for program fixed unit module address code, the unit modules of the ring communication link need to burn different address code programs to represent their positions, and the control board program of the unit module does not have universality. Second, for dial switch setting unit module address code, it means that the unit modules of the ring communication link set the address code through dialing, which increases the hardware cost of the control board, and there is a risk of address code setting error. SUMMARY

[0004] In view of the above problems, the present application is proposed to provide an address code allocation method and device, so as to achieve the technical effects of automatic allocation of power unit module address codes of the energy storage system, without increasing hardware cost, with strong universality, and improving system reliability.

[0005] According to a first aspect of the present application, a method for assigning an address code is provided, which is applied to a cascaded high-voltage energy storage system. The energy storage system comprises at least one controller and a plurality of cascaded power unit modules. The at least one controller is communicatively connected to the plurality of cascaded power unit modules. Each of the power unit modules is provided with an address code dedicated storage unit and a plurality of address code storage units. The method comprises:

[0006] According to the communication data received by the current power unit module from the controller or the previous power unit module, polling and comparing the address code in the communication data stored in each of the address code storage units;

[0007] If the first result is obtained, assigning the address code to the address code dedicated storage unit of the current power unit module;

[0008] If the second result is obtained, keeping the address code dedicated storage unit of the current power unit module in an initialized state.

[0009] Optionally, if the first result is obtained, the method further comprises:

[0010] When the address code of the current power unit module is successfully assigned, increasing the address code of the current power unit module by a preset value and assigning the address code to the address code dedicated storage unit of the next power unit module.

[0011] Optionally, the polling and comparing the address code in the communication data stored in each of the address code storage units comprises:

[0012] According to the acquisition time sequence of the communication data, extracting the address code in the communication data;

[0013] Storing the address code in the plurality of address code storage units of the current power unit module in a shift manner.

[0014] Optionally, the method further comprises:

[0015] Comparing the address code first stored in the first address code storage unit with the address code stored in the subsequent address code storage units in sequence; wherein,

[0016] When the comparison results of the plurality of address code storage units are the same and the address code in the first address code storage unit meets a preset value range, the first result is determined to be obtained;

[0017] When the comparison results of the plurality of address code storage units are not completely the same and / or the address code in the first address code storage unit does not meet the preset value range, the second result is determined to be obtained.

[0018] Optionally, the method further comprises:

[0019] If the comparison results in the first result, the address code in the first address code storage unit is assigned to the address code dedicated storage unit of the current power unit module, then the assignment flag of the current power unit module is set to 1, and it is determined that the address code assignment of the current power unit module is successful.

[0020] If the comparison results in the second result, the address code dedicated storage unit of the current power unit module is kept in the initialization state, then the assignment flag of the current power unit module is kept as 0, and it is determined that the address code assignment of the current power unit module fails.

[0021] Optionally, the method further comprises:

[0022] After the address code assignment of the current power unit module is successful, the communication data is sent to the next level power unit module;

[0023] The address code of the next level power unit module is encoded into a communication frame and then sent to the next level power unit module and / or the controller.

[0024] Optionally, after receiving the communication data, the method further comprises:

[0025] Judging the validity of the communication data;

[0026] When the communication data is determined to be valid, the communication data is taken as valid data, and the address code in the valid data is extracted.

[0027] Optionally, the method further comprises:

[0028] When the communication data is determined to be invalid, the counter is synchronized to start counting;

[0029] If the count value of the counter is within a threshold range, the address code dedicated storage unit of the current power unit module is kept in the initialization state, and the count value of the counter is kept as a set value within the threshold range.

[0030] If the communication data is determined to be valid, the count value of the counter is synchronized to be cleared.

[0031] Optionally, before receiving the communication data, the method further comprises:

[0032] The address code storage units and the address code dedicated storage units of the plurality of cascaded power unit modules are initialized, and the assignment flags of each of the power unit modules are set to 0.

[0033] According to a second aspect of the present application, an address code allocation device is provided, which is applied to a cascaded high-voltage energy storage system, the energy storage system comprising at least one controller and a plurality of cascaded power unit modules, the at least one controller being in communication connection with the plurality of cascaded power unit modules, each of the power unit modules being provided with an address code dedicated storage unit and a plurality of address code storage units, the device comprising at least:

[0034] an address code assignment unit configured to poll and compare, according to the communication data transmitted by the controller or the previous-stage power unit module and received by the current power unit module, the address code stored in each of the address code storage units;

[0035] if a first result is obtained from the comparison, assigning the address code to the address code dedicated storage unit of the current power unit module; and if a second result is obtained from the comparison, keeping the address code dedicated storage unit of the current power unit module in an initialized state.

[0036] According to a third aspect of the present application, an electronic device is provided, which comprises a processor and a memory arranged to store computer-executable instructions, which, when executed, cause the processor to perform the method according to any one of the first aspect.

[0037] According to a fourth aspect of the present application, a computer-readable storage medium is provided, which stores one or more programs, which, when executed by a processor, implement the method according to any one of the first aspect.

[0038] As can be seen from the above, the at least one technical solution adopted by the embodiments of the present application can achieve the following beneficial effects: the address code allocation method and device are provided, which are applied to a cascaded high-voltage energy storage system, the method according to the present application poll and compare, according to the communication data transmitted by the controller or the previous-stage power unit module and received by the current power unit module, the address code stored in each of the address code storage units, so as to realize the automatic allocation of the address code of each power unit module in the ring-shaped communication link, without the need to increase the hardware cost, and with strong versatility, which effectively avoids the risk of address code setting error, and further improves the system reliability.

[0039] The above description is only a summary of the technical solutions of the present application, in order to enable the technical means of the present application to be more clearly understood, and to be implemented according to the content of the description, and in order to enable the above and other purposes, features and advantages of the present application to be more apparent and easy to understand, the following specific embodiments of the present application are described. BRIEF DESCRIPTION OF DRAWINGS

[0040] Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments with reference made to the accompanying drawings. The drawings are for purposes of illustration only and are not intended to be limiting in

[0041] Figure 1 A flow chart of an address code allocation method in an embodiment of the present application;

[0042] Figure 2 A structure diagram of a cascaded high-voltage energy storage system of a ring communication link in an embodiment of the present application;

[0043] Figure 3 A program block diagram of an address code allocation method in an embodiment of the present application;

[0044] Figure 4 A structure diagram of an address code allocation device in an embodiment of the present application;

[0045] Figure 5 A structure diagram of an electronic device in an embodiment of the present application. DETAILED DESCRIPTION

[0046] Exemplary embodiments of the present application will be described herein below with reference to the accompanying drawings. Although exemplary embodiments of the present application are shown in the drawings, it is understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided so that this application will be thoroughly and completely understood, and so that the scope of the present application will be fully conveyed to those skilled in the art.

[0047] The technical concept of the present application is that, by using an address code assignment program, address code data is extracted and compared according to a preset rule, and when a program agreement condition is met, the address code is assigned to an address code dedicated storage unit of a power unit module, and a unit address code automatic allocation success flag is set, thereby enabling the address code of the power unit module of the ring communication link to be automatically allocated by software without additional hardware support.

[0048] The technical solutions provided by the embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0049] In order to facilitate understanding of the address code allocation method of the embodiments of the present application, the cascaded high-voltage energy storage system of the ring communication link shown in Figure 2

[0050] Referring to Figure 2 ​As shown, the energy storage system includes at least one controller and multiple cascaded power unit modules. The at least one controller is communicatively connected to the multiple cascaded power unit modules, and each power unit module can be connected to a corresponding energy storage battery. It can be understood that the "ring communication link" in this embodiment refers to multiple power unit modules communicating with the controller through a continuous loop. For example, Figure 2 The RX receiver of power unit module 1 is communicatively connected to the TX_1 transmitter of the controller. The TX transmitter of power unit module 1 is communicatively connected to the RX receiver of power unit module 2. The TX transmitter of power unit module 2 is then communicatively connected to the RX receiver of the next-level power unit module, and so on, until m power unit modules are cascaded. Then the TX transmitter of the m-th power unit module is communicatively connected to the RX_1 receiver of the controller, thus forming a ring communication link. Of course, the energy storage system of this embodiment may include multiple ring communication links, which will not be elaborated here.

[0051] In one embodiment of this application, such as Figure 1 The diagram illustrates a flowchart of an address code allocation method. This address code allocation method, as described in this embodiment, can be applied to a cascaded high-voltage energy storage system employing a ring communication link. The controller of this energy storage system is communicatively connected to multiple cascaded power unit modules, and each power unit module is equipped with a dedicated address code storage unit and multiple address code storage units. The address code allocation method includes at least the following steps:

[0052] Step S100: Based on the communication data received by the current power unit module from the controller or the previous power unit module, poll and compare the address codes in the communication data stored in each address code storage unit.

[0053] refer to Figure 2 As shown, since the multiple power unit modules in this embodiment are cascaded, the current power unit module to be assigned an address code can receive communication data sent from the controller or the previous level power unit module. For example, if... Figure 2 When power unit module 1 is used as the current power unit module, it needs to receive communication data sent by the controller; if... Figure 2 When power unit module 2 acts as the current power unit module, it needs to receive communication data sent by the previous-level power unit module, i.e., power unit module 1. For the current power unit module, after recognizing the address code in the communication data, it polls and compares whether the address codes stored in each of its address code storage units meet the preset judgment rules, thereby obtaining a first result or a second result. Preferably, when receiving communication data, a validity judgment needs to be performed, and the address code is extracted only if the communication data is valid.

[0054] Step S110, if the comparison results in the first result, the address code is assigned to the address code dedicated storage unit of the current power unit module.

[0055] If the address code in the address code storage unit of the current power unit module meets the preset determination rule, the comparison results in the first result, the address code is assigned to the address code dedicated storage unit of the current power unit module, so as to complete the address code allocation of the current power unit module.

[0056] Step S120, if the comparison results in the second result, the address code dedicated storage unit of the current power unit module is kept in the initialization state.

[0057] If the address code in the address code storage unit of the current power unit module does not meet the preset determination condition, the comparison results in the second result, the address code dedicated storage unit of the current power unit module is kept in the initialization state, that is, it is kept as 0000.

[0058] It can be seen that, unlike the prior art scheme of fixed address code and dial switch setting address code, through the address code allocation method of the embodiment of the present application, on the one hand, the address code allocation of the power unit modules at each level in the ring communication link can be automatically realized at the software level without increasing hardware cost, and the generality is relatively strong and the program unification degree is higher; on the other hand, the communication failure caused by address code setting error can be effectively reduced, the maintenance cost and complexity of the system are reduced, and it can be adapted to a plurality of power unit modules of different orders of magnitude, and has good expansibility and flexibility. At the same time, when the control board of the power unit module loses power and then restores power supply or the communication between the power unit module and the controller is interrupted and then restored, the address code can be automatically allocated again, thereby improving the stability and reliability of the entire energy storage system.

[0059] In some embodiments, if the comparison results in the first result, the method further comprises: when the address code allocation of the current power unit module is successful, the address code of the current power unit module is increased by a preset value and then assigned to the address code dedicated storage unit of the next level power unit module.

[0060] In one example, after the address code of the current power unit module is automatically allocated successfully, the address code data in the address code dedicated storage unit thereof can be extracted, and the address code data is automatically added by 0001 and then assigned to the address code dedicated storage unit of the next level power unit module. For example, continuing to refer to Figure 2 If the binary address code allocated by the power unit module 1 is 0001, the address code allocated by the power unit module 2 should be 0010, the address code allocated by the power unit module 3 should be 0011, and so on, which will not be described here.

[0061] Of course, when the communication data is sent to the next power unit module, the next power unit module also needs to extract the address code in the communication data, and after polling comparison and meeting the preset determination condition, the address code dedicated unit of the next power unit module is assigned.

[0062] In some embodiments, the polling comparison of the address code in the communication data stored in each address code storage unit comprises: extracting the address code in the communication data according to the acquisition time sequence of the communication data; and storing the address code in the current power unit module in a shift manner.

[0063] In one example, each power unit module includes one address code dedicated storage unit and five address code storage units. If the communication data received by the current power unit module is valid data, the four-bit address code (such as 0001) in the communication data needs to be extracted in time sequence, and the address code is stored in the first address code storage unit to the fifth address code storage unit in a shift storage manner.

[0064] It can be understood that the shift storage in the embodiment refers to a storage manner following the principle of first-in first-out, which allows data to be read in the order of entry. For example, the address code extracted in the first time sequence is stored in the first address code storage unit of the current power unit module, the address code extracted in the second time sequence is stored in the second address code storage unit of the module, and so on. Thus, by polling and comparing the address codes in the five address code storage units, the first result or the second result can be obtained.

[0065] In some embodiments, the method further comprises: comparing the address code first stored in the first address code storage unit with the address codes stored in the subsequent address code storage units in sequence; wherein when the comparison results of the plurality of address code storage units are the same and the address code in the first address code storage unit meets the preset numerical range, the first result is determined; when the comparison results of the plurality of address code storage units are not completely the same and / or the address code in the first address code storage unit does not meet the preset numerical range, the second result is determined.

[0066] The method further includes: if a first result is obtained by comparison, the address code in the first address code storage unit is assigned to the address code dedicated storage unit of the current power unit module, then the allocation flag bit of the current power unit module is set to 1, and the address code of the current power unit module is considered to have been successfully allocated; if a second result is obtained by comparison, the address code dedicated storage unit of the current power unit module is kept in the initialization state, then the allocation flag bit of the current power unit module is kept at 0, and the address code allocation of the current power unit module is considered to have failed.

[0067] In one example, for the current power unit module, the address code data of the first address code storage unit can be compared with the address code storage units of the second to fifth address code storage units in sequence through the address code assignment program.

[0068] If all four comparisons are identical (e.g., all 0001), and the address code value of the first address code storage unit is within the set value range (e.g., the address code value range is set to binary bits: 0001, 0010, 0011, ...), then the address code data in the first address code storage unit is assigned to the dedicated address code storage unit of the module and remains unchanged. Simultaneously, the allocation flag of the current power unit module is set to 1 and remains unchanged, thus indicating that the address code allocation of the current power unit module is successful. If the four comparisons are not completely identical, or the address code value of the first address code storage unit is not within the set value range, then the data in the dedicated address code storage unit of the module is kept at the initial value of 0000, thus indicating that the address code allocation of the current power unit module has failed.

[0069] In some embodiments, the method further includes: after the address code of the current power unit module is successfully allocated, sending the communication data to the next-level power unit module; encoding the address code of the next-level power unit module into a communication frame and sending it to the next-level power unit module and / or the controller.

[0070] For example, refer to Figure 2 As shown, after the address code 0001 of the power unit module 1 is successfully allocated, the address code 0010 of the next-level power unit module can be encoded into a communication frame and sent to the power unit module 2. The power unit module 2 needs to perform validity judgment and / or polling comparison on the communication data sent by the power unit module 1. If it meets the preset judgment conditions, the address code 0010 is then stored in the dedicated address code storage unit of the power unit module 2.

[0071] In some embodiments, after receiving the communication data, the method further comprises: judging the validity of the communication data; when the communication data is judged as valid, taking the communication data as valid data and extracting the address code in the valid data. The method further comprises: when the communication data is judged as invalid, starting counting by a counter synchronously; wherein, if the counting value of the counter is within a threshold range, keeping the address code dedicated storage unit of the current power unit module as an initialization state and keeping the counting value of the counter as a set value within the threshold range; if the communication data is judged as valid, synchronously clearing the counting value of the counter.

[0072] In one example, when receiving the communication data, it is necessary to judge its validity, and then extract the address code when the communication data is valid, and then poll and compare the address code stored in each address code storage unit with the preset judgment rule, and when the comparison result meets the judgment rule, a first result is obtained, thereby performing the address code allocation of the current power unit module, and performing the address code allocation of the next level power unit module based on the preset assignment rule (for example, increasing a preset value). In this way, the accuracy and effectiveness of the communication data transmission of the whole system can be ensured.

[0073] In some embodiments, before receiving the communication data, the method further comprises: initializing the address code storage unit and the address code dedicated storage unit of the plurality of cascaded power unit modules, for example, initializing to 0000, and setting the allocation flag bit of each power unit module to 0.

[0074] Specifically, the control board of the plurality of power unit modules is powered on first, and then the program of the control board is automatically reset and initialized, each program unit in each power unit module is initialized, the data of the address code dedicated storage unit of each level power unit module is initialized to 0000, the data of the plurality of address code storage units for storing the address code is initialized to 0000, and the allocation flag bit of each level power unit module for indicating the success of the address code allocation is initialized to 0. In addition, after the automatic reset and initialization of the program of the control board is completed and before the address code of the power unit module is successfully allocated, the communication data sent by the current power unit module to the next level power unit module or the controller should be kept as invalid data.

[0075] In one preferred embodiment of the present application, as Figure 3As shown, a program block diagram of an address code allocation method is provided; the algorithm flow of address code allocation includes: first, the power unit module control board is powered on, and each unit is initialized; second, communication data is received and its validity is judged, and the counter is counted when the data is invalid; the counter is cleared when the data is valid, and the address code in the data is extracted according to the time sequence and stored in the address code storage unit of the current power unit module; third, the address code data of the five address code storage units is polled and compared to see whether they are the same and whether they are within the set address code range, if not, the address code of the address code dedicated storage unit remains unchanged and is still in the initialization state; if yes, the address code of the first address code storage unit is assigned to the address code dedicated storage unit of the current power unit module and the allocation flag is set to 1; then, the address code data of the address code dedicated storage unit is extracted, and the address code data is assigned to the address code dedicated storage unit of the next level power unit module after being added with 0001; finally, the current power unit module sends valid data, encodes the address code of the next level power unit module into the data frame and sends it to the next level power unit module or the controller, and so on, to complete the address code allocation of each level power unit module.

[0076] Of course, Figure 3 The content shown is only an exemplary embodiment and should not be understood as a limitation of the present application.

[0077] In another embodiment of the present application, as Figure 4 shown, an address code allocation device 400 is provided for a cascaded high-voltage energy storage system, the energy storage system including at least one controller and a plurality of cascaded power unit modules, the at least one controller being in communication connection with the plurality of cascaded power unit modules, each of the power unit modules being provided with an address code dedicated storage unit and a plurality of address code storage units, the address code allocation device 400 including at least a plurality of program units, specifically:

[0078] The address code assignment unit 410 is configured to poll and compare the address code in the communication data stored in each address code storage unit according to the communication data received by the current power unit module from the controller or the next level power unit module; if the first result is obtained, the address code is assigned to the address code dedicated storage unit of the current power unit module; if the second result is obtained, the address code dedicated storage unit of the current power unit module is kept in the initialization state.

[0079] The address code allocation device 400 further includes:

[0080] The validity judgment unit 420 is configured to judge the validity of the communication data when it is received;

[0081] The communication transceiver unit 430 specifically includes a TX sending end and an RX receiving end, the RX receiving end is used for receiving the communication data sent by the controller or the upper power unit module, and the TX sending end is used for sending the communication data to the lower power unit module or the controller.

[0082] It can be understood that the address code allocation device can be used to perform each step of the address code allocation method provided in the embodiments of the present application, therefore, the related explanations about the address code allocation method are all applicable to the address code allocation device, which will not be repeated here.

[0083] In summary, the present application at least achieves the following technical effects:

[0084] On the one hand, the address code allocation of the power unit modules at each level in the ring communication link can be automatically realized at the software level without increasing the hardware cost, and the generality is stronger and the program is more unified; on the other hand, the communication failure caused by the address code setting error can be effectively reduced, the maintenance cost and complexity of the system are reduced, and the address code allocation device can be adapted to a plurality of power unit modules of different orders of magnitude, and has good expansibility and flexibility. At the same time, when the control board of the power unit module loses power and then restores power supply or the communication between the power unit module and the controller is interrupted and then restored, the address code can be automatically allocated again, thereby improving the stability and reliability of the entire energy storage system.

[0085] Figure 5 is a structural schematic diagram of an electronic device according to an embodiment of the present application. Please refer to Figure 5 At the hardware level, the electronic device includes a processor, and optionally further includes an internal bus, a network interface, and a memory. The memory can include a memory such as a random-access memory (RAM), and can also include a non-volatile memory such as at least one disk memory. Of course, the electronic device can also include other hardware required by the business.

[0086] The processor, the network interface, and the memory can be connected to each other through the internal bus, which can be an industry standard architecture (ISA) bus, a peripheral component interconnect (PCI) bus, or an extended industry standard architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5Only one bidirectional arrow is used to represent buses and bus types, but it is not meant to imply only one bus or only one type of bus exists.

[0087] The memory is configured to store a program. Specifically, the program can include program code including computer operation instructions. The memory can include an internal memory and a non-volatile memory, and provide instructions and data for the processor.

[0088] The processor reads the corresponding computer program from the non-volatile memory into the internal memory and then runs, and forms the address code allocation device at a logical level. The processor executes the program stored in the memory, and is specifically configured to perform the following operations:

[0089] According to the communication data received by the current power unit module and sent by the controller or the upper-level power unit module, poll and compare the address code in the communication data stored in each address code storage unit;

[0090] If the comparison result is a first result, assign the address code to the address code dedicated storage unit of the current power unit module;

[0091] If the comparison result is a second result, keep the address code dedicated storage unit of the current power unit module in an initialized state.

[0092] The above as described in the present application Figure 1The address code allocation method disclosed in the embodiments can be applied to or implemented by a processor. The processor can be an integrated circuit chip with processing capability. In implementation, the steps of the method can be completed by hardware integrated logic circuits in the processor or by instructions in the form of software modules. The processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc. It can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. The methods, steps and logical block diagrams disclosed in the embodiments of the present application can be implemented or executed by the processor. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as a hardware code executed by the processor, or a combination of hardware and software modules in the processor. The software modules can be located in a random access memory (RAM), a flash memory, a read only memory (ROM), a programmable read-only memory (PROM), an electrically programmable read-only memory (EPROM), a register, or other mature storage mediums in the art. The memory is located in the storage device, and the processor reads information in the memory and combines the hardware to complete the steps of the above method.

[0093] The embodiments of the present application also provide a computer program product. The computer program product stores one or more programs, and the one or more programs include instructions. When the instructions are executed by an electronic device including a plurality of application programs, the electronic device can perform the method disclosed in the embodiments of the present application. Figure 1 The address code allocation method disclosed in the embodiments can be applied to or implemented by a processor. The processor can be an integrated circuit chip with processing capability. In implementation, the steps of the method can be completed by hardware integrated logic circuits in the processor or by instructions in the form of software modules. The processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc. It can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. The methods, steps and logical block diagrams disclosed in the embodiments of the present application can be implemented or executed by the processor. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as a hardware code executed by the processor, or a combination of hardware and software modules in the processor. The software modules can be located in a random access memory (RAM), a flash memory, a read only memory (ROM), a programmable read-only memory (PROM), an electrically programmable read-only memory (EPROM), a register, or other mature storage mediums in the art. The memory is located in the storage device, and the processor reads information in the memory and combines the hardware to complete the steps of the above method.

[0094] According to the communication data received by the current power unit module from the controller or the upper-level power unit module, the address code in the communication data stored in each address code storage unit is polled and compared;

[0095] If the comparison result is the first result, the address code is assigned to the address code special storage unit of the current power unit module;

[0096] If the comparison result is the second result, the address code special storage unit of the current power unit module is kept in the initialization state.

[0097] Those skilled in the art will appreciate that embodiments of the application can be devised for a method, a system, or a computer program product. Accordingly, the present application can be embodied in the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application can take the form of a computer program product on one or more computer readable storage media (including, but not limited to, disk memory, CD-ROMs, optical storage devices, etc.) embodying computer readable program code.

[0098] The present application is described in reference to the flowchart illustrations and / or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in one or more of the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in one or more of the flowchart illustrations and / or block diagrams.

[0099] These computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture including instructions which implement the functions specified in the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in one or more of the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in one or more of the flowchart illustrations and / or block diagrams.

[0100] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart illustrations and / or block diagrams. Figure 1 one or more functions specified in one or more of the flowchart illustrations and / or block diagrams. ​ one or more functions specified in one or more of the flowchart illustrations and / or block diagrams.

[0101] In one typical configuration, the computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory.

[0102] The memory can include non-persistent memory and / or persistent memory, such as flash memory, read-only memory (ROM), and / or random access memory (RAM), among others. The memory is an example of computer readable media.

[0103] Computer-readable media includes permanent and non-permanent, movable and non-movable media that can be implemented by any method or technology to store information. The information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassette, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information accessible to a computing device. According to the definition herein, computer-readable media does not include transitory media such as modulated data signals and carriers.

[0104] It should also be noted that the terms "comprising", "containing", or any other variant thereof are intended to cover non-exclusive inclusions, so that a process, method, article or apparatus that includes a list of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or apparatus. Without more limitations, the element defined by the statement "comprising a" does not exclude the presence of additional identical elements in the process, method, article or apparatus that includes the element.

[0105] Those skilled in the art will appreciate that embodiments of the present application can be provided as a method, system or computer program product. Therefore, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0106] The above only describes the embodiments of the present application and is not intended to limit the present application. Those skilled in the art can make various modifications and changes to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the scope of the claims of the present application.

Claims

1. An address code allocation method, characterized in that, An application is made to a cascaded high-voltage energy storage system, wherein the energy storage system includes at least one controller and multiple cascaded power unit modules, the at least one controller being communicatively connected to the multiple cascaded power unit modules, and each power unit module being provided with a dedicated address code storage unit and multiple address code storage units. The method includes: Based on the communication data received by the current power unit module from the controller or the previous power unit module, the address codes in the communication data stored in each address code storage unit are compared in a polling manner. If the comparison yields the first result, the address code is assigned to the address code dedicated storage unit of the current power unit module; If the comparison yields a second result, then the address code dedicated storage unit of the current power unit module is kept in the initial state; The polling comparison of the address codes in the communication data stored in each address code storage unit includes: Based on the acquisition sequence of the communication data, the address code in the communication data is extracted; The address codes are sequentially stored into multiple address code storage units of the current power unit module according to the shifting method; The address code stored first in the first address code storage unit is compared sequentially with the address codes stored in subsequent address code storage units; where, When the comparison results of multiple address code storage units are the same and the address code in the first address code storage unit conforms to the preset value range, the first result is determined to be obtained. When the comparison results of multiple address code storage units are not completely the same, and / or the address code in the first address code storage unit does not conform to the preset value range, the second result is determined to be obtained.

2. The allocation method according to claim 1, characterized in that, If the comparison yields a first result, the method further includes: When the address code of the current power unit module is successfully allocated, the address code of the current power unit module is increased by a preset value and then assigned to the dedicated address code storage unit of the next-level power unit module.

3. The allocation method according to claim 1, characterized in that, The method further includes: If the comparison yields a first result, the address code in the first address code storage unit is assigned to the address code dedicated storage unit of the current power unit module. Then, the allocation flag of the current power unit module is set to 1, and the address code of the current power unit module is considered to have been successfully allocated. If the comparison yields a second result, the address code dedicated storage unit of the current power unit module is kept in the initial state, the allocation flag bit of the current power unit module is kept at 0, and the address code allocation of the current power unit module is considered to have failed.

4. The allocation method according to claim 2, characterized in that, The method further includes: After the address code of the current power unit module is successfully allocated, the communication data is sent to the next-level power unit module; The address code of the next-level power unit module is encoded into a communication frame and then sent to the next-level power unit module and / or the controller.

5. The allocation method according to claim 1, characterized in that, After receiving the communication data, the method further includes: Determine the validity of the communication data; When the communication data is determined to be valid, the communication data is treated as valid data, and the address code in the valid data is extracted.

6. The allocation method according to claim 5, characterized in that, The method further includes: When the communication data is determined to be invalid, counting begins synchronously via a counter. If the counter value is within the threshold range, the address code dedicated storage unit of the current power unit module is kept in the initial state, and the counter value is kept at the set value within the threshold range. If the communication data is determined to be valid, the counter value will be synchronously cleared to zero.

7. The allocation method according to claim 1, characterized in that, Before receiving the communication data, the method further includes: The address code storage unit and the address code dedicated storage unit of the multiple cascaded power unit modules are initialized, and the allocation flag of each power unit module is set to 0.

8. An address code allocation device, characterized in that, An application is made in a cascaded high-voltage energy storage system, the energy storage system comprising at least one controller and multiple cascaded power unit modules, the at least one controller being communicatively connected to the multiple cascaded power unit modules, each of the power unit modules being provided with a dedicated address code storage unit and multiple address code storage units, the device comprising at least: The address code assignment unit is used to poll and compare the address code in the communication data stored in each address code storage unit according to the communication data received by the current power unit module from the controller or the previous power unit module. If the comparison yields the first result, the address code is assigned to the address code dedicated storage unit of the current power unit module; If the comparison yields a second result, then the address code dedicated storage unit of the current power unit module is kept in the initial state; The polling comparison of the address codes in the communication data stored in each address code storage unit includes: Based on the acquisition sequence of the communication data, the address code in the communication data is extracted; The address codes are sequentially stored into multiple address code storage units of the current power unit module according to the shifting method; The address code stored first in the first address code storage unit is compared sequentially with the address codes stored in subsequent address code storage units; where, When the comparison results of multiple address code storage units are the same and the address code in the first address code storage unit conforms to the preset value range, the first result is determined to be obtained. When the comparison results of multiple address code storage units are not completely the same, and / or the address code in the first address code storage unit does not conform to the preset value range, the second result is determined to be obtained.

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