XTS mode SM4 encryption and decryption circuit and method oriented to storage field

Abstract

The invention provides an XTS mode SM4 encryption and decryption circuit and method oriented to the storage field, and belongs to the technical field of symmetric encryption algorithm circuits. The circuit comprises a two-way key expansion module, a circulating encryption module and a 32-level pipeline processing module, the double-path key expansion module is used for sequentially carrying out key expansion on the K1 key and the K2 key in the XTS mode to generate a round key expansion cluster based on the K1 key and a round key expansion cluster based on the K2 key; the circulating encryption module encrypts the adjustment value required by the XTS mode based on the key K2 to generate a ciphertext M2 of the adjustment value; and the 32-level pipeline processing module is used for encrypting and decrypting 32 pieces of 128-bit data to be processed based on a K1 key. According to the invention, the double keys required by the XTS are expanded through the double-path key expansion module, and the adjustment value is encrypted through the circular encryption module, so that the 32-level pipeline processing module focuses on data encryption and decryption processing, and the working efficiency of the 32-level pipeline module in the XTS mode is greatly improved with extremely low resource consumption.

Description

Technical Field

[0001] The present invention relates to the technical field of symmetric encryption algorithm circuits, and in particular to an XTS mode SM4 encryption and decryption circuit and method for the storage field. Background Art

[0002] Digitalization, networking and intelligence are the characteristics of the information age. In the development of the Internet of Things and cloud computing, a large amount of data is generated and stored in various storage devices. These storage devices carry a large amount of important data, and once lost, it will cause huge losses to enterprises and individuals. Encrypting data before storage is an important means to prevent data leakage in storage devices. At present, the SM4 cryptographic algorithm has become an international standard, which is suitable for encryption and decryption of large amounts of data in storage systems.

[0003] However, the common SM4 encryption and decryption circuit cannot perform key segmentation based on LUN and is not suitable for data encryption in XTS mode. Summary of the invention

[0004] In view of this, the present invention proposes an XTS mode SM4 encryption and decryption circuit and method for the storage field. The present invention performs data encryption and decryption based on the XTS mode, realizes key segmentation based on LUN and LBA, and realizes pipeline processing of data under the XTS mode.

[0005] The technical solution adopted by the present invention is:

[0006] An XTS mode SM4 encryption and decryption circuit for the storage field includes a dual-path key expansion module, a cyclic encryption module, and a 32-stage pipeline processing module, wherein:

[0007] The dual-path key expansion module performs round key expansion on the K1 key and K2 key required in the XTS mode to generate the expanded K1 round key cluster and K2 round key cluster;

[0008] The cyclic encryption module performs SM4 encryption based on the K2 key on the adjustment value required for the XTS mode;

[0009] The 32-stage pipeline processing module performs 32-stage pipeline SM4 encryption and decryption on the data to be processed in XTS mode.

[0010] Furthermore, the dual-path key expansion module has an Sbox conversion circuit, The transformation circuit and the L' transformation circuit perform key expansion on the K1 key and the K2 key in turn in a cyclic manner to generate a K1 round key cluster and a K2 round key cluster.

[0011] Furthermore, the cyclic encryption module encrypts the adjustment value required for the XTS mode in a cyclic manner based on the K2 round key cluster to generate an M2 value encrypted based on the K2 key, and the adjustment value is composed of 10-bit targetid, 10-bit lunid, 44-bit lba, 10-bit targetid, 10-bit lunid, and 44-bit lba, synthesizing a 128-bit value.

[0012] Furthermore, the 32-stage pipeline processing module connects the XOR module, the 32-stage round processing module, and the XOR module to complete the XOR and 32-stage round processing process, and each round processing module includes an Sbox conversion circuit, Conversion circuit, L conversion circuit.

[0013] An XTS mode SM4 encryption method for the storage field comprises the following steps:

[0014] Step 1: After the system is powered on, the K1 key and the K2 key are initialized through the dual-path key extension module to generate the K1 round key cluster and the K2 round key cluster, and the key extension flag is set high;

[0015] Step 2: After the key extension flag is high, the cyclic encryption module performs encryption. After 32 clocks, the cyclic encryption module outputs the encrypted value M2 whose adjusted value is based on the key K2;

[0016] Step 3: Set the encryption mode to encryption mode, and the K2 round key cluster module sets the nth round encryption and decryption module to Rk n ;

[0017] Step 4: After the XTS mode preparation completion flag is set high, 32 128-bit data blocks are input to the 32-level pipeline processing module. After the data blocks are first XORed with the M2 value, 32-level round encryption, and second XORed with the M2 value, the encrypted data is obtained;

[0018] Step 5: After the XTS mode is ready to be set high, the cyclic encryption module receives a new round of adjustment values; during the 32-level round encryption of this data, the encryption value of the adjustment value M2 corresponding to the next sector data block is calculated; after 32 clocks, the calculation is completed and the XTS mode is ready to be set high again;

[0019] Step 6: Repeat step 4, use the encrypted value of the new round of adjustment value M2 to perform XOR with the data to be processed, and then after 32 rounds of processing, perform XOR with the encrypted value of M2 again to obtain the processed data until all input data are processed.

[0020] An XTS mode SM4 decryption method for the storage field comprises the following steps:

[0021] Step 1: After the system is powered on, the K1 key and the K2 key are initialized through the dual-path key extension module to generate the K1 round key cluster and the K2 round key cluster, and the key extension flag is set high;

[0022] Step 2: After the key extension flag is high, the cyclic encryption module performs encryption. After 32 clocks, the cyclic encryption module outputs the encrypted value M2 whose adjusted value is based on the key K2;

[0023] Step 3: Set the encryption and decryption mode to decryption mode, and the K2 round key cluster module sets the nth round encryption and decryption module to Rk (33-n) ;

[0024] Step 3: After the XTS mode is ready, 32 128-bit data blocks are input to the 32-stage pipeline processing module. After the data blocks are first XORed with the M2 value, 32-stage round decryption, and second XORed with the M2 value, the processed data is obtained;

[0025] Step 5: After the XTS mode is ready to be set high, the cyclic encryption module receives a new round of adjustment values; during this data processing, the encryption value of the adjustment value M2 corresponding to the next sector data block is calculated; after 32 clocks, the calculation is completed and the XTS mode is ready to be set high again;

[0026] Step 6: Repeat step 4, use the encrypted value of the new round of adjustment value M2 to perform XOR with the data to be processed, then after 32 rounds of decryption, perform XOR with the encrypted value of M2 again to obtain the processed data, until all input data are processed.

[0027] The beneficial effects of the present invention are:

[0028] 1. The present invention performs data encryption based on the XTS mode. The adjustment values ​​required by the mode are combined with targetid, lunid, lba and other values, thereby realizing key segmentation based on LUN and LBA.

[0029] 2. The 32-stage pipeline data processing structure of the present invention ensures data throughput, and the cyclic encryption structure and the 32-stage pipeline data processing structure form a 2-stage pipeline processing method. First, the adjustment value is processed in advance, saving the lead time required for encrypting the adjustment value; second, the adjustment value is encrypted using a cyclic architecture, saving the resources required for encrypting the adjustment value; third, the data processing adopts a 32-stage pipeline architecture, ensuring the processing performance of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a structural diagram of an XTS mode SM4 encryption and decryption circuit for the storage field in an embodiment of the present invention. DETAILED DESCRIPTION

[0031] The present invention is described in detail below with reference to the accompanying drawings.

[0032] An XTS mode SM4 encryption and decryption circuit for the storage field, the circuit performs XTS mode SM4 encryption and decryption on data of 512B block size based on K1 key, K2 key, and adjustment value composed of targetid, lunid, lba and other data. Figure 1 As shown, the circuit includes a dual-path key expansion module, a cyclic encryption module, and a 32-stage pipeline processing module. Among them:

[0033] The dual-path key expansion module performs round key expansion on the K1 and K2 keys required in the XTS mode to generate two sets of expanded round key clusters. The dual-path key expansion module contains Sbox transformation, Through the loop architecture, the round key expansion module is designed to expand the K1 key and the K2 key in turn to generate the K1 round key cluster and the K2 round key cluster.

[0034] The cyclic encryption module encrypts the adjustment value required in the XTS mode based on the SM4 standard through the K2 key pair; the adjustment value is composed of 10-bit targetid, 10-bit lunid, 44-bit lba, 10-bit targetid, 10-bit lunid, 44-bit lba, and synthesizes 128-bit data. The cyclic encryption module encrypts the adjustment value required in the XTS mode based on the key K2 in a cyclic manner to generate the M2 value encrypted based on the key K2.

[0035] The 32-stage pipeline processing module performs 32-stage pipeline SM4 encryption and decryption on the plaintext in XTS mode. The 32-stage pipeline processing module includes 32-stage secondary round processing modules. The 32-stage round processing modules are connected in sequence to complete the 32-stage round processing process. Each round processing module contains Sbox transformation, Conversion, L conversion circuit.

[0036] The circuit works as follows:

[0037] The dual-path key expansion module performs key expansion on the K1 key and K2 key of the XTS mode in sequence, generates a round key expansion cluster based on the K1 key and a round key expansion cluster based on the K2 key, and sets the key expansion completion position high after the expansion is completed. The cyclic encryption module encrypts the adjustment value required for the XTS mode based on the key K2, generates the ciphertext M2 of the adjustment value, and then sets the XTS mode preparation completion position high. After the XTS mode preparation completion position is high (valid), the 32-level pipeline processing module reads in 32 blocks of 128-bit plaintext, performs encryption based on the K1 key, and sets the XTS mode preparation completion position low (invalid). During the data processing of the 32-level pipeline processing module, the cyclic encryption module encrypts the next round of adjustment values, generates the ciphertext M2, and sets the XTS mode preparation completion position high (valid). After the 32-level pipeline processing module detects that the XTS mode preparation completion position is high (valid), it reads in the next round of 32 blocks of 128-bit plaintext (a total of 512B data) again, encrypts based on the K1 key, and sets the XTS mode preparation completion position high (invalid). This process repeats until the data is processed.

[0038] The encryption process using this circuit is as follows:

[0039] Step 1: After the system is powered on, the K1 key and the K2 key are initialized through the dual-path key extension module to generate the K1 round key cluster and the K2 round key cluster, and the key extension flag is set high;

[0040] Step 2: After the key extension flag is high, the cyclic encryption module performs encryption. After 32 clocks, the cyclic encryption module outputs the encrypted value M2 whose adjusted value is based on the key K2;

[0041] Step 3: Set the encryption mode to encryption mode (input value is 0), and the K2 round key cluster module sets the nth round encryption and decryption module to Rk n (i.e., the first level is Rk1, ... the 32nd level is Rk 32 );

[0042] Step 4: After the XTS mode preparation completion flag is set high, 32 128-bit data blocks are input to the 32-level pipeline processing module. After the data blocks are first XORed with the M2 value, 32-level round encryption, and second XORed with the M2 value, the encrypted data is obtained;

[0043] Step 5: After the XTS mode is ready to be set high, the cyclic encryption module receives a new round of adjustment values; during the 32-level round encryption of this data, the encryption value of the adjustment value M2 corresponding to the next sector data block (512B) is calculated; after 32 clocks, the calculation is completed and the XTS mode is ready to be set high again;

[0044] Step 6: Repeat step 4, use the encrypted value of the new round of adjustment value M2 to perform XOR with the data to be processed, and then after 32 rounds of processing, perform XOR with the encrypted value of M2 again to obtain the processed data until all input data are processed.

[0045] The decryption process using this circuit is as follows:

[0046] Step 1: After the system is powered on, the K1 key and the K2 key are initialized through the dual-path key extension module to generate the K1 round key cluster and the K2 round key cluster, and the key extension flag is set high;

[0047] Step 2: After the key extension flag is high, the cyclic encryption module performs encryption. After 32 clocks, the cyclic encryption module outputs the encrypted value M2 whose adjusted value is based on the key K2;

[0048] Step 3: Set the encryption and decryption mode to decryption mode (input value is 1), and the K2 round key cluster module sets the nth round encryption and decryption module to Rk (33-n) (i.e., level 1 is Rk 32 ,...The 32nd level is Rk1);

[0049] Step 3: After the XTS mode is ready, 32 128-bit data blocks are input to the 32-stage pipeline processing module. After the data blocks are first XORed with the M2 value, 32-stage round decryption, and second XORed with the M2 value, the processed data is obtained;

[0050] Step 5: After the XTS mode is ready to be set high, the cyclic encryption module receives a new round of adjustment values; during this data processing, the encryption value of the adjustment value M2 corresponding to the next sector data block (512B) is calculated; after 32 clocks, the calculation is completed and the XTS mode is ready to be set high again;

[0051] Step 6: Repeat step 4, use the encrypted value of the new round of adjustment value M2 to perform XOR with the data to be processed, then after 32 rounds of decryption, perform XOR with the encrypted value of M2 again to obtain the processed data, until all input data are processed.

[0052] In summary, the present invention realizes key splitting by combining adjustment values ​​with LUN and LBA; a dual-path key expansion module is used to expand the dual keys required for XTS, and the adjustment value is encrypted by a cyclic encryption module, so that the 32-level pipeline processing module focuses on data processing, thereby improving the working efficiency of the 32-level pipeline in the XTS mode and increasing the data throughput.

Claims

1. An XTS mode SM4 encryption and decryption circuit for the storage field, characterized in that: It includes a dual-path key expansion module, a cyclic encryption module, and a 32-level pipeline processing module, among which: The dual-path key expansion module performs round key expansion on the K1 key and K2 key required in the XTS mode to generate the expanded K1 round key cluster and K2 round key cluster; The cyclic encryption module performs SM4 encryption based on the K2 key on the adjustment value required for the XTS mode; The 32-stage pipeline processing module performs 32-stage pipeline SM4 encryption and decryption on the data to be processed in XTS mode.

2. According to claim 1, an XTS mode SM4 encryption and decryption circuit for the storage field is characterized in that: The dual-path key expansion module has an Sbox conversion circuit, a τ conversion circuit, and an L' conversion circuit, and performs key expansion on the K1 key and the K2 key in turn in a cyclic manner to generate a K1 round key cluster and a K2 round key cluster.

3. The XTS mode SM4 encryption and decryption circuit for the storage field according to claim 1, characterized in that: The cyclic encryption module encrypts the adjustment value required by the XTS mode in a cyclic manner based on the K2 round key cluster to generate an M2 value encrypted based on the K2 key. The adjustment value is composed of 10-bit targetid, 10-bit lunid, 44-bit lba, 10-bit targetid, 10-bit lunid, and 44-bit lba, synthesizing a 128-bit value.

4. The XTS mode SM4 encryption and decryption circuit for the storage field according to claim 1 is characterized in that: The 32-stage pipeline processing module connects the XOR module, the 32-stage round processing module, and the XOR module to complete the XOR and 32-stage round processing process. Each round processing module includes an Sbox conversion circuit, a τ conversion circuit, and an L conversion circuit.

5. An XTS mode SM4 encryption method for the storage field, characterized in that: The following steps are involved: Step 1: After the system is powered on, the K1 key and the K2 key are initialized through the dual-path key extension module to generate the K1 round key cluster and the K2 round key cluster, and the key extension flag is set high; Step 2: After the key extension flag is high, the cyclic encryption module performs encryption. After 32 clocks, the cyclic encryption module outputs the encrypted value M2 whose adjusted value is based on the key K2; Step 3: Set the encryption mode to encryption mode (input value is 0), and the K2 round key cluster module sets the nth round encryption and decryption module to Rk n (i.e., the first level is Rk1, ... the 32nd level is Rk 32 ); Step 4: After the XTS mode preparation completion flag is set high, 32 128-bit data blocks are input to the 32-level pipeline processing module. After the data blocks are first XORed with the M2 value, 32-level round encryption, and second XORed with the M2 value, the encrypted data is obtained; Step 5: After the XTS mode is ready to be set high, the cyclic encryption module receives a new round of adjustment values; during the 32-level round encryption of this data, the encryption value of the adjustment value M2 corresponding to the next sector data block (512B) is calculated; after 32 clocks, the calculation is completed and the XTS mode is ready to be set high again; Step 6: Repeat step 4, use the encrypted value of the new round of adjustment value M2 to perform XOR with the data to be processed, and then after 32 rounds of processing, perform XOR with the encrypted value of M2 again to obtain the processed data until all input data are processed.

6. An XTS mode SM4 decryption method for the storage field, characterized in that: The following steps are involved: Step 1: After the system is powered on, the K1 key and the K2 key are initialized through the dual-path key extension module to generate the K1 round key cluster and the K2 round key cluster, and the key extension flag is set high; Step 2: After the key extension flag is high, the cyclic encryption module performs encryption. After 32 clocks, the cyclic encryption module outputs the encrypted value M2 whose adjusted value is based on the key K2; Step 3: Set the encryption and decryption mode to decryption mode (input value is 1), and the K2 round key cluster module sets the nth round encryption and decryption module to Rk (33-n) (i.e., level 1 is Rk 32 ,...The 32nd level is Rk1); Step 3: After the XTS mode is ready, 32 128-bit data blocks are input to the 32-stage pipeline processing module. After the data blocks are first XORed with the M2 value, 32-stage round decryption, and second XORed with the M2 value, the processed data is obtained; Step 5: After the XTS mode is ready to be set high, the cyclic encryption module receives a new round of adjustment values; during this data processing, the encryption value of the adjustment value M2 corresponding to the next sector data block (512B) is calculated; after 32 clocks, the calculation is completed and the XTS mode is ready to be set high again; Step 6: Repeat step 4, use the encrypted value of the new round of adjustment value M2 to perform XOR with the data to be processed, then after 32 rounds of decryption, perform XOR with the encrypted value of M2 again to obtain the processed data, until all input data are processed.

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