Plane bump type packaging process of integrated circuit

Abstract

The invention provides a planar bump type packaging process of an integrated circuit, which comprises the following steps of: inputting constraint conditions such as power consumption and frequency of a chip, generating a gradient bump topology, and verifying through a multi-physics field simulation model; mapping the salient point parameters after the gradient salient point topological optimization to a photoetching mask plate design to generate a coordinate file; salient point parameters after gradient salient point topological optimization are imported, a finite element model of the thin wafer is constructed, the warping trend under the ball mounting pressure is predicted, and a compensation coefficient library is generated; the surface of the thin wafer is scanned in real time, actual deformation and twinborn prediction data are compared, the path of a mechanical arm is dynamically adjusted, and the actual position and alignment information of the thin wafer are obtained; the current density and heat flux density distribution is calculated in real time through a multi-physical field simulation model and alignment information, and the heights and the distances of the salient points are reversely optimized according to actually measured parameters. According to the invention, high performance and reliability of integrated circuit packaging are ensured, the packaging structure can be optimized to the greatest extent, and the quality and the service life of a product are improved.

Description

Technical Field

[0001] The invention relates to the technical field of solid device manufacturing, and in particular to a planar bump type packaging process for an integrated circuit. Background Art

[0002] As integrated circuits (ICs) develop towards high density, miniaturization and high performance, the core contradiction of packaging technology has gradually focused on the compatibility between semiconductor material properties and packaging structures. Semiconductor materials represented by silicon have become mainstream chip substrates due to their excellent carrier mobility and thermal conductivity; but in high-power / high-frequency scenarios, wide-bandgap semiconductor materials such as gallium nitride and silicon carbide are widely used due to their higher breakdown field strength and temperature resistance. However, traditional packaging technologies (such as wire bonding and whole metal-based islands) have the following problems in material adaptability, such as thermal expansion coefficient mismatch, high-frequency signal loss and solid device interface defects. Planar bump packaging directly connects the chip and the substrate through metal bumps (such as copper pillars and solder balls), shortens the interconnection path, reduces parasitic effects, and is compatible with a variety of semiconductor materials. However, existing technologies still have problems with material compatibility and process adaptability: for example, the high temperature tolerance of GaN chips conflicts with the process of low-temperature solders, or the high thermal conductivity requirements of SiC chips and the heat dissipation bottleneck of low-cost substrates.

[0003] Prior art 1, application number: CN 202410221257.3 discloses a packaging method for integrated circuits and an integrated circuit packaging structure thereof, the method comprising: fixing a clamping plate with a limiting groove on an operating table of a parallel seam welding machine; placing an integrated circuit shell with a receiving groove in the limiting groove, and setting a metal sealing frame on the top surface of the integrated circuit shell; placing the integrated circuit to be packaged into the receiving groove and covering it with a packaging cover plate; seam welding the surface of the packaging cover plate by a roller electrode on the parallel seam welding machine to obtain two mutually parallel first welds; driving the clamping plate fixed thereon to rotate 90° by the operating table on the parallel seam welding machine, and seam welding the packaging cover plate by a roller electrode to obtain two second welds to obtain a packaged integrated circuit; performing a primary leak test and a secondary leak test on the packaged integrated circuit in turn, thereby obtaining a packaged integrated circuit with better sealing. Although the reliability level of packaged integrated circuits has been improved and the safety risks during use have been reduced, the process has not made targeted optimizations to the thermal stress and high-frequency signal loss inside the chip, resulting in reliability risks in high-power / high-frequency scenarios. Traditional packaging technology has poor adaptability to wide-bandgap semiconductor materials (such as GaN and SiC), which may lead to thermal expansion coefficient mismatch or interface defect problems.

[0004] Prior art 2, application number: CN202410165521.6 discloses an integrated circuit package and a method for forming the same, the integrated circuit package comprising: a substrate, comprising a conductive pad; a package assembly, joined to the conductive pad of the substrate by a solder connector, the package assembly comprising an integrated circuit die, the integrated circuit die comprising a die connector, one of the solder connectors being coupled to each of the die connectors and a corresponding conductive pad of the substrate; a first dielectric layer, laterally surrounding each of the die connectors and a portion of the solder connector; and a second dielectric layer, located between the first dielectric layer and the substrate, the second dielectric layer laterally surrounding each of the conductive pads of the substrate. Although the coplanarity of the solder is improved; in addition, the second layer can have lower fluidity than the solder at high temperature, which prevents solder collapse and bridging; by improving the coplanarity of the solder and preventing solder collapse and solder bridging after bump reflow, the yield and reliability of the package are improved; but its process does not solve the fluidity and thermal stress problems of the solder at high temperature, which may lead to a decrease in long-term reliability; traditional packaging technology is insufficiently optimized for the transmission performance of high-frequency signals, which may lead to signal integrity loss.

[0005] Prior art three, application number: CN 202411815515.7 discloses an integrated circuit packaging module and packaging method with a detachable structure. Aiming at the problem that the existing integrated circuit packaging module cannot be quickly disassembled after packaging, the following scheme is proposed, including a packaging base, a packaging cover is arranged on the upper side of the packaging base, and two symmetrical insertion plugs are arranged on the packaging cover, and a disassembly module is arranged outside the two insertion plugs, and the disassembly module includes a cylinder, and two symmetrical grooves are provided on the upper side of the packaging base. Although the packaging module of the packaged integrated circuit body can be quickly and conveniently disassembled, so that the integrated circuit body can be conveniently taken out, the grinding operation required for conventional disassembly of the package is effectively avoided, and the efficiency of the package disassembly is greatly improved, while also ensuring the integrity and use function of the integrated circuit body after removal; however, its process does not optimize the thermal stress and high-frequency performance of the package body, which may cause the integrated circuit body to be damaged during use; the introduction of the detachable structure may increase the complexity and cost of the packaging process.

[0006] At present, the existing technologies 1, 2 and 3 have the following problems: in high-power / high-frequency application scenarios, the thermal stress inside the chip is concentrated, resulting in failure of the packaging structure or performance degradation; the physical properties of wide-bandgap semiconductor materials and traditional packaging materials are quite different, resulting in thermal expansion coefficient mismatch or interface defects; the detachable structure may increase the complexity and cost of the packaging process, affecting the feasibility of large-scale production. Therefore, the present invention provides a planar bump packaging process for integrated circuits. Summary of the invention

[0007] In order to solve the above technical problems, the present invention provides a planar bump packaging process for integrated circuits, comprising the following steps: Integrate the physical parameters of semiconductor materials, bump metals and substrates to establish a thermal-mechanical-electrical coupling response matrix; input chip power consumption and frequency constraints to generate gradient bump topology, and verify it through a multi-physics field simulation model; map the bump parameters after gradient bump topology optimization to the photolithography mask design to generate a coordinate file; Import the bump parameters after gradient bump topology optimization, build the finite element model of the thin wafer, and generate the compensation coefficient library; scan the thin wafer surface in real time, dynamically adjust the robot arm path, and obtain the actual position and alignment information of the thin wafer; The current density and heat flux density distribution are calculated in real time through multi-physics field simulation models and alignment information, and the bump height and spacing are reversely optimized based on the measured parameters.

[0008] Optionally, the process of generating a gradient bump topology includes the following steps: Obtain the physical characteristic parameters of semiconductor materials, bump metals and substrates, obtain a set of physical characteristic parameters, and construct a matrix describing the behavior and response of semiconductor materials under different thermal, mechanical and electrical effects based on the set of physical characteristic parameters; set constraints based on the working conditions of the integrated circuit; Based on the set of physical characteristic parameters and constraints, a gradient bump topology is constructed, and with the support of the response matrix, bumps of different densities and distributions are obtained according to the current and heat requirements of different regions of the integrated circuit; The results of the gradient bump topology are verified through a multi-physics simulation model to simulate the response of the bump structure to current and heat flow under actual working conditions, as well as the impact on packaging performance.

[0009] Optionally, the process of constructing a matrix describing the behavior and response of semiconductor materials under different thermal-mechanical-electrical effects comprises the following steps: Define a semiconductor material state vector and a reference state vector; The material state vector is decomposed into a combination of reference state and correction term through nonlinear constitutive matrix, reflecting the variation of material properties with temperature and current density; The nonlinear constitutive matrix is ​​divided into blocks to explain the structures of the thermal-mechanical coupling submatrix and the electro-thermal coupling submatrix respectively, showing the correlation between the various physical quantities of the semiconductor material state vector and the reference state vector.

[0010] Optionally, the semiconductor material state vector includes temperature, current density, thermal conductivity, electrical conductivity, Young's modulus and thermal expansion coefficient; the reference state parameter vector includes reference temperature, zero current density, thermal conductivity at reference temperature, electrical conductivity at reference temperature, Young's modulus at reference temperature and thermal expansion coefficient at reference temperature.

[0011] Optionally, the process of setting constraints includes the following steps: Determine the maximum current density, which cannot exceed the reference current density multiplied by a temperature-related adjustment factor; the current density flowing through the semiconductor device will not exceed the carrying limit of the semiconductor material; Evaluate whether the actual stress meets the mechanical strength requirements. The actual stress is less than or equal to the yield strength of the material multiplied by an adjustment factor for temperature. Verify the matching of thermal expansion behavior between the substrate and the bumps. The difference in thermal expansion coefficient is less than or equal to half of the difference in thermal expansion coefficient between the substrate and the bumps multiplied by an adjustment factor with temperature. The thermal expansion behavior of the substrate and the bumps will not cause structural misalignment or damage.

[0012] Optionally, the process of obtaining convex points of different densities and distributions includes the following steps: Define the size and shape parameters of the convex points, set the density and distribution rules of the convex points, and determine how the convex points are distributed in space; create a basic grid or surface as a supporting structure for the convex points, and evenly spread the convex points on the basic structure to form an initial topology; Define a gradient field that describes the density change of convex points in space, calculate the gradient value of each convex point in the gradient field, and use it to guide the density change of the convex points; dynamically adjust the density of the convex points according to the gradient value, and change the spatial distribution of the convex points by rotation and displacement, so that the arrangement of convex points in different areas presents diversity; The bump topology is iteratively optimized, and the density and distribution of the bumps are continuously adjusted according to the optimization results until the topological structure is obtained; the optimized bump topological structure is output as a model file, the bump topological structure is visualized, and the bump effects of different densities and distributions are displayed.

[0013] Optionally, the process of obtaining the actual position and alignment information of the thin wafer includes the following steps: Based on the optimized bump parameters, a finite element model of the thin wafer is established to simulate the behavior of the thin wafer under ball implantation pressure and predict the warpage phenomenon. Scan the surface of the thin wafer to obtain the actual deformation data of the new thin wafer surface in real time; compare the actual deformation data with the finite element model prediction data to determine the deviation between the actual deformation and the prediction; The path of the robot is dynamically adjusted based on the deviation, and the bumps are aligned to the target pads.

[0014] Optionally, thin wafer deformation data and bump and pad alignment data are collected, combined with the prediction results of the finite element model, to establish a compensation coefficient library for guiding the robot arm to dynamically adjust during the actual ball planting process to compensate for the predicted warpage.

[0015] Optionally, the process of establishing a compensation coefficient library includes the following steps: Construct a finite element model of a thin wafer and simulate and predict the warping phenomenon of the thin wafer when ball planting pressure is applied; Obtain the deformation data of the thin wafer in the actual production environment, including the curvature of the thin wafer and the position of the bumps; compare the deformation data with the results predicted by the finite element model to determine the deviation between the actual deformation and the prediction; Build a compensation coefficient library based on the deviation.

[0016] Optionally, the compensation coefficient library contains instructions for the robot arm on how to dynamically adjust its ball placement path based on actual deformation data.

[0017] The establishment of the thermal-mechanical-electrical coupling response matrix and the generation of gradient bump topology of the present invention, the input of physical property parameters and the coupling response matrix are the basis of the packaging process. By integrating the physical property parameters of semiconductor materials, bump metals and substrates, a model that can describe the interaction between temperature, mechanics and electrical properties is established, so as to predict the response of the packaging structure in actual operation; the gradient bump topology generation is based on the constraints such as chip power consumption and frequency, and the multi-physical field simulation model is used to generate the gradient bump topology. The gradient bump topology optimization helps to improve the electrical connection efficiency and thermal management; the photolithography mask design maps the optimized bump parameters to the photolithography mask design, generates a coordinate file, provides accurate parameters for the photolithography process, and ensures the accurate manufacturing of the bumps. Finite element model construction and thin wafer deformation compensation. The thin wafer finite element model imports the optimized bump parameters to build a finite element model of the thin wafer, which is used to predict the warping trend of the wafer under the ball planting pressure; the compensation coefficient library generates a compensation coefficient library to correct the deformation in actual production and improve the accuracy and reliability of packaging; real-time scanning and path adjustment scan the thin wafer surface in real time, compare the actual deformation with the twin prediction data, and dynamically adjust the robot arm path to obtain the actual position and alignment information of the thin wafer, ensuring accurate alignment during the packaging process. Current density and heat flux density distribution calculation and reverse optimization. Current density and heat flux density distribution calculation uses multi-physics field simulation models and alignment information to calculate current density and heat flux density distribution in real time, which is crucial to ensuring stable operation of the circuit and preventing overheating; microchannel generation in the substrate dynamically generates microchannels in the substrate according to the thermal field distribution to achieve effective thermal management and prevent performance degradation or damage caused by high temperature; coolant flow regulation combines piezoelectric pumps to adjust the coolant flow, optimizes heat dissipation, and improves the thermal stability of the package; reverse optimization of bump height and spacing reversely optimizes bump height and spacing based on measured parameters to further improve the reliability of electrical connections and thermal management efficiency.

[0018] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the written description and the accompanying drawings.

[0019] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings: Figure 1 This is a process flow chart of planar bump packaging of integrated circuits in Embodiment 1 of the present invention; Figure 2 A process diagram for generating a gradient convex point topology in Embodiment 2 of the present invention; Figure 3 A process diagram for describing the semiconductor material behavior and response matrix under different thermal, mechanical and electrical effects in Example 3 of the present invention; Figure 4 A process diagram for setting constraint conditions in Embodiment 4 of the present invention; Figure 5 A process diagram of obtaining convex points of different densities and distributions in Example 5 of the present invention; Figure 6 A process diagram for obtaining the actual position and alignment information of a thin wafer in Example 6 of the present invention; Figure 7 A process diagram of establishing a compensation coefficient library in Embodiment 7 of the present invention; Figure 8 is a process diagram of dynamically adjusting the path of the robot arm based on the deviation in Example 8 of the present invention; Fig. 9 A diagram showing a process of calculating a joint angle that needs to be adjusted in Embodiment 9 of the present invention; Fig.10 This is a process diagram for calculating the current density and heat flux density distribution in Example 10 of the present invention. DETAILED DESCRIPTION

[0021] The preferred embodiments of the present invention are described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present invention, and are not used to limit the present invention.

[0022] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the embodiments of the present application. The singular forms of "a", "said" and "the" used in the embodiments of the present application are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used in this article refers to and includes any or all possible combinations of one or more associated listed items.

[0023] When the following description relates to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are only examples of devices and methods consistent with some aspects of the present application. In the description of the present application, it should be understood that the terms "first", "second", "third", etc. are only used to distinguish similar objects, and do not have to be used to describe a specific order or sequence, nor can they be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances.

[0024] Example 1: Figure 1 As shown, an embodiment of the present invention provides a planar bump packaging process for an integrated circuit, comprising the following steps: S100: Integrate the physical parameters of semiconductor materials, bump metals and substrates to establish a thermal-mechanical-electrical coupling response matrix; input chip power consumption and frequency constraints to generate gradient bump topology, and verify it through a multi-physics simulation model; map the bump parameters after gradient bump topology optimization to the photolithography mask design to generate a coordinate file; S200: Import the bump parameters after gradient bump topology optimization, build a finite element model of the thin wafer, predict the warpage trend under ball planting pressure, and generate a compensation coefficient library; scan the thin wafer surface in real time, compare the actual deformation with the twin prediction data, dynamically adjust the robot arm path, and obtain the actual position and alignment information of the thin wafer; S300: Real-time calculation of current density and heat flux density distribution through multi-physics simulation model and alignment information, dynamic generation of microchannels in the substrate according to the thermal field distribution, and adjustment of coolant flow rate in combination with piezoelectric pump; reverse optimization of bump height and spacing based on measured parameters; measured parameters are current density and heat flux density distribution.

[0025] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, the physical parameters of semiconductor materials, bump metals and substrates are first integrated to establish a thermal-mechanical-electrical coupling response matrix; constraints such as chip power consumption and frequency are input to generate a gradient bump topology, which is verified through a multi-physics field simulation model; the bump parameters after the gradient bump topology is optimized are mapped to the photolithography mask design to generate a coordinate file; secondly, the bump parameters after the gradient bump topology is optimized are imported to construct a finite element model of the thin wafer, the warping trend under the ball planting pressure is predicted, and a compensation coefficient library is generated; the surface of the thin wafer is scanned in real time, the actual deformation is compared with the twin prediction data, the robot arm path is dynamically adjusted, and the actual position and alignment information of the thin wafer are obtained; finally, the current density and heat flux density distribution are calculated in real time through the multi-physics field simulation model and alignment information, the microchannels in the substrate are dynamically generated according to the thermal field distribution, and the coolant flow is adjusted in combination with the piezoelectric pump; the bump height and spacing are reversely optimized according to the measured parameters. Step S100 of the above scheme is the establishment of a thermal-mechanical-electrical coupling response matrix and the generation of a gradient bump topology. The physical parameter input and the coupling response matrix are the basis of the packaging process. By integrating the physical property parameters of semiconductor materials, bump metals and substrates, a model is established that can describe the interaction between temperature, mechanics and electrical properties, thereby predicting the response of the packaging structure in actual operation; the gradient bump topology is generated based on constraints such as chip power consumption and frequency, and a multi-physics field simulation model is used to generate a gradient bump topology. The gradient bump topology optimization helps to improve electrical connection efficiency and thermal management; the photolithography mask design maps the optimized bump parameters to the photolithography mask design, generates a coordinate file, and provides precise parameters for the photolithography process to ensure accurate manufacturing of the bumps. Step S200: Finite element model construction and thin wafer deformation compensation. The thin wafer finite element model imports the optimized bump parameters to construct a finite element model of the thin wafer, which is used to predict the warping trend of the wafer under the ball planting pressure; the compensation coefficient library generates a compensation coefficient library to correct the deformation in actual production and improve the accuracy and reliability of packaging; real-time scanning and path adjustment scan the thin wafer surface in real time, compare the actual deformation with the twin prediction data, and dynamically adjust the robot arm path to obtain the actual position and alignment information of the thin wafer, so as to ensure accurate alignment during the packaging process. Step S300 current density and heat flux density distribution calculation and reverse optimization. The current and heat flux density distribution calculation uses multi-physics field simulation models and alignment information to calculate the current density and heat flux density distribution in real time, which is crucial to ensuring the stable operation of the circuit and preventing overheating; the microchannel generation in the substrate dynamically generates the microchannel in the substrate according to the thermal field distribution to achieve effective thermal management and prevent performance degradation or damage caused by high temperature; the coolant flow regulation is combined with the piezoelectric pump to adjust the coolant flow, optimize the heat dissipation effect, and improve the thermal stability of the package; the bump height and spacing are reversely optimized according to the measured parameters to further improve the reliability of the electrical connection and the thermal management efficiency.

[0026] In summary, this embodiment ensures the high performance and reliability of the integrated circuit package, can optimize the package structure to the greatest extent, and improve the quality and life of the product.

[0027] Example 2: Figure 2 As shown, based on Example 1, the process of generating a gradient convex point topology provided in the embodiment of the present invention comprises the following steps: S101: Obtain physical characteristic parameters of semiconductor materials, bump metals and substrates, obtain a set of physical characteristic parameters, and construct a matrix describing the behavior and response of semiconductor materials under different thermal, mechanical and electrical effects according to the set of physical characteristic parameters; set constraints according to the working conditions of the integrated circuit; S102: constructing a gradient bump topology based on a set of physical feature parameters and constraints, and obtaining bumps of different densities and distributions according to the current and heat requirements of different regions of the integrated circuit with the support of a response matrix; S103: Verify the results of the gradient bump topology through a multi-physics simulation model, and simulate the response of the bump structure to current and heat flow under actual working conditions, as well as the impact on packaging performance.

[0028] The working principle and beneficial effects of the above technical solution are as follows: the present embodiment first obtains the physical characteristic parameters of the semiconductor material, the bump metal and the substrate, obtains the physical characteristic parameter set, and constructs a matrix describing the behavior and response of the semiconductor material under different thermal, mechanical and electrical effects according to the physical characteristic parameter set; sets constraints according to the working conditions of the integrated circuit; secondly, based on the physical characteristic parameter set and the constraints, constructs a gradient bump topology, and obtains bumps of different densities and distributions according to the requirements of the current and heat in different regions of the integrated circuit with the support of the response matrix; finally, the result of the gradient bump topology is verified by a multi-physical field simulation model, simulating the response of the bump structure to the current and heat flow under actual working conditions, as well as the impact on the packaging performance. Step S101 of the above solution obtains the physical characteristic parameters and constructs the response matrix. By collecting the physical characteristic parameters of the semiconductor material, the bump metal and the substrate, a response matrix can be constructed, which is a key tool for describing the behavior and response of the material under different thermal, mechanical and electrical effects; at the same time, setting constraints according to the working conditions of the integrated circuit is to ensure the feasibility and reliability of the design and provide theoretical guidance for topology design. Step S102 constructs a gradient bump topology, which is constructed through a set of physical feature parameters and constraints. According to the requirements of different regions of the integrated circuit for current and heat, bumps of different densities and distributions are designed; the electrical performance and thermal management of the circuit can be optimized, making the bump layout more reasonable and meeting the functional requirements of specific regions. Step S103 multi-physics field simulation model verification, after the gradient bump topology design is completed, the design results are verified through a multi-physics field simulation model; by simulating the response of the bump structure to current and heat flow under actual working conditions, as well as the impact on packaging performance, the performance of the gradient bump topology design in actual applications is predicted, and the simulation results can guide design adjustments to ensure that the performance of the integrated circuit meets expectations.

[0029] In summary, the present embodiments together constitute a complete technical chain from theory to practice, from design to verification, ensuring the scientificity and practicality of the gradient bump topology design.

[0030] Example 3: Figure 3 As shown, based on Example 2, the process of describing the behavior and response matrix of semiconductor materials under different thermal, mechanical and electrical effects provided by the embodiment of the present invention includes the following steps: S1011: define a semiconductor material state vector and a reference state vector; wherein the semiconductor material state vector includes temperature, current density, thermal conductivity, electrical conductivity, Young's modulus and thermal expansion coefficient; the reference state parameter vector includes reference temperature, zero current density, thermal conductivity at reference temperature, electrical conductivity at reference temperature, Young's modulus at reference temperature and thermal expansion coefficient at reference temperature; S1012: Decompose the material state vector into a combination of reference state and correction term through nonlinear constitutive matrix to reflect the change of material properties with temperature and current density; S1013: Divide the nonlinear constitutive matrix into blocks, explain the structures of the thermal-mechanical coupling submatrix and the electro-thermal coupling submatrix respectively, and show the correlation between the physical quantities of the semiconductor material state vector and the reference state vector.

[0031] Among them, the material state vector The expression is: In the formula, Indicates the current temperature (unit: K); Indicates current density (unit: A / m²); represents the temperature-dependent thermal conductivity (unit: W / (m·K)); Indicates the conductivity related to temperature and current density (unit: S / m); represents the temperature-dependent Young's modulus (unit: Pa); Indicates the temperature-dependent thermal expansion coefficient (unit: ppm / °C or 1 / K); Reference state parameters Vector expression: In the formula, represents the thermal conductivity at reference temperature; Indicates the conductivity at the reference temperature; represents Young's modulus at reference temperature; Indicates the coefficient of thermal expansion at reference temperature; Nonlinear constitutive matrix Decomposing the expression: In the formula, represents the Hadamard product, which describes the element-by-element multiplication of vectors; It represents the temperature coefficient of thermal conductivity (unit: 1 / K), describing the linear variation of thermal conductivity with temperature; The current density coefficient of conductivity represents the attenuation effect of current density on conductivity; represents the activation energy (unit: eV), reflecting the energy barrier of carrier transport in semiconductor materials; k B represents the Boltzmann constant; represents the temperature variation coefficient of Young's modulus (unit: 1 / K²), which controls the quadratic temperature dependence of Young's modulus; The coefficient of temperature variation of the coefficient of thermal expansion (unit: 1 / K³), describing the cubic temperature dependence of the coefficient of thermal expansion; represents the reference temperature (usually room temperature, such as 298 K); J = 0 represents zero current density (static conditions); Block Matrix : Thermal-mechanical coupling submatrix expression: In the formula, represents the scaling factor of thermal conductivity relative to the reference value; represents the quadratic temperature decay term of Young’s modulus; represents the normalized cubic temperature growth term of the thermal expansion coefficient; 0 means there is no direct coupling between thermal conductivity, Young's modulus and thermal expansion coefficient; Electro-thermal coupling sub-matrix expression: In the formula, represents the attenuation term of the current density on the conductivity (the increase of current density leads to the decrease of conductivity); represents the Arrhenius equation term, which characterizes the enhancement effect of temperature increase on carrier mobility; In the formula, The cubic temperature correction term (unnormalized) for the coefficient of thermal expansion is directly added to the normalized expression to ensure the integrity of the coefficient of thermal expansion model.

[0032] The working principle and beneficial effects of the above technical solution are as follows: the present embodiment first defines a semiconductor material state vector and a reference state vector; wherein the semiconductor material state vector includes temperature, current density, thermal conductivity, electrical conductivity, Young's modulus and thermal expansion coefficient; the reference state parameter vector includes reference temperature, zero current density, thermal conductivity at reference temperature, electrical conductivity at reference temperature, Young's modulus at reference temperature and thermal expansion coefficient at reference temperature; secondly, the material state vector is decomposed into a combination of reference state and correction term through nonlinear constitutive matrix, reflecting the law of material properties changing with temperature and current density; finally, the nonlinear constitutive matrix is ​​divided into blocks, and the structures of thermal-mechanical coupling submatrix and electric-thermal coupling submatrix are explained respectively, showing the correlation between the physical quantities of semiconductor material state vector and reference state vector. Step S1011 of the above solution defines semiconductor material state vector and reference state vector, and the semiconductor material state vector includes key physical parameters of semiconductor material under actual working state, such as temperature, current density, thermal conductivity, etc., and the parameters directly reflect the physical state of the material. The reference state vector contains the material parameters under specific reference conditions; it provides a benchmark for model building and a comparative reference under actual working conditions, so that the behavior changes of materials under different conditions can be accurately described. Step S1012 The material state vector is decomposed into a combination of reference state and correction terms through a nonlinear constitutive matrix. The nonlinear constitutive matrix is ​​a mathematical model used to describe how material properties change with temperature and current density; decomposing the material state vector under actual working conditions into reference state and correction terms can more accurately capture the differences in material behavior under different conditions. It provides a framework that can quantify changes in material properties and provides a mathematical basis for model building and prediction of material behavior. Step S1013 The nonlinear constitutive matrix is ​​decomposed into multiple sub-matrices, corresponding to different physical coupling effects, such as thermal-mechanical coupling and electro-thermal coupling; the block processing allows each sub-matrix to describe the material behavior under a coupling effect, thereby improving the accuracy and interpretability of the model; through structured block processing, the relationship between different physical quantities can be more clearly revealed, which provides the possibility for in-depth analysis and understanding of the complex behavior of semiconductor materials.

[0033] In summary, this embodiment constructs a mathematical model that can comprehensively describe the behavior and response of semiconductor materials under multiple effects of heat, force, and electricity; each step corresponds to a key link in the model construction process, ensuring the accuracy and practicality of the model.

[0034] In the planar bump packaging process of integrated circuits in this embodiment, the response matrix expression is mainly used to describe the nonlinear response characteristics of the packaging material under complex working conditions such as temperature and current density, and to guide the optimization and simulation verification of the packaging design; the temperature and current density dependence of key parameters such as thermal conductivity, electrical conductivity, Young's modulus and thermal expansion coefficient are incorporated; the current density affects the temperature field through Joule heat, and the temperature change in turn changes the material conductivity, forming a bidirectional coupling relationship; the temperature gradient causes the thermal expansion coefficient to change, and the thermal stress is calculated in combination with the Young's modulus to predict the delamination of the packaging structure or warping risk; the cubic temperature correction terms of thermal conductivity and thermal expansion coefficient reflect the nonlinear thermal behavior of wide bandgap semiconductors (such as SiC and GaN) at high temperatures; the Arrhenius equation term of electrical conductivity describes the temperature dependence of carrier mobility in semiconductor materials, while the current density decay term simulates the electromigration effect under high current density; the response matrix expression adapts the stiffness matrix in finite element analysis through normalized parameters and block matrix structure (thermal-mechanical, electric-thermal sub-matrix), supporting cross-scale simulation of packaging structures, such as wafer-level thermal stress analysis and system-level heat dissipation optimization. This embodiment calculates the thermal stress distribution of the package body during temperature cycling through the coupling model of Young's modulus and thermal expansion coefficient, guides the design of substrate materials (such as Cu-Mo interlayer) and bump layout, and reduces the risk of delamination; the electrical conductivity model combined with Joule heat calculation can locate current hot spots and optimize wiring density to avoid excessive local temperature rise; the temperature correction term of thermal conductivity supports the selection of gradient materials (such as high thermal conductivity AlN substrate) to improve heat dissipation efficiency.

[0035] Example 4: Figure 4 As shown, based on Example 2, the process of setting constraint conditions provided by the embodiment of the present invention includes the following steps: S1014: Determine the maximum current density, which cannot exceed the reference current density multiplied by an adjustment factor related to temperature; the current density flowing through the semiconductor device will not exceed the carrying limit of the semiconductor material; S1015: Evaluate whether the actual stress meets the mechanical strength requirements. The actual stress is less than or equal to the yield strength of the material multiplied by an adjustment factor for temperature. S1016: Verify the matching of thermal expansion behavior between the substrate and the bumps. The difference in thermal expansion coefficient is less than or equal to half of the difference in thermal expansion coefficient between the substrate and the bumps multiplied by an adjustment coefficient related to temperature. The thermal expansion behavior of the substrate and the bumps will not cause structural misalignment or damage.

[0036] Among them, the constraint expression is: Where, the maximum current density constraint is: In the formula, Indicates the maximum current density; represents the reference current density; represents the temperature adjustment factor; Indicates the maximum operating temperature; Indicates the reference temperature; Mechanical strength requirements and constraints: In the formula, represents the yield strength of semiconductor materials, represents the actual stress, represents the temperature adjustment factor; Thermal expansion matching constraints: In the formula, Represents the difference in thermal expansion coefficient, and are the thermal expansion coefficients of the substrate and bumps, is the temperature adjustment factor.

[0037] The working principle and beneficial effects of the above technical solution are as follows: the present embodiment first determines the maximum current density, which cannot exceed the reference current density multiplied by an adjustment coefficient related to temperature; the current density flowing through the semiconductor device will not exceed the bearing limit of the semiconductor material; secondly, the actual stress is evaluated whether it meets the mechanical strength requirements, and the actual stress is less than or equal to the yield strength of the material multiplied by an adjustment coefficient related to temperature; finally, the matching of the thermal expansion behavior between the substrate and the bump is verified, and the difference in thermal expansion coefficient is less than or equal to half of the difference in thermal expansion coefficient between the substrate and the bump multiplied by an adjustment coefficient related to temperature, and the thermal expansion behavior of the substrate and the bump will not cause structural dislocation or damage. The above-described step S1014 determines the maximum current density constraint, limits the current density of the semiconductor device when the temperature changes, prevents the electrical performance degradation or thermal failure of the material due to excessive current density, thereby ensuring the electrical stability and reliability of the semiconductor device. Step S1015 evaluates whether the actual stress meets the mechanical strength requirements, verifies whether the semiconductor material can withstand the stress applied by the outside when the temperature changes, and avoids the mechanical failure (such as plastic deformation or fracture) of the semiconductor material due to excessive stress, thereby ensuring the structural integrity and long-term performance of the solid device. Step S1016 verifies the matching of thermal expansion behaviors between the substrate and the bumps to prevent interface stress concentration, structural dislocation or interface delamination caused by mismatched thermal expansion coefficients, thereby ensuring the thermomechanical reliability of the solid-state device under different temperature environments.

[0038] In the maximum current density constraint formula of this embodiment, the conductivity and current density of semiconductor materials are significantly affected by temperature. As the temperature rises, the thermal excitation of electrons increases, which may cause the current density to rise; this formula is based on the relationship between conductivity and temperature in semiconductor physics, and introduces a temperature adjustment coefficient to quantify this effect; by limiting the maximum current density, the semiconductor device is prevented from electrical breakdown, Joule heating effect or thermal failure due to excessive current density under high temperature working conditions, thereby ensuring the electrical stability and reliability of the device. Mechanical strength requirement constraint formula, the yield strength of the material decreases with temperature, especially under high temperature conditions, the mechanical properties of the material may be significantly reduced; this formula is based on the strength-temperature relationship in material mechanics, and introduces a temperature adjustment coefficient to describe this change; by limiting the actual stress, it is ensured that the semiconductor material can still withstand external stress when the temperature changes, avoiding plastic deformation, crack extension or mechanical failure due to excessive stress, and ensuring the structural integrity and mechanical reliability of the device. Thermal expansion matching constraint formula When the temperature changes, the difference in thermal expansion coefficients of different materials will lead to interface stress concentration, which may cause delamination or fracture; this formula is based on the thermal expansion behavior model in thermodynamics and material science, and introduces a temperature adjustment coefficient to quantify the thermal expansion matching problem; by limiting the difference in thermal expansion coefficients, it ensures that the expansion behavior of the substrate and the bump is consistent when the temperature changes, avoiding interface stress concentration, delamination or structural failure caused by thermal expansion mismatch, and ensuring the thermomechanical reliability of the device.

[0039] During the operation of an integrated circuit, the chip temperature will fluctuate with the load, especially in high-frequency, high-current or high-power consumption scenarios; the above formula introduces a temperature factor to incorporate temperature changes into the constraint conditions to ensure the performance and reliability of the device in a dynamic temperature environment; the current density constraint is directly related to the electrical performance and thermal management of the device. Integrated circuits are prone to thermal effects and electromigration at high current densities, which affect the life of the device. By limiting the maximum current density, the integrated circuit design and thermal management strategy are optimized. The packaging materials and structures of integrated circuits are subject to mechanical stress in actual work, especially when the temperature changes, thermal expansion mismatch will cause interface stress. Mechanical strength constraints and thermal expansion matching constraints optimize packaging design and material selection through restrictions to improve the mechanical reliability of the device.

[0040] In summary, this embodiment sets comprehensive constraints on semiconductor devices from three aspects: electrical, mechanical and thermomechanical, to ensure their multi-physical field synergistic performance under complex working conditions, and ultimately achieve high reliability and long-term stability of solid-state devices.

[0041] Example 5: Figure 5 As shown, based on Example 2, the process of obtaining convex points with different densities and distributions provided in the embodiment of the present invention includes the following steps: S1021: define the size and shape parameters of the convex points, set the density and distribution rules of the convex points, and determine the distribution method of the convex points in space; create a basic grid or surface as a support structure for the convex points, and evenly spread the convex points on the basic structure to form an initial topology; S1022: defining a gradient field that describes the density change of convex points in space, calculating the gradient value of each convex point in the gradient field, and using it to guide the density change of the convex points; dynamically adjusting the density of the convex points according to the gradient value, and changing the spatial distribution of the convex points by means of rotation and displacement, so that the arrangement of convex points in different areas presents diversity; S1023: Iteratively optimize the bump topology, and continuously adjust the density and distribution of the bumps according to the optimization results until a topological structure is obtained; output the optimized bump topological structure as a model file, visualize the bump topological structure, and display bump effects of different densities and distributions.

[0042] The working principle and beneficial effects of the above technical solution are as follows: In this embodiment, the size and shape parameters of the convex points are first defined, the density and distribution rules of the convex points are set, and the distribution mode of the convex points in space is determined; a basic grid or surface is created as a supporting structure for the convex points, and the convex points are evenly spread on the basic structure to form an initial topology; secondly, a gradient field that describes the density change of the convex points in space is defined, and the gradient value of each convex point in the gradient field is calculated to guide the density change of the convex points; according to the gradient value, the density of the convex points is dynamically adjusted, and the spatial distribution of the convex points is changed by rotation and displacement, so that the arrangement of convex points in different areas presents diversity; finally, the convex point topology is iteratively optimized, and the density and distribution of the convex points are continuously adjusted according to the optimization results until the topological structure is obtained; the optimized convex point topological structure is output as a model file, the convex point topological structure is visualized, and the convex point effects of different densities and distributions are displayed. Step S1021 of the above scheme defines parameters and creates an initial topology, which involves the definition of the size and shape parameters of the convex points, as well as determining the density and rules of the convex point distribution; including creating a basic grid or surface to support the convex points, and evenly spreading the convex points on the structure to form an initial topology; providing a starting point for the gradient field definition and convex point distribution optimization to ensure that the initial distribution of the convex points meets the designer's expectations. Step S1022 defines the gradient field and dynamically adjusts the convex point density. Defining a gradient field is to describe the density change of the convex points in space, which is the key to optimizing the convex point distribution. The density change of the convex points is guided by calculating the gradient value of each convex point in the gradient field, dynamically adjusting the density of the convex points, and changing the spatial distribution of the convex points by means of rotation, displacement, etc.; achieving the diversity and adaptability of the convex point distribution, so that the arrangement of the convex points shows the required differences in different areas to meet specific design or functional requirements. Step S1023 iteratively optimizes and outputs a model file, by iteratively optimizing the bump topology, continuously adjusting the density and distribution of the bumps until a topological structure that meets the design requirements is obtained; ensuring that the final bump distribution meets the design expectations and can achieve specific performance goals; outputting the optimized bump topological structure as a model file that can be visualized.

[0043] In summary, the three steps of this embodiment together construct a complete process from parameter setting to final model output, aiming to achieve bump structure design with specific density and distribution.

[0044] Example 6: Figure 6 As shown, based on Example 1, the process of obtaining the actual position and alignment information of the thin wafer provided in the embodiment of the present invention includes the following steps: S201: Based on the optimized bump parameters, a finite element model of the thin wafer is established to simulate the behavior of the thin wafer under the ball planting pressure and predict the warping phenomenon that occurs; thin wafer deformation data and bump and pad alignment data are collected, and combined with the prediction results of the finite element model, a compensation coefficient library is established to guide the robot arm to dynamically adjust during the actual ball planting process to compensate for the predicted warping; S202: Scanning the surface of the thin wafer to obtain actual deformation data of the surface of the new thin wafer in real time; comparing the actual deformation data with the predicted data of the finite element model to determine the deviation between the actual deformation and the predicted data; S203: Dynamically adjust the path of the robot arm based on the deviation, and align the bump to the target pad.

[0045] The working principle and beneficial effects of the above technical solution are as follows: This embodiment first establishes a finite element model of a thin wafer based on the optimized bump parameters, simulates the behavior of the thin wafer under ball planting pressure, and predicts the warping phenomenon that may occur; collects thin wafer deformation data and bump and pad alignment data, and combines the prediction results of the finite element model to establish a compensation coefficient library for guiding the robot arm to dynamically adjust during the actual ball planting process to compensate for the predicted warping; secondly, scans the surface of the thin wafer to obtain the actual deformation data of the new thin wafer surface in real time; compares the actual deformation data with the finite element model prediction data to determine the deviation between the actual deformation and the prediction; finally, dynamically adjusts the path of the robot arm based on the deviation, and aligns the bump to the target pad. In the above scheme, step S201 of the finite element model construction and parameter optimization, the thin wafer will produce warping due to pressure during the ball implantation process. By establishing a finite element model simulation, the degree and shape of the warping can be predicted; the data of the thin wafer during actual deformation and bump alignment are collected to provide a basis for verification and calibration of the finite element model; combined with the prediction results of the finite element model and the actual data, a compensation coefficient library is established to provide a basis for dynamic adjustment of the robot arm during the actual ball implantation process, thereby compensating for the predicted warping error. Step S202 of the thin wafer surface scanning and data comparison, through the thin wafer surface scanning, the actual deformation data of the current thin wafer is obtained in real time; the actual deformation data obtained in real time is compared with the finite element model prediction data to determine the deviation between the two, and ensure the precise alignment of the thin wafer in the actual operation. Step S203 of the robot arm path dynamic adjustment, according to the determined deviation, the path and action of the robot arm are dynamically adjusted to ensure that the bump can be accurately aligned to the target pad; through dynamic adjustment, the alignment error caused by warping can be reduced, and the accuracy and success rate of ball implantation can be improved.

[0046] In summary, this embodiment constitutes a continuous and dynamic adjustment process, from prediction, data collection to real-time adjustment, so that the thin wafer can achieve high-precision alignment during the ball implantation process, thereby improving the quality and reliability of semiconductor packaging.

[0047] Example 7: Figure 7 As shown, based on Example 6, the process of establishing a compensation coefficient library provided by the embodiment of the present invention includes the following steps: S2011: Construct a finite element model of thin wafers and simulate and predict the warping phenomenon of thin wafers when ball implant pressure is applied; S2012: Obtain deformation data of the thin wafer in an actual production environment, including the curvature of the thin wafer and the position of the bumps, etc.; compare the deformation data with the results predicted by the finite element model to determine the deviation between the actual deformation and the prediction; S2013: Build a compensation coefficient library based on deviations, including instructions on how the robot arm dynamically adjusts its ball placement path based on actual deformation data.

[0048] The working principle and beneficial effects of the above technical solution are as follows: This embodiment first constructs a finite element model of the thin wafer, and simulates and predicts what kind of warping phenomenon the thin wafer will produce when the ball planting pressure is applied; secondly, the deformation data of the thin wafer in the actual production environment is obtained, including the curvature of the thin wafer and the position of the bumps, etc.; the deformation data is compared with the results predicted by the finite element model to determine the deviation between the actual deformation and the prediction; finally, a compensation coefficient library is constructed based on the deviation, including how to guide the robot arm to dynamically adjust its ball planting path according to the actual deformation data. Step S2011 of the above scheme constructs a finite element model of the thin wafer, and simulates and predicts the warping phenomenon that may occur to the thin wafer when the ball planting pressure is applied. Through finite element analysis; create an accurate wafer model, and simulate the physical loading process in a virtual environment; it is possible to predict the deformation behavior of the wafer under actual production conditions, such as stress, strain distribution and warping morphology. Step S2012 obtains the deformation data of the thin wafer in the actual production environment. Collecting the actual deformation data of the thin wafer from the production line, including but not limited to the curvature and bump position of the wafer, is crucial to verifying the accuracy of the finite element model and provides a benchmark for comparing the simulated prediction value with what happens in actual production. By comparing the prediction results of the finite element model with the measured deformation data, the effectiveness of the model can be evaluated and the deviation between the actual deformation and the prediction can be determined. Step S2013 constructs a compensation coefficient library based on the deviation. Constructing a compensation coefficient library will guide the robot arm on how to dynamically adjust the ball implantation path according to the actual deformation data to compensate for the deviation. Quantifying the deviation and converting it into specific action instructions for the robot arm is the key to ensuring accurate and efficient ball implantation operations. The establishment of the compensation coefficient library means that the robot arm can automatically adjust its operation to adapt to the unique deformation of each wafer, thereby improving production quality and efficiency.

[0049] In summary, this embodiment constitutes a closed-loop correction and optimization process, which optimizes the ball implantation path of the robot arm through simulation prediction, actual verification and dynamic adjustment to adapt to any wafer deformation that may occur during the production process.

[0050] Example 8: Figure 8 As shown, based on Example 6, the process of dynamically adjusting the path of the robot arm based on the deviation provided in the embodiment of the present invention includes the following steps: S2031: Establish a kinematic model according to the structure of the robotic arm to describe the relationship between the angle change of each joint of the robotic arm and the position and direction of the end effector; input the collected deformation deviation into the kinematic model, calculate the joint angle that needs to be adjusted, and convert the deformation deviation into a specific action instruction of the robotic arm; S2032: Using the calculated joint angle adjustment value as a control instruction, and driving the robot arm to perform motion adjustment through the end effector; S2033: After the robot arm executes the action command, the actual motion state is obtained through the sensor installed on the robot arm and compared with the state of motion adjustment to form a closed-loop control; if there is an error, the control strategy is adjusted according to the feedback to optimize the adjustment.

[0051] The working principle and beneficial effects of the above technical solution are as follows: This embodiment first establishes a kinematic model according to the structure of the robotic arm to describe the relationship between the angle changes of each joint of the robotic arm and the position and direction of the end effector; the collected deformation deviation is input into the kinematic model, the joint angle that needs to be adjusted is calculated, and the deformation deviation is converted into a specific action instruction of the robotic arm; secondly, the calculated joint angle adjustment value is used as a control instruction, and the robotic arm is driven by the end effector to perform motion adjustment; finally, after the robotic arm executes the action instruction, the actual motion state is obtained through the sensor installed on the robotic arm, and compared with the motion adjustment state to form a closed-loop control; if there is an error, the control strategy is adjusted according to the feedback to optimize the adjustment. Step S2031 of the above scheme establishes a kinematic model and calculates adjustment instructions. The kinematic model is established according to the structural characteristics of the robot arm, which can accurately describe the relationship between the changes in the angles of each joint and the position and direction of the end effector in space, and convert the abstract action requirements into specific action instructions that the robot arm can execute; the actual deformation deviation is input into the kinematic model, and the joint angles that need to be adjusted can be dynamically calculated, and the influence of external factors (such as deformation) on the action of the robot arm can be quantified, thereby converting it into specific action instructions that the robot arm can respond to. Step S2032 executes the action instruction, and uses the calculated joint angle adjustment value as the control instruction, ensuring that the robot arm can accurately adjust the action according to the predetermined path and speed; the end effector drives the robot arm to adjust the movement, which reflects the execution ability of the robot arm and can convert the calculated theoretical action into actual physical action. Step S2033 closed-loop control and error adjustment obtains the actual motion state of the robot arm through sensors and compares it with the expected motion adjustment state, ensuring the accuracy and reliability of the robot arm's movements; forms a closed-loop control system that can instantly adjust the control strategy when an error is detected, optimize the adjustment action, and ensure the real-time and dynamic adaptability of the robot arm's movements; adjusts the control strategy and optimizes the adjustment based on feedback, so that the robot arm can continuously perform self-adjustment and optimization, improving the stability and accuracy of the system.

[0052] To sum up, this embodiment constitutes a complete dynamic adjustment process, which can ensure that the robotic arm can still accurately perform the predetermined tasks when facing external environmental changes and internal deformations; through precise model establishment, execution of action instructions and real-time adjustment of closed-loop control, the operating accuracy and reliability of the robotic arm can be significantly improved.

[0053] Example 9: Fig. 9 As shown, based on Example 8, the process of calculating the joint angle that needs to be adjusted provided by the embodiment of the present invention includes the following steps: S20311: When the deviation data is input into the kinematic model, the offset between the end effector and the target position in the spatial coordinate system is determined, including the position deviation and the direction deviation. The deviation data is decomposed into the direction and magnitude of the movement of each joint of the robot arm, and the angle value of each joint is adjusted; S20312: When analyzing the geometric relationship in the kinematic model, a coordinate system chain from the base to the end effector is established according to the structure of the robot arm; through inverse kinematics, the deviation target position and direction of the end effector is converted into the adjustment value of each joint angle; S20313: Based on the calculated angle adjustment values ​​of each joint, decompose the deviation information into coordinated adjustment instructions for multiple joints.

[0054] The working principle and beneficial effects of the above technical solution are as follows: first, when the deviation data is input into the kinematic model, the offset between the end effector and the target position in the spatial coordinate system is determined, including the position deviation and the direction deviation. The deviation data is decomposed into the direction and size of the movement of each joint of the manipulator, and the angle value of each joint is adjusted; secondly, when analyzing the geometric relationship in the kinematic model, a coordinate system chain from the base to the end effector is established according to the structure of the manipulator; through inverse kinematics, the deviation target position and direction of the end effector are converted into the angle adjustment value of each joint; finally, based on the calculated angle adjustment value of each joint, the deviation information is decomposed into the coordinated adjustment instructions of multiple joints. Step S20311 of the above scheme is to input the deviation data and determine the end effector offset. By inputting the deviation data into the kinematic model, the spatial deviation between the end effector of the manipulator and the target position can be determined. The deviation includes the position deviation and the direction deviation, indicating the direction and distance that the end effector needs to move; the Euclidean distance between the current position of the end effector and the target position is calculated; the rotation difference between the current direction of the end effector and the target direction is calculated, using vector cross product and angle calculation. Step S20312: Establishment of inverse kinematics and coordinate system chain. Through the inverse kinematics algorithm, the spatial position and direction deviation of the end effector is converted into the adjustment value of each joint angle, which is the key to achieve precise control of the robot arm; establish a coordinate system chain from the robot arm base to the end effector to describe the position and direction of the end effector relative to the base; use the inverse kinematics algorithm (such as the DH parameter method or the Jacobian matrix method) to calculate the angle that each joint needs to reach according to the target position and direction of the end effector. Step S20313: Deviation information decomposition and coordinated adjustment instruction generation, so that the robot arm can move in a coordinated manner to achieve the established target position and direction; decompose the overall deviation information into the adjustment requirements of each joint; generate specific motion instructions based on the joint adjustment value, so that the joints of the robot arm work together to achieve smooth and precise movement.

[0055] In summary, the present embodiments together constitute a complete process of adjusting the joint angles of the robotic arm through inverse kinematics, ensuring that the robotic arm can accurately reach the target position and direction.

[0056] Example 10: Fig.10 As shown, based on Example 1, the process of calculating the current density and heat flux density distribution provided in the embodiment of the present invention includes the following steps: S301: Based on the alignment information and in combination with the current distribution of the circuit, the current density at each bump is calculated through a simulation model; the current density refers to the current flow per unit area, and the calculation formula is the current divided by the cross-sectional area of ​​the conductor; S302: Calculate heat flux density based on the calculation result of current density and the temperature distribution when the circuit is working; heat flux density refers to the heat flow per unit area; S303: According to the heat field distribution, the heat flux density distribution is calculated in real time, and the microchannel structure in the substrate is dynamically generated. The heat flux density distribution is obtained, and the flow rate of the coolant is adjusted using a piezoelectric pump.

[0057] The working principle and beneficial effects of the above technical solution are as follows: This embodiment firstly calculates the current density at each bump through a simulation model based on the alignment information and the current distribution of the circuit; the current density refers to the current flow per unit area, and the calculation formula is the current divided by the cross-sectional area of ​​the conductor; secondly, based on the calculation result of the current density and the temperature distribution of the circuit when it is working, the heat flux density is calculated; the heat flux density refers to the heat flow per unit area; finally, according to the thermal field distribution, the heat flux density distribution is calculated in real time, and the microchannel structure in the substrate is dynamically generated. The heat flux density distribution obtained uses a piezoelectric pump to adjust the flow of the coolant. Step S301 of the above solution calculates the current density distribution and quantifies the current density at each bump (i.e., connection point) in the circuit; through the calculation of the current density, the distribution of the current in the circuit can be understood, which is crucial for predicting the hot spots (i.e., areas with higher temperatures) in the circuit. Step S302 calculates the heat flux density. Based on the calculation result of the current density and the actual temperature distribution of the circuit during operation, the heat flux density is calculated. The heat flux density reflects the heat flow per unit area, which is a key indicator for evaluating the performance of the circuit under thermal load. By calculating the heat flux density, the heat concentration areas in the circuit can be identified, and then the heat dissipation requirements and possible thermal failure risks of these areas can be evaluated. Step S303 generates a microchannel structure and adjusts the coolant flow according to the thermal field distribution. The thermal field distribution provides guidance for dynamically generating the microchannel structure in the substrate. The cooling system is dynamically adjusted according to the heat flux density distribution calculated in real time to achieve more effective thermal management. By adjusting the coolant flow through a piezoelectric pump, the heat concentration area can be cooled in a targeted manner to maintain the circuit within a safe operating temperature range, thereby improving the reliability and life of the equipment.

[0058] In summary, the calculation of current density in this embodiment provides basic data for the analysis of heat flux density, and the calculation result of heat flux density is the key to optimizing heat dissipation design and preventing overheating failure; by dynamically adjusting the cooling system to respond to changes in thermal field distribution, more sophisticated and effective thermal management can be achieved.

[0059] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention belong to the scope of equivalent technologies of the present invention, the present invention is also intended to include these modifications and variations.

Claims

1. A planar bump packaging process for integrated circuits, characterized in that: The following steps are involved: Integrate the physical parameters of semiconductor materials, bump metals and substrates to establish a thermal-mechanical-electrical coupling response matrix; input chip power consumption and frequency constraints to generate gradient bump topology, and verify it through a multi-physics field simulation model; map the bump parameters after gradient bump topology optimization to the photolithography mask design to generate a coordinate file; Import the bump parameters after gradient bump topology optimization, build the finite element model of the thin wafer, and generate the compensation coefficient library; scan the thin wafer surface in real time, dynamically adjust the robot arm path, and obtain the actual position and alignment information of the thin wafer; The current density and heat flux density distribution are calculated in real time through multi-physics field simulation models and alignment information, and the bump height and spacing are reversely optimized based on the measured parameters.

2. The planar bump packaging process for integrated circuits as claimed in claim 1, characterized in that: The process of generating the gradient bump topology includes the following steps: Obtain the physical characteristic parameters of semiconductor materials, bump metals and substrates, obtain a set of physical characteristic parameters, and construct a matrix describing the behavior and response of semiconductor materials under different thermal, mechanical and electrical effects based on the set of physical characteristic parameters; set constraints based on the working conditions of the integrated circuit; Based on the set of physical characteristic parameters and constraints, a gradient bump topology is constructed, and with the support of the response matrix, bumps of different densities and distributions are obtained according to the current and heat requirements of different regions of the integrated circuit; The results of the gradient bump topology are verified through a multi-physics simulation model to simulate the response of the bump structure to current and heat flow under actual working conditions, as well as the impact on packaging performance.

3. The planar bump packaging process for integrated circuits as claimed in claim 2, characterized in that: The process of constructing a matrix that describes the behavior and response of semiconductor materials under different thermal, mechanical and electrical effects consists of the following steps: Define a semiconductor material state vector and a reference state vector; The material state vector is decomposed into a combination of reference state and correction term through nonlinear constitutive matrix, reflecting the variation of material properties with temperature and current density; The nonlinear constitutive matrix is ​​divided into blocks to explain the structures of the thermal-mechanical coupling submatrix and the electro-thermal coupling submatrix respectively, showing the correlation between the various physical quantities of the semiconductor material state vector and the reference state vector.

4. The planar bump packaging process for integrated circuits as claimed in claim 3, characterized in that: in, The semiconductor material state vector includes temperature, current density, thermal conductivity, electrical conductivity, Young's modulus and thermal expansion coefficient; the reference state parameter vector includes reference temperature, zero current density, thermal conductivity at reference temperature, electrical conductivity at reference temperature, Young's modulus at reference temperature and thermal expansion coefficient at reference temperature.

5. The planar bump packaging process for integrated circuits as claimed in claim 2, characterized in that: The process of setting constraints includes the following steps: Determine the maximum current density, which cannot exceed the reference current density multiplied by a temperature-related adjustment factor; the current density flowing through the semiconductor device will not exceed the carrying limit of the semiconductor material; Evaluate whether the actual stress meets the mechanical strength requirements. The actual stress is less than or equal to the yield strength of the material multiplied by an adjustment factor for temperature. Verify the matching of thermal expansion behavior between the substrate and the bumps. The difference in thermal expansion coefficient is less than or equal to half of the difference in thermal expansion coefficient between the substrate and the bumps multiplied by an adjustment factor with temperature. The thermal expansion behavior of the substrate and the bumps will not cause structural misalignment or damage.

6. The planar bump packaging process for integrated circuits as claimed in claim 2, characterized in that: The process of obtaining convex points of different densities and distributions includes the following steps: Define the size and shape parameters of the convex points, set the density and distribution rules of the convex points, and determine how the convex points are distributed in space; create a basic grid or surface as a supporting structure for the convex points, and evenly spread the convex points on the basic structure to form an initial topology; Define a gradient field that describes the density change of convex points in space, calculate the gradient value of each convex point in the gradient field, and use it to guide the density change of the convex points; dynamically adjust the density of the convex points according to the gradient value, and change the spatial distribution of the convex points by rotation and displacement, so that the arrangement of convex points in different areas presents diversity; The bump topology is iteratively optimized, and the density and distribution of the bumps are continuously adjusted according to the optimization results until the topological structure is obtained; the optimized bump topological structure is output as a model file, the bump topological structure is visualized, and the bump effects of different densities and distributions are displayed.

7. The planar bump packaging process for integrated circuits as claimed in claim 1, characterized in that: The process of obtaining the actual position and alignment information of the thin wafer includes the following steps: Based on the optimized bump parameters, a finite element model of the thin wafer is established to simulate the behavior of the thin wafer under ball implant pressure and predict the warpage phenomenon. Scan the thin wafer surface and obtain the actual deformation data of the new thin wafer surface in real time; Compare the actual deformation data with the finite element model prediction data to determine the deviation between the actual deformation and the prediction; The path of the robot is dynamically adjusted based on the deviation, and the bumps are aligned to the target pads.

8. The planar bump packaging process for integrated circuits as claimed in claim 7, characterized in that: The thin wafer deformation data and the bump and pad alignment data are collected, and combined with the prediction results of the finite element model, a compensation coefficient library is established to guide the robot arm to dynamically adjust during the actual ball planting process to compensate for the predicted warpage.

9. The planar bump packaging process for integrated circuits as claimed in claim 8, characterized in that: The process of establishing a compensation coefficient library includes the following steps: Construct a finite element model of a thin wafer and simulate and predict the warping phenomenon of the thin wafer when ball planting pressure is applied; Obtain the deformation data of the thin wafer in the actual production environment, including the curvature of the thin wafer and the position of the bumps; compare the deformation data with the results predicted by the finite element model to determine the deviation between the actual deformation and the prediction; Build a compensation coefficient library based on the deviation.

10. The planar bump packaging process for integrated circuits as claimed in claim 9, characterized in that: The compensation coefficient library contains instructions for how the robot arm should dynamically adjust its ball placement path according to the actual deformation data.

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