A wafer defect detection method and system based on image segmentation and image difference

Abstract

The present invention provides a wafer defect detection method and system based on image segmentation and image difference, which relates to the technical field of defect detection. The method process is as follows: First, a difference image is obtained based on a detection image and a template image; then, gray values are extracted from the detection image and the template image based on the difference image, and the penetration rate of the defect area is calculated according to the gray value extraction result; then, the detection image is subjected to line segmentation processing, and the line segmentation image is intersected and located based on the difference image to obtain an intersection area image; then, geometric operations are performed on the difference image and the intersection area image to obtain the defect width and the line width, and the coverage ratio of the defect area is calculated based on the defect width and the line width; finally, the severity of the defect is comprehensively determined according to the penetration rate and the coverage ratio of the defect area. It solves the problem that the existing wafer appearance defect detection cannot measure the influence degree of the defect and is prone to over-inspection.

Description

Technical Field

[0001] The present invention relates to the technical field of defect detection, and more particularly, to a wafer defect detection method and system based on image segmentation and image difference. Background Art

[0002] The defect detection of wafer products is a process of automatically detecting defects through an automated optical inspection (AOI) device during the wafer production process. The AOI device uses an industrial camera to collect images of wafer products, and then uses computer vision (CV) algorithms to detect possible defects in the images. However, the CV algorithm has the shortcoming of being difficult to accurately classify defects and cannot calculate the impact degree of defects on background targets. Therefore, when using an AOI device to detect wafer products, the passing rate is generally high, and manual rejudgment is required, resulting in high labor costs. Summary of the Invention

[0003] The present invention provides a wafer defect detection method and system based on image segmentation and image difference, which solves the problem that the existing wafer appearance defect detection cannot measure the impact degree of defects and is prone to over-inspection.

[0004] In a first aspect, an embodiment of the present invention provides a method for detecting defective wafer cutting. The method includes the following processes:

[0005] Perform pixel difference processing on the detection image and the template image of the wafer product to obtain a difference image;

[0006] Extract the gray values of the defect regions in the detection image and the template image based on the difference image to obtain the defect gray values and the normal gray values, and calculate the penetration rate of the defect region according to the defect gray values and the normal gray values;

[0007] Perform line segmentation processing on the detection image of the wafer product to obtain a line segmentation image; and perform intersection positioning on the line regions of the line segmentation image based on the difference image to obtain an intersection region image;

[0008] Perform geometric operations on the difference image and the intersection region image to obtain the geometric parameters of the defect and the geometric parameters of the line, and calculate the coverage ratio of the defect region based on the geometric parameters of the defect and the geometric parameters of the line;

[0009] Comprehensively determine the severity of the defect according to the penetration rate and the coverage ratio of the defect region to obtain a comprehensive detection result of the impact degree of the wafer defect.

[0010] In the above embodiments, the present invention processes the detection image and the template image of the wafer product by combining the image difference technology and the image segmentation technology to obtain a difference image containing the defect area and an intersection area image containing the circuit area; and combines the light transmittance characteristics and geometric characteristics of the wafer product to perform light transmittance verification and geometric verification on the difference image containing the defect area and the intersection area image containing the circuit area, so as to quantify the influence degree of the wafer product defect on the route, thereby more accurately determining whether the defect needs to be detected, effectively reducing the over-inspection rate of the AOI device, and reducing the cost of manual re-judgment in the later stage.

[0011] As some alternative embodiments of the present application, the process of performing pixel difference processing on the detection image and the template image of the wafer product to obtain a difference image is as follows:

[0012] Obtain the detection image and the template image of the wafer product, and preprocess the obtained detection image and template image;

[0013] Perform image registration on the preprocessed detection image and template image to align the detection image and the template image spatially;

[0014] Perform pixel difference processing on the spatially aligned detection image and template image to obtain a difference image, and obtain the position information of the defect area according to the difference image;

[0015] The calculation formula for the pixel difference processing is as follows:

[0016] ;

[0017] where represents the pixel value of the detection image at the pixel point position, represents the pixel value of the template image at the pixel point position.

[0018] In the above embodiments, the present invention can quickly and accurately preliminarily detect wafer defects by using the pixel difference technology.

[0019] As some alternative embodiments of the present application, the process of extracting the gray values of the defect areas of the detection image and the template image based on the difference image to obtain the defect gray value and the normal gray value is as follows:

[0020] Perform region positioning on the detection image and the template image based on the position information of the defect area to obtain a region positioning result;

[0021] Perform gray value extraction and gray value averaging processing on the defect areas of the detection image and the template image based on the region positioning result to obtain the defect gray value and the normal gray value.

[0022] In the above embodiments, the present invention extracts the gray values of the defect regions of the detection image and the template image, and can obtain the gray value difference between the detection image and the template image in the defect regions, which is convenient for subsequent calculation of the penetration rate according to the gray value difference.

[0023] As some alternative embodiments of the present application, the calculation formula for the penetration rate of the defect region is as follows:

[0024] ;

[0025] Wherein, and represent the relatively larger value and the relatively smaller value among the defect gray value and the normal gray value.

[0026] In the above embodiments, the present invention accurately quantifies the penetration rate of the defect region by obtaining the gray value difference between the detection image and the template image in the defect region.

[0027] As some alternative embodiments of the present application, the process of performing line segmentation processing on the detection image of the wafer product to obtain a line segmentation image is as follows:

[0028] Adopt an edge detection algorithm to perform line segmentation processing on the detection image of the wafer product to obtain a line region;

[0029] Perform feature extraction, morphological processing, and image post-processing on the line region to obtain a line segmentation image.

[0030] In the above embodiments, the present invention can quickly and accurately segment the lines from the background by using image segmentation technology.

[0031] As some alternative embodiments of the present application, the process of performing intersection positioning on the line region of the line segmentation image based on the differential image to obtain an intersection region image is as follows:

[0032] Perform intersection positioning on the line region of the line segmentation image according to the position information of the defect region to obtain a line intersection positioning result;

[0033] Extract the intersecting lines from the line segmentation image according to the line intersection positioning result to obtain an intersection region image of the defect and the line.

[0034] In the above embodiments, the present invention extracts the intersecting lines by using the intersection positioning method, and then quickly and accurately obtains the intersection region image of the defect and the line.

[0035] As some alternative embodiments of the present application, the process of performing geometric operations on the differential image and the intersection region image to obtain the geometric parameters of the defect and the geometric parameters of the line is as follows:

[0036] Calculate the width of the line area in the intersection area image to obtain the line width;

[0037] Perform image registration on the difference image and the intersection area image so that the difference image and the intersection area image are spatially aligned;

[0038] Perform a logical operation on the spatially aligned difference image and intersection area image to retain the area of pixel points with the same pixel values in the two images, and calculate the width of the area of pixel points with the same pixel values to obtain the defect width.

[0039] In the above embodiments, the present invention can quantify the defect width and the width of the intersecting lines by performing geometric operations on the difference image and the intersection area image.

[0040] As some alternative embodiments of the present application, the calculation formula for the coverage ratio of the defect area is as follows:

[0041] ;

[0042] Wherein, represents the defect width, represents the line width.

[0043] In the above embodiments, the present invention accurately quantifies the coverage ratio of the defect area by calculating the ratio of the defect width to the line width.

[0044] As some alternative embodiments of the present application, the process for comprehensively determining the severity of the defect based on the penetration rate and the coverage ratio of the defect area to obtain the comprehensive detection result of the impact degree of the wafer defect is as follows:

[0045] Preset the verification threshold corresponding to the penetration rate of the defect area and the verification threshold of the coverage ratio of the defect area;

[0046] Perform hierarchical verification on the penetration rate of the defect area and the coverage ratio of the defect area according to the verification threshold to obtain the comprehensive detection result of the impact degree of the wafer defect.

[0047] In the above embodiments, the present invention combines the light transmittance characteristics and geometric characteristics of the wafer product to perform light transmittance verification and geometric verification on the difference image containing the defect area and the intersection area image containing the line area, comprehensively measuring the impact degree of the defect on the wafer product in multiple aspects, so as to improve the accuracy of wafer defect detection and is not prone to the problem of over-inspection.

[0048] In a second aspect, the present invention provides a wafer defect detection system based on image segmentation and image difference, and the system includes:

[0049] A pixel difference processing unit, which is used to perform pixel difference processing on the detection image and the template image of the wafer product to obtain a difference image;

[0050] A transmittance calculation unit, which extracts gray values from the defective areas of the detection image and the template image based on the difference image to obtain defective gray values and normal gray values, and calculates the transmittance of the defective area according to the defective gray values and the normal gray values;

[0051] A line intersection positioning unit, which is used to perform line segmentation processing on the detection image of the wafer product to obtain a line segmentation image; and perform intersection positioning on the line area of the line segmentation image based on the difference image to obtain an intersection area image;

[0052] A coverage ratio calculation unit, which is used to perform geometric operations on the difference image and the intersection area image to obtain geometric parameters of the defect and geometric parameters of the line, and calculate the coverage ratio of the defective area based on the geometric parameters of the defect and the geometric parameters of the line;

[0053] A defect comprehensive detection unit, which comprehensively determines the severity of the defect according to the transmittance and coverage ratio of the defective area to obtain a comprehensive detection result of the impact degree of the wafer defect.

[0054] In a third aspect, the present invention provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the wafer defect detection method based on image segmentation and image difference is implemented.

[0055] In a fourth aspect, the present invention provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the wafer defect detection method based on image segmentation and image difference is implemented.

[0056] The beneficial effects of the present invention are as follows: The present invention combines image difference technology and image segmentation technology to process the detection image and the template image of the wafer product to obtain a difference image containing the defective area and an intersection area image containing the line area; and combines the light transmittance characteristics and geometric characteristics of the wafer product to perform light transmittance verification and geometric verification on the difference image containing the defective area and the intersection area image containing the line area, comprehensively measuring the impact degree of the defect on the wafer product in multiple aspects, so as to improve the accuracy of wafer defect detection and not easily have the problem of over-inspection. Description of the Drawings

[0057] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0058] Figure 1 It is a schematic diagram of the computer device structure of the hardware operating environment described in the embodiments of the present invention;

[0059] Figure 2 It is a flowchart of the wafer defect detection method described in the embodiments of the present invention;

[0060] Figure 3 It is an example diagram of pixel difference processing described in the embodiments of the present invention;

[0061] Figure 4 It is an example diagram of the line segmentation image described in the embodiments of the present invention;

[0062] Figure 5 It is a schematic diagram of the intersection area image described in the embodiments of the present invention;

[0063] Figure 6 It is an example diagram of quantifying the influence degree of defects on lines described in the embodiments of the present invention;

[0064] Figure 7 It is a structural block diagram of the wafer defect detection system described in the embodiments of the present invention. Specific Embodiments

[0065] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0066] In order to solve the problem that the existing wafer appearance defect detection cannot measure the influence degree of defects and is prone to over-inspection. The present application provides a wafer defect detection method, system, device and storage medium based on image segmentation and image difference. Before introducing the specific technical solutions of the present application, the hardware operating environment involved in the embodiments of the present application will be introduced first.

[0067] Please refer to Figure 1 , Figure 1 It is a schematic diagram of the computer device structure of the hardware operating environment involved in the embodiments of the present application.

[0068] As Figure 1As shown in the figure, the computer device may include: a processor, such as a Central Processing Unit (CPU), a communication bus, a user interface, a network interface, and a memory. Among them, the communication bus is used to realize the connection and communication between these components. The user interface may include a display screen (Display) and an input unit such as a keyboard (Keyboard). Optionally, the user interface may also include a standard wired interface and a wireless interface. The network interface may optionally include a standard wired interface and a wireless interface (such as a Wi-Fi interface). The memory may be a high-speed Random Access Memory (RAM) or a stable non-volatile memory (Non-Volatile Memory, NVM), such as a disk memory. Optionally, the memory may also be a storage device independent of the aforementioned processor.

[0069] Those skilled in the art can understand that Figure 1 the structure shown in the figure does not constitute a limitation on the computer device, and it may include more or fewer components than shown in the figure, or combine some components, or have a different component layout.

[0070] As Figure 1 shown in the figure, the memory as a storage medium may include an operating system, a network communication module, a user interface module, and an electronic program module.

[0071] In Figure 1 the computer device shown in the figure, the network interface is mainly used for data communication with a network server; the user interface is mainly used for data interaction with a user; the processor and memory in the computer device of the present application may be arranged in the computer device. The computer device calls the software product stored in the electronic program module through the processor and executes the wafer defect detection method provided by the embodiments of the present application.

[0072] Based on the hardware environment of the foregoing embodiments, the embodiments of the present application provide a wafer defect detection method based on image segmentation and image difference. Please refer to Figure 2 , Figure 2 which is a flowchart of the wafer defect detection method. The method flow is as follows:

[0073] (1) Perform pixel difference processing on the detection image and the template image of the wafer product to obtain a difference image.

[0074] In the embodiments of the present invention, the template image includes, but is not limited to, a defect-free detection image, a design image, etc.; preferably, the design image is used as the template image in the embodiments of the present invention. Since the physical object of the wafer product is produced one-to-one according to the design image, defects can be detected by comparing with the design image. The detection image is an image obtained by performing real-time detection on the wafer product by an AOI device.

[0075] Please refer to Figure 3 , Figure 3 which is an example diagram of pixel difference processing. Figure 3 -a is a schematic diagram of the detection image. Figure 3 -b is a schematic diagram of the template image, and 3-c is a schematic diagram of the difference image.

[0076] Specifically, the process of performing pixel difference processing on the detection image and the template image of the wafer product to obtain the difference image is as follows:

[0077] (1.1) Obtain the detection image and the template image of the wafer product, and perform preprocessing on the obtained detection image and template image. Specifically, the preprocessing includes, but is not limited to, image filtering, histogram equalization, contrast enhancement, and binarization; the preprocessing can be adjusted according to the actual situation.

[0078] (1.2) Perform image registration on the preprocessed detection image and template image to align the detection image and the template image spatially.

[0079] In the embodiments of the present invention, first, feature extraction is performed on the preprocessed detection image and template image to obtain their respective feature points. These feature points include, but are not limited to, points with uniqueness and stability such as corners, edges, contours, and line intersection points of the image; preferably, the corners of the image are selected as the feature points in the embodiments of the present invention. Then, matching feature point pairs in the detection image and the template image are obtained through a similarity measurement method. Finally, the detection image and the template image are spatially aligned according to the matching feature point pairs.

[0080] (1.3) Perform pixel difference processing on the spatially aligned detection image and template image to obtain the difference image; and obtain the position information of the defect area according to the difference image, where the position information of the defect area includes the coordinate information of the pixel points corresponding to the defect.

[0081] Specifically, the calculation formula for the pixel difference processing is as follows:

[0082] ;

[0083] where represents the detection image at pixel point The pixel value at the position, represents the pixel value of the template image at the pixel point position.

[0084] (2) Based on the difference image, extract the gray values of the defective areas of the detection image and the template image to obtain the defective gray value and the normal gray value, and calculate the penetration rate of the defective area according to the defective gray value and the normal gray value.

[0085] Specifically, when the AOI device obtains the detection image, it shines light from the bottom up of the wafer product. Therefore, when there are defects on the surface of the wafer product, the penetration rate of the defective area for light will decrease. Therefore, the penetration rate can be used to measure whether the defects meet the detection standard.

[0086] In the embodiment of the present invention, the process of extracting the gray values of the defective areas of the detection image and the template image based on the difference image is as follows:

[0087] (2.1) Perform region positioning on the detection image and the template image based on the position information of the defective area to obtain the region positioning result. Specifically, locate the defective areas of the detection image and the template image in reverse according to the coordinate information of the pixel points corresponding to the defective area on the difference image.

[0088] (2.2) Perform gray value extraction and gray value averaging processing on the defective areas of the detection image and the template image based on the region positioning result to obtain the defective gray value and the normal gray value corresponding to the detection image. That is, according to the positioning of the corresponding defective areas of the detection image and the template image. Specifically, first extract the gray values of the defective areas to obtain the gray values of the corresponding defective areas of the two images, and then perform mean processing on all the gray values to obtain the defective gray value and the normal gray value corresponding to the detection image.

[0089] Specifically, the calculation formula for the penetration rate of the defective area is as follows:

[0090] ;

[0091] where P represents the penetration rate of the defective area, , represent the relatively larger value and the relatively smaller value among the defective gray value and the normal gray value, and the value range of the penetration rate of the defective area is between 0 and 1.

[0092] (3) Perform line segmentation processing on the detection image of the wafer product to obtain a line segmentation image, and perform intersection positioning on the line area of the line segmentation image based on the difference image to obtain an intersection area image. Please refer to Figure 4 , Figure 5 , Figure 4Schematic diagram of the circuit segmentation image Figure 5 Schematic diagram of the intersection region image

[0093] In an embodiment of the present invention, the process of performing circuit segmentation processing on the detection image of the wafer product to obtain the circuit segmentation image is as follows:

[0094] (3.1) Use an edge detection algorithm or a threshold segmentation algorithm to perform circuit segmentation processing on the detection image of the wafer product to obtain a circuit region. Among them, both the edge detection algorithm and the threshold segmentation algorithm are existing image segmentation algorithms, and the steps of the algorithms are not described in detail in the embodiments of the present invention. At the same time, in the embodiments of the present invention, a trained AI segmentation model can also be used to perform circuit segmentation processing on the detection image of the wafer product, and the AI segmentation model can use an instance algorithm of the YOLO framework to implement circuit segmentation processing.

[0095] (3.2) Perform feature extraction, morphological processing, and image post-processing on the circuit region to obtain the circuit segmentation image. Specifically, the morphological processing includes but is not limited to dilation and erosion, etc. The image post-processing includes but is not limited to removing burrs and filling holes, etc., to improve the quality of the image.

[0096] (4) Perform geometric operations on the difference image and the intersection region image to obtain the geometric parameters of the defect and the geometric parameters of the circuit, and calculate the coverage ratio of the defect region based on the geometric parameters of the defect and the geometric parameters of the circuit.

[0097] In an embodiment of the present invention, the process of performing geometric operations on the difference image and the intersection region image to obtain the geometric parameters of the defect and the geometric parameters of the circuit is as follows:

[0098] (4.1) Calculate the width of the circuit region of the intersection region image to obtain the circuit width. Specifically, by obtaining the coordinate information of the edge pixel points of the circuit region in the intersection region image, constructing a minimum bounding rectangle according to the coordinate information, and taking the width of the minimum bounding rectangle as the circuit width.

[0099] (4.2) Perform image registration on the difference image and the intersection region image to make the difference image and the intersection region image spatially aligned. First, perform feature extraction on the difference image and the intersection region image to obtain their respective feature points. These feature points include but are not limited to points with uniqueness and stability such as the corner points, edges, contours, and line intersection points of the image; preferably, in the embodiments of the present invention, the corner points of the image are selected as the feature points. Then, obtain the matching feature point pairs in the difference image and the intersection region image through a similarity measurement method. Finally, perform spatial alignment on the difference image and the intersection region image according to the matching feature point pairs.

[0100] (4.3) Perform a logical operation on the spatially aligned differential image and the intersection region image to retain the region of pixel points with the same pixel values in the two images, and calculate the width of the region of pixel points with the same pixel values to obtain the defect width. Specifically, first perform a logical operation on the spatially aligned differential image and the intersection region image to retain the overlapping pixel points with pixel values of 255 in both images, that is, the intersection region of the defect and the circuit can be extracted. Then, obtain the coordinate information of the edge pixel points corresponding to the intersection region of the defect and the circuit, construct the minimum bounding rectangle according to the coordinate information, and take the width of the minimum bounding rectangle as the defect width.

[0101] Specifically, the calculation formula for the coverage ratio of the defect region is as follows:

[0102] ;

[0103] Wherein, represents the defect width, represents the circuit width, and the value range of the coverage ratio of the defect region is between 0 and 1.

[0104] (5) Comprehensively determine the severity of the defect according to the penetration rate and coverage ratio of the defect region to obtain the comprehensive detection result of the influence degree of the wafer defect. Please refer to Figure 6 , Figure 6 is the quantization example diagram of the influence degree of the defect on the circuit.

[0105] In the embodiment of the present invention, the process of comprehensively determining the severity of the defect according to the penetration rate and coverage ratio of the defect region is as follows:

[0106] (5.1) Preset the verification threshold corresponding to the penetration rate of the defect region and the verification threshold of the coverage ratio of the defect region.

[0107] For example, according to the actual verification index of the wafer product in the factory, preset the verification threshold T1 corresponding to the penetration rate of the defect region and the verification threshold T2 corresponding to the coverage ratio of the defect region.

[0108] (5.2) Perform hierarchical verification on the penetration rate of the defect region and the coverage ratio of the defect region according to the verification threshold to obtain the comprehensive detection result of the influence degree of the wafer defect.

[0109] For example, if the penetration rate of the defective area is greater than the verification threshold T1 and the coverage ratio is less than the verification threshold T2, it is determined that the impact degree of the wafer defect is minor and can be not detected; if the penetration rate of the defective area is greater than the verification threshold T1 and the coverage ratio is greater than the verification threshold T2, it is determined that the impact degree of the wafer defect is moderate and needs to be detected; if the penetration rate of the defective area is less than the verification threshold T1 and the coverage ratio is greater than the verification threshold T2, it is determined that the impact degree of the wafer defect is severe and needs to be detected and focused on. At the same time, the wafer can also be detected only when the penetration rate of the defective area is less than the verification threshold T1 and the coverage ratio is greater than the verification threshold T2.

[0110] In summary, the present invention combines image difference technology and image segmentation technology to process the detection image and the template image of the wafer product, so as to obtain a difference image containing the defective area and an intersection area image containing the circuit area; and combines the light transmittance characteristics and geometric characteristics of the wafer product to perform light transmittance verification and geometric verification on the difference image containing the defective area and the intersection area image containing the circuit area, comprehensively measuring the impact degree of the defect on the wafer product from multiple aspects, so as to improve the accuracy of wafer defect detection and not easily have the problem of over-detection.

[0111] In addition, in an embodiment, based on the same inventive concept as the foregoing embodiment, an embodiment of the present invention provides a wafer defect detection system based on image segmentation and image difference. The system corresponds one by one to the method of Embodiment 1. Please refer to Figure 7 , Figure 7 which is the structural block diagram of the wafer defect detection system. The system includes:

[0112] A pixel difference processing unit, which is used to perform pixel difference processing on the detection image and the template image of the wafer product to obtain a difference image;

[0113] A penetration rate calculation unit, which extracts the gray values of the defective areas of the detection image and the template image based on the difference image to obtain the defective gray value and the normal gray value, and calculates the penetration rate of the defective area according to the defective gray value and the normal gray value;

[0114] A circuit intersection positioning unit, which is used to perform circuit segmentation processing on the detection image of the wafer product to obtain a circuit segmentation image; and perform intersection positioning on the circuit area of the circuit segmentation image based on the difference image to obtain an intersection area image;

[0115] A coverage ratio calculation unit, which is configured to perform geometric operations on the differential image and the intersection region image to obtain the geometric parameters of the defect and the geometric parameters of the circuit, and calculate the coverage ratio of the defect region based on the geometric parameters of the defect and the geometric parameters of the circuit;

[0116] A defect comprehensive detection unit, which comprehensively determines the severity of the defect according to the penetration rate and the coverage ratio of the defect region to obtain a comprehensive detection result of the impact degree of the wafer defect.

[0117] It should be noted that each unit in the wafer defect detection system in this embodiment corresponds one by one to each step in the wafer defect detection method in the foregoing embodiment. Therefore, the specific implementation manner and the achieved technical effect of this embodiment can refer to the implementation manner of the foregoing wafer defect detection method, which will not be elaborated here.

[0118] In addition, in one embodiment, the present application further provides a computer device, which includes a processor, a memory, and a computer program stored in the memory. When the computer program is run by the processor, it implements the method in the foregoing embodiment.

[0119] In addition, in one embodiment, the present application further provides a computer storage medium, on which a computer program is stored. When the computer program is run by the processor, it implements the method in the foregoing embodiment.

[0120] In some embodiments, the computer-readable storage medium may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disc, or CD-ROM; or it may be various devices including one or any combination of the above memories. The computer may be various computing devices including intelligent terminals and servers.

[0121] In some embodiments, the executable instructions may be in the form of a program, software, software module, script, or code, and may be written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages), and may be deployed in any form, including being deployed as an independent program or being deployed as a module, component, subroutine, or other unit suitable for use in a computing environment.

[0122] As an example, the executable instructions may or may not correspond to files in a file system, and may be stored as part of a file that holds other programs or data, for example, in one or more scripts stored in a Hyper Text Markup Language (HTML) document, in a single file dedicated to the program being discussed, or in multiple cooperating files (such as files that store one or more modules, subroutines, or portions of code).

[0123] As an example, the executable instructions may be deployed to execute on one computing device, or on multiple computing devices located at one site, or on multiple computing devices distributed across multiple sites and interconnected by a communication network.

[0124] It should be noted that, in this document, the terms "including", "comprising", or any other variation thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that includes a series of elements includes not only those elements but also other elements not expressly listed, or elements that are inherent to such process, method, article, or system. Without further limitation, an element defined by the statement "including a..." does not exclude the presence of additional identical elements in the process, method, article, or system that includes such element.

[0125] The serial numbers of the embodiments of the present application above are merely for description and do not represent the superiority or inferiority of the embodiments.

[0126] From the description of the above embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. The computer software product is stored in a storage medium (such as a read-only memory / random access memory, magnetic disk, optical disk), and includes several instructions for causing a multimedia terminal device (which may be a mobile phone, a computer, a television receiver, or a network device, etc.) to execute the methods described in the various embodiments of the present application.

[0127] The above are only the preferred embodiments of the present application, and do not limit the patent scope of the present application accordingly. Any equivalent structural or equivalent process transformation made by using the description of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present application.

Claims

1. A wafer defect detection method based on image segmentation and image difference, characterized in that The method includes the following processes: Perform pixel difference processing on the detection image and the template image of the wafer product to obtain a difference image; Extract the gray values of the defective areas of the detection image and the template image based on the difference image to obtain defective gray values and normal gray values, and calculate the penetration rate of the defective area according to the defective gray values and the normal gray values; The calculation formula for the penetration rate of the defective area is as follows: P = 1 - (V max - V min ) / V max Among them, V max , V min represent the relatively larger value and the relatively smaller value among the defective gray value and the normal gray value; Perform line segmentation processing on the detection image of the wafer product to obtain a line segmentation image; and perform intersection positioning on the line areas of the line segmentation image based on the difference image to obtain an intersection area image; Perform geometric operations on the difference image and the intersection area image to obtain the geometric parameters of the defect and the geometric parameters of the line, and calculate the coverage ratio of the defective area based on the geometric parameters of the defect and the geometric parameters of the line; Among them, the process of performing geometric operations on the difference image and the intersection area image to obtain the geometric parameters of the defect and the geometric parameters of the line is as follows: Calculate the width of the line area of the intersection area image to obtain the line width; Perform image registration on the difference image and the intersection area image to align the difference image and the intersection area image spatially; Perform logical operations on the spatially aligned difference image and the intersection area image to retain the pixel point areas with the same pixel values of the two images, and calculate the width of the pixel point areas with the same pixel values to obtain the defect width; The calculation formula for the coverage ratio of the defective area is as follows: W = W2 / W1 Where, W2 represents the defect width, and W1 represents the line width; Comprehensively determine the severity of the defect according to the penetration rate and the coverage ratio of the defective area to obtain the comprehensive detection result of the impact degree of the wafer defect.

2. The wafer defect detection method based on image segmentation and image difference according to claim 1, wherein, The process of performing pixel difference processing on the detection image and the template image of the wafer product to obtain a difference image is as follows: Obtain the detection image and the template image of the wafer product, and perform preprocessing on the obtained detection image and template image; Perform image registration on the preprocessed detection image and the template image to align the detection image and the template image spatially; Perform pixel difference processing on the spatially aligned detection image and the template image to obtain a difference image, and obtain the position information of the defective area according to the difference image; The calculation formula for the pixel difference processing is as follows: Diff(x, y) = |m1(x, y) - m2(x, y)| Where, m1(x, y) represents the pixel value of the detection image at the pixel point (x, y), and m2(x, y) represents the pixel value of the template image at the pixel point (x, y).

3. The wafer defect detection method based on image segmentation and image difference according to claim 2, wherein The process of extracting the gray values of the defective areas of the detection image and the template image based on the difference image to obtain defective gray values and normal gray values is as follows: Perform area positioning on the detection image and the template image based on the position information of the defective area to obtain an area positioning result; Perform gray value extraction and gray value averaging processing on the defective areas of the detection image and the template image based on the area positioning result to obtain defective gray values and normal gray values.

4. A wafer defect detection method based on image segmentation and image difference according to claim 1, characterized in that, The process of performing line segmentation on the inspection image of a wafer product to obtain a line segmentation image is as follows: Use an edge detection algorithm to perform line segmentation on the inspection image of the wafer product to obtain a line region; Perform feature extraction, morphological processing, and image post-processing on the line region to obtain a line segmentation image.

5. A wafer defect detection method based on image segmentation and image difference according to claim 1, characterized in that, The process of performing intersection positioning on the line region of the line segmentation image based on the difference image to obtain an intersection region image is as follows: Perform intersection positioning on the line region of the line segmentation image according to the position information of the defect region to obtain a line intersection positioning result; Extract the intersecting lines from the line segmentation image according to the line intersection positioning result to obtain an intersection region image of the defect and the line.

6. A wafer defect detection method based on image segmentation and image difference according to claim 1, characterized in that The process of comprehensively determining the severity of the defect based on the penetration rate and coverage ratio of the defect region to obtain a comprehensive inspection result of the impact degree of the wafer defect is as follows: Preset a verification threshold corresponding to the penetration rate of the defect region and a verification threshold for the coverage ratio of the defect region; Perform hierarchical verification on the penetration rate of the defect region and the coverage ratio of the defect region according to the verification threshold to obtain a comprehensive inspection result of the impact degree of the wafer defect.

7. A wafer defect detection system based on image segmentation and image difference, characterized in that, The system includes: A pixel difference processing unit, which is used to perform pixel difference processing on the inspection image of the wafer product and the template image to obtain a difference image; A penetration rate calculation unit, which extracts the gray values of the defect regions of the inspection image and the template image based on the difference image to obtain defect gray values and normal gray values, and calculates the penetration rate of the defect region according to the defect gray values and the normal gray values; The calculation formula for the penetration rate of the defect region is as follows: P = 1 - (V max - V min ) / V max Among them, V max , V min represent the relatively larger value and the relatively smaller value among the defective gray value and the normal gray value; A line intersection positioning unit, which is used to perform line segmentation on the inspection image of the wafer product to obtain a line segmentation image; and perform intersection positioning on the line region of the line segmentation image based on the difference image to obtain an intersection region image; A coverage ratio calculation unit, which is used to perform geometric operations on the difference image and the intersection region image to obtain the geometric parameters of the defect and the geometric parameters of the line, and calculate the coverage ratio of the defect region based on the geometric parameters of the defect and the geometric parameters of the line; Among them, the process of performing geometric operations on the difference image and the intersection region image to obtain the geometric parameters of the defect and the geometric parameters of the line is as follows: Calculate the width of the line region of the intersection region image to obtain the line width; Perform image registration on the difference image and the intersection region image to align the difference image and the intersection region image spatially; Perform a logical operation on the spatially aligned difference image and the intersection region image to retain the pixel point region with the same pixel values of the two images, and calculate the width of the pixel point region with the same pixel values to obtain the defect width; The calculation formula for the coverage ratio of the defect region is as follows: W = W2 / W1 Where, W2 represents the defect width, and W1 represents the line width; A comprehensive defect detection unit, which comprehensively determines the severity of defects according to the penetration rate and coverage ratio of the defect area to obtain a comprehensive detection result of the impact degree of wafer defects.

8. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, it implements the wafer defect detection method based on image segmentation and image difference described in any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, and when the computer program is executed by the processor, it implements the wafer defect detection method based on image segmentation and image difference described in any one of claims 1-6.

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