Electronic package and fabrication method thereof

Abstract

An electronic package and a manufacturing method thereof are provided, mainly an electronic structure is tightly bonded to a bearing structure through a bonding layer, the bonding layer comprises a first bonding material and a second bonding material which are adjacent to each other, so that the second bonding material can fill up a deformed part of the first bonding material, and the first bonding material and the second bonding material are bonded to each other. Therefore, no cavity is formed between the bonding layer and the bearing structure after the bonding layer and the bearing structure are bonded.

Description

Technical Field

[0001] The present invention relates to a semiconductor device, in particular to an electronic package and a manufacturing method thereof which can improve product yield. Background Art

[0002] In order to ensure the continued miniaturization and multi-functionality of electronic products and communication equipment, semiconductor packaging needs to develop towards miniaturization to facilitate multi-point connection. To this end, the industry has developed many advanced process packaging technologies. For example, in advanced process packaging, commonly used packaging types include 2.5D packaging process, fan-out wiring with embedded bridge component process (abbreviated as FO-EB), etc.

[0003] Figures 1A to 1D It is a cross-sectional schematic diagram of a conventional method for manufacturing a semiconductor package 1 .

[0004] like Figure 1A As shown, a semiconductor bridge element 1a is provided, wherein a silicon plate 11 has a plurality of conductive through-silicon vias (TSVs) 110, and a circuit portion 12 is formed on the silicon plate 11, wherein the circuit portion 12 comprises at least one insulating layer 120 and a conductive trace 121 formed on the insulating layer 120, and the conductive trace 121 is electrically connected to the conductive through-silicon via 110, and a plurality of conductive bumps 122 are combined on the outermost conductive trace 121, and the conductive bumps 122 are then covered with a non-conductive film (NCF) 123. In addition, conductive bumps 111 are also provided on the exposed contacts of the conductive through-silicon via 110, and the conductive bumps 111 are covered with a protective layer 112.

[0005] like Figure 1B As shown, the semiconductor bridge element 1a is bonded to a wiring structure 14 on a carrier 9 with its non-conductive film 123, and the wiring structure 14 includes at least one dielectric layer 140 and a wiring layer 141 bonded to the dielectric layer 140, wherein the wiring structure 14 has a plurality of conductive pillars 13, so that the conductive pillars 13 are electrically connected to the wiring structure 14, and the conductive bumps 122 of the semiconductor bridge element 1a are electrically connected to the wiring layer 141 through solder bumps 142.

[0006] like Figure 1CAs shown, a packaging colloid 15 is formed on the wiring structure 14 so that the packaging colloid 15 covers the semiconductor bridge element 1a and the conductive pillars 13. Then, a circuit structure 10 is formed on the packaging colloid 15 so that the circuit structure 10 electrically connects the plurality of conductive pillars 13 and the conductive bumps 111 of the semiconductor bridge element 1a, and a plurality of semiconductor chips 16 are arranged on the circuit structure 10 so that the semiconductor bridge element 1a electrically bridges two semiconductor chips 16, and another packaging colloid 18 covers the semiconductor chips 16.

[0007] like Figure 1D As shown, the carrier 9 is removed to expose the wiring structure 14 , and a singulation process is performed to form a plurality of solder balls 17 on the wiring structure 14 , so that the solder balls 17 are electrically connected to the wiring structure 14 .

[0008] However, in the conventional method of manufacturing the semiconductor package 1, the non-conductive film 123 is easily deformed during the manufacturing process. Figure 1A As shown, even the center thickness is relatively thin, resulting in a void S between the semiconductor bridge element 1a and the wiring structure 14 after the two are joined, so that the semiconductor bridge element 1a and the wiring structure 14 cannot be completely sealed, that is, the void S is located between the semiconductor bridge element 1a and the wiring structure 14, and is therefore easily infiltrated with moisture, so that a popcorn phenomenon is easily generated in the subsequent manufacturing process, resulting in a reduction in product yield.

[0009] Therefore, how to overcome the above-mentioned problems of the prior art has become a topic that needs to be solved urgently. Summary of the invention

[0010] In view of the various deficiencies of the above-mentioned prior art, the present invention provides an electronic package, comprising: a supporting structure; an electronic structure, which is tightly combined with the supporting structure through a bonding layer, wherein the bonding layer includes a first bonding material and a second bonding material adjacent to each other to form a non-parallel double-layer structure; a conductive column, which is arranged on the supporting structure and electrically connected to the supporting structure; a coating layer, which is arranged on the supporting structure to cover the electronic structure and the conductive column; and a circuit structure, which is arranged on the coating layer and electrically connects the electronic structure and the conductive column.

[0011] The present invention also provides a method for manufacturing an electronic package, comprising: tightly bonding an electronic structure to a supporting structure through a bonding layer, wherein the bonding layer comprises a first bonding material and a second bonding material adjacent to each other to form a non-parallel double-layer structure, and a conductive column electrically connected to the supporting structure is provided on the supporting structure; forming a coating layer on the supporting structure so that the coating layer covers the electronic structure and the conductive column; and forming a circuit structure on the coating layer so that the circuit structure electrically connects the electronic structure and the conductive column.

[0012] In the aforementioned manufacturing method, the manufacturing process of the bonding layer includes: forming the bonding layer on the electronic structure, and then arranging the electronic structure on the supporting structure through the bonding layer.

[0013] In the aforementioned manufacturing method, the process of the bonding layer includes: forming the first bonding material on the electronic structure, then placing the electronic structure on the supporting structure through the first bonding material, and then filling the gap between the first bonding material and the supporting structure with the second bonding material to form the bonding layer.

[0014] In the aforementioned electronic package and its manufacturing method, the supporting structure includes at least one dielectric layer and a wiring layer combined with the dielectric layer, so that the wiring layer is electrically connected to the electronic structure.

[0015] In the aforementioned electronic package and its manufacturing method, the electronic structure has a plurality of conductive bumps embedded in the bonding layer, and after forming the coating layer on the supporting structure, a plurality of openings corresponding to the conductive bumps are formed on the supporting structure. Furthermore, a wiring layer electrically connected to the conductive bumps is formed in the opening.

[0016] In the aforementioned electronic package and its manufacturing method, the supporting structure is formed with a groove for accommodating the electronic structure.

[0017] In the aforementioned electronic package and its manufacturing method, the electronic structure is electrically connected to the circuit structure through a plurality of conductive bumps.

[0018] In the aforementioned electronic package and its manufacturing method, the first bonding material is a non-conductive film.

[0019] In the aforementioned electronic packaging component and its manufacturing method, the second bonding material is a non-conductive adhesive.

[0020] In the aforementioned electronic package and its manufacturing method, at least one electronic element is disposed on and electrically connected to the circuit structure.

[0021] The aforementioned electronic package and its manufacturing method further include arranging a plurality of electronic components on the circuit structure and electrically connecting the circuit structure so that the electronic structure electrically bridges at least two of the plurality of electronic components.

[0022] As can be seen from the above, in the electronic package and the manufacturing method thereof of the present invention, the second bonding material can fill the deformation of the first bonding material mainly through the design that the bonding layer includes a first bonding material and a second bonding material adjacent to each other, so as to ensure that no voids are generated between the bonding layer and the supporting structure after the two are joined. Therefore, compared with the prior art, the present invention can effectively make the electronic structure and the supporting structure completely sealed to avoid the problem of water vapor infiltration, so that the popcorn phenomenon will not easily occur in the subsequent process, thereby improving the product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figures 1A to 1D The cross-sectional view is a schematic diagram of a conventional method for manufacturing a semiconductor package.

[0024] Figures 2A to 2G FIG. 4 is a cross-sectional schematic diagram of a method for manufacturing an electronic package according to a first embodiment of the present invention.

[0025] Figure 2B-1 for Figure 2B A cross-sectional schematic diagram of another method.

[0026] FIG. 3A to FIG. 3D FIG. 4 is a cross-sectional schematic diagram of a manufacturing method of a second embodiment of an electronic package of the present invention.

[0027] FIG. 4A to FIG. 4E FIG. 4 is a cross-sectional schematic diagram of a method for manufacturing an electronic package according to a third embodiment of the present invention.

[0028] Main component symbols

[0029] 1 Semiconductor Package

[0030] 1a Semiconductor bridge element

[0031] 10,20 Line Structure

[0032] 11 Silicon plate

[0033] 110 Conductive Silicon Via

[0034] 111,122,211,222,261 Conductive bumps

[0035] 112,212 Protective layer

[0036] 12,22 Line Department

[0037] 120,200,220 Insulation layer

[0038] 121,221 Conductive traces

[0039] 123 Non-conductive film

[0040] 13,23 Conductive column

[0041] 14 Wiring Structure

[0042] 140,240 Dielectric layer

[0043] 141,241,341 Wiring Layer

[0044] 142 Solder Bumps

[0045] 15,18 Encapsulation colloid

[0046] 16 Semiconductor Chip

[0047] 17 Solder Balls

[0048] 2,3,4 Electronic packaging

[0049] 2a Electronic structure

[0050] 201 Line Layer

[0051] 202 Electrical contact pad

[0052] 21 Electronic Subject

[0053] 21a First side

[0054] 21b Second side

[0055] 210 Conductive Perforation

[0056] 211a,23a end face

[0057] 24,34,44 Load-bearing structure

[0058] 25 Coating

[0059] 25a Surface

[0060] 26 Electronic components

[0061] 242,260,271 Solder materials

[0062] 262 Primer

[0063] 27 Conductive element

[0064] 270 metal bumps

[0065] 271 Solder materials

[0066] 272 Under Bump Metal

[0067] 28 Encapsulation layer

[0068] 29 Bonding layer

[0069] 291 First bonding material

[0070] 292 Second bonding material

[0071] 340 Opening

[0072] 440 Grooves

[0073] 9 Bearing

[0074] 90 Release layer

[0075] 91 Metal Layer

[0076] L Cutting path

[0077] t Gap

[0078] S Hollow. DETAILED DESCRIPTION

[0079] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and technical effects of the present invention from the contents disclosed in this specification.

[0080] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings attached to this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions under which the present invention can be implemented, so they have no substantial technical significance. Any structural modification, change in proportional relationship, or adjustment of size should still fall within the scope of the technical contents disclosed by the present invention without affecting the technical effects and purposes that can be achieved by the present invention. At the same time, the terms such as "on", "first", "second", "one", etc. cited in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of the present invention without substantially changing the technical contents.

[0081] Figures 2A to 2G It is a cross-sectional schematic diagram of a manufacturing method of a first embodiment of an electronic package 2 of the present invention.

[0082] like Figure 2A As shown, an electronic structure 2a is provided, which includes an electronic body 21 with a semiconductor substrate as a main body and a circuit part 22 combined with the electronic body 21, and the electronic body 21 has a plurality of conductive through-holes 210 formed therein, wherein the electronic structure 2a has a first side 21a and a second side 21b opposite to each other, and a plurality of conductive bumps 211, 222 electrically connected to the conductive through-holes 210 and / or the circuit part 22 can be formed on the first side 21a and / or the second side 21b as required. It should be understood that the electronic structure 2a can use the side of the electronic body 21 as the first side 21a or the second side 21b as required, and the side of the circuit part 22 as the other side, without special limitation.

[0083] In this embodiment, the conductive through hole 210 is a conductive through-silicon via (TSV), and the conductive bumps 211, 222 are metal bumps such as copper bumps, and the circuit portion 22 includes at least one insulating layer 220 and a conductive trace 221 combined with the insulating layer 220, so that the conductive trace 221 electrically connects the conductive through hole 210 and the conductive bump 222.

[0084] Furthermore, the conductive bumps 211 are covered by a protective layer 212 on the first side 21a, and the conductive bumps 222 are covered by a bonding layer 29 on the second side 21b, and the bonding layer 29 includes a first bonding material 291 and a second bonding material 292 adjacent to each other. For example, the protective layer 212 is a dielectric material such as polybenzoxazole (PBO), polyimide (PI), prepreg (PP), or other materials, and the first bonding material 291 is a non-conductive film (NCF), and the second bonding material 292 is a non-conductive paste (NCP).

[0085] Therefore, when the surface of the first bonding material 291 is concave-convex, the second bonding material 292 can fill the concave-convex surface of the first bonding material 291 to form a non-parallel double-layer structure and make the outer surface of the bonding layer 29 form a flat surface.

[0086] like Figure 2B As shown, at least one electronic structure 2 a and a plurality of conductive pillars 23 are disposed on a carrier 9 .

[0087] The carrier 9 is, for example, a plate of a semiconductor material (such as silicon or glass), on which a release layer 90 and a metal layer 91 such as titanium / copper are sequentially formed by, for example, coating, so as to form a carrier structure 24 on the metal layer 91, wherein the electronic structure 2a is tightly bonded to the carrier structure 24 with its bonding layer 29 facing the carrier 9, so that there is no gap between the bonding layer 29 and the carrier structure 24.

[0088] In this embodiment, the carrier structure 24 includes at least one dielectric layer 240 and a wiring layer 241 combined with the dielectric layer 240, and the wiring layer 241 and the dielectric layer 240 can be manufactured on the metal layer 91 of the carrier 9 by a redistribution layer (RDL) process. For example, the dielectric layer 240 can be formed of a material such as polybenzoxazole (PBO), polyimide (PI), prepreg (PP), or other dielectric materials.

[0089] Furthermore, the conductive bump 222 of the electronic structure 2a is electrically connected to the wiring layer 241. For example, the conductive bump 222 is connected to the wiring layer 241 through a solder material 242, and the solder material 242 is embedded in the bonding layer 29.

[0090] In addition, if the second bonding material 292 is not formed before manufacturing the electronic structure 2a, such as Figure 2B-1 As shown, after the electronic structure 2a is bonded to the supporting structure 24 with the first bonding material 291, the second bonding material 292 is filled in the gap t between the first bonding material 291 and the supporting structure 24 to form the bonding layer 29 (non-parallel double-layer structure), so that there is no gap between the bonding layer 29 and the supporting structure 24 (such as Figure 2B shown).

[0091] The conductive pillars 23 are disposed on the supporting structure 24 and electrically connected to the wiring layer 241 .

[0092] In this embodiment, the conductive pillars 23 are formed of a metal material such as copper or a solder material. For example, the conductive pillars 23 are formed by electroplating on the wiring layer 241 through an exposure and development process.

[0093] like Figure 2C As shown, a coating layer 25 is formed on the supporting structure 24 so that the coating layer 25 covers the electronic structure 2a and the conductive pillars 23, and the top surface of the protection layer 212, the end surface 211a of the conductive bump 211 and the end surface 23a of the conductive pillar 23 are exposed from the surface 25a of the coating layer 25.

[0094] In this embodiment, the coating layer 25 is an insulating material, such as polyimide (PI), dry film, packaging colloid or molding compound such as epoxy. For example, the coating layer 25 can be formed on the supporting structure 24 by liquid compound, injection, lamination or compression molding.

[0095] Furthermore, a flattening process may be performed to make the surface 25a of the cladding layer 25 flush with the top surface of the protection layer 212, the end surface 23a of the conductive pillar 23, and the end surface 211a of the conductive bump 211, so that the end surface 23a of the conductive pillar 23 and the end surface 211a of the conductive bump 211 are exposed from the surface 25a of the cladding layer 25. For example, the flattening process removes part of the material of the protection layer 212, part of the material of the conductive pillar 23, part of the material of the conductive bump 211, and part of the material of the cladding layer 25 by grinding.

[0096] like Figure 2D As shown, a circuit structure 20 is formed on the cladding layer 25 so that the circuit structure 20 electrically connects the plurality of conductive pillars 23 and the plurality of conductive bumps 211 .

[0097] In this embodiment, the circuit structure 20 includes at least one insulating layer 200 and a circuit layer 201 disposed on the insulating layer 200, such as a circuit redistribution layer (RDL) specification, so that the circuit layer 201 is electrically connected to the multiple conductive pillars 23 and the multiple conductive bumps 211, wherein the outermost insulating layer 200 can be used as a solder mask, and the outermost circuit layer 201 is exposed to the solder mask, so that it is used as an electrical contact pad 202, such as a micro pad (commonly known as μ-pad).

[0098] Furthermore, the material forming the circuit layer 201 is copper, and the material forming the insulating layer 200 is a dielectric material such as polybenzoxazole (PBO), polyimide (PI), prepreg (PP), etc., or a solder mask material such as green paint and ink.

[0099] like Figure 2E As shown, a plurality of electronic components 26 are disposed on the circuit structure 20 , and then a packaging layer 28 is used to cover the electronic components 26 .

[0100] The electronic component 26 is an active component, a passive component or a combination of the two. The active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor.

[0101] In this embodiment, the electronic component 26 is, for example, a semiconductor chip such as a graphics processing unit (GPU) or a high bandwidth memory (HBM), and the electronic structure 2a serves as a bridge die, which is electrically connected to the circuit structure 20 through the conductive bumps 211, thereby electrically bridging at least two of the electronic components 26.

[0102] Furthermore, the electronic component 26 can be electrically connected to the electrical contact pad 202 by a plurality of conductive bumps 261 and / or solder material 260 in a flip-chip manner; or, the electronic component 26 can be electrically connected to the electrical contact pad 202 by a plurality of bonding wires (not shown) in a wire bonding manner; or even, the electronic component 26 can be electrically in contact with the electrical contact pad 202. However, the manner in which the electronic component 26 is electrically connected to the circuit layer 201 is not limited to the above.

[0103] The packaging layer 28 is an insulating material, such as polyimide (PI), dry film, packaging colloid such as epoxy, or molding compound, which can be formed on the circuit structure 20 by lamination or molding. It should be understood that the material forming the packaging layer 28 can be the same as or different from the material of the covering layer 25.

[0104] In this embodiment, the primer 262 may be formed between the electronic component 26 and the circuit structure 20 to cover the conductive bumps 261 and the solder material 260, and then the packaging layer 28 may be formed to cover the primer 262 and the electronic component 26. Alternatively, in other embodiments, the packaging layer 28 may cover the electronic components 26 and the conductive bumps 261 at the same time without forming the primer 262.

[0105] like Figure 2F As shown, the carrier 9 and the release layer 90 thereon are removed, and then the metal layer 91 is removed to expose the carrier structure 24 .

[0106] In this embodiment, when peeling off the release layer 90, the metal layer 91 is used as a barrier to avoid damaging the supporting structure 24. After removing the supporting member 9 and the release layer 90 thereon, the metal layer 91 is removed by etching to expose the supporting structure 24 (even the wiring layer 241).

[0107] like Figure 2G As shown, along Figure 2F The cutting path L shown is used for a singulation process to obtain an electronic package 2 and form a plurality of conductive elements 27 on the supporting structure 24 so that the conductive elements 27 are electrically connected to the wiring layer 241 so that the electronic package 2 can be arranged on an electronic device such as a packaging substrate or a circuit board (not shown) through the conductive elements 27.

[0108] In this embodiment, the conductive element 27 includes a metal bump 270 such as copper and a solder material 271 formed on the metal bump 270. For example, an under bump metallization (UBM) 272 may be formed on the wiring layer 241 to facilitate the bonding of the metal bump 270. It should be understood that when the number of the contacts (IO) is insufficient, a layer increase operation can still be performed through the RDL process to reconfigure the number and position of the IOs of the supporting structure 24.

[0109] Therefore, the manufacturing method of the first embodiment of the electronic package 2 of the present invention is mainly through the configuration of the second bonding material 292, so that when the first bonding material 291 is deformed during the manufacturing process or even when the center thickness is thin, the second bonding material 292 can fill the deformed part of the first bonding material 291. Therefore, compared with the prior art, no void will be generated between the bonding layer 29 and the supporting structure 24 after the two are joined, so that the electronic structure 2a and the supporting structure 24 can be completely sealed, thereby avoiding the problem of water vapor infiltration, so that popcorn phenomenon will not easily occur in the subsequent process, thereby improving the product yield.

[0110] FIG. 3A to FIG. 3D The cross-sectional view of the manufacturing method of the second embodiment of the electronic package 3 of the present invention is shown in FIG. The difference between this embodiment and the first embodiment lies in the way of setting the electronic structure 2a on the supporting structure 34. The other processes are substantially the same, so the same parts will not be described again.

[0111] like Figure 3A As shown, refer to the aforementioned Figure 2A , Figure 2B or Figure 2B-1 In the disclosed process, the electronic structure 2 a is bonded to the dielectric layer 240 of the supporting structure 34 via the bonding layer 29 , wherein the conductive bumps 222 are bonded to the dielectric layer 240 but are not electrically connected to the wiring layer 241 .

[0112] like Figure 3B As shown, similar to the above FIG. 2C to FIG. 2E The process shown is used to form the encapsulation layer 25 , the circuit structure 20 , the electronic components 26 , and the packaging layer 28 .

[0113] like Figure 3C As shown, the carrier 9 and the release layer 90 thereon are removed, and then the metal layer 91 is removed to expose the carrier structure 34. Next, a plurality of openings 340 are formed on the dielectric layer 240 of the carrier structure 34 to expose the plurality of conductive bumps 222 in the plurality of openings 340.

[0114] In this embodiment, the opening 340 may be formed by laser or other methods without particular limitation.

[0115] like Figure 3D As shown in FIG. 1 , a wiring layer 341 electrically connected to the conductive bumps 222 is formed in each of the openings 340. Figure 3C The cutting path L shown is used for a singulation process and forms a plurality of conductive elements 27 on the supporting structure 34 , so that the conductive elements 27 are electrically connected to the wiring layers 241 , 341 .

[0116] FIG. 4A to FIG. 4DThe third embodiment of the present invention is a cross-sectional view of the manufacturing method of the electronic package 4. The difference between this embodiment and the second embodiment is the way of setting the electronic structure 2a on the supporting structure 44. The other processes are substantially the same, so the same parts will not be repeated.

[0117] like Figure 4A As shown, refer to the aforementioned Figure 2A , Figure 2B or Figure 2B-1 In the disclosed process, a groove 440 is formed on the dielectric layer 240 of the supporting structure 44 , so that the metal layer 91 of the supporting member 9 is exposed in the groove 440 .

[0118] like Figure 4B As shown, the electronic structure 2 a is placed in the groove 440 , so that the bonding layer 29 is bonded to the metal layer 91 .

[0119] In this embodiment, the conductive bump 222 may or may not contact the metal layer 91 as required.

[0120] like Figure 4C As shown, similar to the above FIG. 2C to FIG. 2E The process shown is used to form the encapsulation layer 25 , the circuit structure 20 , the electronic components 26 , and the packaging layer 28 .

[0121] like Figure 4D As shown, the carrier 9 and the release layer 90 thereon are removed, and then the metal layer 91 is removed to expose the carrier structure 44 and the electronic structure 2 a.

[0122] In this embodiment, the conductive bump 222 of the electronic structure 2a and the bonding layer 29 are exposed on the surface of the dielectric layer 240 of the supporting structure 44. For example, the outer surfaces of the conductive bump 222 and the bonding layer 29 are flush with the outer surface of the dielectric layer 240 of the supporting structure 44 (or the bottom surface of the groove 440 of the supporting structure 44).

[0123] like Figure 4E As shown, along Figure 4D The cutting path L shown is used for singulation process and forms a plurality of conductive elements 27 on the electronic structure 2 a and the supporting structure 34 , so that the conductive elements 27 are electrically connected to the conductive bumps 222 of the electronic structure 2 a and the wiring layer 241 of the supporting structure 44 .

[0124] In addition, in this embodiment, a planarization process such as grinding may be used to remove part of the material of the packaging layer 28 so that the upper surface of the packaging layer 28 is flush with the upper surface of the electronic component 26 , so that the electronic component 26 is exposed outside the packaging layer 28 .

[0125] The present invention provides an electronic package 2, 3, 4, comprising: a supporting structure 24, 34, 44, an electronic structure 2a, a plurality of conductive pillars 23, a coating layer 25 and a circuit structure 20.

[0126] The electronic structure 2 a is tightly combined with the supporting structures 24 , 34 , 44 via a combining layer 29 , wherein the combining layer 29 includes a first combining material 291 and a second combining material 292 adjacent to each other.

[0127] The conductive pillars 23 are disposed on the supporting structures 24 , 34 , 44 and are electrically connected to the supporting structures 24 , 34 , 44 .

[0128] The coating layer 25 is disposed on the supporting structures 24 , 34 , 44 to coat the electronic structure 2 a and the conductive pillar 23 .

[0129] The circuit structure 20 is disposed on the cladding layer 25 and electrically connects the electronic structure 2 a and the conductive pillar 23 .

[0130] In one embodiment, the supporting structure 24 , 34 , 44 includes at least one dielectric layer 240 and wiring layers 241 , 341 combined with the dielectric layer 240 , so that the wiring layers 241 , 341 are electrically connected to the electronic structure 2 a .

[0131] In one embodiment, the electronic structure 2a has a plurality of conductive bumps 222 embedded in the bonding layer 29, and a plurality of openings 340 corresponding to the conductive bumps 222 are formed on the supporting structure 34. For example, a wiring layer 341 electrically connected to the conductive bumps 222 is formed in the opening 340.

[0132] In one embodiment, the supporting structure 44 has a groove 440 for accommodating the electronic structure 2 a.

[0133] In one embodiment, the electronic structure 2 a is electrically connected to the circuit structure 20 via a plurality of conductive bumps 211 .

[0134] In one embodiment, the first bonding material 291 is a non-conductive film.

[0135] In one embodiment, the second bonding material 292 is a non-conductive adhesive.

[0136] In one embodiment, at least one electronic component 26 is disposed on and electrically connected to the circuit structure 20 .

[0137] In one embodiment, the electronic packages 2 , 3 , 4 further include a plurality of electronic components 26 disposed on the circuit structure 20 and electrically connected to the circuit structure 20 , so that the electronic structure 2 a electrically bridges at least two of the plurality of electronic components 26 .

[0138] In summary, the electronic package and its manufacturing method of the present invention fill the deformed part of the first bonding material with the second bonding material to ensure that no voids are generated between the bonding layer and the supporting structure after the two are joined. Therefore, the electronic structure and the supporting structure can be completely sealed, thereby avoiding the problem of water vapor infiltration, so that the popcorn phenomenon will not easily occur in the subsequent process, thereby improving the product yield.

[0139] The above embodiments are only used to illustrate the principles and technical effects of the present invention, and are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the inventive concept and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. An electronic package, comprising: load-bearing structure; An electronic structure tightly combined with the supporting structure through a combining layer, wherein the combining layer comprises a first combining material and a second combining material adjacent to each other to form a non-parallel double-layer structure; A conductive column, which is disposed on the supporting structure and electrically connected to the supporting structure; a coating layer disposed on the supporting structure to cover the electronic structure and the conductive column; and The circuit structure is arranged on the cladding layer and electrically connects the electronic structure and the conductive column.

2. The electronic package according to claim 1, wherein: The supporting structure includes a dielectric layer and a wiring layer combined with the dielectric layer, so that the wiring layer is electrically connected to the electronic structure.

3. The electronic package of claim 1, wherein: The electronic structure has a plurality of conductive bumps embedded in the bonding layer, and a plurality of openings corresponding to the conductive bumps are formed on the supporting structure.

4. The electronic package as claimed in claim 3, wherein: A wiring layer electrically connected to the conductive bump is formed in the opening.

5. The electronic package of claim 1, wherein: The supporting structure has a groove for accommodating the electronic structure.

6. The electronic package of claim 1, wherein: The electronic structure is electrically connected to the circuit structure through a plurality of conductive bumps.

7. The electronic package of claim 1, wherein: The first bonding material is a non-conductive film.

8. The electronic package of claim 1, wherein: The second bonding material is non-conductive glue.

9. The electronic package of claim 1, wherein: At least one electronic element is arranged on and electrically connected to the circuit structure.

10. The electronic package of claim 1, wherein: The electronic package also includes a plurality of electronic components disposed on the circuit structure and electrically connected to the circuit structure, so that the electronic structure electrically bridges at least two of the plurality of electronic components.

11. A method for manufacturing an electronic package, comprising: The electronic structure is tightly bonded to a supporting structure through a bonding layer, wherein the bonding layer comprises a first bonding material and a second bonding material adjacent to each other to form a non-parallel double-layer structure, and a conductive column electrically connected to the supporting structure is provided on the supporting structure; forming a coating layer on the supporting structure so that the coating layer covers the electronic structure and the conductive column; and A circuit structure is formed on the cladding layer, and the circuit structure is electrically connected to the electronic structure and the conductive column.

12. The method for manufacturing an electronic package according to claim 11, wherein: The supporting structure includes a dielectric layer and a wiring layer combined with the dielectric layer, so that the wiring layer is electrically connected to the electronic structure.

13. The method for manufacturing an electronic package according to claim 11, wherein: The electronic structure has a plurality of conductive bumps embedded in the bonding layer, and after the cladding layer is formed on the supporting structure, a plurality of openings corresponding to the conductive bumps are formed on the supporting structure.

14. The method for manufacturing an electronic package according to claim 13, wherein: The manufacturing method also includes forming a wiring layer in the opening to electrically connect the conductive bump.

15. The method for manufacturing an electronic package according to claim 11, wherein: The supporting structure is formed with a groove for accommodating the electronic structure.

16. The method for manufacturing an electronic package according to claim 11, wherein: The electronic structure is electrically connected to the circuit structure through a plurality of conductive bumps.

17. The method for manufacturing an electronic package according to claim 11, wherein: The first bonding material is a non-conductive film.

18. The method for manufacturing an electronic package according to claim 11, wherein: The second bonding material is non-conductive glue.

19. The method for manufacturing an electronic package according to claim 11, wherein: The manufacturing process of the bonding layer includes: forming the bonding layer on the electronic structure, and then arranging the electronic structure on the supporting structure through the bonding layer.

20. The method for manufacturing an electronic package according to claim 11, wherein: The process of manufacturing the bonding layer includes: forming the first bonding material on the electronic structure, placing the electronic structure on the supporting structure through the first bonding material, and then filling the gap between the first bonding material and the supporting structure with the second bonding material to form the bonding layer.

21. The method for manufacturing an electronic package according to claim 11, wherein: At least one electronic element is arranged on and electrically connected to the circuit structure.

22. The method for manufacturing an electronic package according to claim 11, wherein: The manufacturing method further includes arranging a plurality of electronic components on the circuit structure and electrically connecting the circuit structure so that the electronic structure electrically bridges at least two of the plurality of electronic components.

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