MOSFET device made of SiC material

Abstract

A drain electrode is located at the bottommost part, a substrate is arranged above the drain electrode, the substrate is a heavily-doped N-type SiC substrate, highly-doped SiC of the substrate and metal tungsten of the drain electrode form ohmic contact, an epitaxial layer is located above the substrate and made of an N-type doped SiC material, the doping concentration of the epitaxial layer is lower than that of the substrate, the epitaxial layer comprises a P region, and the P region is located at the bottom of the epitaxial layer. The P region is formed by ion implantation of a P-type doped SiC belt in an N-type doped epitaxial layer, so that a PN junction is formed between the P-type doped SiC belt and the N-type doped SiC of the epitaxial layer, the P-type doped SiC belt in the epitaxial layer is arranged at a position 5 [mu] m above the substrate, two P-type doped base regions are symmetrically arranged above the P region, a P + source region and an N + source region are symmetrically arranged above the two P-type doped base regions, and the P + source region and the N + source region are symmetrically arranged above the N + source region. The SiC MOSFET has the advantages of being small in size, resistant to high voltage and high temperature, fast in switching, low in on resistance and low in loss, and is mainly applied to a new energy automobile standard-level SiC MOSFET with high performance and high gate oxide reliability.

Description

Technical Field

[0001] The present invention relates to the field of new energy technology, and in particular to a MOSFET device made of SiC material. Background Art

[0002] In recent years, environmental degradation and energy shortages have gradually become major challenges facing countries around the world. my country has proposed the "dual carbon" goal and introduced many powerful policies for energy conservation and emission reduction, which has accelerated the development of the new energy market and promoted the research and development of power electronic devices related to new energy vehicles. As the core part of power electronic devices, power semiconductor devices play a key role. At present, the mainstream use is silicon-based power devices, but with the research and development of process technology, silicon-based power devices have approached their physical limits and are difficult to meet the needs in terms of high voltage, high conversion efficiency, and high power density. Therefore, it is urgent to develop a MOSFET device made of SiC material to solve the above technical problems.

[0003] In view of this, the present invention is proposed. Summary of the invention

[0004] The purpose of the present invention is to provide a MOSFET device made of SiC material, which has the advantages of small size, high voltage resistance, high temperature resistance, fast switching, low on-resistance and low loss. It is mainly used in high-performance, high gate oxide reliability SiC MOSFET of new energy vehicle grade, has broad application prospects, and is conducive to popularization and application.

[0005] In order to achieve the above object, the present invention provides a MOSFET device made of SiC material, including a drain, a substrate and an epitaxial layer, wherein the drain is located at the bottom and serves as a terminal for outputting current of the MOSFET device, and the material is metal tungsten. A substrate is provided above the drain, and the substrate is a heavily doped N-type SiC substrate with a thickness of 1 μm and a doping concentration of 5×10 19 cm -3 The highly doped SiC of the substrate forms an ohmic contact with the metal tungsten of the drain. The epitaxial layer is located above the substrate and is made of N-type doped SiC material, which is lower than the doping concentration of the substrate. The doping concentration of the drift region is 2×10 15 cm -3 , with a thickness of 18 μm. The epitaxial layer includes a P region, wherein a P-type doped SiC strip is ion-implanted into the N-type doped epitaxial layer to form a PN junction with the N-type doped SiC of the epitaxial layer. The P-type doped SiC strip in the epitaxial layer is located 5 μm above the substrate, has a thickness of 3 μm, and a doping concentration of 1×10 16 cm -3Two P-type doped base regions are symmetrically arranged above the P region to form a conductive channel, with a thickness of 1.8 μm and a width of 5 μm. P + Source region and N + Source region, the N + The source region is located inside, the P + The source region is located in N + Outside the source region, the P + The source region has a thickness of 1 μm and a width of 2 μm. + The source region has a thickness of 1 μm and a width of 3 μm, a portion of which forms an ohmic contact with the electrode metal. Two polysilicon regions are symmetrically arranged between the two P-type doped base regions. The polysilicon regions are deposited with N-type heavily doped polysilicon as the device gate. The polysilicon regions are columnar, with a thickness of 2.5 μm and a width of 1 μm. The columnar polysilicon region is lower than the P-type doped base region. The P + A source electrode is arranged above the source region, and the materials of the source electrode and the gate electrode are both made of metal molybdenum.

[0006] Preferably, the ion implantation of the epitaxial layer P region is completed after the epitaxial layer is grown and before other processes, and the ion implantation concentration is higher than the doping concentration of the epitaxial layer itself to avoid process waste and reduce the difficulty of the ion implantation process.

[0007] Preferably, the drain is made by a sputtering process.

[0008] Preferably, the epitaxial layer is grown using an epitaxial growth process on a highly doped, low-resistance substrate, and a homogeneous epitaxial growth process is used to reduce the difficulty of the device manufacturing process.

[0009] Preferably, two P-type doped base regions are formed on the N-type doped epitaxial layer by using an ion implantation process.

[0010] Preferably, the P + The source region is ion implanted in N + Ion implantation P between the source region and the P-type doped base region + The source region realizes a P-type heavily doped SiC region.

[0011] Preferably, the N + The source region is made into an N-type heavily doped SiC region by ion implantation.

[0012] Preferably, the source and the gate are made by sputtering or evaporation process.

[0013] Preferably, the polysilicon region is manufactured by a chemical vapor deposition process.

[0014] A MOSFET device made of SiC material provided by the present invention has the following beneficial effects.

[0015] 1. SiC material has a wider bandgap, which is three times that of Si material. A large bandgap can reduce the intrinsic carrier concentration of the material (about 20 orders of magnitude smaller than Si at room temperature). A large intrinsic carrier concentration will affect the normal operation of the device under high temperature and high radiation. A large bandgap means that valence band electrons need to absorb more energy to transition from the valence band to the conduction band, reducing the intrinsic excitation of the material and allowing the device to work more stably.

[0016] 2. SiC material has a higher electron saturation drift velocity, which enables it to perform better in high-power applications. The electron saturation drift velocity directly affects the frequency characteristics of the device. A high electron saturation drift velocity helps the reverse recovery of the device, which can improve the frequency characteristics of the device and enable the device to gain advantages in high-frequency applications.

[0017] 3. SiC material has a higher critical breakdown electric field, which is about 10 times that of Si devices. The critical breakdown electric field is an important parameter for evaluating the withstand voltage level of a device. A higher critical breakdown electric field of a material can improve the withstand voltage of the device and reduce the length of the drift region of the device under the same withstand voltage, thereby reducing the on-resistance of the device and unnecessary energy loss. Therefore, compared with silicon-based devices, devices made of SiC materials have lower on-resistance under the same withstand voltage.

[0018] 4. SiC material has higher thermal conductivity, which is expressed as the heat dissipation performance of the material. The higher the thermal conductivity, the better the heat dissipation performance of the material. High thermal conductivity enables SiC to work in a higher temperature environment, which can avoid the failure of SiC material due to excessive temperature. At the same time, it can reduce the proportion of heat dissipation devices in power electronic systems, reduce costs, and facilitate system integration. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic structural diagram of a MOSFET device made of SiC material provided by the present invention. DETAILED DESCRIPTION

[0020] The present invention is further described below in conjunction with specific embodiments and drawings to help understand the content of the present invention.

[0021] like Figure 1The figure shows a schematic diagram of the structure of a MOSFET device made of SiC material provided by the present invention. The MOSFET device made of SiC material includes a drain, a substrate and an epitaxial layer. The drain is located at the bottom and serves as the terminal for outputting current of the MOSFET device. The material is metal tungsten, which has the advantages of high melting point, good thermal stability and electrical conductivity, and is well adapted to the present device. The drain adopts a tungsten metal sputtering process to form a good ohmic contact. A substrate is provided above the drain. The substrate is the most basic material for preparing power devices. All necessary processes for epitaxial growth must be carried out on the substrate. The substrate is a heavily doped N-type SiC substrate with a thickness of 1 μm and a doping concentration of 5×10 19 cm -3 The highly doped SiC of the substrate forms an ohmic contact with the metal tungsten of the drain. The epitaxial layer is located above the substrate and is made of N-type doped SiC material. The doping concentration is lower than that of the substrate. Because the epitaxial layer is the main pressure-bearing area of ​​the MOSFET device, it is required to have a higher resistivity so that the device can obtain a higher breakdown voltage. The doping concentration of the drift region is 2×10 15 cm -3 , with a thickness of 18 μm. The epitaxial layer includes a P region, in which a P-type doped SiC strip is ion-implanted into the N-type doped epitaxial layer to form a PN junction with the N-type doped SiC of the epitaxial layer, further improving the breakdown voltage of the device and the withstand voltage of the device. The P-type doped SiC strip in the epitaxial layer is located 5 μm above the substrate, with a thickness of 3 μm and a doping concentration of 1×10 16 cm -3 Two P-type doped base regions are symmetrically arranged above the P region to form a conductive channel, with a thickness of 1.8 μm and a width of 5 μm. P + Source region and N + Source region, the N + The source region is located inside, the P + The source region is located in N + Outside the source region, the P + The source region has a thickness of 1 μm and a width of 2 μm to prevent parasitic BJT in the MOSFET device and prevent the device from being turned on by mistake. +The source region is 1 μm thick and 3 μm wide, a portion of which forms an ohmic contact with the electrode metal. Two polysilicon regions are symmetrically arranged between the two P-type doped base regions. The polysilicon region uses N-type heavily doped polysilicon deposition as the device gate. Compared with other materials, polysilicon is easier to chemically vapor deposit, can be made thinner, and has better performance. The polysilicon region is columnar and is made using a chemical vapor deposition process. It is 2.5 μm thick and 1 μm wide. The polysilicon region is lower than the P-type doped base region, which increases the JFET area formed inside the device and improves the overall performance of the device. The P + A source electrode is arranged above the source region, and the materials of the source electrode and the gate electrode are both made of metal molybdenum.

[0022] The ion implantation of the P region of the epitaxial layer is completed after the epitaxial layer is grown and before other processes, and the ion implantation concentration is higher than the doping concentration of the epitaxial layer itself to avoid process waste and reduce the difficulty of ion implantation. The drain is made by sputtering. The epitaxial layer is grown by epitaxial growth on a highly doped, low-resistance substrate, and a homogeneous epitaxial growth process is used to reduce the difficulty of the device manufacturing process. Two P-type doped base regions are formed by ion implantation above the N-type doped epitaxial layer. The P + The source region is ion implanted in N + Ion implantation P between the source region and the P-type doped base region + The source region realizes a P-type heavily doped SiC region. + The source region is made of N-type heavily doped SiC by ion implantation. The source and gate are made by sputtering or evaporation.

[0023] The present invention conducts in-depth research on the main material selection and structural optimization of SiC MOSFET devices. By using metal tungsten as the drain, heavily doped N-type SiC substrate, and N-type doped SiC epitaxial layer, the performance parameters of the device such as breakdown voltage and on-resistance are successfully improved. In the epitaxial layer, PN junctions and conductive channels are formed by ion implantation of P-type doped SiC strips and P-type doped base regions, further improving the voltage resistance of the device and preventing the parasitic BJT from being turned on by mistake. In addition, the device structure is optimized and the overall performance is improved by using N-type and P-type heavily doped source regions and N-type heavily doped polysilicon gates. Finally, metal molybdenum is selected as the source and gate materials, and is made by sputtering or evaporation process to ensure the stability and reliability of the device. In general, the present invention has achieved remarkable results in improving the performance of SiC MOSFET devices.

[0024] SiC material has a wider bandgap, which is three times that of Si material. A large bandgap can reduce the intrinsic carrier concentration of the material (about 20 orders of magnitude smaller than Si at room temperature). A large intrinsic carrier concentration will affect the normal operation of the device under high temperature and high radiation. A large bandgap means that valence band electrons need to absorb more energy to transition from the valence band to the conduction band, reducing the intrinsic excitation of the material and allowing the device to work more stably. SiC material has a higher electron saturation drift velocity, which allows it to perform better in high-power applications. The electron saturation drift velocity directly affects the frequency characteristics of the device. A high electron saturation drift velocity helps the reverse recovery of the device, which can improve the frequency characteristics of the device and enable the device to gain advantages in high-frequency applications. SiC material has a higher critical breakdown electric field, which is about 10 times that of Si devices. The critical breakdown electric field is an important parameter for evaluating the voltage resistance level of a device. A higher critical breakdown electric field of a material can improve the voltage resistance of the device and reduce the length of the drift region of the device under the same voltage resistance, thereby reducing the on-resistance of the device and unnecessary energy loss. Therefore, compared with silicon-based devices, devices made of SiC materials have lower on-resistance under the same voltage resistance. SiC material has a higher thermal conductivity, which is expressed as the heat dissipation performance of the material. The higher the thermal conductivity, the better the heat dissipation performance of the material. High thermal conductivity allows SiC to work in a higher temperature environment, which can avoid the failure of SiC materials due to excessive temperature. At the same time, it can reduce the proportion of heat dissipation devices in power electronic systems, reduce costs, and facilitate system integration.

[0025] The invention concept is described in detail using specific examples herein, and the description of the above embodiments is only used to help understand the core idea of ​​the invention. It should be pointed out that any obvious modification, equivalent substitution or other improvement made by a person of ordinary skill in the art without departing from the invention concept should be included in the protection scope of the present invention.

Claims

1. A MOSFET device made of SiC material, characterized in that: The device comprises a drain, a substrate and an epitaxial layer. The drain is located at the bottom and serves as the terminal for outputting current of the MOSFET device. The material is metal tungsten. A substrate is disposed above the drain. The substrate is a heavily doped N-type SiC substrate with a thickness of 1 μm and a doping concentration of 5×10 19 cm -3 The highly doped SiC of the substrate forms an ohmic contact with the metal tungsten of the drain. The epitaxial layer is located above the substrate and is made of N-type doped SiC material, which is lower than the doping concentration of the substrate. The doping concentration of the drift region is 2×10 15 cm -3 , with a thickness of 18 μm. The epitaxial layer includes a P region, wherein a P-type doped SiC strip is ion-implanted into the N-type doped epitaxial layer to form a PN junction with the N-type doped SiC of the epitaxial layer. The P-type doped SiC strip in the epitaxial layer is located 5 μm above the substrate, has a thickness of 3 μm, and a doping concentration of 1×10 16 cm -3 Two P-type doped base regions are symmetrically arranged above the P region to form a conductive channel, with a thickness of 1.8 μm and a width of 5 μm. P + Source region and N + Source region, the N + The source region is located inside, the P + The source region is located in N + Outside the source region, the P + The source region has a thickness of 1 μm and a width of 2 μm. + The source region has a thickness of 1 μm and a width of 3 μm, a portion of which forms an ohmic contact with the electrode metal. Two polysilicon regions are symmetrically arranged between the two P-type doped base regions. The polysilicon regions are deposited with N-type heavily doped polysilicon as the device gate. The polysilicon regions are columnar, with a thickness of 2.5 μm and a width of 1 μm. The columnar polysilicon region is lower than the P-type doped base region. The P + A source electrode is arranged above the source region, and the materials of the source electrode and the gate electrode are both made of metal molybdenum.

2. A MOSFET device made of SiC material according to claim 1, characterized in that: The ion implantation of the epitaxial layer P region is completed after the epitaxial layer is grown and before other processes, and the ion implantation concentration is higher than the doping concentration of the epitaxial layer itself, so as to avoid process waste and reduce the difficulty of the ion implantation process.

3. A MOSFET device made of SiC material according to claim 2, characterized in that: The drain is manufactured by a sputtering process.

4. A MOSFET device made of SiC material according to claim 3, characterized in that: The epitaxial layer adopts an epitaxial growth process on a highly doped, low-resistance substrate, and adopts a homogeneous epitaxial growth process to reduce the difficulty of the device manufacturing process.

5. A MOSFET device made of SiC material according to claim 4, characterized in that: Two P-type doped base regions are formed on the N-type doped epitaxial layer by using an ion implantation process.

6. A MOSFET device made of SiC material according to claim 5, characterized in that: The P + The source region is ion implanted in N + Ion implantation P between the source region and the P-type doped base region + The source region realizes a P-type heavily doped SiC region.

7. A MOSFET device made of SiC material according to claim 6, characterized in that: The N + The source region is made into an N-type heavily doped SiC region by ion implantation.

8. A MOSFET device made of SiC material according to claim 7, characterized in that: The source and the gate are made by sputtering or evaporation process.

9. A MOSFET device made of SiC material according to claim 8, characterized in that: The polysilicon region is manufactured by using a chemical vapor deposition process.

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