A four-terminal all-silicon-based multi-junction solar cell and a preparation method thereof
By adopting a four-end all-silicon-based multi-junction structure in solar cells, all electrodes are placed on the back, the light-shading damage and stress problems caused by uneven electrode distribution in existing stacked batteries are solved, and the stability and performance of the battery are improved by removing perovskite batteries.
Patent Information
- Application Number
- CN202510386670.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-31
- Publication Date
- 2025-06-17
- Estimated Expiration
- 2045-03-31
AI Technical Summary
The existing stacked solar cells have light-shielding damage and stress problems caused by uneven electrode distribution in the structural design, and the stability of perovskite batteries is poor, which affects the reliability of the batteries.
It adopts a four-end all-silicon-based multi-junction solar cell design, and all electrodes are located on the back of the battery, avoiding light-shading damage on the front of the battery, and improving the stability of the battery through a full-silicon-based structure.
It effectively reduces the damage to the front of the battery, improves the battery performance and yield, and improves the overall stability of the battery by removing perovskite batteries.
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Figure CN119922989B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of solar cells, and in particular to a four-terminal all-silicon-based multi-junction solar cell and a preparation method thereof. Background Art
[0002] Tandem cells are a type of multi-junction solar cells newly developed in recent years. Currently, this type of cell is composed of a tandem structure of a perovskite cell and a crystalline silicon cell. For example, Patent CN118414005A discloses a perovskite-crystalline silicon tandem cell. Its top is a perovskite cell, and the bottom is a crystalline silicon cell. Compared with other solar cells, tandem cells have higher conversion efficiency, so they have been relatively popular in recent years. However, the tandem cell composed of a perovskite cell and a crystalline silicon cell also has some disadvantages.
[0003] First, due to the limitations of the structural design, the current tandem cells usually have electrodes on both the front and back of the cell. On the one hand, the presence of a negative electrode on the front not only reduces light shielding damage, but also limits the further improvement of cell performance. On the other hand, when a single cell is connected in series to form a cell module, it must be connected in a Z-shaped series connection in an up-and-down alternating manner. In this connection method, the connecting wires will penetrate between adjacent silicon wafers, and the up-and-down interaction between the connecting wires and the edges of the silicon wafers will cause large stress on the silicon wafers, resulting in easy damage and low yield.
[0004] Secondly, compared with crystalline silicon cells, perovskite cells have the problem of poor stability, which poses a huge challenge to the overall reliability of the cell. Summary of the Invention
[0005] In order to solve the above technical problems, the present invention provides a four-terminal all-silicon-based multi-junction solar cell and a preparation method thereof. First, in the four-terminal all-silicon-based multi-junction solar cell of the present invention, all the electrodes are located on the back, which can not only effectively reduce light shielding damage, is beneficial to improving cell performance, but also avoid damage caused by connecting wires passing through the gaps between adjacent cells after a single cell is connected in series to form a cell module, and improve the yield. Secondly, the multi-junction solar cell of the present invention is an all-silicon-based cell and does not contain a perovskite cell, so the overall stability of the cell is better.
[0006] The specific technical solution of the present invention is as follows:
[0007] In a first aspect, the present invention provides a four-terminal all-silicon-based multi-junction solar cell, which includes:
[0008] An N-type silicon substrate, a pyramid texture surface and a passivation film sequentially arranged on the front of the N-type silicon substrate, and a positive electrode region A, a negative electrode region A, a positive electrode region B and a negative electrode region B arranged on the back of the N-type silicon substrate and arranged in a staggered manner;
[0009] The positive electrode region A includes an inner boron diffusion layer, a phosphorus diffusion layer, an outer boron diffusion layer, and a passivation film that are sequentially disposed on the back surface of the N-type silicon substrate, and a positive electrode that is disposed on the surface of the outer boron diffusion layer and penetrates the passivation film;
[0010] The negative electrode region A is adjacent to the positive electrode region A and includes an inner boron diffusion layer, a phosphorus diffusion layer, and a passivation film that are sequentially disposed on the back surface of the N-type silicon substrate, and a negative electrode that is disposed on the surface of the phosphorus diffusion layer and penetrates the passivation film;
[0011] The positive electrode region B is adjacent to the negative electrode region A and includes an inner boron diffusion layer and a passivation film that are sequentially disposed on the back surface of the N-type silicon substrate, and a positive electrode that is disposed on the surface of the inner boron diffusion layer and penetrates the passivation film;
[0012] The negative electrode region B is adjacent to the positive electrode region B and includes a passivation film disposed on the back surface of the N-type silicon substrate, and a negative electrode disposed on the back surface of the N-type silicon substrate and penetrating the passivation film.
[0013] The characteristics of the above four-terminal all-silicon-based multi-junction solar cell of the present invention are as follows:
[0014] (1) Through structural optimization, all electrodes are disposed on the back surface of the battery. Such a design can effectively reduce the shading damage on the front surface of the battery, which is beneficial to improving the battery performance on the one hand; on the other hand, when connecting single cells in series to form a battery module, it can avoid the damage caused by the connection wires passing through the gaps between adjacent cells, thereby improving the yield.
[0015] (2) The multi-junction solar cell of the present invention is an all-silicon-based cell without perovskite cells, so the problem of poor overall stability of the battery brought by perovskite cells can be avoided.
[0016] (3) Due to the existence of two positive electrodes and negative electrodes in the four-terminal stacked cell, the carrier transport and extraction inside the battery are more effective than those in the two-terminal cell, and the current matching problem of each part can be eliminated, and the corresponding battery process window is relatively wide.
[0017] Preferably, in terms of thickness, the positive electrode region B > the negative electrode region A > the positive electrode region A.
[0018] The present invention limits the thickness relationship of the above-mentioned regions in the above sorting, which is beneficial to further improving the battery performance: Since the boron diffusion layer has a hole (positive charge) conduction type, compared with the phosphorus diffusion layer having an electron (negative charge) conduction type, the hole conductivity is inferior to that of electrons, and during the subsequent paste sintering process, the phosphorus diffusion layer is more likely to react with the paste (more likely to gain or lose electrons) to form an Ag-Si alloy ohmic contact. In addition, the doping concentration of the inner boron diffusion layer (positive electrode region B) < the doping concentration of the phosphorus diffusion layer (negative electrode region A) < the doping concentration of the outer boron diffusion layer (positive electrode region A). The higher the doping concentration of the diffusion layer, the more the number of free moving carriers inside it, resulting in stronger conductivity. In order to balance the carrier transport and extraction performance between different diffusion layers, the thickness of the inner boron diffusion layer (positive electrode region B) needs to be larger, while the thickness of the phosphorus diffusion layer (negative electrode region A) needs to be smaller. In addition, since the outer boron diffusion layer is on the outermost surface of the battery, the carrier transport distance is shorter than the distance for the carriers in the inner boron diffusion layer and the phosphorus diffusion layer to reach the electrode. Therefore, the thickness of the outer boron diffusion layer (positive electrode region A) can be the thinnest, making the thickness of each layer in the positive electrode region B > negative electrode region A > positive electrode region A.
[0019] Preferably, in terms of width, the negative electrode region B > the positive electrode region B > the negative electrode region A > the positive electrode region A.
[0020] Regarding the width of each layer, since the doping concentration of the N-type silicon substrate (negative electrode region B) < the doping concentration of the inner boron diffusion layer (positive electrode region B) < the doping concentration of the phosphorus diffusion layer (negative electrode region A) < the doping concentration of the outer boron diffusion layer (positive electrode region A), it results in the above-mentioned differences in the number of free moving carriers in each layer actually. In order to match the current collection performance of each doping layer (during the subsequent screen printing process), initially in terms of width, the negative electrode region B > the positive electrode region B > the negative electrode region A > the positive electrode region A.
[0021] Preferably, the boron concentration in the inner boron diffusion layer is lower than the phosphorus concentration in the phosphorus diffusion layer, and the phosphorus concentration in the phosphorus diffusion layer is lower than the boron concentration in the outer boron diffusion layer.
[0022] In a second aspect, the present invention provides a method for manufacturing the above-mentioned four-terminal all-silicon-based multi-junction solar cell, which includes the following steps:
[0023] S1. Double-sided polishing of the N-type silicon substrate.
[0024] S2. One-time boron diffusion on the back surface, and sequentially form an inner boron diffusion layer and a BSG layer on the back surface of the N-type silicon substrate.
[0025] After the first boron diffusion, an internal boron diffusion layer is formed on the back surface of the silicon substrate, which changes from N-type to P-type. Since the present invention requires further phosphorus doping (S5 phosphorus diffusion) and secondary boron doping (S8 secondary boron diffusion) of the internal boron diffusion layer in subsequent steps, a part of the surface layer of the internal boron diffusion layer is transformed into a phosphorus diffusion layer and a boron diffusion layer with a higher concentration; therefore, the surface boron atom doping concentration during S2 first boron diffusion needs to be relatively low (but higher than the phosphorus atom doping amount in the N-type silicon substrate itself, 1E15~1E16 cm -3 ), and the doping depth needs to be relatively deep.
[0026] S3. Remove the BSG layer on the back negative region A and the back positive region A.
[0027] After the treatment of S3, there is a BSG layer on the surfaces of the back negative region B and the back positive region B of the N-type silicon substrate, which can block the penetration of diffusion atoms into the internal boron diffusion layer during subsequent diffusion. After the BSG layer on the surfaces of the positive region A and the negative region A is removed, it is beneficial for the penetration of diffusion atoms into the internal boron diffusion layer during the subsequent diffusion process.
[0028] S4. Alkaline cleaning. Alkaline cleaning can further remove the BSG layer on the surfaces of the positive region A and the negative region A that was not completely removed in S3.
[0029] S5. Back surface phosphorus diffusion, converting the surface layer of the exposed internal boron diffusion layer into a phosphorus diffusion layer and a PSG layer.
[0030] During this phosphorus diffusion process, controlling the phosphorus atom doping concentration to be higher than the boron atom concentration of the first boron diffusion and the doping depth to be shallower than that of the first boron diffusion can transform the surface layer of the internal boron diffusion layer into a phosphorus diffusion layer. In addition, a circumferential coating (boron diffusion layer and BSG layer) will be formed on the front surface of the N-type silicon substrate after S2 first boron diffusion, which can block the penetration of diffusion atoms into the front surface of the N-type silicon substrate during this phosphorus diffusion.
[0031] S6. Remove the PSG layer on the positive region A.
[0032] After the treatment of S6, there is a PSG layer on the surface of the back negative region A of the N-type silicon substrate, which can block the penetration of boron atoms into the phosphorus diffusion layer during subsequent secondary boron diffusion. After the PSG layer on the surface of the positive region A is removed, it is beneficial for the penetration of boron atoms into the internal phosphorus diffusion layer during the subsequent secondary boron diffusion process.
[0033] S7. Alkaline cleaning. Alkaline cleaning can further remove the PSG layer on the surface of the positive region A that was not completely removed in S6.
[0034] S8. Secondary boron diffusion, converting the surface layer of the exposed phosphorus diffusion layer into an external boron diffusion layer and a BSG layer.
[0035] In this secondary boron diffusion process, the boron atom doping concentration is controlled to be higher than the phosphorus atom concentration of the phosphorus diffusion, and the doping depth is shallower than the primary boron diffusion, so that the surface layer of the exposed phosphorus diffusion layer can be transformed into an outer boron diffusion layer, thereby forming a layered alternating NPNP (double junction) structure (N-type silicon substrate-P-type inner boron diffusion layer-N-type phosphorus diffusion layer-P-type outer boron diffusion layer) on the back of the entire silicon wafer.
[0036] S9. Remove the BSG layer of the back negative electrode region B to expose the inner boron diffusion layer at the bottom.
[0037] S10, chain-removing the BSG layer plated on the front side.
[0038] S11, cleaning and texturing, to remove the inner boron diffusion layer on the surface of the negative electrode area B of the N-type silicon substrate to expose the back of the bottom N-type silicon substrate, and at the same time form a pyramid velvet surface on the front of the N-type silicon substrate. On the surface of the positive electrode area B, the negative electrode area A and the positive electrode area A on the back of the N-type silicon substrate, since there is still a PSG layer or BSG layer on the surface, the bottom deposition layers of this area can be protected from being damaged during the wet texturing process. The acid cleaning tank that comes with the tank body can then remove the PSG layer and BSG layer remaining on the back.
[0039] S12, double-sided coating, forming a passivation film on the front and back sides.
[0040] S13, screen printing, sintering, light injection, forming positive electrodes and negative electrodes in each positive electrode region and negative electrode region respectively.
[0041] Preferably, the phosphorus atom concentration of the N-type silicon substrate is less than the boron atom concentration of the first boron diffusion, less than the phosphorus atom concentration of the phosphorus diffusion, and less than the boron atom concentration of the second boron diffusion; and the first boron diffusion depth is greater than the phosphorus diffusion depth, and the second boron diffusion depth. Preferably, in S2, the conditions for the first boron diffusion are: diffusion temperature 900-930°C, time 10-60 min, BCl3 flow rate 20-80 sccm, O2 flow rate 300-900 sccm; oxidation advancement temperature 1000-1050°C, O2 flow rate 1000-8000 sccm, time 50-100 min; surface boron doping concentration 1E17-3E18 cm -3 , the doping depth is 2~4 μm; the obtained BSG layer thickness is 20~60 nm.
[0042] In order to transform a part of the surface layer of the inner boron diffusion layer into a phosphorus diffusion layer during the subsequent phosphorus diffusion, it is necessary to control the surface boron atom doping concentration to be low (but higher than the phosphorus atom doping amount of the N-type silicon substrate itself, 1E15~1E16cm -3), and the doping depth needs to be relatively deep. Therefore, the conditions of the first boron diffusion need to be precisely controlled. Finally, the present invention finds that the above object can be achieved under the above conditions (the main characteristics of this first boron diffusion process compared with the conventional boron diffusion process are: relatively less source gas flow; longer oxidation and diffusion time).
[0043] Preferably, in S5, the conditions for phosphorus diffusion are: diffusion temperature 750 - 850 °C, time 10 - 50 min, POCl3 flow rate 100 - 300 sccm, O2 flow rate 200 - 1000 sccm; oxidation and diffusion temperature 850 - 950 °C, O2 flow rate 500 - 2000 sccm, time 50 - 100 min; surface phosphorus doping concentration 5E18 - 9E18 cm -3 , doping depth 1.2 - 2 μm; the obtained PSG layer thickness is 20 - 60 nm.
[0044] In order to convert the surface layer of the inner boron diffusion layer into an N-type phosphorus diffusion layer, the phosphorus atom doping concentration of the phosphorus diffusion needs to be higher than the boron atom concentration of the first boron diffusion, and the doping depth is shallower than that of the first boron diffusion. Similarly, the conditions for phosphorus diffusion need to be precisely controlled. Finally, the above object can be achieved under the above phosphorus diffusion conditions (the main characteristic of this phosphorus diffusion process compared with the conventional phosphorus diffusion process is the longer oxidation and diffusion time).
[0045] Preferably, in S8, the conditions for the second boron diffusion are: diffusion temperature 900 - 950 °C, time 10 - 80 min, BCl3 flow rate 200 - 1000 sccm, O2 flow rate 2000 - 10000 sccm; oxidation and diffusion temperature 1000 - 1050 °C, O2 flow rate 5000 - 80000 sccm, time 10 - 30 min; surface boron doping concentration 1E19 - 3E19 cm -3 , doping depth 0.3 - 0.8 μm; the obtained BSG layer thickness is 10 - 50 nm.
[0046] In order to convert the surface of the phosphorus diffusion layer into a high-concentration outer boron diffusion layer, the surface boron atom doping concentration of the second boron diffusion needs to be higher than the phosphorus atom doping concentration of the phosphorus diffusion layer; and the doping depth needs to be less than the phosphorus doping depth. In this second boron diffusion, the boron source gas flow rate is relatively large, resulting in a higher surface boron atom doping concentration; at the same time, the oxidation and diffusion time is relatively short, so that the doping depth can be precisely controlled.
[0047] Preferably, in S3, S6 and S9, the BSG layer or PSG layer is removed by laser patterning and grooving.
[0048] The BSG layer or PSG layer is removed by laser patterning grooving. Due to the difference in the laser patterning processing area, through the method of multi-pass laser processing + alkali cleaning + diffusion, a relatively obvious height difference can be accurately formed on the back of the N-type silicon substrate finally, that is, in terms of thickness, the positive electrode area B > the negative electrode area A > the positive electrode area A.
[0049] Preferably, the conditions for the laser patterning grooving are: the laser wavelength is 400~600 nm, the frequency is 500~700KHz, the marking speed is 40000~50000 mm / s, the power is 10~50 W, and the processing time is 1~5 s.
[0050] Compared with the prior art, the beneficial effects of the present invention are:
[0051] (1) Through structural optimization, the present invention realizes that all electrodes are arranged on the back of the battery. Such a design can effectively reduce the shading damage on the front of the battery on the one hand, which is beneficial to improving the battery performance; on the other hand, when connecting single batteries in series to form a battery module, the damage caused by the connection wire passing through the gap between adjacent batteries can be avoided, and the yield can be improved.
[0052] (2) The multi-junction solar cell of the present invention is a fully silicon-based battery and does not contain perovskite batteries. Therefore, the problem of poor overall stability of the battery brought by perovskite batteries can be avoided.
[0053] (3) Through ingenious step design, the present invention has developed a preparation method that can realize the above-mentioned four-terminal fully silicon-based multi-junction solar cell structure.
[0054] (4) The present invention also provides a method for connecting the terminals of a four-terminal multi-junction battery module. Description of the Drawings
[0055] Figure 1 It is a schematic structural diagram of the polished N-type silicon substrate on both sides.
[0056] Figure 2 It is a schematic structural diagram of the N-type silicon substrate after the first boron diffusion.
[0057] Figure 3 It is a schematic structural diagram of the N-type silicon substrate after phosphorus diffusion.
[0058] Figure 4 It is a schematic structural diagram of the N-type silicon substrate after the second boron diffusion.
[0059] Figure 5 It is a schematic structural diagram of the N-type silicon substrate after cleaning and texturing.
[0060] Figure 6 It is a schematic structural diagram of the four-terminal fully silicon-based multi-junction solar cell of the present invention.
[0061] Figure 7 This is a schematic structural diagram of the unit cell B in the solar cell module of the present invention.
[0062] Figure 8 This is a schematic diagram of the connection method of the solar cell module of the present invention.
[0063] The reference numerals are: N-type silicon substrate 1, inner boron diffusion layer 2, BSG layer 3, phosphorus diffusion layer 4, PSG layer 5, outer boron diffusion layer 6, pyramid texture 7, passivation film 8, positive electrode 9, negative electrode 10, P-type silicon substrate 11, solder ribbon 12, inner phosphorus diffusion layer 13, boron diffusion layer 14, outer phosphorus diffusion layer 15. Detailed implementation manners
[0064] The present invention will be further described below in conjunction with embodiments.
[0065] (1) A four-terminal all-silicon-based multi-junction solar cell, which includes:
[0066] An N-type silicon substrate, a pyramid texture and a passivation film sequentially arranged on the front surface of the N-type silicon substrate, and a positive electrode region A, a negative electrode region A, a positive electrode region B, and a negative electrode region B arranged in an alternating manner on the back surface of the N-type silicon substrate;
[0067] The positive electrode region A includes an inner boron diffusion layer, a phosphorus diffusion layer, an outer boron diffusion layer, and a passivation film sequentially arranged on the back surface of the N-type silicon substrate, and a positive electrode arranged on the surface of the outer boron diffusion layer and penetrating through the passivation film;
[0068] The negative electrode region A is adjacent to the positive electrode region A and includes an inner boron diffusion layer, a phosphorus diffusion layer, and a passivation film sequentially arranged on the back surface of the N-type silicon substrate, and a negative electrode arranged on the surface of the phosphorus diffusion layer and penetrating through the passivation film;
[0069] The positive electrode region B is adjacent to the negative electrode region A and includes an inner boron diffusion layer and a passivation film sequentially arranged on the back surface of the N-type silicon substrate, and a positive electrode arranged on the surface of the inner boron diffusion layer and penetrating through the passivation film;
[0070] The negative electrode region B is adjacent to the positive electrode region B and includes a passivation film arranged on the back surface of the N-type silicon substrate, and a negative electrode arranged on the back surface of the N-type silicon substrate and penetrating through the passivation film.
[0071] In some preferred embodiments, in terms of thickness, the positive electrode region B > the negative electrode region A > the positive electrode region A.
[0072] In some preferred embodiments, in terms of width, the negative electrode region B > the positive electrode region B > the negative electrode region A > the positive electrode region A.
[0073] In some preferred embodiments, the boron concentration in the inner boron diffusion layer is lower than the phosphorus concentration in the phosphorus diffusion layer, and the phosphorus concentration in the phosphorus diffusion layer is lower than the boron concentration in the outer boron diffusion layer.
[0074] (2)A preparation method of the above-mentioned four-terminal all-silicon-based multi-junction solar cell, comprising the following steps:
[0075] S1. Double-sided polishing of the N-type silicon substrate.
[0076] In some preferred embodiments, an N-type silicon substrate after wire sawing is selected and placed in an alkaline polishing tank. The temperature is maintained at 75-85 °C for 6-8 min for double-sided polishing. The polishing thickness is 3-7 μm, and the thinning amount is 0.35-0.45 g.
[0077] S2. First boron diffusion on the back surface, and an inner boron diffusion layer and a BSG layer are sequentially formed on the back surface of the N-type silicon substrate.
[0078] In some preferred embodiments, the conditions for the first boron diffusion are: diffusion temperature 900-930 °C, time 10-60 min, BCl3 flow rate 20-80 sccm, O2 flow rate 300-900 sccm; oxidation push temperature 1000-1050 °C, O2 flow rate 1000-8000 sccm, time 50-100 min; surface boron doping concentration 1E17-3E18 cm -3 , doping depth 2-4 μm; the obtained BSG layer thickness is 20-60 nm.
[0079] S3. Remove the BSG layer in the back negative region A and the back positive region A.
[0080] In some preferred embodiments, in S3, the BSG layer is removed by laser patterning grooving.
[0081] In some more preferred embodiments, the conditions for the laser patterning grooving are: laser wavelength 400-600 nm, frequency 500-700 KHz, marking speed 40000-50000 mm / s, power 10-50 W, processing time 1-5 s.
[0082] S4. Alkaline cleaning. Alkaline cleaning can further remove the BSG layer on the surfaces of the positive region A and the negative region A in S3 that is not completely removed. During the alkaline cleaning process, auxiliary equipment such as ellipsometry and scanning electron microscopy can be used to accurately remove the BSG layer on the surface, so as not to corrode the bottom inner boron diffusion layer too much.
[0083] In some preferred embodiments, in S4, the alkaline cleaning conditions are: the concentration of the KOH solution is 1.7-2.2 wt%, and the temperature is 75-85 °C.
[0084] S5. Phosphorus diffusion on the back surface, so that the surface layer of the exposed inner boron diffusion layer is converted into a phosphorus diffusion layer and a PSG layer.
[0085] In some preferred embodiments, in S5, the conditions for phosphorus diffusion are as follows: diffusion temperature is 750 - 850 °C, time is 10 - 50 min, POCl3 flow rate is 100 - 300 sccm, and O2 flow rate is 200 - 1000 sccm; the oxidation promotion temperature is 850 - 950 °C, O2 flow rate is 500 - 2000 sccm, and time is 50 - 100 min; the surface phosphorus doping concentration is 5E18 - 9E18 cm -3 , the doping depth is 1.2 - 2 μm; the obtained PSG layer thickness is 20 - 60 nm.
[0086] S6. Remove the PSG layer in the positive electrode region A.
[0087] In some preferred embodiments, in S6, the PSG layer is removed by laser patterning and grooving.
[0088] In some more preferred embodiments, the conditions for the laser patterning and grooving are as follows: laser wavelength is 400 - 600 nm, frequency is 500 - 700 KHz, marking speed is 40000 - 50000 mm / s, power is 10 - 50 W, and processing time is 1 - 5 s.
[0089] S7. Alkaline cleaning. Alkaline cleaning can further remove the PSG layer on the surface of the positive electrode region A that was not completely removed in S6. During the alkaline cleaning process, auxiliary equipment such as ellipsometric offset and scanning electron microscope can be used to precisely remove the PSG layer on the surface, so as not to corrode the bottom phosphorus diffusion layer too much.
[0090] In some preferred embodiments, the conditions for the alkaline cleaning are as follows: the concentration of the KOH solution is 1.7 - 2.2 wt%, and the temperature is 75 - 85 °C.
[0091] S8. Secondary boron diffusion is carried out to convert the surface layer of the exposed phosphorus diffusion layer into an outer boron diffusion layer and a BSG layer. During this secondary boron diffusion process, controlling the boron atom doping concentration to be higher than the phosphorus atom concentration of the phosphorus diffusion and the doping depth to be shallower than that of the primary boron diffusion can convert the surface layer of the exposed phosphorus diffusion layer into an outer boron diffusion layer, thereby forming a layered alternating N - P - N - P (double - junction) structure (N - type silicon substrate - P - type inner boron diffusion layer - N - type phosphorus diffusion layer - P - type outer boron diffusion layer) on the back of the entire silicon wafer.
[0092] In some preferred embodiments, in S8, the conditions for the secondary boron diffusion are as follows: diffusion temperature is 900 - 950 °C, time is 10 - 80 min, BCl3 flow rate is 200 - 1000 sccm, and O2 flow rate is 2000 - 10000 sccm; the oxidation promotion temperature is 1000 - 1050 °C, O2 flow rate is 5000 - 80000 sccm, and time is 10 - 30 min; the surface boron doping concentration is 1E19 - 3E19 cm -3, the doping depth is 0.3~0.8 μm; the obtained BSG layer thickness is 10~50 nm.
[0093] S9. Remove the BSG layer of the back negative electrode region B to expose the inner boron diffusion layer at the bottom.
[0094] In some preferred implementation cases, in S9, the BSG layer is removed by laser patterning and grooving.
[0095] In some more preferred implementation cases, the conditions for the laser patterning grooving are: laser wavelength 400~600nm, frequency 500~700KHz, marking speed 40000~50000 mm / s, power 10~50W, and processing time 1~5s.
[0096] S10, chain-remove the BSG layer plated on the front side.
[0097] In some preferred implementation cases, in S10, the concentration of the HF solution in the chain conveyor is 20-80 wt %, and the belt speed is 0.5-5 m / min.
[0098] S11, cleaning and texturing, to remove the inner boron diffusion layer on the surface of the negative electrode area B of the N-type silicon substrate to expose the back of the bottom N-type silicon substrate, and at the same time form a pyramid velvet surface on the front of the N-type silicon substrate. On the surface of the positive electrode area B, the negative electrode area A and the positive electrode area A on the back of the N-type silicon substrate, since there is still a PSG layer or BSG layer on the surface, the bottom deposition layers of this area can be protected from being damaged during the wet texturing process. The acid cleaning tank that comes with the tank body can then remove the PSG layer and BSG layer remaining on the back.
[0099] In some preferred implementation cases, in S11, the cleaning and texturing conditions are: 1.7-2.2 wt% KOH, temperature 70-85°C, time 6-10 min.
[0100] S12, double-sided coating, forming a passivation film on the front and back sides.
[0101] In some preferred implementation cases, in S12, an AlOx film is deposited on the front and back sides of the treated N-type silicon substrate by ALD deposition, which is generated by the reaction of Al(CH3)3 and water vapor, with a thickness of 8-10 nm, and the process temperature is controlled at 220-280°C. Then, SiN is deposited on the front and back sides by a tubular PECVD device. x Films, including SiN xThe thickness of the thin film is 80 - 120 nm, and the refractive index is 1.9 - 2.1; the reaction gases in the tube cavity are SiH4 and NH3, the working pressure is 1500 - 1700 mTorr, the power is 10000 - 15000 W, the temperature is 400 - 600 °C, the flow rate of SiH4 gas is 900 - 2000 sccm, the flow rate of NH3 gas is 7000 - 12000 sccm, and the deposition time is 5 - 20 min.
[0102] S13. Screen printing, sintering, and optical injection are carried out to form the positive electrode and the negative electrode in the positive electrode area and the negative electrode area respectively.
[0103] In some preferred embodiments, in S12, the coated battery is processed through the screen printing process, and electrodes (negative electrodes) are printed on the corresponding areas on the back of the battery respectively to form the final four-terminal (two positive electrodes and two negative electrodes) battery structure. Then, an Ag-Si ohmic contact is sintered at 700 - 800 °C, and finally, the final finished battery is obtained through optical injection repair.
[0104] Specific examples and comparative examples.
[0105] Example 1
[0106] A preparation method of the above-mentioned four-terminal all-silicon-based multi-junction solar cell, which includes the following steps:
[0107] S1. Double-sided polishing of the N-type silicon substrate: Select the N-type silicon substrate 1 after wire saw cutting, put it into the alkaline polishing tank, maintain the temperature at 75 °C, and carry out double-sided polishing for 6 min. The polishing thickness is about 4 μm, and the thinning amount is about 0.42 g, as Figure 1 shown.
[0108] S2. First boron diffusion on the back, and sequentially form an inner boron diffusion layer 2 and a BSG layer 3 on the back of the N-type silicon substrate, as Figure 2 shown. Among them, the conditions for the first boron diffusion are: diffusion temperature 920 °C, time 15 min, BCl3 flow rate 40 sccm, O2 flow rate 350 sccm; oxidation and push temperature 1045 °C, O2 flow rate 2000 sccm, time 70 min; the surface boron doping concentration is about 7E17 cm -3 , the doping depth is about 3.5 μm; the obtained BSG layer is about 50 nm thick.
[0109] S3. Remove the BSG layer in the back negative electrode area A and the positive electrode area A through laser patterning grooving. Among them, the conditions for laser patterning grooving are: laser wavelength 532 nm, frequency 600 KHz, marking speed 45000 mm / s, power 50 W, and processing time 3 s.
[0110] S4. Alkaline cleaning: The alkaline cleaning further removes the BSG layer that was not completely removed from the surfaces of the positive electrode region A and the negative electrode region A in S3. During the alkaline cleaning process, with the assistance of ellipsometry and scanning electron microscopy equipment, the BSG layer on the surface is precisely removed, so as not to overly corrode the underlying inner boron diffusion layer. Among them, the conditions for alkaline cleaning are: the concentration of the KOH solution is 2.0 wt%, and the temperature is 75 °C.
[0111] S5. Backside phosphorus diffusion is performed to convert the surface layer of the exposed inner boron diffusion layer into a phosphorus diffusion layer 4 and a PSG layer 5, as Figure 3 shown. Among them, the conditions for phosphorus diffusion are: the diffusion temperature is 780 °C, the time is 30 min, the POCl3 flow rate is 150 sccm, and the O2 flow rate is 500 sccm; the oxidation push temperature is 880 °C, the O2 flow rate is 800 sccm, and the time is 70 min; the surface phosphorus doping concentration is 6E18 cm -3 , and the doping depth is approximately 1.3 μm; the resulting PSG layer is approximately 48 nm thick.
[0112] S6. The PSG layer in the positive electrode region A is removed by laser patterning and grooving. Among them, the conditions for laser patterning and grooving are: the laser wavelength is 532 nm, the frequency is 600 KHz, the marking speed is 45000 mm / s, the power is 25 W, and the processing time is 2.7 s.
[0113] S7. Alkaline cleaning: The alkaline cleaning further removes the PSG layer that was not completely removed from the surface of the positive electrode region A in S6. During the alkaline cleaning process, with the assistance of ellipsometry and scanning electron microscopy equipment, the PSG layer on the surface can be precisely removed, so as not to overly corrode the underlying phosphorus diffusion layer. Among them, the conditions for alkaline cleaning are: the concentration of the KOH solution is 2.0 wt%, and the temperature is 75 °C.
[0114] S8. Secondary boron diffusion is performed to convert the surface layer of the exposed phosphorus diffusion layer into an outer boron diffusion layer 6 and a BSG layer 3, as Figure 4 shown. Among them, the conditions for secondary boron diffusion are: the diffusion temperature is 930 °C, the time is 50 min, the BCl3 flow rate is 500 sccm, and the O2 flow rate is 7000 sccm; the oxidation push temperature is 1050 °C, the O2 flow rate is 30000 sccm, and the time is 12 min; the surface boron doping concentration is 2E19 cm -3 , and the doping depth is approximately 0.5 μm; the resulting BSG layer is approximately 15 nm thick.
[0115] During this secondary boron diffusion process, by controlling the doping concentration of boron atoms to be higher than that of phosphorus atoms in phosphorus diffusion and the doping depth to be shallower than that of primary boron diffusion, the surface layer of the exposed phosphorus diffusion layer can be transformed into an outer boron diffusion layer, thereby forming a layered alternating N-P-N-P (double junction) structure (N-type silicon substrate - P-type inner boron diffusion layer - N-type phosphorus diffusion layer - P-type outer boron diffusion layer) on the back of the entire silicon wafer.
[0116] S9, removing the BSG layer of the back negative electrode region B by laser patterning and grooving, so as to expose the inner boron diffusion layer at the bottom thereof. The conditions of the laser patterning and grooving are as follows: laser wavelength 532 nm, frequency 600 KHz, marking speed 45000 mm / s, power 50 W, and processing time 3 s.
[0117] S10, chain removal of the BSG layer plated on the front side: the concentration of the HF solution in the chain machine is 40 wt%, and the belt speed is 3 m / min.
[0118] S11, cleaning and texturing, so as to remove the inner boron diffusion layer on the surface of the negative electrode region B of the N-type silicon substrate to expose the back side of the bottom N-type silicon substrate, and at the same time form a pyramid velvet surface 7 on the front side of the N-type silicon substrate, such as Figure 5 As shown. On the surface of the positive region B, negative region A and positive region A on the back of the N-type silicon substrate, since there is still a PSG layer or BSG layer on the surface, the deposited layers at the bottom of this area can be protected from being damaged during the wet texturing process. The acid cleaning tank that comes with the tank body can then remove the PSG layer and BSG layer remaining on the back. Among them, the cleaning and texturing conditions are: 1.7 wt% KOH, temperature 80°C, time 8 min.
[0119] S12, double-sided coating, forming a passivation film 8 on the front and back: ALD deposition method is used to deposit AlOx thin film on the front and back of the treated N-type silicon substrate, which is generated by the reaction of Al(CH3)3 and water vapor, with a thickness of about 8 nm, and the process temperature is controlled at 250℃. Then, SiN is deposited on the front and back using a tubular PECVD device. x Film, including SiN x The thickness of the film is about 90 nm and the refractive index is 2.0; the reaction gases in the tubular cavity are SiH4 and NH3, the working pressure is 1600 mTorr, the power is 12000 W, the temperature is 450℃, the SiH4 gas flow rate is 1100 sccm, the NH3 gas flow rate is 9000 sccm, and the deposition time is 12 min.
[0120] S13. The coated battery is subjected to a screen printing process, and electrodes (negative electrodes) are printed on the corresponding areas on the back of the battery to form a final four-terminal (two positive electrodes, two negative electrodes) battery structure. It is then sintered at 770°C to form Ag-Si ohmic contacts, and finally repaired by light injection to obtain the final finished battery.
[0121] like Figure 6 As shown, the four-terminal all-silicon-based multi-junction solar cell finally obtained in this embodiment includes:
[0122] The N-type silicon substrate 1, the pyramid-shaped texture 7 and the passivation film 8 are successively disposed on the front surface of the N-type silicon substrate, and the positive electrode regions A, the negative electrode regions A, the positive electrode regions B and the negative electrode regions B are disposed on the back surface of the N-type silicon substrate and arranged in an interleaved manner.
[0123] The positive electrode region A includes an inner boron diffusion layer 2, a phosphorus diffusion layer 4, an outer boron diffusion layer 5 and a passivation film 8 that are successively disposed on the back surface of the N-type silicon substrate, and a positive electrode 9 that is disposed on the surface of the outer boron diffusion layer and penetrates the passivation film;
[0124] The negative electrode region A is adjacent to the positive electrode region A, and includes an inner boron diffusion layer 2, a phosphorus diffusion layer 4 and a passivation film 8 that are successively disposed on the back surface of the N-type silicon substrate, and a negative electrode 10 that is disposed on the surface of the phosphorus diffusion layer and penetrates the passivation film;
[0125] The positive electrode region B is adjacent to the negative electrode region A, and includes an inner boron diffusion layer 2 and a passivation film 8 that are successively disposed on the back surface of the N-type silicon substrate, and a positive electrode 9 that is disposed on the surface of the inner boron diffusion layer and penetrates the passivation film;
[0126] The negative electrode region B is adjacent to the positive electrode region B, and includes a passivation film 8 disposed on the back surface of the N-type silicon substrate, and a negative electrode 10 disposed on the back surface of the N-type silicon substrate and penetrating the passivation film.
[0127] In terms of thickness, the positive electrode region B > the negative electrode region A > the positive electrode region A. In terms of width, the negative electrode region B > the positive electrode region B > the negative electrode region A > the positive electrode region A.
[0128] Comparative Example 1
[0129] Compared with Example 1, the difference is only that the phosphorus diffusion degree is insufficient:
[0130] S5. Phosphorus diffusion on the back surface, and the phosphorus diffusion conditions are: the phosphorus diffusion temperature is 760 °C, the diffusion time is 5 min, the POCl3 is carried by nitrogen with a flow rate of 80 sccm, and the O2 flow rate is 150 sccm; the oxidation and propulsion temperature is 860 °C, the O2 flow rate is 400 sccm, and the propulsion time is 30 min; the obtained PSG layer thickness is about 15 nm, and the surface phosphorus atom doping concentration is about 1.2E18 cm -3 , and the doping depth is about 0.35 μm.
[0131] Comparative Example 2
[0132] Compared with Example 1, the difference is only that the phosphorus diffusion is excessive:
[0133] S5. Backside phosphorus diffusion, with the phosphorus diffusion conditions as follows: phosphorus diffusion temperature is 820 °C, diffusion time is 60 min, POCl3 is carried by nitrogen with a flow rate of 800 sccm, and the O2 flow rate is 3000 sccm; oxidation propulsion temperature is 900 °C, O2 flow rate is 6000 sccm, and propulsion time is 120 min; the obtained PSG layer thickness is approximately 65 nm, and the surface phosphorus atom doping concentration is approximately 1.5E19 cm -3 , and the doping depth is approximately 6.0 μm.
[0134] Comparative Example 3
[0135] Compared with Example 1, the only difference is that the degree of secondary boron diffusion is insufficient:
[0136] S8. Backside secondary boron diffusion, with the secondary boron diffusion conditions as follows: boron diffusion temperature is 890 °C, diffusion time is 8 min, BCl3 flow rate is 150 sccm, and O2 flow rate is 1200 sccm; oxidation propulsion temperature is 1020 °C, O2 flow rate is 4500 sccm, and propulsion time is 8 min, the obtained BSG layer thickness is approximately 12 nm, and the surface doping concentration is approximately 1.7E18 cm -3 , and the doping depth is approximately 0.15 μm.
[0137] Comparative Example 4
[0138] Compared with Example 1, the only difference is that the secondary boron diffusion is excessive:
[0139] S8. Backside secondary boron diffusion, with the secondary boron diffusion conditions as follows: boron diffusion temperature is 950 °C, diffusion time is 90 min, BCl3 flow rate is 1500 sccm, and O2 flow rate is 12000 sccm; oxidation propulsion temperature is 1050 °C, O2 flow rate is 70000 sccm, and propulsion time is 110 min, the obtained BSG layer thickness is approximately 78 nm, and the surface doping concentration is approximately 1.9E20 cm -3 , and the doping depth is approximately 6.2 μm.
[0140] Comparative Example 5
[0141] A preparation method for a conventional single - junction back - contact battery, including:
[0142] S1. Select an N - type monocrystalline silicon wafer after wire sawing, put the sawn silicon wafer into an alkaline polishing tank, maintain the temperature at 75 °C, and perform double - sided polishing for 6 min. The polishing thickness is approximately 4 μm, and the thinning amount is approximately 0.42 g.
[0143] S2. Then, high-temperature boron diffusion is used to transform the back of the silicon wafer into a boron diffusion layer and a BSG layer. The boron diffusion temperature is 850°C, the diffusion time is 10 min, the BCl3 gas flow rate is 200 sccm, the O2 gas flow rate is 1200 sccm, the oxidation advancement temperature is 950°C, the O2 flow rate is 7000 sccm, the advancement time is 30 min, and the BSG layer thickness is about 45 nm. In this process, a boron diffusion layer and a BSG layer will be formed on the front and side of the silicon wafer.
[0144] S3. Use laser patterning to groove the BSG layer on the back of the silicon wafer so that the grooved position will serve as the subsequent negative electrode area. The laser wavelength used is 532 nm, the frequency is 600 KHZ, the marking speed is 45000 mm / s, the power is 50 W, and the processing time is 3 s.
[0145] S4. Use a chain acid cleaning machine to remove the BSG layer on the front and side surfaces of the silicon wafer, wherein the concentration of the HF solution in the chain machine is 40 wt% and the belt speed is 3 m / min.
[0146] S5. Then put the silicon wafer into an alkaline texturing tank for wet cleaning of the laser grooved area on the back and integrated texturing of the front. The KOH solution concentration in the texturing tank is 1.7 wt%, the temperature is maintained at 82°C, and the time is 7 min. Since the BSG layer on the front of the silicon wafer has been removed, an effective light-trapping texture surface can be formed during the texturing process; and in the laser patterning area on the back, the alkaline solution can effectively remove the boron diffusion layer until the N-type silicon substrate is exposed. In addition, since the BSG layer on the side of the silicon wafer is also removed, the corresponding side-expanded boron diffusion layer is also further cleaned and removed, preventing the occurrence of edge leakage. The subsequent acid (HF / HCl) cleaning tank of the texturing tank can further remove the residual BSG layer on the silicon wafer.
[0147] S6, double-sided coating, forming a passivation film on the front and back sides: ALD deposition method is used to deposit AlO on the front and back sides of the treated silicon substrate x The film is generated by the reaction of Al(CH3)3 and water vapor, with a thickness of about 8 nm and a process temperature of 250°C. Then, SiN is deposited on the front and back sides using a tubular PECVD device. x Film, including SiN x The thickness of the film is about 85 nm and the refractive index is about 2.0; the reaction gases in the tubular cavity are SiH4 and NH3, the working pressure is 1600 mTorr, the power is 12000 W, the temperature is 440℃, the SiH4 gas flow rate is 1200 sccm, the NH3 gas flow rate is 9000 sccm, and the deposition time is 12 min.
[0148] S7. The coated wafers are screen-printed on the back to form metal contacts (the positive electrode is printed on the back boron diffusion layer, and the negative electrode is printed on the N-type silicon substrate). After that, an Ag-Si ohmic contact is formed by sintering at 770 °C. Finally, the final conventional single-junction back-contact finished cell is obtained through optical injection repair.
[0149] Performance test
[0150] The electrical performance of the solar cells obtained in each example and comparative example was tested, and the results are shown in Table 1.
[0151] Table 1
[0152]
[0153] First, for Example 1, since the cell adopts a four-terminal all-silicon-based double-junction back-contact structure, due to the series stacking effect of the double junctions, its V oc value is relatively high; and there are two positive and negative electrodes in the cell, and the carrier transport and extraction inside the cell are more effective than those of the two-terminal type, which can eliminate the current matching problem of each part, and the corresponding cell process window is relatively wide; in addition, the back-contact grid line structure can further reduce the shading loss of the front grid lines of the cell, and the corresponding cell J sc value is also relatively high. Therefore, the overall cell performance is the highest.
[0154] For Comparative Example 1, since the degree of phosphorus diffusion is insufficient during the phosphorus diffusion process (the amount of phosphorus doping is small), it is impossible to fully transform the surface layer of the inner boron diffusion layer into a phosphorus diffusion layer, so that the so-called back "layered" double-junction structure cannot be formed, resulting in insufficient current (electrons) flowing out from the surface electrode in the negative electrode region A. On the one hand, the cell is only a single p-n junction structure, and on the other hand, it is only a simple two-terminal electrode contact, resulting in lower performance of each parameter at the cell terminals compared to Example 1; however, since the conventional structure of the back-contact cell is basically satisfied, the cell performance has not been greatly reduced.
[0155] For Comparative Example 2, since the degree of phosphorus diffusion is too large during the phosphorus diffusion process (the amount of phosphorus doping is large and the doping depth is deep), the inner boron diffusion layer is excessively transformed into a phosphorus diffusion layer. After the secondary boron diffusion, the so-called back "layered" double-junction structure and four-terminal electrode contact cannot be formed at the cell terminals, but the conventional structure of the back-contact cell is basically satisfied, so the cell performance has not been greatly reduced. Due to the large amount of doping during the phosphorus diffusion process, the carrier recombination between the diffusion layers is large, and the corresponding cell's V oc value is low, and the overall electrical performance is lower than that of Example 1 and Comparative Example 1.
[0156] For Comparative Example 3, due to insufficient boron diffusion during the secondary boron diffusion process, the outer layer of the phosphorus diffusion layer cannot be fully transformed into the outer boron diffusion layer. On the one hand, the back "laminated" double-junction structure cannot be formed. On the other hand, the originally set positive region A of the silicon wafer will become the negative region, making the battery a three-terminal electrode contact, which will not only affect the battery performance test, but also cause great problems in the connection of the corresponding component ends, resulting in the lowest overall battery performance.
[0157] For Comparative Example 4, due to a large degree of boron diffusion during the secondary boron diffusion process, the phosphorus diffusion layer is excessively transformed into the boron diffusion layer, and the so-called four-terminal electrode contact cannot be formed. And due to a large amount of surface boron doping, the surface recombination rate is greater. However, since it also satisfies the conventional structure of the back-contact battery, the battery performance is higher than that of Comparative Example 3, but lower than that of other groups.
[0158] For Comparative Example 5, since only a two-terminal single-junction back-contact structure is adopted on the back of the battery, the battery V oc value is lower than that of the four-terminal multi-junction back-contact structure, and the overall electrical performance is also lower than that of Example 1.
[0159] Example 2
[0160] A four-terminal all-silicon-based multi-junction solar cell module includes unit cells A and B connected in series in an interleaved manner. Among them, unit cell A is the four-terminal all-silicon-based multi-junction solar cell prepared in Example 1.
[0161] Unit cell B is different from unit cell A in that the polarities are opposite. The specific structure of unit cell B is as Figure 7 shown, including: a P-type silicon substrate 11, a pyramid texture surface, a passivation film arranged on the front of the P-type silicon substrate in sequence, and a negative region A, a positive region A, a negative region B, and a positive region B arranged in an interleaved manner on the back of the P-type silicon substrate. Specifically:
[0162] The negative region A includes an inner phosphorus diffusion layer 13, a boron diffusion layer 14, an outer phosphorus diffusion layer 15, and a passivation film arranged on the back of the P-type silicon substrate in sequence, and a negative electrode 10 arranged on the surface of the outer phosphorus diffusion layer and penetrating the passivation film;
[0163] The positive region A is adjacent to the negative region A and includes an inner phosphorus diffusion layer 13, a boron diffusion layer 14, and a passivation film arranged on the back of the P-type silicon substrate in sequence, and a positive electrode 9 arranged on the surface of the boron diffusion layer and penetrating the passivation film;
[0164] The negative region B is adjacent to the positive region A and includes an inner phosphorus diffusion layer 13 and a passivation film arranged on the back of the P-type silicon substrate in sequence, and a negative electrode 10 arranged on the surface of the inner phosphorus diffusion layer and penetrating the passivation film;
[0165] The positive electrode region B is adjacent to the negative electrode region B, and includes a passivation film provided on the back surface of the P-type silicon substrate, and a positive electrode 9 provided on the back surface of the P-type silicon substrate and penetrating the passivation film. Among them, the concentration of phosphorus atoms in the inner phosphorus diffusion layer is lower than the concentration of boron atoms in the boron diffusion layer, and the concentration of boron atoms in the boron diffusion layer is lower than the concentration of phosphorus atoms in the outer phosphorus diffusion layer.
[0166] The positions of the positive and negative electrodes of unit cell A and unit cell B are opposite, as Figure 8 shown. Their connection method is: the negative electrode of the negative electrode region B of unit cell A is connected to the positive electrode of the positive electrode region B of the adjacent unit cell B behind it through a welding strip 12, and the positive electrode of the positive electrode region B of unit cell A is connected to the negative electrode of the negative electrode region B of the adjacent unit cell B in front of it through a welding strip.
[0167] The negative electrode of the negative electrode region A of unit cell A is connected to the positive electrode of the positive electrode region A of the adjacent unit cell B behind it through a welding strip 12, and the positive electrode of the positive electrode region A of unit cell A is connected to the negative electrode of the negative electrode region A of the adjacent unit cell B in front of it through a welding strip.
[0168] In the present invention, the raw materials and equipment used, unless otherwise specified, are common raw materials and equipment in the art; the methods used in the present invention, unless otherwise specified, are conventional methods in the art.
[0169] The above are only preferred embodiments of the present invention, and do not impose any limitations on the present invention. Any simple modifications, changes, and equivalent transformations made to the above embodiments according to the technical essence of the present invention still fall within the protection scope of the technical solution of the present invention.
Claims
1. A four-terminal all-silicon-based multi-junction solar cell, characterized in that include: An N-type silicon substrate, a pyramid velvet surface and a passivation film sequentially arranged on the front side of the N-type silicon substrate, and a positive electrode region A, a negative electrode region A, a positive electrode region B and a negative electrode region B arranged alternately on the back side of the N-type silicon substrate; The positive electrode region A comprises an inner boron diffusion layer, a phosphorus diffusion layer, an outer boron diffusion layer and a passivation film which are sequentially arranged on the back of the N-type silicon substrate, and a positive electrode arranged on the outer boron diffusion layer; The cathode region A is adjacent to the anode region A, and includes an inner boron diffusion layer, a phosphorus diffusion layer and a passivation film, and a cathode disposed on the phosphorus diffusion layer; The positive electrode region B is adjacent to the negative electrode region A, and includes an inner boron diffusion layer and a passivation film, and a positive electrode disposed on the inner boron diffusion layer; The cathode region B is adjacent to the anode region B and includes a passivation film and a cathode disposed on an N-type silicon substrate.
2. The four-terminal all-silicon-based multi-junction solar cell according to claim 1, characterized in that: In terms of thickness, positive electrode region B>negative electrode region A>positive electrode region A; In terms of width, the negative electrode region B>the positive electrode region B>the negative electrode region A>the positive electrode region A.
3. The four-terminal all-silicon-based multi-junction solar cell according to claim 1 or 2, characterized in that: The boron concentration in the inner boron diffusion layer is lower than the phosphorus concentration in the phosphorus diffusion layer, and the phosphorus concentration in the phosphorus diffusion layer is lower than the boron concentration in the outer boron diffusion layer.
4. A method for preparing a four-terminal all-silicon-based multi-junction solar cell according to any one of claims 1 to 3, characterized in that include: S1, N-type silicon substrate double-sided polishing; S2, primary boron diffusion; S3, removing the BSG layer of the negative electrode area A and the positive electrode area A on the back side; S4, alkali cleaning; S5, phosphorus diffusion; S6, removing the PSG layer of the positive electrode region A; S7, alkali cleaning; S8, secondary boron diffusion; S9, removing the BSG layer of the back negative electrode region B; S10, removing the front BSG layer; S11, cleaning and velveting; S12, double-sided coating; S13, screen printing, sintering, light injection.
5. The preparation method according to claim 4, characterized in that: The phosphorus atomic concentration of the N-type silicon substrate is less than the boron atomic concentration of the first boron diffusion, less than the phosphorus atomic concentration of the phosphorus diffusion, less than the boron atomic concentration of the second boron diffusion; and The primary boron diffusion depth > the phosphorus diffusion depth > the secondary boron diffusion depth.
6. The preparation method according to claim 4, characterized in that: In S2, the conditions for the primary boron diffusion are: diffusion temperature 900-930°C, time 10-60 min, BCl3 flow rate 20-80 sccm, O2 flow rate 300-900 sccm; oxidation advancement temperature 1000-1050°C, O2 flow rate 1000-8000 sccm, time 50-100 min; surface boron doping concentration 1E17-3E18 cm -3 , the doping depth is 2.0~4.0 μm; the obtained BSG layer thickness is 20~60 nm.
7. The preparation method according to claim 4, characterized in that: In S5, the phosphorus diffusion conditions are: diffusion temperature 750-850°C, time 10-50 min, POCl3 flow rate 100-300 sccm, O2 flow rate 200-1000 sccm; oxidation advancement temperature 850-950°C, O2 flow rate 500-2000 sccm, time 50-100 min; surface phosphorus doping concentration 5E18-9E18 cm -3 , doping depth 1.2~2.0 μm; the obtained PSG layer thickness is 20~60 nm.
8. The preparation method according to claim 4, characterized in that: In S8, the conditions for the secondary boron diffusion are: diffusion temperature 900-950°C, time 10-80 min, BCl3 flow rate 200-1000 sccm, O2 flow rate 2000-10000 sccm; oxidation advancement temperature 1000-1050°C, O2 flow rate 5000-80000 sccm, time 10-30 min; surface boron doping concentration 1E19-3E19 cm -3 , the doping depth is 0.3~0.8 μm; the obtained BSG layer thickness is 10~50 nm.
9. The preparation method according to claim 4, characterized in that: In S3, S6 and S9, the BSG layer or the PSG layer is removed by laser patterning and grooving.
10. The preparation method according to claim 9, characterized in that: The conditions for the laser patterning grooving are: laser wavelength 400-600 nm, frequency 500-700 KHz, marking speed 40000-50000 mm / s, power 10-50 W, and processing time 1-5 s.
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