Display device

Abstract

A display device is provided. The display device includes a (1-1) th sub-pixel and a (1-3) th sub-pixel at two adjacent vertices in a row direction of an imaginary quadrangle centered on the (1-2) th sub-pixel, and a (1-1) th light emitting diode, a (1-2) th light emitting diode, and a (1-3) th light emitting diode corresponding to the (1-1) th sub-pixel, the (1-2) th sub-pixel, and the (1-3) th sub-pixel, respectively. The (1-1) th light emitting diode, the (1-2) th light emitting diode, and the (1-3) th light emitting diode are respectively connected to the (1-1) th driving circuit, the (1-2) th driving circuit, and the (1-3) th driving circuit via the (1-1) th via hole connection metal, the (1-2) th via hole connection metal, and the (1-3) th via hole connection metal. A first contact portion of the (1-1)-th light emitting diode and the (1-1)-th via connection metal is located between the (1-1)-th sub-pixel and the (1-3)-th sub-pixel that are adjacent in the row direction, and a second contact portion of the (1-2)-th light emitting diode and the (1-2)-th via connection metal is located between the (1-1)-th sub-pixel and the (2-3)-th sub-pixel that are adjacent in the column direction.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and all benefits derived from Korean Patent Application No. 10-2023-0147151, filed on October 30, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] One or more embodiments relate to a display device. Background Art

[0004] With the advancement of display devices that visually display electrical signals, various display devices having desirable characteristics such as thinness, lightness, and low power consumption have been introduced. As the proportion of a display area that can provide an image in a display device increases, the peripheral area that is a dead zone in which no light emitting diodes are arranged decreases. Summary of the invention

[0005] In a display device in which a peripheral area is reduced to increase a ratio occupied by a display area, a space in which elements arranged in the peripheral area are located has been reduced, so that the quality of light emitted from a light emitting diode may be deteriorated.

[0006] One or more embodiments include a display device capable of providing high-resolution and high-quality images.

[0007] According to one or more embodiments, a display device includes: a first sub-pixel, a second sub-pixel, and a third sub-pixel arranged in a display area to emit light of different colors from each other, wherein a 1-1 sub-pixel as one of the first sub-pixels and a 1-3 sub-pixel as one of the third sub-pixels are respectively arranged at two vertices adjacent to each other in a row direction among the vertices of an imaginary quadrilateral centered on a 1-2 sub-pixel as one of the second sub-pixels; a 1-1 light-emitting diode, a 1-2 light-emitting diode, and a 1-3 light-emitting diode corresponding to the 1-1 sub-pixel, the 1-2 sub-pixel, and the 1-3 sub-pixel, respectively; and a first light-emitting diode electrically connected to the 1-1 light-emitting diode and including a first light-emitting diode electrically connected to a first light-emitting diode in a column direction intersecting the row direction. A 1-1 driving circuit for a transistor of a first data line extending upward; a 1-2 driving circuit electrically connected to a 1-2 light-emitting diode and including a transistor electrically connected to a second data line extending in a column direction; a 1-3 driving circuit electrically connected to a 1-3 light-emitting diode and including a transistor electrically connected to a third data line extending in a column direction; a 1-1 via connection metal electrically connecting a first electrode of the 1-1 light-emitting diode and the 1-1 driving circuit to each other; a 1-2 via connection metal electrically connecting a first electrode of the 1-2 light-emitting diode and the 1-2 driving circuit to each other; and a 1-3 via connection metal electrically connecting a first electrode of the 1-3 light-emitting diode and the 1-3 driving circuit to each other. In such an embodiment, the first electrode of the 1-1 light-emitting diode and the first contact portion of the 1-1 via connection metal are positioned between the 1-1 sub-pixel and the 1-3 sub-pixel adjacent to each other in the row direction, and the first electrode of the 1-2 light-emitting diode and the second contact portion of the 1-2 via connection metal are positioned between the 1-1 sub-pixel and the 2-3 sub-pixel adjacent to the 1-1 sub-pixel in the column direction.

[0008] According to one or more embodiments, a display device includes: a first data line, a second data line, and a third data line, wherein each of the first data line, the second data line, and the third data line extends in a column direction; a first driving circuit arranged in the column direction and electrically connected to the first data line; a second driving circuit arranged in the column direction and electrically connected to the second data line; a third driving circuit arranged in the column direction and electrically connected to the third data line; a 1-1 light-emitting diode electrically connected to a 1-1 driving circuit as one of the first driving circuits, wherein the 1-1 light-emitting diode emits light of a first color; a 2-1 light-emitting diode electrically connected to a 2-1 driving circuit as another of the first driving circuits, wherein the 2-1 light-emitting diode emits light of the first color; a 1-2 light-emitting diode electrically connected to a 1-2 driving circuit as one of the second driving circuits, wherein the 1-2 light-emitting diode emits light of a second color; and a 1-3 light-emitting diode electrically connected to a 1-3 driving circuit as one of the third driving circuits, wherein the 1-3 light-emitting diode emits light of a third color. In such an embodiment, the 1-1th light-emitting diode, the 2-1th light-emitting diode and the 1-3th light-emitting diode are positioned at the vertices of an imaginary quadrilateral centered on the 1-2th light-emitting diode, the 1-1th light-emitting diode and the 2-1th light-emitting diode are arranged in the diagonal direction of the imaginary quadrilateral with the 1-2th light-emitting diode in between, the 1-3th light-emitting diode is arranged adjacent to the 1-1th light-emitting diode in the row direction intersecting the column direction, and the 1-1 driving circuit and the 2-1 driving circuit are adjacent to each other in the column direction.

[0009] According to one or more embodiments, a display device includes: a 1-1 light-emitting diode and a 2-1 light-emitting diode that emit light of a first color; a 1-2 light-emitting diode that emits light of a second color; a 1-3 light-emitting diode that emits light of a third color; a 1-1 driving circuit that is electrically connected to a first data line extending in a column direction, wherein the 1-1 driving circuit includes a transistor; a first insulating layer disposed on an electrode electrically connected to a semiconductor layer of a transistor among the transistors of the 1-1 driving circuit; a connecting metal disposed on the first insulating layer and electrically connected to the electrode; a second insulating layer on the connecting metal; a 1-1 via connecting metal disposed on the second insulating layer and electrically connected to the connecting metal; and a third insulating layer on the 1-1 via connecting metal. In such an embodiment, the 1-1th light-emitting diode, the 2-1th light-emitting diode and the 1-3th light-emitting diode are positioned at the vertices of an imaginary quadrilateral centered on the 1-2th light-emitting diode, the 1-1th light-emitting diode and the 2-1th light-emitting diode are arranged in the diagonal direction of the imaginary quadrilateral with the 1-2th light-emitting diode between them, the 1-3th light-emitting diode is arranged adjacent to the 1-1th light-emitting diode in the row direction intersecting the column direction, the 1-1th driving circuit is adjacent to the 2-1 driving circuit in the column direction, and the 2-1 driving circuit is electrically connected to the 2-1 light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above and other features of certain embodiments of the present disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0011] Figure 1 is a plan view schematically showing a display device according to an embodiment;

[0012] Figure 2 It is schematically shown Figure 1 A side view of the display device shown in;

[0013] Figure 3 is an equivalent circuit diagram of a sub-pixel according to an embodiment;

[0014] Figure 4 is a cross-sectional view showing a portion of a display area of ​​a display device according to an embodiment;

[0015] Figure 5A is a plan view schematically showing an arrangement of sub-pixels arranged in a display area of ​​a display device according to an embodiment;

[0016] Figure 5B is a plan view schematically showing an arrangement of light emitting diodes arranged in a display area of ​​a display device according to an embodiment;

[0017] Fig. 6Ais a plan view showing a driving circuit, lines electrically connected to the driving circuit, and a light emitting diode arranged in a display area of ​​a display device according to an embodiment;

[0018] Figure 6B is a diagram showing an arrangement according to an embodiment Fig. 6A A plan view of a light emitting diode and via connection metal in a display area of ​​a display device shown in ;

[0019] Figure 6C is a plan view showing a light emitting diode and a via connection metal arranged in a display area of ​​a display device according to an embodiment;

[0020] Fig. 7A is a plan view showing a driving circuit, lines electrically connected to the driving circuit, and a light emitting diode arranged in a display area of ​​a display device according to an embodiment; and

[0021] Figure 7B is a diagram showing an arrangement according to an embodiment Fig. 7A A plan view of light emitting diodes and via connection metals in a display area of ​​a display device shown in FIG. DETAILED DESCRIPTION

[0022] The present invention will now be described more fully below with reference to the accompanying drawings in which various embodiments are shown. However, the present invention can be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. Instead, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the scope of the present invention to those skilled in the art.

[0023] Since the present disclosure allows various changes and many embodiments, certain embodiments will be shown in the drawings and described in detail in the written description. Hereinafter, the effects and features of the present disclosure and the methods for realizing them will be described more comprehensively with reference to the drawings in which the embodiments of the present disclosure are shown. However, the present disclosure can be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein.

[0024] One or more embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. The same or corresponding elements are given the same reference numerals regardless of the figure numbers, and their redundant descriptions will be omitted.

[0025] It should be understood that although the terms "first", "second", "third", etc. may be used in this article to describe various elements, components, areas, layers and / or parts, these elements, components, areas, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer or part from another element, component, area, layer or part. Therefore, the "first element", "first component", "first area", "first layer" or "first part" discussed below may be referred to as the second element, second component, second area, second layer or second part without departing from the teachings herein.

[0026] The terms used herein are only for the purpose of describing a specific embodiment and are not intended to be limited. Unless the context clearly indicates otherwise, "one", "said", and "at least one" as used herein do not represent the limitation of quantity, and are intended to include both the singular and the plural. Therefore, the mention of "said" element after "one" element in the claim includes one element and multiple elements. For example, unless the context clearly indicates otherwise, "element" has the same meaning as "at least one element". "At least one" will not be interpreted as being limited to "one" or "one". "Or" means "and / or". As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items. Throughout this disclosure, the expression "at least one of a, b, and c" or "selected from at least one of a, b, and c" means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0027] It should also be understood that the terms “include” and / or “comprise” or “includes” and / or “comprising”, when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, parts and / or groups thereof.

[0028] It will be understood that when a layer, region or element is referred to as being “formed on” another layer, region or element, it can be directly or indirectly formed on the other layer, region or element. That is, for example, intervening layers, regions or elements may be present.

[0029] For the convenience of explanation, the size of the elements in the drawings may be enlarged or reduced. In other words, since the size and thickness of the elements in the drawings are arbitrarily shown for the convenience of explanation, the following embodiments are not limited thereto.

[0030] When a specific embodiment can be implemented differently, the specific process order can be performed differently from the described order. For example, two processes described in succession can be performed substantially simultaneously or in the reverse order of the described order.

[0031] It should be understood that when a layer, region, or element is referred to as being “connected” to another layer, region, or element, it may be “directly connected” to the other layer, region, or element, and / or may be “indirectly connected” to the other layer, region, or element via other layers, regions, or elements. For example, it should be understood that when a layer, region, or element is referred to as being “electrically connected” to another layer, region, or element, it may be “directly electrically connected” to the other layer, region, or element, and / or may be “indirectly electrically connected” to the other layer, region, or element via other layers, regions, or elements.

[0032] The x-axis, y-axis, and z-axis are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.

[0033] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element as shown in the figure. It should be understood that, in addition to the orientations depicted in the figures, relative terms are also intended to cover different orientations of the device. For example, if the device in one of the figures is turned over, the element described as being on the "lower" side of the other elements will then be oriented to be on the "upper" side of the other elements. Therefore, the term "lower" can cover both the "lower" and "upper" orientations depending on the specific orientation of the figure. Similarly, if the device in one of the figures is turned over, the element described as being "below" or "under" the other elements will then be oriented to be "above" the other elements. Therefore, the term "lower" or "under" can cover both the orientations of the upper and lower sides.

[0034] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It should also be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and the present disclosure, and will not be interpreted in an idealized or overly rigid sense unless explicitly defined as such herein.

[0035] Embodiments are described herein with reference to schematically illustrated cross-sectional illustrations as idealized embodiments. Thus, variations in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances will be expected. Therefore, the embodiments described herein should not be construed as being limited to specific zone shapes as shown herein, but will include deviations in shape due to, for example, manufacturing. For example, a zone shown or described as flat may typically have rough and / or nonlinear features. In addition, the sharp corners shown may be rounded. Therefore, the zones shown in the figures are schematic in nature, and their shapes are not intended to illustrate the precise shape of the zones, and are not intended to limit the scope of the claims.

[0036] Hereinafter, the embodiments will be described in detail with reference to the accompanying drawings, in which the same or corresponding elements are denoted by the same reference numerals throughout and any repeated detailed description thereof may be omitted or simplified.

[0037] Figure 1 is a plan view schematically showing a display device 1 according to an embodiment, and Figure 2 It is schematically shown Figure 1 1 is a side view of the display device 1 shown in FIG.

[0038] Reference Figure 1 and Figure 2 The display device 1 may be implemented as an electronic device having a display screen in various products, such as a smart phone, a tablet computer, a notebook computer, a television, or a billboard.

[0039] In an embodiment, the display device 1 may include a display area DA and a peripheral area PA located outside the display area DA. The display area DA is a portion in which an image is displayed, and the image may be provided through a plurality of pixels. Each of the pixels may include sub-pixels that emit light of different colors from each other. In an embodiment, for example, the sub-pixels may emit red light, green light, or blue light through a light emitting diode LED.

[0040] When viewed from a direction substantially perpendicular to the display device 1 (ie, a direction perpendicular to the x-direction and the y-direction), the display device 1 may have various shapes, such as a circular shape, an elliptical shape, a polygonal shape, or a specific shape. Figure 1 In the embodiment, the display area DA has a substantially quadrilateral shape. However, in another embodiment, the display area DA may have a substantially quadrilateral shape including rounded edges.

[0041] The peripheral area PA may be arranged outside the display area DA. The peripheral area PA may completely surround the display area DA. A portion of the peripheral area PA (hereinafter referred to as a protruding peripheral area) may extend in a direction away from the display area DA (e.g., a -y direction). In other words, the display device 1 may include the display area DA, a main region MR including a portion of the peripheral area PA surrounding the display area DA, and a sub-region SR extending from the main region MR in one direction, and the sub-region SR may correspond to the above-mentioned protruding peripheral area. The width of the sub-region SR (e.g., the width in the ±x direction) may be smaller than the width of the main region MR (e.g., the width in the ±x direction), and as Figure 2 As shown in FIG, a portion of the sub-region SR may be curved. When the display device 1 is curved, as shown in FIG. Figure 2 As shown in , the peripheral area PA as a non-display area may be invisible when the display device 1 is viewed, or even when the peripheral area PA is visible, the visible area may be minimized.

[0042] The shape of the display device 1 may be substantially the same as that of the substrate 100 therein. In an embodiment, for example, the substrate 100 may also include a display area DA and a peripheral area PA. In an embodiment, for example, the substrate 100 may also include a main area MR and a sub-area SR.

[0043] The light emitting diode LED is arranged in the display area DA and may emit red light, green light or blue light. The light emitting diode LED may be an organic light emitting diode, an inorganic light emitting diode or a quantum dot light emitting diode.

[0044] The light emitting diode LED may be electrically connected to a circuit (hereinafter referred to as a driving circuit) PC for driving the light emitting diode. The driving circuit PC may include a transistor electrically connected to a signal line or a voltage line for controlling the on / off of the light emitting diode LED. Figure 1 As shown in , a scan line SL, an emission control line EL, and a data line DL may be provided as a signal line electrically connected to the transistor, and a vertical driving voltage line VDL may be provided as a voltage line. In the peripheral area PA, a common voltage supply line 10, a driving voltage supply line 20, a first scan driving circuit 31 and a second scan driving circuit 32, an emission control driving circuit 33, and a data driving circuit 40 may be arranged.

[0045] The common voltage supply line 10 may be arranged in the peripheral area PA. The common voltage supply line 10 may include a first common voltage input unit 11, a second common voltage input unit 12, and a third common voltage input unit 13 arranged adjacent to the first edge E1 of the display area DA. The first common voltage input unit 11 and the second common voltage input unit 12 may be offset from each other, and the third common voltage input unit 13 may be positioned between the first common voltage input unit 11 and the second common voltage input unit 12. The third common voltage input unit 13 may be offset from the first common voltage input unit 11 and the second common voltage input unit 12. The first common voltage input unit 11 and the second common voltage input unit 12 may be arranged at opposite ends of the first edge E1 of the display area DA, respectively, and the third common voltage input unit 13 may be arranged in the middle of the first edge E1 of the display area DA.

[0046] The first common voltage input unit 11 and the second common voltage input unit 12 may be connected to the main body unit 14 extending along the second edge E2, the third edge E3, and the fourth edge E4 of the display area DA. In an embodiment, the first common voltage input unit 11, the second common voltage input unit 12, and the main body unit 14 may be integrally connected to each other or integrally formed with each other as a single integral indivisible part.

[0047] The driving voltage supply line 20 may be arranged in the peripheral area PA and electrically connected to a vertical driving voltage line VDL passing through the display area DA in a column direction (e.g., ±y direction). In an embodiment, the driving voltage supply line 20 may include a first driving voltage input unit 21 and a second driving voltage input unit 22 located at opposite sides with the third common voltage input unit 13 therebetween.

[0048] In an embodiment, if Figure 1 As shown in , the common voltage supply line 10 includes a third common voltage input unit 13 located between the first common voltage input unit 11 and the second common voltage input unit 12. However, one or more embodiments are not limited thereto. In another embodiment, the third common voltage input unit 13 may be omitted, and the first driving voltage input unit 21 and the second driving voltage input unit 22 may be connected to each other integrally.

[0049] The first scan driving circuit 31 and the second scan driving circuit 32 may be arranged in the peripheral area PA and electrically connected to the scan lines SL. In an embodiment, some of the scan lines SL may be electrically connected to the first scan driving circuit 31, and the remaining ones may be electrically connected to the second scan driving circuit 32. The first scan driving circuit 31 and the second scan driving circuit 32 may generate scan signals, and the generated scan signals may be transmitted to the transistor electrically connected to the light emitting diode LED through the scan lines SL.

[0050] The emission control driving circuit 33 may be arranged on one side of the first scanning driving circuit 31, and may send an emission control signal to a transistor electrically connected to the light emitting diode LED. Figure 1 As shown in FIG, the emission control driving circuit 33 is arranged at one side of the display area DA. Similar to the first scan driving circuit 31 and the second scan driving circuit 32, the emission control driving circuit 33 may be arranged at opposite sides of the display area DA with the display area DA therebetween.

[0051] The data driving circuit 40 may be disposed in the sub-region SR. The data driving circuit 40 may transmit a data signal to a transistor electrically connected to the light emitting diode LED through the data line DL.

[0052] The first terminal unit TD1 may be positioned on one side of the substrate 100, for example, at one end of the sub-region SR. The printed circuit board 50 may be attached to the first terminal unit TD1. The printed circuit board 50 may include a second terminal unit TD2 electrically connected to the first terminal unit TD1, and a controller 60 may be provided on the printed circuit board 50. The control signal of the controller 60 may be provided to the first scan driving circuit 31 and the second scan driving circuit 32, the emission control driving circuit 33, the data driving circuit 40, the driving voltage supply line 20, and the common voltage supply line 10 through the first terminal unit TD1 and the second terminal unit TD2, respectively.

[0053] Figure 3 is an equivalent circuit diagram of a sub-pixel according to an embodiment.

[0054] Reference Figure 3 In an embodiment, the driving circuit PC of the sub-pixel may include a driving transistor T1, a data writing transistor T2, a compensation transistor T3, a first initialization transistor T4, an operation control transistor T5, an emission control transistor T6, a second initialization transistor T7 and a storage capacitor Cst.

[0055] In an embodiment, if Figure 3 As shown in , the signal lines SL, SL-1, SL+1, EL and DL, the initialization voltage line VL and the vertical drive voltage line VDL are provided in each drive circuit PC or connected to each drive circuit PC. However, one or more embodiments are not limited thereto. In another embodiment, at least one of the initialization voltage line VL and / or the signal lines SL, SL-1, SL+1, EL and DL may be shared between adjacent drive circuits PC.

[0056] A drain electrode of the driving transistor T1 may be electrically connected to the light emitting diode LED via the emission control transistor T6. The driving transistor T1 may receive the data signal Dm based on a switching operation of the data writing transistor T2 and supply a driving current to the light emitting diode LED.

[0057] The gate electrode of the data writing transistor T2 may be electrically connected to the scan line SL, and the source electrode thereof may be electrically connected to the data line DL. The drain electrode of the data writing transistor T2 may be electrically connected to the vertical driving voltage line VDL via the operation control transistor T5 and to the source electrode of the driving transistor T1.

[0058] The data write transistor T2 may be turned on in response to a scan signal Sn received through the scan line SL, and may perform a switching operation for transferring a data signal Dm received through the data line DL to a source electrode of the driving transistor T1 .

[0059] The gate electrode of the compensation transistor T3 may be electrically connected to the scan line SL. The source electrode of the compensation transistor T3 may be electrically connected to a first electrode (e.g., an anode or a pixel electrode) of the light emitting diode LED via the emission control transistor T6, and electrically connected to a drain electrode of the driving transistor T1. The drain electrode of the compensation transistor T3 may be electrically connected to one electrode of the storage capacitor Cst, a source electrode of the first initialization transistor T4, and a gate electrode of the driving transistor T1. The compensation transistor T3 may be turned on in response to a scan signal Sn received via the scan line SL to electrically connect the gate electrode of the driving transistor T1 to the drain electrode of the driving transistor T1, thereby connecting the driving transistor T1 in a diode manner.

[0060] The gate electrode of the first initialization transistor T4 may be electrically connected to the previous scan line SL-1. The drain electrode of the first initialization transistor T4 may be electrically connected to the initialization voltage line VL. The source electrode of the first initialization transistor T4 may be electrically connected to one electrode of the storage capacitor Cst, the drain electrode of the compensation transistor T3, and the gate electrode of the driving transistor T1. The first initialization transistor T4 may be turned on according to the previous scan signal Sn-1 received via the previous scan line SL-1, and may transmit the initialization voltage Vint to the gate electrode of the driving transistor T1 to perform an initialization operation for initializing the voltage of the gate electrode of the driving transistor T1.

[0061] The gate electrode of the operation control transistor T5 may be electrically connected to the emission control line EL. The source electrode of the operation control transistor T5 may be electrically connected to the vertical driving voltage line VDL. The drain electrode of the operation control transistor T5 may be electrically connected to the source electrode of the driving transistor T1 and the drain electrode of the data writing transistor T2.

[0062] The gate electrode of the emission control transistor T6 may be electrically connected to the emission control line EL. The source electrode of the emission control transistor T6 may be electrically connected to the drain electrode of the driving transistor T1 and the source electrode of the compensation transistor T3. The drain electrode of the emission control transistor T6 may be electrically connected to a first electrode (e.g., an anode or a pixel electrode) of the light emitting diode LED. The operation control transistor T5 and the emission control transistor T6 may be synchronously turned on in response to an emission control signal En received via the emission control line EL, so that the first power supply voltage ELVDD is transmitted to the light emitting diode LED, and a driving current flows through the light emitting diode LED.

[0063] The gate electrode of the second initialization transistor T7 may be electrically connected to the next scan line SL+1. The source electrode of the second initialization transistor T7 may be electrically connected to the first electrode (e.g., an anode or a pixel electrode) of the light emitting diode LED. The drain electrode of the second initialization transistor T7 may be electrically connected to the initialization voltage line VL. The second initialization transistor T7 may be turned on in response to the next scan signal Sn+1 received via the next scan line SL+1 to initialize the first electrode (e.g., an anode or a pixel electrode) of the light emitting diode LED.

[0064] In an embodiment, if Figure 3 As shown in , the first initialization transistor T4 and the second initialization transistor T7 are respectively connected to the previous scan line SL-1 and the next scan line SL+1. However, one or more embodiments are not limited thereto. In another embodiment, both the first initialization transistor T4 and the second initialization transistor T7 may be electrically connected to the previous scan line SL-1 to be driven according to the previous scan signal Sn-1.

[0065] One electrode of the storage capacitor Cst may be electrically connected to the gate electrode of the driving transistor T1, the drain electrode of the compensation transistor T3, and the source electrode of the first initialization transistor T4. The other electrode of the storage capacitor Cst may be electrically connected to the vertical driving voltage line VDL.

[0066] The second electrode (eg, cathode) of the light emitting diode LED may receive the common voltage ELVSS. The light emitting diode LED may receive a driving current from the driving transistor T1 to emit light. For example, the second electrode (eg, cathode) of the light emitting diode LED may be electrically connected to the reference Figure 1 A common voltage supply line 10 is described.

[0067] The drive circuit PC is not limited to the reference Figure 3 The number and circuit design of transistors and storage capacitors are described, and the number and circuit design may be modified in various ways.

[0068] Figure 4 is a cross-sectional view showing a portion of a display area DA of a display device according to an embodiment.

[0069] Reference Figure 4 In an embodiment, the light emitting diode LED is arranged in the display area DA, and the light emitting diode LED may be electrically connected to the driving circuit PC in a direction (eg, +z direction) perpendicular to the substrate 100. In such an embodiment, the driving circuit PC may be disposed between the substrate 100 and the light emitting diode LED.

[0070] The substrate 100 may include a glass material or a polymer resin. In an embodiment, the substrate 100 may have an alternating stacked structure of a base layer including a polymer resin and a barrier layer including an inorganic insulating material such as silicon oxide or silicon nitride. The polymer resin may include polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, etc.

[0071] Before forming the driving circuit PC, a buffer layer 201 may be formed on the substrate 100 to prevent impurities from penetrating into the driving circuit PC. The buffer layer 201 may include an inorganic insulating material such as silicon nitride, silicon oxynitride, and / or silicon oxide, and may include a single-layer structure or a multi-layer structure in which each layer includes at least one selected from the above inorganic insulating materials.

[0072] The driving circuit PC may include the above reference Figure 3 A plurality of transistors and storage capacitors are described, and with respect thereto, Figure 4 A driving transistor T1 , a data writing transistor T2 , an emission control transistor T6 , and a storage capacitor Cst are shown.

[0073] The driving transistor T1 may include a semiconductor layer (hereinafter referred to as a "driving semiconductor layer") A1 located on the buffer layer 201 and a driving gate electrode GE1 overlapping a channel region C1 of the driving semiconductor layer A1. The driving semiconductor layer A1 may include a silicon-based semiconductor material, for example, polycrystalline silicon. The driving semiconductor layer A1 may include a channel region C1, a first region B1 and a second region D1, wherein the first region B1 and the second region D1 are arranged at opposite sides of the channel region C1, respectively. The first region B1 and the second region D1 are regions including an impurity concentration higher than that of the channel region C1, and one of the first region B1 and the second region D1 may correspond to a source region, and the remaining one may correspond to a drain region.

[0074] A first gate insulating layer 203 may be disposed between the driving semiconductor layer A1 and the driving gate electrode GE1. The first gate insulating layer 203 may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride, and may include a single layer structure or a multilayer structure each layer of which includes at least one selected from the above inorganic insulating materials.

[0075] The driving gate electrode GE1 may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and may include a single layer structure or a multilayer structure in which each layer includes at least one selected from the above materials.

[0076] The storage capacitor Cst may include a first capacitor electrode CE1 and a second capacitor electrode CE2 overlapping each other. In an embodiment, the first capacitor electrode CE1 of the storage capacitor Cst may include a driving gate electrode GE1. In other words, the driving gate electrode GE1 may include the first capacitor electrode CE1 of the storage capacitor Cst. In an embodiment, for example, the driving gate electrode GE1 and the first capacitor electrode CE1 of the storage capacitor Cst may be integrally formed with each other as a single integral indivisible portion.

[0077] A first interlayer insulating layer 205 may be disposed between the first capacitor electrode CE1 and the second capacitor electrode CE2 of the storage capacitor Cst. The first interlayer insulating layer 205 may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride, and may include a single-layer structure or a multi-layer structure in which each layer includes at least one selected from the above inorganic insulating materials.

[0078] The second capacitor electrode CE2 of the storage capacitor Cst may include a low resistance conductive material such as Mo, Al, Cu, and / or Ti, and may include a single layer structure or a multilayer structure in which each layer includes at least one selected from the above materials.

[0079] A second interlayer insulating layer 207 may be disposed on the storage capacitor Cst. The second interlayer insulating layer 207 may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride, and may include a single layer structure or a multilayer structure each layer of which includes at least one selected from the above inorganic insulating materials.

[0080] The first connection metal CM1 may be disposed on the second interlayer insulating layer 207 and electrically connected to the second capacitor electrode CE2 via a contact hole defined by the second interlayer insulating layer 207. The first connection metal CM1 may be electrically connected to the vertical driving voltage line VDL.

[0081] The vertical driving voltage line VDL may be disposed on the second organic insulating layer 212 and electrically connected to the horizontal driving voltage line HDL. The horizontal driving voltage line HDL may be disposed on the second organic insulating layer 212 and electrically connected to the horizontal driving voltage line HDL. Figure 1 The vertical driving voltage line VDL may extend in the ±x direction in the horizontal driving voltage line HDL (eg, Figure 1 The vertical driving voltage line VDL and / or the horizontal driving voltage line HDL may be electrically connected to the reference line. Figure 1 The driving voltage supply line 20 is described.

[0082] The horizontal driving voltage line HDL may be connected to the first connection metal CM1 via a contact hole defined by a first insulating layer (e.g., a first organic insulating layer 211), and the vertical driving voltage line VDL may be connected to the horizontal driving voltage line HDL via a contact hole defined by a second insulating layer (e.g., a second organic insulating layer 212). The first organic insulating layer 211 may be disposed on the second interlayer insulating layer 207, and the second organic insulating layer 212 may be disposed on the first organic insulating layer 211. The first organic insulating layer 211 and the second organic insulating layer 212 may include an organic insulating material. The organic insulating material may include benzocyclobutene (BCB), polyimide, or hexamethyldisiloxane (HMDSO). The vertical driving voltage line VDL has a connection structure with the horizontal driving voltage line HDL, thereby effectively preventing a voltage drop due to the resistance of the vertical driving voltage line VDL.

[0083] A horizontal common voltage line HSL may be disposed on the first organic insulating layer 211, and a vertical common voltage line VSL may be disposed on the second organic insulating layer 212. The vertical common voltage line VSL may be electrically connected to the horizontal common voltage line HSL via a contact hole defined by the second organic insulating layer 212. The horizontal common voltage line HSL may be disposed on the second organic insulating layer 212. Figure 1 The vertical common voltage line VSL may extend in the ±x direction in the horizontal common voltage line HSL, and the vertical common voltage line VSL may extend in the ±x direction in the horizontal common voltage line HSL. Figure 1 The vertical common voltage line VSL and / or the horizontal common voltage line HSL may be electrically connected to the above reference Figure 1 A common voltage supply line 10 is described.

[0084] The data write transistor T2 may include a semiconductor layer (hereinafter referred to as a data write semiconductor layer) A2 located on the buffer layer 201 and a data write gate electrode GE2. The data write semiconductor layer A2 may include a silicon-based semiconductor material, for example, polycrystalline silicon. The data write semiconductor layer A2 may include a channel region C2, a first region B2 and a second region D2, wherein the first region B2 and the second region D2 are arranged at opposite sides of the channel region C2. The first region B2 and the second region D2 are regions including an impurity concentration higher than that of the channel region C2, and one of the first region B2 and the second region D2 may correspond to a source region, and the remaining one may correspond to a drain region.

[0085] The data writing semiconductor layer A2 may be connected to the data line DL via the second connection metal CM2 disposed on the second interlayer insulating layer 207 and the third connection metal CM3 disposed on the first organic insulating layer 211. The data line DL may be disposed on the second organic insulating layer 212 and connected to the third connection metal CM3 via a contact hole defined by the second organic insulating layer 212, and the third connection metal CM3 may be connected to the second connection metal CM2 via a contact hole defined by the first organic insulating layer 211.

[0086] The emission control transistor T6 may include a semiconductor layer (hereinafter referred to as an emission control semiconductor layer) A6 located on the buffer layer 201 and an emission control gate electrode GE6. The emission control semiconductor layer A6 may include a silicon-based semiconductor material, for example, polycrystalline silicon. The emission control semiconductor layer A6 may include a channel region C6, a first region B6 and a second region D6, wherein the first region B6 and the second region D6 are arranged at opposite sides of the channel region C6, respectively. The first region B6 and the second region D6 are regions including an impurity concentration higher than that of the channel region C6, and one of the first region B6 and the second region D6 may correspond to a source region, and the remaining one may correspond to a drain region.

[0087] The emission control transistor T6 may be electrically connected to the first electrode 221 of the light emitting diode LED via the fourth connection metal CM4 , the fifth connection metal CM5 , and the via connection metal ACM.

[0088] The fourth connection metal CM4 may be arranged in the same layer as the layer in which the first connection metal CM1 and the second connection metal CM2 are arranged (or directly on the same layer as the layer on which the first connection metal CM1 and the second connection metal CM2 are directly arranged), for example, on the second interlayer insulating layer 207. The first connection metal CM1, the second connection metal CM2, and the fourth connection metal CM4 may include aluminum (Al), copper (Cu), and / or titanium (Ti), and may have one layer or a plurality of layers each including at least one selected from the foregoing materials.

[0089] The fifth connection metal CM5 may be arranged in the same layer as the layer in which the third connection metal CM3, the horizontal driving voltage line HDL, and the horizontal common voltage line HSL are arranged (or directly on the same layer on which the third connection metal CM3, the horizontal driving voltage line HDL, and the horizontal common voltage line HSL are directly arranged), for example, on the first organic insulating layer 211. The fifth connection metal CM5, the third connection metal CM3, the horizontal driving voltage line HDL, and the horizontal common voltage line HSL may include Al, Cu, and / or Ti, and may have one layer or a plurality of layers each including at least one selected from the foregoing materials.

[0090] The via connection metal ACM may be disposed on the same layer on which the data line DL, the vertical driving voltage line VDL, and the vertical common voltage line VSL are disposed, for example, on the second organic insulating layer 212. The via connection metal ACM, the data line DL, the vertical driving voltage line VDL, and the vertical common voltage line VSL may include Al, Cu, and / or Ti, and may have one layer or a plurality of layers each including at least one selected from the foregoing materials.

[0091] The third insulating layer (eg, third organic insulating layer 213) may be disposed on the via connection metal ACM, the data line DL, the vertical driving voltage line VDL, and the vertical common voltage line VSL. The third organic insulating layer 213 may include an organic insulating material such as acrylic, BCB, polyimide, and / or HMDSO.

[0092] The light emitting diode LED may be disposed on the third organic insulating layer 213. The first electrode 221 of the light emitting diode LED may be connected to the via connection metal ACM via a via contact hole 213CNT defined by the third organic insulating layer 213.

[0093] The first electrode 221 of the light emitting diode LED may include a reflective film containing silver (Ag), magnesium (Mg), Al, platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr) or any compound thereof. In another embodiment, the first electrode 221 may further include a conductive oxide layer located above and / or below the reflective film. The conductive oxide layer may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO) and / or aluminum zinc oxide (AZO). In an implementation, the first electrode 221 may have a triple-layer structure of an ITO layer, an Ag layer, and another ITO layer.

[0094] A bank layer 215 may be disposed on the first electrode 221. The bank layer 215 may be provided with an opening overlapping the first electrode 221 and may cover an edge of the first electrode 221. The bank layer 215 may include an organic insulating material. Alternatively, the bank layer 215 may include a pigment or dye capable of absorbing light.

[0095] The intermediate layer 222 may include an emission layer 222b. The intermediate layer 222 may include a first functional layer 222a disposed below the emission layer 222b and / or a second functional layer 222c disposed above the emission layer 222b. The emission layer 222b may include a polymer or a low molecular weight organic material that emits light of a specific color. The second functional layer 222c may include an electron transport layer (ETL) and / or an electron injection layer (EIL). The first functional layer 222a and the second functional layer 222c may include organic materials.

[0096] The second electrode 223 may include a conductive material having a low work function. In an embodiment, for example, the second electrode 223 may include a (semi) transparent layer including Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, calcium (Ca) or any alloy thereof. Alternatively, the second electrode 223 may also include an ITO layer, an IZO layer, a ZnO layer or an Indium oxide layer on the (semi) transparent layer including the above materials. 2 O 3 Layers of layers.

[0097] The emission layer 222b may be formed in the display area DA to overlap the first electrode 221 via an opening defined in the bank layer 215. In an embodiment, the first functional layer 222a, the second functional layer 222c, and the second electrode 223 may completely cover the display area DA.

[0098] A spacer 217 may be formed on the bank layer 215. The spacer 217 may be formed together with the bank layer 215 in the same process, or may be formed separately in a separate process. In an implementation, the spacer 217 may include an organic insulating material such as polyimide.

[0099] The light emitting diode LED may be covered by an encapsulation layer 300. The encapsulation layer 300 may include at least one organic encapsulation layer and at least one inorganic encapsulation layer. Figure 4 As shown in FIG. 1 , the encapsulation layer 300 includes a first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330 and an organic encapsulation layer 320 located therebetween.

[0100] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include at least one inorganic material selected from silicon oxide, silicon nitride, and silicon oxynitride. The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include one or more layers each including at least one selected from the above materials. The organic encapsulation layer 320 may include a polymer-based material. The polymer-based material may include an acrylic resin, an epoxy resin, a polyimide, and polyethylene. In an embodiment, the organic encapsulation layer 320 may include an acrylate.

[0101] Figure 5Ais a plan view schematically showing the arrangement of sub-pixels in a display area DA of a display device according to an embodiment, and Figure 5B is a plan view schematically showing the arrangement of light emitting diodes in a display area DA of a display device according to an embodiment.

[0102] Reference Figure 5A In an embodiment, a first sub-pixel emitting light of a first color, a second sub-pixel emitting light of a second color, and a third sub-pixel emitting light of a third color may be arranged in a display area DA. The first sub-pixel, the second sub-pixel, and the third sub-pixel are sub-pixels emitting light of different colors from each other, and one of the sub-pixels may be a red sub-pixel Pr, another may be a green sub-pixel Pg, and the remaining one may be a blue sub-pixel Pb. Hereinafter, for the convenience of description, an embodiment in which the first sub-pixel is a red sub-pixel Pr emitting red light, the second sub-pixel is a green sub-pixel Pg emitting green light, and the third sub-pixel is a blue sub-pixel Pb emitting blue light will be described in detail. However, the scope of one or more embodiments is not limited thereto. In another embodiment, the first sub-pixel may be a green or blue sub-pixel, the second sub-pixel may be a red or blue sub-pixel, and the third sub-pixel may be a red or green sub-pixel.

[0103] In an embodiment, if Figure 5A As shown in , the red sub-pixel Pr and the blue sub-pixel Pb may be arranged at the vertices of a first imaginary quadrilateral VQA1 centered on the green sub-pixel Pg. In an embodiment, for example, two red sub-pixels Pr may be arranged at opposite vertices of the first imaginary quadrilateral VQA1 along the first diagonal direction ob1 with the green sub-pixel Pg in between. Two blue sub-pixels Pb may be arranged at opposite vertices of the first imaginary quadrilateral VQA1 along the second diagonal direction ob2 with the green sub-pixel Pg in between.

[0104] The green sub-pixel Pg may be arranged at the vertices of a second imaginary quadrilateral VQA2 centered on the blue sub-pixel Pb or at the vertices of a third imaginary quadrilateral VQA3 centered on the red sub-pixel Pr. Figure 5A As shown in , the four green sub-pixels Pg may be respectively arranged at the vertices of the second imaginary quadrilateral VQA2 centered on the blue sub-pixel Pb. In such an embodiment, the four green sub-pixels Pg may be respectively arranged at the vertices of the third imaginary quadrilateral VQA3 centered on the red sub-pixel Pr.

[0105] Each of the red sub-pixel Pr and the blue sub-pixel Pb may have a quadrilateral shape, for example, a rhombus shape or a rhombus (for example, a square) shape. The green sub-pixel Pg may have a quadrilateral shape, for example, a rhombus shape having two sides of different lengths. Two adjacent green sub-pixels Pg among the green sub-pixels Pg arranged in a row or a column may extend in directions different from each other, that is, the longitudinal (or length) directions of the two adjacent green sub-pixels Pg are different from each other. In an embodiment, for example, the green sub-pixels Pg arranged in a row direction (for example, ±x direction or scan line SL (see Figure 1 ) or in a column direction (eg, ±y direction or data line DL (see Figure 1 ) may extend in the first diagonal direction ob1, and another green sub-pixel Pg adjacent thereto may extend in the second diagonal direction ob2.

[0106] Along a row or in the same row, the green sub-pixels Pg extending in the first diagonal direction ob1 and the green sub-pixels Pg extending in the second diagonal direction ob2 may be alternately arranged. Here, when the green sub-pixels Pg are arranged along a row, it may be indicated that the green sub-pixels Pg are arranged in the ±x direction. Along a column or in the same column, the green sub-pixels Pg extending in the first diagonal direction ob1 and the green sub-pixels Pg extending in the second diagonal direction ob2 may be alternately arranged. Here, when the green sub-pixels Pg are arranged along a column, it may be indicated that the green sub-pixels Pg are arranged in the ±y direction.

[0107] Along a row adjacent to a row in which the green sub-pixel Pg is arranged, the red sub-pixel Pr and the blue sub-pixel Pb may be alternately arranged. Here, when the red sub-pixel Pr and the blue sub-pixel Pb are arranged along a row, it may be indicated that the red sub-pixel Pr and the blue sub-pixel Pb are arranged in the ±x direction. Along a column adjacent to a column in which the green sub-pixel Pg is arranged, the red sub-pixel Pr and the blue sub-pixel Pb may be alternately arranged. Here, when the red sub-pixel Pr and the blue sub-pixel Pb are arranged along a column, it may be indicated that the red sub-pixel Pr and the blue sub-pixel Pb are arranged in the ±y direction.

[0108] Sub-pixels can emit light of a specific color through light-emitting diodes. Figure 5BIn an embodiment, the red sub-pixel Pr may emit red light through a red light emitting diode LEDr disposed at a corresponding position, the green sub-pixel Pg may emit green light through a green light emitting diode LEDg disposed at a corresponding position, and the blue sub-pixel Pb may emit blue light through a blue light emitting diode LEDb disposed at a corresponding position. The emission area of ​​the light emitting diode may correspond to (or define) a sub-pixel. In an embodiment, for example, the emission area of ​​the red light emitting diode LEDr may correspond to the red sub-pixel Pr, the emission area of ​​the green light emitting diode LEDg may correspond to the green sub-pixel Pg, and the emission area of ​​the blue light emitting diode LEDb may correspond to the blue sub-pixel Pb.

[0109] Reference Figure 5A The arrangement of the red sub-pixel Pr, the green sub-pixel Pg, and the blue sub-pixel Pb described by using the first imaginary quadrilateral VQA1, the second imaginary quadrilateral VQA2, and the third imaginary quadrilateral VQA3 is similar to Figure 5B The arrangement of the red light emitting diodes LEDr, the green light emitting diodes LEDg, and the blue light emitting diodes LEDb shown in FIG. 1 is substantially the same.

[0110] The red light emitting diode LEDr and the blue light emitting diode LEDb may be arranged at the vertices of the first imaginary quadrilateral VQA1 centered on the green light emitting diode LEDg. In an embodiment, for example, the two red light emitting diodes LEDr may be arranged at opposite vertices on the first diagonal direction ob1 of the first imaginary quadrilateral VQA1 across the green light emitting diode LEDg. The two blue light emitting diodes LEDb may be arranged at opposite vertices on the second diagonal direction ob2 of the first imaginary quadrilateral VQA1 across the green light emitting diode LEDg.

[0111] The green light emitting diode LEDg may be arranged at the vertices of the second imaginary quadrilateral VQA2 or the third imaginary quadrilateral VQA3 centered on the blue light emitting diode LEDb or the red light emitting diode LEDr, respectively. Figure 5B As shown in , the four green light emitting diodes LEDg can be respectively arranged at the vertices of the second imaginary quadrilateral VQA2 centered on the blue light emitting diode LEDb. In such an embodiment, the four green light emitting diodes LEDg can be respectively arranged at the vertices of the third imaginary quadrilateral VQA3 centered on the red light emitting diode LEDr.

[0112] Fig. 6A is a plan view showing a driving circuit, lines electrically connected to the driving circuit, and a light emitting diode arranged in a display area DA of a display device according to an embodiment.

[0113] Reference Fig. 6AIn an embodiment, a first driving circuit PCr electrically connected to the red light emitting diode LEDr, a second driving circuit PCg electrically connected to the green light emitting diode LEDg, and a third driving circuit PCb electrically connected to the blue light emitting diode LEDb may be arranged in the display area DA. Each of the first driving circuit PCr, the second driving circuit PCg, and the third driving circuit PCb may be the same as that described above with reference to Figure 3 For example, each of the first drive circuit PCr, the second drive circuit PCg, and the third drive circuit PCb may include reference Figure 3 A transistor and a storage capacitor are described.

[0114] A plurality of first drive circuits PCr may be arranged in a column direction (eg, ±y direction). A plurality of second drive circuits PCg may be arranged in a column direction (eg, ±y direction), and a plurality of third drive circuits PCb may be arranged in a column direction (eg, ±y direction). In an embodiment, for example, Fig. 6A As shown in , the column of the second driving circuit PCg can be arranged between the column of the first driving circuit PCr and the column of the third driving circuit PCb. Fig. 6A As shown in FIG. 1 , columns of the first driving circuit PCr, columns of the second driving circuit PCg, columns of the third driving circuit PCb, and columns of the second driving circuit PCg may be repeatedly arranged along a row direction (eg, ±x direction).

[0115] The drive circuits arranged in the corresponding columns may be electrically connected to the data lines DL, the vertical conductive lines BRS, and the vertical driving voltage lines VDL. In an embodiment, for example, each of the columns of the first drive circuits PCr, the columns of the second drive circuits PCg, and the columns of the third drive circuits PCb may be electrically connected to the data lines DL, the vertical conductive lines BRS, and the vertical driving voltage lines VDL passing through the corresponding columns.

[0116] The positions of the data line DL, the vertical conductive line BRS and the vertical drive voltage line VDL that pass through or extend through one of the columns of the first drive circuit PCr, the column of the second drive circuit PCg and the column of the third drive circuit PCb may be substantially the same as the data line DL, the vertical conductive line BRS and the vertical drive voltage line VDL that pass through or extend through another column of the columns of the first drive circuit PCr, the column of the second drive circuit PCg and the column of the third drive circuit PCb.

[0117] The data line DL and the vertical driving voltage line VDL are respectively Figure 3 and Figure 4 The vertical conductive line BRS may be referred to as Figure 4The vertical common voltage line VSL described above may be a data connection line for providing a data signal to a driving circuit arranged in a column other than the column of the driving circuit through which the vertical conductive line BRS passes or extends. In an embodiment, the vertical conductive line BRS passing or extending through a column may have a similar structure to that described in reference to Figure 1 The common voltage supply line 10 described above has the same voltage level (eg, a voltage level of a constant voltage) as the vertical common voltage line VSL (see Figure 4 ). In another embodiment, the vertical conductive line BRS passing through or extending through one column may be a data connection line for transmitting a data signal to a data line electrically connected to a driving voltage line arranged in another column.

[0118] The first electrode 221r ​​of the red light emitting diode LEDr can be electrically connected to the corresponding first driving circuit PCr through the first via connection metal ACMr. The first via connection metal ACMr is the same as the above reference Figure 4 The via connection metal ACM described above corresponds to the configuration and can be separated by a third insulating layer (eg, a third organic insulating layer 213 (see Figure 4 )) is disposed under the first electrode 221r. The first electrode 221r ​​of the red light emitting diode LEDr may be formed via the third organic insulating layer 213 (see Figure 4 ) is connected to the first via contact hole 213CNTr of the red light emitting diode LEDr. The first via contact hole 213CNTr may be a contact portion (or contact point) of the first electrode 221r ​​of the red light emitting diode LEDr and the first via connection metal ACMr.

[0119] The first electrode 221g of the green light emitting diode LEDg can be electrically connected to the corresponding second driving circuit PCg through the second via connection metal ACMg. The second via connection metal ACMg is the same as the above reference Figure 4 The via connection metal ACM described above corresponds to the configuration and can be separated by a third insulating layer (eg, a third organic insulating layer 213 (see Figure 4 )) is disposed under the first electrode 221g. The first electrode 221g of the green light emitting diode LEDg may be formed via the third organic insulating layer 213 (see Figure 4 ) is connected to the second via contact hole 213CNTg of the green light emitting diode LEDg. The second via contact hole 213CNTg may be a contact portion (or contact point) between the first electrode 221g of the green light emitting diode LEDg and the second via connection metal ACMg.

[0120] The first electrode 221b of the blue light emitting diode LEDb can be electrically connected to the corresponding third driving circuit PCb through the third via connection metal ACMb. The third via connection metal ACMb is the same as the above reference Figure 4 The via connection metal ACM described above corresponds to the configuration and can be separated by a third insulating layer (eg, a third organic insulating layer 213 (see Figure 4 )) is disposed under the first electrode 221b. The first electrode 221b of the blue light emitting diode LEDb may be formed via the third organic insulating layer 213 (see Figure 4 ) is connected to the third via contact hole 213CNTb of the blue light emitting diode LEDb. The third via contact hole 213CNTb may be a contact portion (or contact point) between the first electrode 221b of the blue light emitting diode LEDb and the third via connection metal ACMb.

[0121] According to one or more embodiments, Fig. 6A In the structure shown in FIG, the overlapping area between the vertical conductive line BRS and the first electrode 221r ​​of the red light emitting diode LEDr, the first electrode 221g of the green light emitting diode LEDg, and the first electrode 221b of the blue light emitting diode LEDb can be minimized, and therefore, the coupling therebetween can be significantly reduced or minimized.

[0122] Reference Figure 4 and Fig. 6A In an embodiment, the first via connection metal ACMr electrically connected to the sixth transistor of the first driving circuit PCr may extend in the column direction (e.g., in the ±y direction). A first end of two opposite ends of the first via connection metal ACMr may be electrically connected to the sixth transistor of the first driving circuit PCr, and a second end of two opposite ends of the first via connection metal ACMr may be connected to the first electrode 221r ​​of the red light emitting diode LEDr.

[0123] The emission area of ​​the red light emitting diode LEDr (or the red sub-pixel Pr) may or may not overlap with the corresponding first driving circuit PCr at least partially, that is, at least a portion of the emission area of ​​the red light emitting diode LEDr (or the red sub-pixel Pr) may not overlap with the corresponding first driving circuit PCr. In an embodiment, Fig. 6A As shown in , the emission area of ​​the red light emitting diode LEDr electrically connected to one of the two adjacent first drive circuits PCr arranged in the same column may partially overlap with the corresponding first drive circuit PCr and / or second drive circuit PCg. The emission area of ​​the red light emitting diode LEDr electrically connected to the other of the two adjacent first drive circuits PCr arranged in the same column may partially overlap with a drive circuit other than the corresponding first drive circuit PCr (for example, the second drive circuit PCg and / or the third drive circuit PCb).

[0124] The positions of the first via connection metal ACMr in the corresponding first driving circuits PCr may be identical to each other. The first electrodes 221r ​​of the two red light emitting diodes LEDr electrically connected to the two adjacent first driving circuits PCr arranged in the same column may extend or be arranged in opposite directions relative to an imaginary line passing through the first via contact hole 213CNTr and the first via connection metal ACMr.

[0125] In an embodiment, for example, the first electrode 221r ​​of the red light emitting diode LEDr electrically connected to one of two adjacent first driving circuits PCr arranged in the same column may be connected from an imaginary line (for example, as described below with reference to FIG. 1 ) passing through the first via contact hole 213CNTr and the first via connection metal ACMr. Figure 6B The third imaginary line VL3 described above extends in the -x direction (see Fig. 6A The first electrode 221r ​​of the red light emitting diode LEDr electrically connected to the other of the two adjacent first driving circuits PCr arranged in the same column can be connected from the above-mentioned imaginary line (for example, refer to Figure 6B The third imaginary line VL3 described above extends in the +x direction (see Fig. 6A ).

[0126] Reference Figure 4 and Fig. 6A , the second via connection metal ACMg electrically connected to the sixth transistor of the second driving circuit PCg may extend in the column direction (e.g., in the ±y direction). A first end of two opposite ends of the second via connection metal ACMg may be electrically connected to the sixth transistor of the second driving circuit PCg, and a second end of two opposite ends of the second via connection metal ACMg may be connected to the first electrode 221g of the green light emitting diode LEDg.

[0127] The emission area of ​​the green light emitting diode LEDg (or the green sub-pixel Pg) and the corresponding second driving circuit PCg may at least partially overlap or may not overlap. Fig. 6A As shown in the figure, each of the emission areas of the green light emitting diodes LEDg electrically connected to the corresponding two adjacent second drive circuits PCg arranged in the same column may not overlap with the corresponding second drive circuit PCg, but may overlap with other drive circuits (for example, the first drive circuit PCr and / or the third drive circuit PCb).

[0128] The positions of the second via connection metal ACMg in the corresponding second driving circuits PCg may be identical to each other. The first electrodes 221g of the two green light emitting diodes LEDg electrically connected to the two adjacent second driving circuits PCg arranged in the same column may extend or be arranged in the same direction relative to an imaginary line passing through the second via contact hole 213CNTg and the second via connection metal ACMg.

[0129] In an embodiment, for example, the first electrode 221g of the green light emitting diode LEDg electrically connected to one of two adjacent second driving circuits PCg arranged in the same column may be connected from an imaginary line (for example, as shown below) passing through the second via contact hole 213CNTg and the second via connecting metal ACMg. Figure 6B The fourth imaginary line VL4 described above extends in the +x direction (see Fig. 6A Similarly, the first electrode 221g of the green light emitting diode LEDg electrically connected to the other of the two adjacent second driving circuits PCg arranged in the same column can be connected from the above-mentioned imaginary line (for example, refer to Figure 6B The fourth imaginary line VL4 described above extends in the +x direction (see Fig. 6A ).

[0130] Reference Figure 4 and Fig. 6A , the third via connection metal ACMb electrically connected to the sixth transistor of the third driving circuit PCb may extend in the column direction (e.g., in the ±y direction). A first end of two opposite ends of the third via connection metal ACMb may be electrically connected to the sixth transistor of the third driving circuit PCb, and a second end of two opposite ends of the third via connection metal ACMb may be connected to the first electrode 221b of the blue light emitting diode LEDb.

[0131] The emission area of ​​the blue light emitting diode LEDb (or the blue sub-pixel Pb) and the corresponding third driving circuit PCb may at least partially overlap or may not overlap. Fig. 6A As shown in , the emission area of ​​the blue light emitting diode LEDb electrically connected to one of the two adjacent third driving circuits PCb arranged in the same column may partially overlap with the corresponding third driving circuit PCb and the second driving circuit PCg. The emission area of ​​the blue light emitting diode LEDb electrically connected to the other of the two adjacent third driving circuits PCb arranged in the same column may partially overlap with the driving circuits other than the corresponding third driving circuit PCb (for example, the first driving circuit PCr and / or the second driving circuit PCg).

[0132] The positions of the third via connection metal ACMb in the corresponding third driving circuits PCb may be identical to each other. The first electrodes 221b of the two blue light emitting diodes LEDb electrically connected to the two adjacent third driving circuits PCb arranged in the same column may extend or be arranged in opposite directions relative to an imaginary line passing through the third via contact hole 213CNTb and the third via connection metal ACMb.

[0133] In an embodiment, for example, the first electrode 221b of the blue light emitting diode LEDb electrically connected to one of two adjacent third driving circuits PCb arranged in the same column may be connected from an imaginary line (for example, as described below with reference to FIG. 1 ) passing through the third via contact hole 213CNTb and the third via connection metal ACMb. Figure 6B The fifth imaginary line VL5) described herein extends in the -x direction (see Fig. 6A In such an embodiment, the first electrode 221b of the blue light emitting diode LEDb electrically connected to the other of the two adjacent third driving circuits PCb arranged in the same column can be connected from the above-mentioned imaginary line (for example, refer to Figure 6B The fifth imaginary line VL5 described above extends in the +x direction (see Fig. 6A ).

[0134] In some embodiments, each of the first via connection metal ACMr, the second via connection metal ACMg, and the third via connection metal ACMb may extend in a column direction (e.g., ±y direction). In an embodiment, for example, the first via connection metal ACMr may extend from the first via contact hole 213CNTr as a contact portion with the first electrode 221r ​​of the red light emitting diode LEDr in one direction (e.g., -y direction). The second via connection metal ACMg may extend from the second via contact hole 213CNTg as a contact portion with the first electrode 221g of the green light emitting diode LEDg in the opposite direction of the one direction (e.g., +y direction). The third via connection metal ACMb may extend from the third via contact hole 213CNTb as a contact portion with the first electrode 221b of the blue light emitting diode LEDb in the one direction (e.g., -y direction).

[0135] The two second driving circuits PCg arranged in the same column may be respectively connected to the second via connection metal ACMg extending in the -y direction and the first electrode 221g of the green light emitting diode LEDg extending in the +x direction from the second via contact hole 213CNTg (see Fig. 6A ) with the counterclockwise arrow in the middle.

[0136] One of the two third driving circuits PCb arranged in the same column may be electrically connected to the third via connection metal ACMb extending in the +y direction and the first electrode 221b of the blue light emitting diode LEDb extending in the -x direction from the third via contact hole 213CNTb (see Fig. 6A The other of the two third driving circuits PCb may be electrically connected to the third via connection metal ACMb extending in the +y direction and the first electrode 221b of the blue light emitting diode LEDb extending in the +x direction from the third via contact hole 213CNTb (see Fig. 6A ) with the clockwise arrow in the middle.

[0137] One of the two first driving circuits PCr arranged in the same column may be electrically connected to the first via connection metal ACMr extending in the +y direction and the first electrode 221r ​​of the red light emitting diode LEDr extending in the -x direction from the first via contact hole 213CNTr (see Fig. 6A The other of the two first driving circuits PCr may be electrically connected to the first via connection metal ACMr extending in the +y direction and the first electrode 221r ​​of the red light emitting diode LEDr extending in the +x direction from the first via contact hole 213CNTr (see Fig. 6A ) with the clockwise arrow in the middle.

[0138] Figure 6B is a diagram showing an arrangement according to an embodiment Fig. 6A 1 is a plan view of light emitting diodes and via connection metals in a display area DA of a display device shown in FIG. Figure 6B Shows Fig. 6A The red light emitting diode LEDr, the green light emitting diode LEDg and the blue light emitting diode LEDb and the first via connection metal ACMr, the second via connection metal ACMg and the third via connection metal ACMb.

[0139] Reference Figure 6B In an embodiment, the first electrode 221r ​​of the red light emitting diode LEDr and the first contact portion (e.g., the first via contact hole 213CNTr) of the first via connection metal ACMr may be arranged (or defined) between the corresponding red sub-pixel Pr and the blue sub-pixel Pb adjacent to the above red sub-pixel Pr in the row direction (e.g., ±x direction). The first contact portion (e.g., the first via contact hole 213CNTr) may be arranged in the space between the red sub-pixel Pr and the blue sub-pixel Pb adjacent to each other in the row direction (e.g., ±x direction).

[0140] In an embodiment, the first via contact hole 213CNTr may be arranged (e.g., directly arranged) between the emission region of the corresponding red light emitting diode LEDr (e.g., red sub-pixel Pr) and the emission region of the blue light emitting diode LEDb (e.g., blue sub-pixel Pb) adjacent to the red light emitting diode LEDr in the row direction (±x direction).

[0141] The first electrode 221g of the green light emitting diode LEDg and the second contact portion (e.g., the second via contact hole 213CNTg) of the second via connection metal ACMg may be arranged between the red sub-pixel Pr and the blue sub-pixel Pb adjacent to each other in the column direction (e.g., ±y direction) across the corresponding green sub-pixel Pg. The second contact portion, for example, the second via contact hole 213CNTg may be arranged in the space between the red sub-pixel Pr and the blue sub-pixel Pb adjacent to each other in the column direction (e.g., ±y direction).

[0142] In an implementation, the second via contact hole 213CNTg may be disposed (eg, directly disposed) between an emission region of the red light emitting diode LEDr and an emission region of the blue light emitting diode LEDb that are adjacent to each other across the green light emitting diode LEDg.

[0143] The first electrode 221b of the blue light emitting diode LEDb and the third contact portion (e.g., the third via contact hole 213CNTb) of the third via connection metal ACMb may be arranged between the corresponding blue sub-pixel Pb and the red sub-pixel Pr adjacent to the above blue sub-pixel Pb in the row direction (e.g., ±x direction). The third contact portion (e.g., the third via contact hole 213CNTb) may be arranged in the space between the blue sub-pixel Pb and the red sub-pixel Pr adjacent to each other in the row direction (e.g., ±x direction).

[0144] In an embodiment, the third via contact hole 213CNTb may be arranged (e.g., directly arranged) between the emission region of the corresponding blue light-emitting diode LEDb (e.g., blue sub-pixel Pb) and the emission region of the red light-emitting diode LEDr (e.g., red sub-pixel Pr) adjacent to the blue light-emitting diode LED in the row direction (e.g., ±x direction).

[0145] The first via contact holes 213CNTr and the third via contact holes 213CNTb may be alternately arranged in the row direction (e.g., ±x direction). The first via contact holes 213CNTr and the third via contact holes 213CNTb may be positioned on a first imaginary line VL1 extending in the row direction (e.g., ±x direction). The first imaginary line VL1 may pass through the red sub-pixel Pr and the blue sub-pixel Pb. In some embodiments, the first imaginary line VL1 may pass through the center of each of the red sub-pixel Pr and the blue sub-pixel Pb.

[0146] The second via contact hole 213CNTg may be positioned on a second imaginary line VL2 extending in a row direction (eg, ±x direction). The second imaginary line VL2 may pass through the green sub-pixel Pg. In some embodiments, the second imaginary line VL2 may pass through the center of each of the green sub-pixels Pg.

[0147] The first via contact hole 213CNTr may be disposed on a third imaginary line VL3 extending in a column direction (eg, ±y direction). The third imaginary line VL3 may pass through the green sub-pixels Pg arranged in the column direction. In some embodiments, the third imaginary line VL3 may pass through the center of the green sub-pixels Pg arranged in the column direction.

[0148] The second via contact hole 213CNTg may be disposed on a fourth imaginary line VL4 extending in a column direction (e.g., ±y direction). The fourth imaginary line VL4 may pass through the red sub-pixel Pr and the blue sub-pixel Pb. In some embodiments, the fourth imaginary line VL4 may pass through the center of each of the red sub-pixel Pr and the blue sub-pixel Pb.

[0149] The third via contact hole 213CNTb may be disposed on a fifth imaginary line VL5 extending in a column direction (e.g., ±y direction). The fifth imaginary line VL5 may pass through the green sub-pixels Pg arranged in the column direction. In some embodiments, the fifth imaginary line VL5 may pass through the center of the green sub-pixels Pg arranged in the column direction.

[0150] The first via connection metal ACMr may be disposed on the same imaginary line, for example, on the third imaginary line VL3. The second via connection metal ACMg may be disposed on the same imaginary line, for example, on the fourth imaginary line VL4. The third via connection metal ACMb may be disposed on the same imaginary line, for example, on the fifth imaginary line VL5.

[0151] In an embodiment, if Figure 6BAs shown in , the first imaginary line VL1, the second imaginary line VL2, the third imaginary line VL3, the fourth imaginary line VL4, and the fifth imaginary line VL5 are straight lines. However, one or more embodiments are not limited thereto. In another embodiment, for example, at least one selected from the first imaginary line VL1, the second imaginary line VL2, the third imaginary line VL3, the fourth imaginary line VL4, and the fifth imaginary line VL5 may be a zigzag line. In such an embodiment, the via contact holes arranged in the same row or column may be arranged in a zigzag shape or manner.

[0152] Figure 6C is a plan view showing a light emitting diode and a via connection metal arranged in a display area DA of a display device according to an embodiment.

[0153] Reference Figure 6C In an embodiment, as mentioned above with reference to Figure 6B As described above, the first imaginary line VL1, the third imaginary line VL3, the fourth imaginary line VL4 and the fifth imaginary line VL5 may be straight lines. Figure 6C As shown in , the second imaginary line VL2' may be a zigzag line. In an embodiment, for example, the second via contact holes 213CNTg arranged in the row direction (eg, ±x direction) may be positioned on the zigzag second imaginary line VL2'. The second imaginary line VL2' may pass through the green sub-pixel Pg.

[0154] In an embodiment, if Figure 6C As shown in FIG. 2 , the second imaginary line VL2 ′ is a zigzag line. However, in another embodiment, at least one selected from the first imaginary line VL1 , the third imaginary line VL3 , the fourth imaginary line VL4 , and the fifth imaginary line VL5 may be a zigzag line.

[0155] According to one or more embodiments, by referring to FIG. 6A to FIG. 6C The described structure can effectively use the space between sub-pixels or the first electrodes of the light-emitting diode to realize a high-resolution display device, and can reduce the overlapping area between the vertical conductive line BRS (for example, the data connection line) and the first electrode of the light-emitting diode, thereby significantly reducing the coupling between the vertical conductive line BRS and the first electrode of the light-emitting diode.

[0156] Fig. 7A is a plan view showing a driving circuit, lines electrically connected to the driving circuit, and a light emitting diode arranged in a display area DA of a display device according to an embodiment.

[0157] Reference Fig. 7AIn an embodiment, a plurality of first drive circuits PCr electrically connected to the red light emitting diodes LEDr may be arranged in a column direction (e.g., ±y direction). A plurality of second drive circuits PCg electrically connected to the green light emitting diodes LEDg may be arranged in a column direction (e.g., ±y direction). A plurality of third drive circuits PCb electrically connected to the blue light emitting diodes LEDb may be arranged in a column direction (e.g., ±y direction). In an embodiment, for example, Fig. 7A As shown in , the column of the second driving circuit PCg can be arranged between the column of the first driving circuit PCr and the column of the third driving circuit PCb. Fig. 7A As shown in FIG. 1 , a column of the first driving circuit PCr, a column of the second driving circuit PCg, a column of the third driving circuit PCb, and a column of the second driving circuit PCg may be repeatedly arranged in a row direction.

[0158] The drive circuits arranged in the corresponding columns may be electrically connected to the data lines DL, the vertical conductive lines BRS, and the vertical driving voltage lines VDL. In an embodiment, for example, each of the columns of the first drive circuits PCr, the columns of the second drive circuits PCg, and the columns of the third drive circuits PCb may be electrically connected to the data lines DL, the vertical conductive lines BRS, and the vertical driving voltage lines VDL passing through the corresponding columns.

[0159] The positions of the data lines DL, vertical conductive lines BRS, and vertical drive voltage lines VDL passing through one column of the drive circuit and the positions of the data lines DL, vertical conductive lines BRS, and vertical drive voltage lines VDL passing through the columns of the adjacent drive circuits may be symmetrical to each other about an imaginary axis passing through the columns of the drive circuits adjacent to each other. In an embodiment, for example, the positions of the data lines DL, vertical conductive lines BRS, and vertical drive voltage lines VDL passing through each of the columns of the first drive circuit PCr and the second drive circuit PCg adjacent to each other may be symmetrical to each other (reflectively) about an imaginary axis located between the columns of the first drive circuit PCr and the columns of the second drive circuit PCg adjacent to each other.

[0160] The first electrode 221r ​​of the red light emitting diode LEDr can be electrically connected to the corresponding first driving circuit PCr through the first via connection metal ACMr. The first electrode 221g of the green light emitting diode LEDg can be electrically connected to the corresponding second driving circuit PCg through the second via connection metal ACMg. The first electrode 221b of the blue light emitting diode LEDb can be electrically connected to the corresponding third driving circuit PCb through the third via connection metal ACMb.

[0161] The first via connection metal ACMr electrically connected to the first driving circuit PCr may extend in the column direction (e.g., in the ±y direction). A first end of two opposite ends of the first via connection metal ACMr may be electrically connected to the sixth transistor of the first driving circuit PCr, and a second end of two opposite ends of the first via connection metal ACMr may be connected to the first electrode 221r ​​of the red light emitting diode LEDr.

[0162] The emission area of ​​the red light emitting diode LEDr (or the red sub-pixel Pr) and the corresponding first driving circuit PCr may at least partially overlap or may not overlap. Fig. 7A As shown in , the emission area of ​​the red light emitting diode LEDr electrically connected to one of the two adjacent first drive circuits PCr arranged in the same column may partially overlap with the corresponding first drive circuit PCr and / or second drive circuit PCg. The emission area of ​​the red light emitting diode LEDr electrically connected to the other of the two adjacent first drive circuits PCr arranged in the same column may overlap with a drive circuit other than the corresponding first drive circuit PCr (for example, the second drive circuit PCg and / or the third drive circuit PCb).

[0163] The positions of the first via connection metal ACMr in the corresponding first driving circuits PCr may be identical to each other. The first electrodes 221r ​​of the two red light emitting diodes LEDr electrically connected to the two adjacent first driving circuits PCr arranged in the same column may extend or be arranged in opposite directions relative to an imaginary line passing through the first via contact hole 213CNTr and the first via connection metal ACMr.

[0164] The first via connection metal ACMr may be disposed on an imaginary line (eg, Figure 7B The first electrode 221r ​​of the red light emitting diode LEDr electrically connected to one of the two adjacent first driving circuits PCr arranged in the same column may be connected from an imaginary line (for example, as described below with reference to FIG. 1 ) passing through the first via contact hole 213CNTr and the first via connection metal ACMr. Figure 7B The third imaginary line VL3 described above extends in the -x direction (see Fig. 7A The first electrode 221r ​​of the red light emitting diode LEDr electrically connected to the other of the two adjacent first driving circuits PCr can be connected from the above-mentioned imaginary line (for example, the arrow in the following reference) Figure 7B The third imaginary line VL3 described above extends in the +x direction (see Fig. 7A ).

[0165] The second via connection metal ACMg electrically connected to the sixth transistor of the second driving circuit PCg may extend in the column direction (e.g., ±y direction). A first end of two opposite ends of the second via connection metal ACMg may be electrically connected to the sixth transistor of the second driving circuit PCg, and a second end of two opposite ends of the second via connection metal ACMg may be connected to the first electrode 221g of the green light emitting diode LEDg.

[0166] The emission area of ​​the green light emitting diode LEDg (or the green sub-pixel Pg) and the corresponding second driving circuit PCg may at least partially overlap or may not overlap. Fig. 7A As shown in , each of the emission regions of the green light emitting diodes LEDg electrically connected to respective two adjacent second driving circuits PCg arranged in the same column may partially overlap with the corresponding second driving circuit PCg.

[0167] The positions of the second via connection metal ACMg in the corresponding second driving circuits PCg may be identical to each other. The first electrodes 221g of the two green light emitting diodes LEDg electrically connected to the two adjacent second driving circuits PCg arranged in the same column may extend or be arranged in the same direction relative to an imaginary line passing through the second via contact hole 213CNTg and the second via connection metal ACMg.

[0168] In an embodiment, for example, the first electrode 221g of the green light emitting diode LEDg electrically connected to one of two adjacent second driving circuits PCg arranged in the same column may be connected from an imaginary line (for example, as shown below) passing through the second via contact hole 213CNTg and the second via connecting metal ACMg. Figure 7B The fourth imaginary line VL4 described above extends in the +x direction (see Fig. 7A In such an embodiment, the first electrode 221g of the green light emitting diode LEDg electrically connected to the other of the two adjacent second driving circuits PCg arranged in the same column can be connected from the above-mentioned imaginary line (for example, refer to Figure 7B The fourth imaginary line VL4 described above extends in the +x direction (see Fig. 7A ).

[0169] The third via connection metal ACMb electrically connected to the sixth transistor of the third driving circuit PCb may extend in the column direction (e.g., ±y direction). A first end of two opposite ends of the third via connection metal ACMb may be electrically connected to the sixth transistor of the third driving circuit PCb, and a second end of two opposite ends of the third via connection metal ACMb may be connected to the first electrode 221b of the blue light emitting diode LEDb.

[0170] The emission area of ​​the blue light emitting diode LEDb (or the blue sub-pixel Pb) and the corresponding third driving circuit PCb may at least partially overlap or may not overlap. Fig. 7A As shown in , the emission area of ​​the blue light emitting diode LEDb electrically connected to one of the two adjacent third driving circuits PCb arranged in the same column may partially overlap with the corresponding third driving circuit PCb and / or the second driving circuit PCg. The emission area of ​​the blue light emitting diode LEDb electrically connected to the other of the two adjacent third driving circuits PCb arranged in the same column may partially overlap with the driving circuits other than the corresponding third driving circuit PCb (for example, the second driving circuit PCg and / or the first driving circuit PCr).

[0171] The positions of the third via connection metal ACMb in the corresponding third driving circuits PCb may be identical to each other. The first electrodes 221b of the two blue light emitting diodes LEDb electrically connected to the two adjacent third driving circuits PCb arranged in the same column may extend or be arranged in opposite directions relative to an imaginary line passing through the third via contact hole 213CNTb and the third via connection metal ACMb.

[0172] In an embodiment, for example, the first electrode 221b of the blue light emitting diode LEDb electrically connected to one of two adjacent third driving circuits PCb arranged in the same column may be connected from an imaginary line (for example, as described below with reference to FIG. 1 ) passing through the third via contact hole 213CNTb and the third via connection metal ACMb. Figure 7B The fifth imaginary line VL5) described herein extends in the -x direction (see Fig. 7A In such an embodiment, the first electrode 221b of the blue light emitting diode LEDb electrically connected to the other of the two adjacent third driving circuits PCb arranged in the same column can be connected from the above-mentioned imaginary line (for example, refer to Figure 7B The fifth imaginary line VL5 described above extends in the +x direction (see Fig. 7A ).

[0173] In some embodiments, each of the first via connection metal ACMr, the second via connection metal ACMg, and the third via connection metal ACMb may extend in a column direction (e.g., ±y direction). In an embodiment, for example, the first via connection metal ACMr may extend from the first via contact hole 213CNTr as a contact portion with the first electrode 221r ​​of the red light emitting diode LEDr in one direction (e.g., -y direction). The second via connection metal ACMg may extend from the second via contact hole 213CNTg as a contact portion with the first electrode 221g of the green light emitting diode LEDg in the opposite direction of the one direction (e.g., +y direction). The third via connection metal ACMb may extend from the third via contact hole 213CNTb as a contact portion with the first electrode 221b of the blue light emitting diode LEDb in the one direction (e.g., -y direction).

[0174] One of the two first driving circuits PCr arranged in the same column may be electrically connected to the first via connection metal ACMr extending in the +y direction and the first electrode 221r ​​of the red light emitting diode LEDr extending in the -x direction from the first via contact hole 213CNTr (see Fig. 7A The other of the two first driving circuits PCr may be electrically connected to the first via connection metal ACMr extending in the +y direction and the first electrode 221r ​​of the red light emitting diode LEDr extending in the +x direction from the first via contact hole 213CNTr (see Fig. 7A ) with the clockwise arrow in the middle.

[0175] The two second driving circuits PCg arranged in the same column may be respectively connected to the second via connection metal ACMg extending in the -y direction and the first electrode 221g of the green light emitting diode LEDg extending in the +x direction from the second via contact hole 213CNTg (see Fig. 7A ) with the counterclockwise arrow in the middle.

[0176] One of the two third driving circuits PCb arranged in the same column may be electrically connected to the third via connection metal ACMb extending in the +y direction and the first electrode 221b of the blue light emitting diode LEDb extending in the -x direction from the third via contact hole 213CNTb (see Fig. 7A The other of the two third driving circuits PCb may be electrically connected to the third via connection metal ACMb extending in the +y direction and the first electrode 221b of the blue light emitting diode LEDb extending in the +x direction from the third via contact hole 213CNTb (see Fig. 7A ) with the clockwise arrow in the middle.

[0177] Figure 7B is a diagram showing an arrangement according to an embodiment Fig. 7A 1 is a plan view of light emitting diodes and via connection metals in a display area DA of a display device shown in FIG. Figure 7B Shows Fig. 7A The red light emitting diode LEDr, the green light emitting diode LEDg and the blue light emitting diode LEDb and the first via connection metal ACMr, the second via connection metal ACMg and the third via connection metal ACMb.

[0178] Reference Figure 7B In an embodiment, the first electrode 221r ​​of the red light emitting diode LEDr and the first contact portion (e.g., the first via contact hole 213CNTr) of the first via connection metal ACMr may be arranged between the corresponding red sub-pixel Pr and the blue sub-pixel Pb adjacent to the above red sub-pixel Pr in the row direction (e.g., ±x direction). The first contact portion (e.g., the first via contact hole 213CNTr) may be arranged in the space between the red sub-pixel Pr and the blue sub-pixel Pb adjacent to each other in the row direction (e.g., ±x direction).

[0179] In an embodiment, the first via contact hole 213CNTr may be arranged (e.g., directly arranged) between the emission region of the corresponding red light emitting diode LEDr (e.g., red sub-pixel Pr) and the emission region of the blue light emitting diode LEDb (e.g., blue sub-pixel Pb) adjacent to the red light emitting diode LEDr in the row direction (e.g., ±x direction).

[0180] The first electrode 221g of the green light emitting diode LEDg and the second contact portion (e.g., the second via contact hole 213CNTg) of the second via connection metal ACMg may be arranged between the red sub-pixel Pr and the blue sub-pixel Pb adjacent to each other in the column direction (e.g., ±y direction) across the corresponding green sub-pixel Pg. The second contact portion, for example, the second via contact hole 213CNTg may be arranged in the space between the red sub-pixel Pr and the blue sub-pixel Pb adjacent to each other in the column direction (e.g., ±y direction).

[0181] In an embodiment, the second via contact hole 213CNTg may be disposed between the red light emitting diode LEDr and the blue light emitting diode LEDb adjacent to each other in the column direction (eg, ±y direction) via the green light emitting diode LEDg.

[0182] The first electrode 221b of the blue light emitting diode LEDb and the third contact portion (e.g., the third via contact hole 213CNTb) of the third via connection metal ACMb may be arranged between the corresponding blue sub-pixel Pb and the red sub-pixel Pr adjacent to the above blue sub-pixel Pb in the row direction (e.g., ±x direction). The third contact portion, for example, the third via contact hole 213CNTb may be arranged in the space between the blue sub-pixel Pb and the red sub-pixel Pr adjacent to each other in the row direction (e.g., ±x direction).

[0183] In an embodiment, the third via contact hole 213CNTb may be arranged (e.g., directly arranged) between the emission region of the corresponding blue light emitting diode LEDb (e.g., blue sub-pixel Pb) and the emission region of the red light emitting diode LEDr (e.g., red sub-pixel Pr) adjacent to the blue light emitting diode LEDb in the row direction (e.g., ±x direction).

[0184] The first via contact holes 213CNTr and the third via contact holes 213CNTb may be alternately arranged in the row direction (e.g., ±x direction). The first via contact holes 213CNTr and the third via contact holes 213CNTb may be positioned on a first imaginary line VL1 extending in the row direction (e.g., ±x direction). The first imaginary line VL1 may pass through the red sub-pixel Pr and the blue sub-pixel Pb. In some embodiments, the first imaginary line VL1 may pass through the center of each of the red sub-pixel Pr and the blue sub-pixel Pb.

[0185] The second via contact hole 213CNTg may be positioned on a second imaginary line VL2 extending in a row direction (eg, ±x direction). The second imaginary line VL2 may pass through the green sub-pixel Pg. In some embodiments, the second imaginary line VL2 may pass through the center of each of the green sub-pixels Pg.

[0186] The first via contact hole 213CNTr may be disposed on a third imaginary line VL3 extending in a column direction (e.g., ±y direction). The third imaginary line VL3 may pass through the green sub-pixels Pg arranged in the column direction. In some embodiments, the third imaginary line VL3 may be offset from the center of the green sub-pixels Pg arranged in the column direction in one direction (e.g., -x direction or +x direction).

[0187] The second via contact hole 213CNTg may be disposed on a fourth imaginary line VL4 extending in a column direction (eg, ±y direction). The fourth imaginary line VL4 may pass through the red sub-pixel Pr and the blue sub-pixel Pb. In some embodiments, the fourth imaginary line VL4 may not pass through the sub-pixels.

[0188] The third via contact hole 213CNTb may be disposed on a fifth imaginary line VL5 extending in the column direction (e.g., ±y direction). The fifth imaginary line VL5 may pass through the green sub-pixels Pg arranged in the column direction. In some embodiments, the fifth imaginary line VL5 may be offset from (or spaced apart from) the center of the green sub-pixels Pg arranged in the column direction in one direction (e.g., -x direction or +x direction).

[0189] The first via connection metal ACMr may be disposed on the same imaginary line, for example, on the third imaginary line VL3. The second via connection metal ACMg may be disposed on the same imaginary line, for example, on the fourth imaginary line VL4. The third via connection metal ACMb may be disposed on the same imaginary line, for example, on the fifth imaginary line VL5.

[0190] In an embodiment, if Figure 7B As shown in FIG. 1 , the first imaginary line VL1 , the second imaginary line VL2 , the third imaginary line VL3 , the fourth imaginary line VL4 , and the fifth imaginary line VL5 are straight lines. However, one or more embodiments are not limited thereto. Figure 6C At least one selected from the first imaginary line VL1, the second imaginary line VL2, the third imaginary line VL3, the fourth imaginary line VL4 and the fifth imaginary line VL5 may be a zigzag line. In other words, the via contact holes arranged in the same row or column may be arranged in a zigzag shape.

[0191] According to one or more embodiments, by referring to Fig. 7A and Figure 7B The described structure can effectively use the space between sub-pixels or the first electrodes of the light-emitting diodes to realize a high-resolution display device, and can minimize the overlapping area between the vertical conductive line BRS (for example, the data connection line) and the first electrode of the light-emitting diode, thereby significantly reducing or minimizing the coupling between the vertical conductive line BRS and the first electrode of the light-emitting diode.

[0192] According to the embodiments, a high-resolution display device can be provided by effectively utilizing a space, and undesirable parasitic capacitance can be reduced. The scope of one or more embodiments is not limited by these effects.

[0193] The present invention should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the present invention to those skilled in the art.

[0194] While the invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit or scope of the invention as defined by the following claims.

Claims

1. A display device, comprising: a 1-1th light-emitting diode, wherein the 1-1th light-emitting diode emits light of a first color; a 1-2nd light emitting diode, wherein the 1-2nd light emitting diode emits light of a second color; a 1-3rd light-emitting diode, the 1-3rd light-emitting diode emitting light of a third color, wherein the 1-1st light-emitting diode and the 1-3rd light-emitting diode are arranged at two vertices adjacent to each other in a row direction among vertices of an imaginary quadrilateral centered on the 1-2nd light-emitting diode; a 1-1st driving circuit electrically connected to the 1-1st light emitting diode and including a transistor electrically connected to a first data line extending in a column direction crossing the row direction; a 1-2 driving circuit electrically connected to the 1-2 light emitting diode and including a transistor electrically connected to a second data line extending in the column direction; a 1-3rd driving circuit electrically connected to the 1-3rd light emitting diode and including a transistor electrically connected to a third data line extending in the column direction; a 1-1 via connection metal, wherein the 1-1 via connection metal electrically connects the first electrode of the 1-1 light emitting diode and the 1-1 driving circuit to each other; a 1-2 via connection metal, wherein the 1-2 via connection metal electrically connects the first electrode of the 1-2 light emitting diode and the 1-2 driving circuit to each other; and The 1-3rd via connection metal electrically connects the first electrode of the 1-3rd light emitting diode and the 1-3rd driving circuit to each other. wherein the first electrode of the 1-1 light emitting diode and the first contact portion of the 1-1 via connection metal are positioned between an emission region of the 1-1 light emitting diode and an emission region of the 1-3 light emitting diode adjacent to each other in the row direction; and The first electrode of the 1-2 light-emitting diode and the second contact portion of the 1-2 via connection metal are positioned between the emission area of ​​the 2-3 light-emitting diode and the emission area of ​​the 1-1 light-emitting diode, wherein the 2-3 light-emitting diode is adjacent to the 1-1 light-emitting diode in the column direction and emits light of the third color.

2. The display device according to claim 1, wherein: The 1-1st driving circuit, the 1-2nd driving circuit, and the 1-3rd driving circuit are arranged in columns different from each other.

3. The display device according to claim 1, further comprising: a 2-1st light-emitting diode, the 2-1st light-emitting diode emitting light of the first color and arranged on an opposite side of the 1-1st light-emitting diode across the 1-2nd light-emitting diode, wherein the 1-2nd light-emitting diode is positioned at the center of the imaginary quadrilateral, The 2-1st driving circuit electrically connected to the 2-1st light emitting diode is arranged in the column where the 1-1st driving circuit is arranged.

4. The display device according to claim 3, wherein: The first electrode of the 1-1th light emitting diode extends in a first direction relative to an imaginary line passing through the first contact portion in the column direction, and The first electrode of the 2-1th light emitting diode extends in a direction opposite to the first direction with respect to the imaginary line.

5. The display device according to claim 3, further comprising: a 2-2nd light emitting diode, the 2-2nd light emitting diode being adjacent to the 1-2nd light emitting diode in the row direction and emitting light of the second color; a 2-2 driving circuit, the 2-2 driving circuit being electrically connected to the 2-2 light emitting diode; as well as a 2-2 via connection metal, wherein the 2-2 via connection metal electrically connects the 2-2 light emitting diode and the 2-2 driving circuit to each other, The first electrode of the 2-2 light-emitting diode and the third contact portion of the 2-2 via connection metal are positioned between the emission region of the 1-3 light-emitting diode and the emission region of the 2-1 light-emitting diode.

6. The display device according to claim 5, wherein: The 1-2nd driving circuit and the 2-2nd driving circuit are arranged in different columns from each other.

7. The display device according to claim 5, wherein: The second contact portion and the third contact portion are positioned on an imaginary straight line extending in the row direction.

8. The display device according to claim 5, wherein: The second contact portion and the third contact portion are positioned on an imaginary zigzag line extending in the row direction.

9. The display device according to claim 1, wherein: The 1-1th via connection metal extends from the first contact portion in the second direction, and The 1-2nd via connection metal extends from the second contact portion in a direction opposite to the second direction.

10. The display device according to claim 9, wherein: The first electrode of the 1-3 light-emitting diode and the fourth contact portion of the 1-3 via connection metal are positioned between the emission area of ​​the 1-3 light-emitting diode and the emission area of ​​the 3-1 light-emitting diode, wherein the 3-1 light-emitting diode is adjacent to the 1-3 light-emitting diode in the row direction and emits light of the first color.

11. The display device according to claim 10, wherein: The 1-3rd via connection metal extends from the fourth contact portion in the second direction.

12. A display device, comprising: a first data line, a second data line, and a third data line, wherein each of the first data line, the second data line, and the third data line extends in a column direction; a plurality of first driving circuits arranged in the column direction and electrically connected to the first data lines; a plurality of second driving circuits arranged in the column direction and electrically connected to the second data lines; a plurality of third driving circuits arranged in the column direction and electrically connected to the third data lines; a 1-1th light emitting diode, the 1-1th light emitting diode being electrically connected to a 1-1th driving circuit which is one of the plurality of first driving circuits, wherein the 1-1th light emitting diode emits light of a first color; a 2-1st light-emitting diode, the 2-1st light-emitting diode being electrically connected to a 2-1st driving circuit being another one of the plurality of first driving circuits, wherein the 2-1st light-emitting diode emits light of the first color; a 1-2nd light emitting diode, the 1-2nd light emitting diode being electrically connected to a 1-2nd driving circuit being one of the plurality of second driving circuits, wherein the 1-2nd light emitting diode emits light of a second color; and a 1-3rd light emitting diode, the 1-3rd light emitting diode being electrically connected to a 1-3rd driving circuit being one of the plurality of third driving circuits, wherein the 1-3rd light emitting diode emits light of a third color, The 1-1st light emitting diode, the 2-1st light emitting diode and the 1-3rd light emitting diode are positioned at the vertices of an imaginary quadrilateral centered at the 1-2nd light emitting diode. The 1-1st light emitting diode and the 2-1st light emitting diode are arranged in the diagonal direction of the imaginary quadrilateral with the 1-2nd light emitting diode interposed therebetween. The 1-3 light emitting diodes are arranged adjacent to the 1-1 light emitting diodes in a row direction intersecting the column direction, and The 1-1st driving circuit and the 2-1st driving circuit are adjacent to each other in the column direction.

13. The display device according to claim 12, further comprising: a 1-1 via connection metal, wherein the 1-1 via connection metal electrically connects the first electrode of the 1-1 light emitting diode and the 1-1 driving circuit to each other, The first electrode of the 1-1th light-emitting diode and the first contact portion of the 1-1th via connection metal are positioned between the 1-1th light-emitting diode and the 1-3th light-emitting diode adjacent to each other in the row direction.

14. The display device according to claim 13, further comprising: A 1-2 via connection metal, wherein the 1-2 via connection metal electrically connects the first electrode of the 1-2 light emitting diode and the 1-2 driving circuit to each other; as well as a 2-3rd light emitting diode, wherein the 2-3rd light emitting diode is adjacent to the 1-1st light emitting diode in the column direction; The first electrode of the 1-2 light-emitting diode and the second contact portion of the 1-2 via connection metal are positioned between the 1-1 light-emitting diode and the 2-3 light-emitting diode.

15. The display device according to claim 14, further comprising: a 2-2nd light emitting diode, wherein the 2-2nd light emitting diode is adjacent to the 1-2nd light emitting diode in the row direction; as well as The 2-2 via connection metal electrically connects the first electrode of the 2-2 light emitting diode and the 2-2 driving circuit.

16. The display device according to claim 15, wherein: The second contact portion and the third contact portion between the first electrode of the 2-2nd light emitting diode and the 2-2nd via connection metal are positioned on an imaginary straight line or an imaginary zigzag line extending in the row direction.

17. The display device according to claim 13, further comprising: a 2-1 via connection metal, wherein the 2-1 via connection metal electrically connects the first electrode of the 2-1 light emitting diode and the 2-1 driving circuit to each other, The first electrode of the 2-1st light-emitting diode, the fourth contact portion of the 2-1st via connection metal, and the first contact portion are positioned on an imaginary line in the column direction.

18. The display device according to claim 17, wherein: The first electrode of the 1-1th light emitting diode extends from the imaginary line in a first direction, and The first electrode of the 2-1th light emitting diode extends from the imaginary line in a direction opposite to the first direction.

19. The display device according to claim 14, wherein: The 1-1th via connection metal extends from the first contact portion in the second direction, and The 1-2nd via connection metal extends from the second contact portion in a direction opposite to the second direction.

20. The display device according to claim 12, further comprising: A 1-3rd via connection metal, wherein the 1-3rd via connection metal electrically connects the first electrode of the 1-3rd light emitting diode and the 1-3rd driving circuit to each other; as well as a 3-1st light emitting diode, wherein the 3-1st light emitting diode is adjacent to the 1-3rd light emitting diode in the row direction; The first electrode of the 1-3 light-emitting diode and the fifth contact portion of the 1-3 via connection metal are positioned between the 1-3 light-emitting diode and the 3-1 light-emitting diode.

21. A display device, comprising: A 1-1th light emitting diode and a 2-1th light emitting diode, wherein the 1-1th light emitting diode and the 2-1th light emitting diode emit light of a first color; a 1-2nd light emitting diode, wherein the 1-2nd light emitting diode emits light of a second color; 1-3rd light emitting diodes, wherein the 1-3rd light emitting diodes emit light of a third color; a 1-1st driving circuit, the 1-1st driving circuit being electrically connected to a first data line extending in a column direction, wherein the 1-1st driving circuit comprises a plurality of transistors; a first insulating layer, the first insulating layer being provided on an electrode electrically connected to a semiconductor layer of one transistor among the plurality of transistors of the 1-1 driving circuit; a connection metal disposed on the first insulating layer and electrically connected to the electrode; a second insulating layer, the second insulating layer being located on the connection metal; a 1-1 via connection metal, the 1-1 via connection metal being disposed on the second insulating layer and electrically connected to the connection metal; and a third insulating layer, the third insulating layer being located on the 1-1 via connection metal, The 1-1st light emitting diode, the 2-1st light emitting diode and the 1-3rd light emitting diode are positioned at the vertices of an imaginary quadrilateral centered at the 1-2nd light emitting diode. The 1-1st light emitting diode and the 2-1st light emitting diode are arranged in the diagonal direction of the imaginary quadrilateral with the 1-2nd light emitting diode interposed therebetween. The 1-3 light emitting diode is arranged adjacent to the 1-1 light emitting diode in a row direction intersecting the column direction, The 1-1 driving circuit is adjacent to the 2-1 driving circuit in the column direction, and The 2-1st driving circuit is electrically connected to the 2-1st light emitting diode.

22. The display device according to claim 21, wherein: The first electrode of the 1-1th light emitting diode is disposed on the third insulating layer, and The first electrode of the 1-1th light emitting diode and the first contact portion of the 1-1th via connection metal are positioned between the 1-1th light emitting diode and the 1-3th light emitting diode adjacent to each other in the row direction.

23. The display device according to claim 21, further comprising: a 1-2 driving circuit, the 1-2 driving circuit being arranged in a column different from a column in which the 1-1 driving circuit is arranged; A 1-2 via connection metal, wherein the 1-2 via connection metal electrically connects the first electrode of the 1-2 light emitting diode and the 1-2 driving circuit to each other; as well as a 2-3rd light emitting diode, wherein the 2-3rd light emitting diode is adjacent to the 1-1st light emitting diode in the column direction; The first electrode of the 1-2 light-emitting diode and the second contact portion of the 1-2 via connection metal are positioned between the 1-1 light-emitting diode and the 2-3 light-emitting diode.

24. The display device according to claim 23, further comprising: a 2-2nd driving circuit, the 2-2nd driving circuit being arranged in a column different from the column in which the 1-2nd driving circuit is arranged; a 2-2nd light emitting diode, wherein the 2-2nd light emitting diode is adjacent to the 1-2nd light emitting diode in the row direction; as well as The 2-2 via connection metal electrically connects the first electrode of the 2-2 light emitting diode and the 2-2 driving circuit.

25. The display device according to claim 24, wherein: The second contact portion and the third contact portion between the first electrode of the 2-2nd light emitting diode and the 2-2nd via connection metal are positioned on an imaginary straight line or an imaginary zigzag line extending in the row direction.

26. The display device according to claim 21, further comprising a 2-1st via connection metal, wherein the 2-1st via connection metal electrically connects the first electrode of the 2-1st light emitting diode and the 2-1st driving circuit to each other, in, The 1-1 via connection metal and the 2-1 via connection metal are arranged on an imaginary line in the column direction, The first electrode of the 1-1th light emitting diode extends from the imaginary line in the first direction, and The first electrode of the 2-1th light emitting diode extends from the imaginary line in a direction opposite to the first direction.

27. The display device according to claim 22, further comprising a 2-1st via connection metal, wherein the 2-1st via connection metal electrically connects the first electrode of the 2-1st light emitting diode and the 2-1st driving circuit to each other, in, The first electrode of the 2-1st light-emitting diode and the fourth contact portion of the 2-1st via connection metal and the first electrode of the 1-1st light-emitting diode and the first contact portion of the 1-1st via connection metal are positioned on an imaginary line in the column direction.

28. The display device according to claim 21, further comprising: a 1-3rd driving circuit, the 1-3rd driving circuit being arranged in a column different from a column in which the 1-1st driving circuit is arranged; A 1-3rd via connection metal, wherein the 1-3rd via connection metal electrically connects the first electrode of the 1-3rd light emitting diode and the 1-3rd driving circuit to each other; as well as a 3-1st light emitting diode, wherein the 3-1st light emitting diode is adjacent to the 1-3rd light emitting diode in the row direction; The first electrode of the 1-3 light-emitting diode and the fifth contact portion of the 1-3 via connection metal are positioned between the 1-3 light-emitting diode and the 3-1 light-emitting diode.

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