Display panel and display device

Abstract

The invention provides a display panel and a display device, belongs to the technical field of display, and can solve the problem that a lower frame of an existing display panel is relatively wide. The display panel comprises a substrate and a driving chip located on the substrate and arranged in a binding area. The driving chip comprises a plurality of binding pads; the display panel further comprises a plurality of fan-out wires located on the substrate. One end of each fan-out wire is connected with the binding pad and extends to the pixel area through the fan-out area; the distance between part of the binding pads and the first edge of the driving chip is gradually increased along the direction parallel to the first edge; the driving chip is provided with a plurality of supporting areas which are arranged on one side, close to the fan-out area, of the part of the binding pads; the driving chip further comprises a redundant bonding pad located in the supporting area. Part of the fan-out wires penetrate through the area between the adjacent supporting areas. Part of the fan-out wires penetrate through the supporting area and are insulated from the redundant bonding pads.

Description

Display panel and display device

[0001] The present disclosure belongs to the field of display technology, and particularly relates to a display panel and a display device.

[0002] With the continuous development of display technology, in addition to achieving higher display quality, display panels also have higher requirements for other aspects of display panels, one of which is the design of narrow borders and equal width on four sides. The narrow borders on the left and right sides of the display panel can be achieved by driving the array substrate row (Gate Driver on Array, GOA), and the gate signal lines of the pixel area are opened row by row by the combination of thin film transistors. One of the ways to achieve the lower border of the display panel is to use a sinking driver chip (Driver IC). Through the sinking driver chip, the space occupied by the fan-out wiring between the pixel area and the driver chip can be effectively shortened, but the binding pads of the sinking driver chip (mainly the output pads for transmitting signals to the pixel area of ​​the display panel) are arranged in an inclined direction, and there will be a problem of poor attachment at the upper left and upper right edge positions of the driver chip. Therefore, redundant pads will be set in the support area of ​​the upper left and upper right positions of the driver chip to ensure the tightness of attachment.

[0003] Since redundant pads need to be placed in the support area, in order to avoid short circuit between the fan-out routing and the redundant pads, the fan-out routing needs to avoid the redundant pads in the support area. The fan-out routing will be bent in the support area to avoid connection between the fan-out routing and the redundant pads in the support area, causing a short circuit. This bending will increase the longitudinal routing space, which will lead to an increase in the lower frame, affecting the display effect of the display panel.

[0004]

[0005] The present disclosure aims to solve at least one of the technical problems existing in the prior art, and provides a display panel and a display device.

[0006] In a first aspect, an embodiment of the present disclosure provides a display panel, comprising a pixel region, a fan-out region and a binding region arranged on one side of the pixel region and arranged in sequence in a direction away from the pixel region; wherein the display panel comprises: a substrate, a driver chip located on the substrate and arranged in the binding region; the driver chip comprises: a plurality of binding pads; the display panel further comprises: a plurality of fan-out traces located on the substrate; one end of each of the fan-out traces is connected to the binding pad and extends to the pixel region through the fan-out region;

[0007] The distance between part of the binding pads and the first edge of the driver chip gradually increases along a direction parallel to the first edge; the driver chip has a plurality of support areas arranged on a side of part of the binding pads close to the fan-out area; the driver chip further includes: redundant pads located in the support areas;

[0008] Part of the fan-out routing passes through the area between the adjacent support areas; part of the fan-out routing passes through the support area and is insulated from the redundant pad.

[0009] Optionally, the redundant pad comprises: a first insulating layer, a second insulating layer, and a first transparent electrode layer which are located on the substrate and are sequentially arranged in a direction away from the substrate;

[0010] The fan-out routing includes: a first sub-fan-out routing; the first sub-fan-out routing is located on the side of the substrate close to the first insulating layer.

[0011] Optionally, the redundant pad further includes: a first metal layer located on a side of the substrate close to the first insulating layer;

[0012] The first metal layer includes: a plurality of first metal strips arranged at intervals; and the first sub-fan-out wiring is located between adjacent first metal strips.

[0013] Optionally, the redundant pad further includes: a second metal layer located between the first insulating layer and the second insulating layer;

[0014] The second metal layer overlaps with the supporting area.

[0015] Optionally, the redundant pad further includes: a second metal layer located between the first insulating layer and the second insulating layer;

[0016] The second metal layer is connected between adjacent support areas to form an integrated structure.

[0017] Optionally, the redundant pad further comprises: a second metal layer located between the first insulating layer and the second insulating layer; the second metal layer comprises: a plurality of second metal strips arranged at intervals;

[0018] The fan-out routing further includes: a second sub-fan-out routing; the second sub-fan-out routing is located between adjacent second metal strips.

[0019] Optionally, the orthographic projection of the first sub-fan-out routing on the substrate is located between the orthographic projections of adjacent second sub-fan-out routings on the substrate;

[0020] The orthographic projection of the first metal strip on the substrate is located between the orthographic projections of adjacent second metal strips on the substrate.

[0021] Optionally, an orthographic projection of the first sub-fan-out routing on the substrate coincides with an orthographic projection of the second sub-fan-out routing on the substrate;

[0022] The orthographic projection of the first metal strip on the substrate coincides with the orthographic projection of the second metal strip on the substrate.

[0023] Optionally, the lengths of the first metal strip and the second metal strip along a direction parallel to the fan-out routing are both equal to the length of the support area along a direction parallel to the fan-out routing.

[0024] Optionally, an area of ​​the first metal strip and an area of ​​the second metal strip in each of the supporting regions are greater than or equal to 70% of an area of ​​the supporting region.

[0025] Optionally, the redundant pad further includes: a second transparent electrode layer located between the first insulating layer and the second insulating layer;

[0026] The second transparent electrode layer overlaps with the supporting area.

[0027] Optionally, the redundant pad further includes: a second transparent electrode layer located between the first insulating layer and the second insulating layer;

[0028] The second transparent electrode layer is connected between adjacent support areas to form an integrated structure.

[0029] Optionally, the first transparent electrode layer overlaps with the supporting area.

[0030] Optionally, the first transparent electrode layer is connected between adjacent supporting areas to form an integrated structure.

[0031] Optionally, the first insulating layer and the second insulating layer are connected to form an integral structure between adjacent supporting areas.

[0032] In a second aspect, an embodiment of the present disclosure provides a display device, wherein the display device includes a display panel as provided above.

[0033] FIG. 1 is a schematic diagram of the structure of an exemplary display panel.

[0034] FIG. 2 is a schematic diagram of the structure of a driving chip in the display panel shown in FIG. 1 .

[0035] FIG. 3 is a schematic diagram of the structure of another exemplary display panel.

[0036] FIG. 4 is a schematic diagram of the structure of a driving chip in the display panel shown in FIG. 3 .

[0037] FIG. 5 is a schematic diagram of the structure of a display panel provided in an embodiment of the present disclosure.

[0038] FIG. 6 is a schematic diagram of a first partial structure of redundant pads and fan-out wiring in the display panel shown in FIG. 5 .

[0039] FIG. 7 is a schematic diagram of a cross-sectional structure of the structure shown in FIG. 6 along the AA′ direction.

[0040] FIG. 8 is a schematic diagram of a second partial structure of redundant pads and fan-out wiring in the display panel shown in FIG. 5 .

[0041] FIG. 9 is a schematic diagram of a cross-sectional structure of the structure shown in FIG. 8 along the BB′ direction.

[0042] FIG. 10 is a schematic diagram of a third partial structure of redundant pads and fan-out wiring in the display panel shown in FIG. 5 .

[0043] FIG. 11 is a schematic diagram of the cross-sectional structure of the structure shown in FIG. 10 along the CC′ direction.

[0044] FIG. 12 is a schematic diagram of a fourth partial structure of redundant pads and fan-out wiring in the display panel shown in FIG. 5 .

[0045] FIG. 13 is a schematic diagram of the cross-sectional structure of the structure shown in FIG. 12 along the DD′ direction.

[0046] FIG. 14 is a schematic diagram of a fourth partial structure of redundant pads and fan-out wiring in the display panel shown in FIG. 5 .

[0047] FIG. 15 is a schematic diagram of the cross-sectional structure of the structure shown in FIG. 14 along the EE′ direction.

[0048] FIG. 16 is a schematic diagram of a fifth partial structure of redundant pads and fan-out wiring in the display panel shown in FIG. 5 .

[0049] FIG. 17 is a schematic diagram of the cross-sectional structure of the structure shown in FIG. 16 along the FF′ direction.

[0050] FIG. 18 is a sixth partial structural diagram of redundant pads and fan-out wiring in the display panel shown in FIG. 5 .

[0051] FIG. 19 is a schematic diagram of the cross-sectional structure of the structure shown in FIG. 18 along the GG′ direction.

[0052] FIG. 20 is a schematic diagram of a seventh partial structure of redundant pads and fan-out wiring in the display panel shown in FIG. 5 .

[0053] FIG. 21 is a schematic diagram of the cross-sectional structure of the structure shown in FIG. 20 along the HH′ direction.

[0054] FIG. 22 is a seventh partial structural diagram of redundant pads and fan-out wiring in the display panel shown in FIG. 5 .

[0055] FIG. 23 is a schematic diagram of the cross-sectional structure of the structure shown in FIG. 22 along the II′ direction.

[0056] FIG. 24 is a schematic diagram of an eighth partial structure of redundant pads and fan-out wiring in the display panel shown in FIG. 5 .

[0057] FIG. 25 is a schematic diagram of the cross-sectional structure of the structure shown in FIG. 24 along the J-J' direction.

[0058] In order to enable those skilled in the art to better understand the technical solution of the present disclosure, the present disclosure is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0059] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0060] FIG1 is a schematic diagram of the structure of an exemplary display panel. As shown in FIG1 , the display panel has a pixel area A1, a fan-out area A2 and a binding area A3 arranged on one side of the pixel area A1 and arranged in sequence in a direction away from the pixel area A1. The display panel includes: a substrate 101, a gate line 102, a data line 103, a driving chip 104 and a fan-out wiring 105 located on the substrate 101.

[0061] The gate line 102 and the data line 103 are located in the pixel area A1 and are arranged to intersect. A plurality of pixel units (not shown in the figure) are formed in the area defined by the intersection of the gate line 102 and the data line 103. A pixel circuit is arranged in each pixel unit. The gate line 102 and the data line 103 are connected to the pixel circuit to control the driving signal input into the pixel circuit to realize the display function.

[0062] The driver chip 104 is located in the binding area A3 and can provide data signals for the data lines 103 in the pixel area A1. FIG. 2 is a schematic diagram of the structure of the driver chip in the display panel shown in FIG. 1. As shown in FIG. 2, the driver chip 104 includes: a plurality of binding pads 1041; the plurality of binding pads 1041 are arranged along a first edge direction parallel to the driver chip 104. The first edge can be the output lead bump (OLB) side of the driver chip 104, which is the edge where most of the output pads of the driver chip 104 are set. Correspondingly, the driver chip 104 also has a second edge, which is opposite to the first edge. The second edge can be the input lead bump (ILB) side of the driver chip 104, which is the edge where most of the input pads of the driver chip 104 are set.

[0063] One end of the fan-out trace 105 is connected to the binding pad 1041 (i.e., the output pad), and the other end is connected to the data line 103. The fan-out trace 105 can extend from the binding area A3 through the fan-out area A2 to the display area A1 to transmit the driving signal provided by the driving chip 104 in the binding area A3 to the data line 103 in the pixel area A1. Generally speaking, due to the layout design rules such as the line width and line spacing of the fan-out trace 105, the reduction of the width w1 of the fan-out area A2 is limited. Based on the limitation of the width w1 of the fan-out area A2, the reduction of the border width of the display panel is also limited, and the design of a narrow border and equal width on four sides cannot be achieved.

[0064] Although the width w1 of the fan-out area A2 cannot be further reduced, if the driver chip 104 is moved further toward the display area A1 , the distance between the driver chip 104 and the display area A1 can be reduced, which can help reduce the frame of the display panel.

[0065] FIG3 is a schematic diagram of the structure of another exemplary display panel. As shown in FIG3 , the display panel has a pixel area A1, a fan-out area A2 and a binding area A3 which are arranged on one side of the pixel area A1 and are arranged in sequence in a direction away from the pixel area A1; the display panel includes: a substrate 101, a driver chip 104 located on the substrate 101 and arranged in the binding area A3 (the structure in the pixel area A1 is the same as the structure in FIG1 above, not shown in FIG3 ). FIG4 is a schematic diagram of the structure of the driver chip in the display panel shown in FIG3 . As shown in FIG4 , the driver chip 104 includes: a plurality of binding pads 1041. The difference from the structure of the driver chip 104 shown in FIG2 is that some of the binding pads 1041 are arranged along the first edge direction parallel to the driver chip 104, and some of the binding pads 1041 are not arranged along the direction of the first edge, but have a certain angle with the first edge direction and are arranged in an inclined direction. The distance between the partial binding pad 1041 and the first edge of the driver chip 104 gradually increases along the direction parallel to the first edge. Since the arrangement of the partial binding pad 1041 in the driver chip 104 seems to sink toward the fan-out area A2 (as shown in Figure 4), the driver chip 104 configured in this way can be called a "sunken driver chip".

[0066] Since part of the bonding pads 1041 in the driver chip 104 sinks toward the fan-out area A2, the position of the driver chip 104 can be further advanced toward the fan-out area A2 of the display panel, so that the distance w2 between the driver chip 104 and the pixel area A1 of the display panel can be smaller than the width w1 of the fan-out area A2. The reduction of the distance w2 between the driver chip 104 and the pixel area A1 of the display panel means that the border of the display panel can be further reduced.

[0067] However, the binding pads 1041 of the driver chip 104 (mainly output pads for transmitting signals to the pixel area of ​​the display panel) are arranged in an inclined direction, and there will be problems of poor adhesion at the upper left and upper right edge positions of the driver chip 104. Therefore, redundant pads 1042 will be set in the support area A4 at the upper left and upper right positions of the driver chip to ensure the tightness of the adhesion.

[0068] Since redundant pads 1042 need to be placed in support area A4, in order to avoid a short circuit between the fan-out routing 105 and the redundant pads 1042, the fan-out routing 105 needs to avoid the redundant pads 1042 in support area A4. The fan-out routing 105 will be bent in support area A4 to avoid connection between the fan-out routing 105 and the redundant pads 1042 in support area A4, which would cause a short circuit. Such bending would increase the longitudinal routing space, thereby increasing the lower frame and affecting the display effect of the display panel.

[0069] In order to solve at least one of the above-mentioned technical problems, the embodiments of the present disclosure provide a display panel and a display device. The display panel and the display device provided by the embodiments of the present disclosure will be further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0070] In the first aspect, an embodiment of the present disclosure provides a display panel, and FIG5 is a schematic diagram of the structure of a display panel provided by an embodiment of the present disclosure. As shown in FIG5 , the display panel has a pixel area A1, a fan-out area A2 and a binding area A3 which are arranged on one side of the pixel area A1 and are arranged in sequence along a direction away from the pixel area A1; wherein the display panel includes: a substrate 101, a driver chip 104 located on the substrate 101 and arranged in the binding area A3 (the structure in the pixel area A1 is the same as the structure in the above-mentioned FIG1 ); the driver chip 104 (the structure of the driver chip 104 is the same as the structure of the driver chip 104 shown in FIG4 ) includes: a plurality of binding pads 1041; the display panel also includes: a plurality of fan-out traces 105 located on the substrate 101; one end of each fan-out trace 105 is connected to the binding pad 1041, and extends to the pixel area A1 through the fan-out area A2. The distance between the partial binding pad 1041 and the first edge of the driver chip 104 gradually increases along a direction parallel to the first edge; the driver chip 104 has a plurality of support areas A4 arranged on the side of the partial binding pad 1041 close to the fan-out area A2; the driver chip 104 also includes: a redundant pad 1042 located in the support area A4; a partial fan-out routing 105 passes through the area between adjacent support areas A4; a partial fan-out routing 105 passes through the support area A4 and is insulated from the redundant pad 1042.

[0071] The substrate 101 can be made of a rigid material such as glass, which can improve the bearing capacity of the substrate 101 for other film layers thereon. Of course, the substrate 101 can also be made of a flexible material such as polyimide (PI), which can improve the bending and stretching resistance of the entire display substrate, and avoid the stress generated during bending, stretching, and twisting that causes the substrate 101 to break and cause a short circuit. In practical applications, the material of the substrate 101 can be reasonably selected according to actual needs to ensure that the display substrate has good performance.

[0072] The driver chip 104 can be specifically a sunken driver chip (its structure can be as shown above and will not be described in detail here), which can provide data signals for the data lines 103 in the pixel area A1. The binding pads 1041 in the driver chip 104 can be specifically output pads, which can be made of metal materials with good electrical conductivity, and can form a single-layer structure made of a single material, or a multi-layer structure made of a variety of different materials. The redundant pads 1042 in the driver chip 104 can be made of the same material as the binding pads 1041 and form the same structure, so that the redundant pads 1042 and the binding pads 1041 have approximately the same thickness, ensuring that they have a good support effect, thereby ensuring the tightness of the attachment.

[0073] The fan-out wiring 105 can be used as a connection line between the data line 103 and the driving chip 104 to transmit data signals. The fan-out wiring 105 can be made of a metal material, such as one of molybdenum (Mo), aluminum (Al), titanium (Ti), or an alloy of the above materials, and can be a single-layer structure or a multi-layer structure.

[0074] In the display panel provided by the embodiment of the present disclosure, part of the fan-out wiring 105 passes through the area between adjacent support areas A4, and part of the fan-out wiring 105 passes through the support area A4 and is insulated from the redundant pad 1042. In this way, the fan-out wiring 105 does not need to be routed in a bending manner at the position of the support area A4, thereby avoiding increasing the longitudinal routing space, thereby reducing the width of the lower frame of the display panel, realizing a narrow frame and a design with equal width on four sides, thereby facilitating improving the display effect of the display panel.

[0075] 6 is a schematic diagram of a first partial structure of redundant pads and fan-out routing in the display panel shown in FIG5 , and FIG7 is a schematic diagram of the cross-sectional structure of the structure shown in FIG6 along the A-A' direction. As shown in FIGS. 6 and 7 , the redundant pad 1042 includes: a first insulating layer 1042a, a second insulating layer 1042b, and a first transparent electrode layer 1042c that are located on the substrate 101 and are sequentially arranged in a direction away from the substrate 101; the fan-out routing 105 includes: a first sub-fan-out routing 1051; the first sub-fan-out routing 1051 is located on the side of the substrate 101 close to the first insulating layer 1042a.

[0076] The first insulating layer 1042a and the second insulating layer 1042b can be made of at least one material selected from silicon nitride (SiN) and silicon oxide (SiO2), and can form a single-layer structure made of a single material, or a multi-layer structure made of a plurality of different materials. In practical applications, if only for the purpose of insulation, only one layer of the first insulating layer 1042a and the second insulating layer 1042b can be provided, but in order to ensure the overall thickness of the redundant pad 104 in the support area A4, two insulating layers are generally provided, namely the first insulating layer 1042a and the second insulating layer 1042b. Specifically, the first insulating layer 1042a can be provided in the same layer as the gate insulating layer (not shown in the figure) covering the gate of the pixel area A1 in the display panel, and the second insulating layer 1042b can be provided in the same layer as the interlayer insulating layer side of the interlayer insulating layer covering the source and drain electrode layer (not shown in the figure) of the thin film transistor in the pixel area A1 in the display panel. During the preparation process, the first insulating layer 1042a in the redundant pad 1042 can be formed using the same material and the same process as the gate insulating layer in the pixel area A1, and the second insulating layer 1042b can be formed using the same material and the same process as the interlayer insulating layer in the pixel area A1, which can reduce the process steps and save preparation costs.

[0077] The first transparent electrode layer 1042c can be made of a transparent conductive material such as indium tin oxide (ITO). Specifically, the first transparent electrode 1042c can be arranged in the same layer as the pixel electrode (not shown in the figure) of the pixel area A1 in the display panel. During the preparation process, the first transparent electrode layer 1042c can be formed by the same material and the same process as the pixel electrode of the pixel area A1, which can reduce the process steps and save the preparation cost.

[0078] The fan-out routing 105 may adopt a single-layer structure, which includes: a first sub-fan-out routing 1051. The first sub-fan-out routing 1051 may be arranged on the side of the substrate 101 close to the first insulating layer 1042a, so that the first sub-fan-out routing 1051 and other conductive layers (such as the first transparent electrode layer 1042c) in the redundant pad 1041 are insulated by the first insulating layer 1042a and the second insulating layer 1042b, which can avoid the first sub-fan-out routing 1051 and the first transparent electrode layer 1042c from being connected and short-circuited. Therefore, the first sub-fan-out routing 1051 can directly pass through the support area A4, and the first sub-fan-out routing 1051 does not need to be routed in a bending manner, so as to avoid increasing the longitudinal routing space, and can reduce the width of the lower frame of the display panel, so as to realize a narrow frame and a design with equal width on four sides, thereby facilitating improving the display effect of the display panel.

[0079] 8 is a schematic diagram of a second partial structure of redundant pads and fan-out routing in the display panel shown in FIG5 , and FIG9 is a schematic diagram of the cross-sectional structure of the structure shown in FIG8 along the BB' direction. As shown in FIGS. 8 and 9 , the difference between the structure shown in FIGS. 6 and 7 is that the redundant pad 1042 also includes: a first metal layer 1042d located on the side of the substrate 101 close to the first insulating layer 1041; the first metal layer 1042d includes: a plurality of first metal strips 1042d' arranged at intervals; and the first sub-fan-out routing 1051 is located between adjacent first metal strips 1042d'.

[0080] The first metal layer 1042d can be made of a metal material with good conductivity, such as one of molybdenum (Mo), aluminum (Al), titanium (Ti), or an alloy of the above-mentioned materials. It can be a single-layer structure or a multi-layer structure. In the embodiment of the present application, the first metal layer 1042d is a single-layer structure. In each support area A4, the first metal layer 1042d is divided into a plurality of first metal strips 1042d' arranged at intervals, and the fan-out wiring 105 can adopt a single-layer structure, which includes: a first sub-fan-out wiring 1051. The first sub-fan-out routing 1051 can pass through the gap between the adjacent first metal strips 1042d', so that the first sub-fan-out routing 1051 is disconnected from the first metal layer 1042d, and is insulated from other conductive layers (such as the first transparent electrode layer 1042c) in the redundant pad 1041 through the first insulating layer 1042a and the second insulating layer 1042b, which can avoid the first sub-fan-out routing 1051 and the first transparent electrode layer 1042c and the first metal layer 1042d from being connected and short-circuited. Therefore, the first sub-fan-out routing 1051 can directly pass through the support area A4, and the first sub-fan-out routing 1051 does not need to be routed in a bending manner, so as to avoid increasing the longitudinal routing space, and can reduce the width of the lower frame of the display panel, so as to realize a narrow frame and a design with equal width on four sides, thereby facilitating improving the display effect of the display panel. In addition, the first metal strip 1042d' can increase the support area to ensure the overall support effect of the redundant pad 1042.

[0081] Figure 10 is a schematic diagram of a third partial structure of redundant pads and fan-out routing in the display panel shown in Figure 5, and Figure 11 is a schematic diagram of the cross-sectional structure of the structure shown in Figure 10 along the C-C' direction. As shown in Figures 10 and 11, the difference between it and the structure shown in Figures 6 and 7 is that the redundant pad 1042 also includes: a second metal layer 1042e located between the first insulating layer 1042a and the second insulating layer 1042b; the second metal layer 1042e overlaps with the support area A4.

[0082] The second metal layer 1042e can be made of a metal material with good conductivity, such as one of molybdenum (Mo), aluminum (Al), titanium (Ti), or an alloy of the above-mentioned materials, which can be a single-layer structure or a multi-layer structure. In the embodiment of the present application, the second metal layer 1042e is a single-layer structure. The second metal layer 1042e covers the entire support area A2, which can further increase the overall support effect of the redundant pad 1042.

[0083] Figure 12 is a schematic diagram of a fourth local structure of the redundant pads and fan-out routing in the display panel shown in Figure 5, and Figure 13 is a schematic diagram of the cross-sectional structure of the structure shown in Figure 12 along the D-D' direction. As shown in Figures 12 and 13, the difference between it and the structure shown in Figures 10 and 11 is that the redundant pad 1042 also includes: a second metal layer 1042e located between the first insulating layer 1042a and the second insulating layer 1042b; the second metal layer 1042e is connected between adjacent support areas A4 as an integrated structure.

[0084] In the embodiment of the present application, the second metal layer 1042e is a single-layer structure. The second metal layer 1042e is connected between adjacent support areas A4 to form an integrated structure, which can further increase the overall support effect of the redundant pad 1042.

[0085] Figure 14 is a schematic diagram of a fourth local structure of redundant pads and fan-out routing in the display panel shown in Figure 5, and Figure 15 is a schematic diagram of the cross-sectional structure of the structure shown in Figure 14 along the E-E' direction. As shown in Figures 14 and 15, the difference between it and the structure shown in Figures 12 and 13 is that the redundant pad 1042 also includes: a second metal layer 1042e located between the first insulating layer 1042a and the second insulating layer 1042b; the second metal layer 1042e includes: a plurality of second metal strips 1042e' arranged at intervals; the fan-out routing 105 also includes: a second sub-fan-out routing 1052; the second sub-fan-out routing 1052 is located between adjacent second metal strips 1042e'.

[0086] In the structures shown in FIG. 14 and FIG. 15 , the fan-out routing 105 adopts a double-layer structure, which includes: a first sub-fan-out routing 1051 and a second sub-fan-out routing 1052. The first metal layer 1042d is a single-layer structure, and the second metal layer 1042e is a single-layer structure. In each support area A4, the first metal layer 1042d is divided into a plurality of first metal strips 1042d' arranged at intervals, and the second metal layer 1042e is divided into a plurality of second metal strips 1042e' arranged at intervals. The first sub-fan-out routing 1051 can pass through the gap between adjacent first metal strips 1042d', and the second sub-fan-out routing 1052 can pass through the gap between adjacent second metal strips 1042e', so that the first sub-fan-out routing 1051 is disconnected from the first metal layer 1042d, and the second sub-fan-out routing 1052 is disconnected from the second metal layer 1042e, and is insulated from other conductive layers (for example, the first transparent electrode layer 1042c) in the redundant pad 1041 by the first insulating layer 1042a and the second insulating layer 1042b, so that a short circuit can be avoided between the first sub-fan-out routing 1051, the second sub-fan-out routing 1052 and the first transparent electrode layer 1042c, the first metal layer 1042d, and the second metal layer 1042e. Therefore, the first sub-fan-out routing 1051 and the second sub-fan-out routing 1052 can directly pass through the support area A4, and the first sub-fan-out routing 1051 and the second sub-fan-out routing 1052 do not need to be routed in a bending manner, thereby avoiding increasing the longitudinal routing space, and reducing the width of the lower frame of the display panel, realizing a narrow frame and a design of equal width on all four sides, which is beneficial to improving the display effect of the display panel.

[0087] In some embodiments, as shown in FIG. 15 , the orthographic projection of the first sub-fan-out trace 1051 on the substrate 101 is located between the orthographic projections of adjacent second sub-fan-out traces 1052 on the substrate 101 ; the orthographic projection of the first metal strip 1042d′ on the substrate 101 is located between the orthographic projections of adjacent second metal strips 1042e′ on the substrate 101 .

[0088] The first sub-fan-out wiring 1051 and the second sub-fan-out wiring 1052 are staggered to increase the distance between them, and when transmitting the driving signal, a large parasitic capacitance between them can be avoided, thereby ensuring the stability of the driving signal transmission. Correspondingly, the first metal strip 1042d' and the second metal strip 1042e' are also staggered.

[0089] Figure 16 is a schematic diagram of a fifth local structure of redundant pads and fan-out routing in the display panel shown in Figure 5, and Figure 17 is a schematic diagram of the cross-sectional structure of the structure shown in Figure 16 along the F-F' direction. As shown in Figures 16 and 17, it is different from the structure shown in Figures 14 and 15 in that the orthographic projection of the first sub-fan-out routing 1051 on the substrate 101 coincides with the orthographic projection of the second sub-fan-out routing 1052 on the substrate 101; the orthographic projection of the first metal strip 1042d' on the substrate 101 coincides with the orthographic projection of the second metal strip 1042e' on the substrate 101.

[0090] The first sub-fan-out wiring 1051 and the second sub-fan-out wiring 1052 are arranged opposite to each other, which can reduce the difficulty of manufacturing and save manufacturing costs during the manufacturing process. Correspondingly, the first metal strip 1042d' and the second metal strip 1042e' are also arranged opposite to each other.

[0091] In some embodiments, the lengths of the first metal strip 1042d' and the second metal strip 1042e' in a direction parallel to the fan-out trace 105 are equal to the length of the support area A4 in a direction parallel to the fan-out trace 105. The area of ​​the first metal strip 1042d' and the second metal strip 1042e' in each support area A4 is greater than or equal to 70% of the area of ​​the support area A4. In this way, the first metal strip 1042d' and the second metal strip 1042e' can have a good supporting effect.

[0092] In some embodiments, Figure 18 is a sixth partial structural schematic diagram of the redundant pads and fan-out routing in the display panel shown in Figure 5, and Figure 19 is a cross-sectional structural schematic diagram of the structure shown in Figure 18 along the G-G' direction. As shown in Figures 18 and 19, the difference between it and the structure shown in Figures 10 and 11 is that the redundant pad 1042 also includes: a second transparent electrode layer 1042f located between the first insulating layer 1042a and the second insulating layer 1042b; the second transparent electrode layer 1042f overlaps with the support area A4.

[0093] The second transparent electrode layer 1042f can replace the second metal layer 1042e mentioned above, and also plays a supporting role. In addition, the thickness of the second transparent electrode layer 1042f can be controlled to ensure the supporting effect.

[0094] In some embodiments, Figure 20 is a seventh partial structural schematic diagram of the redundant pads and fan-out routing in the display panel shown in Figure 5, and Figure 21 is a cross-sectional structural schematic diagram of the structure shown in Figure 20 along the H-H' direction. As shown in Figures 20 and 21, the difference between it and the structure shown in Figures 18 and 19 is that the redundant pad 1042 also includes: a second transparent electrode layer 1042f located between the first insulating layer 1042a and the second insulating layer 1042b; the second transparent electrode layer 1042f is connected between adjacent support areas A4 as an integrated structure.

[0095] The second transparent electrode layer 1042 f is connected between adjacent supporting areas A4 to form an integrated structure, which can increase the supporting area and ensure the overall supporting effect of the redundant pad 1042 .

[0096] In some embodiments, as shown in FIGS. 6 to 21 above, the first transparent electrode layer 1042c overlaps with the support area A4.

[0097] The first transparent electrode layer 1042c may only cover each supporting area 1042, which can reduce the process difficulty and save the preparation cost during the preparation process.

[0098] In some embodiments, Figure 22 is a schematic diagram of the seventh local structure of the redundant pads and fan-out routing in the display panel shown in Figure 5, and Figure 23 is a schematic diagram of the cross-sectional structure of the structure shown in Figure 22 along the I-I' direction. As shown in Figures 22 and 23, the difference between it and the structure of Figures 6 to 21 above is that the first transparent electrode layer 1042c is connected as an integrated structure between adjacent support areas A4.

[0099] The first transparent electrode layer 1042 c is connected between adjacent supporting areas A4 to form an integrated structure, which can increase the supporting area and ensure the overall supporting effect of the redundant pad 1042 .

[0100] In some embodiments, as shown in FIGS. 6 to 23 , the first insulating layer 1042 a and the second insulating layer 1042 b are connected as an integral structure between adjacent support areas A4 .

[0101] The first insulating layer 1042 a and the second insulating layer 1042 b are connected as an integral structure between adjacent supporting areas A4 , which can increase the supporting area and ensure the overall supporting effect of the redundant pad 1042 .

[0102] In some embodiments, FIG. 24 is a schematic diagram of the eighth partial structure of the redundant pad and fan-out routing in the display panel shown in FIG. 5 , and FIG. 25 is a schematic diagram of the cross-sectional structure of the structure shown in FIG. 24 along the J-J' direction. As shown in FIG. 24 and FIG. 25 , the difference between the structure shown in FIG. 22 and FIG. 23 described above is that the redundant pad 1042 also includes: a first metal layer 1042d located on the side of the substrate 101 close to the first insulating layer 1041; the first metal layer 1042d includes: a plurality of first metal strips 1042d' arranged at intervals; and the first sub-fan-out routing 1051 is located between adjacent first metal strips 1042d'. The first metal strip 1042d' can increase the support area to ensure the overall support effect of the redundant pad 1042.

[0103] In a second aspect, an embodiment of the present disclosure provides a display device, which includes a display panel as provided in any of the above embodiments. The display device can be any product or component with a display function, such as a television, a mobile phone, a monitor, a laptop, a digital photo frame, a navigator, etc. The implementation principle is similar to that of the above display panel, and will not be repeated here.

[0104] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

A display panel comprises a pixel region, a fan-out region and a binding region arranged on one side of the pixel region and arranged in sequence in a direction away from the pixel region; wherein: The display panel includes: a substrate, a driving chip located on the substrate and arranged in the binding area; the driving chip includes: a plurality of binding pads; the display panel also includes: a plurality of fan-out routing lines located on the substrate; one end of each of the fan-out routing lines is connected to the binding pad and extends to the pixel area through the fan-out area; the distance between some of the binding pads and the first edge of the driving chip gradually increases along a direction parallel to the first edge; the driving chip has a plurality of supporting areas arranged on one side of some of the binding pads close to the fan-out area; the driving chip also includes: redundant pads located in the supporting areas; some of the fan-out routing lines pass through the area between adjacent support areas; some of the fan-out routing lines pass through the supporting area and are insulated from the redundant pads. The display panel according to claim 1, wherein: The redundant pad includes: a first insulating layer, a second insulating layer, and a first transparent electrode layer located on the substrate and arranged in sequence in a direction away from the substrate; the fan-out routing includes: a first sub-fan-out routing; the first sub-fan-out routing is located on the side of the substrate close to the first insulating layer. The display panel according to claim 2, wherein: The redundant pad further includes: a first metal layer located on a side of the substrate close to the first insulating layer; the first metal layer includes: a plurality of first metal strips arranged at intervals; and the first sub-fan-out routing is located between adjacent first metal strips. The display panel according to claim 3, wherein: The redundant pad further includes: a second metal layer located between the first insulating layer and the second insulating layer; and the second metal layer overlaps with the supporting area. The display panel according to claim 3, wherein: The redundant pad further includes: a second metal layer located between the first insulating layer and the second insulating layer; the second metal layer is connected between adjacent support areas to form an integrated structure. The display panel according to claim 3, wherein: The redundant pad also includes: a second metal layer located between the first insulating layer and the second insulating layer; the second metal layer includes: a plurality of second metal strips arranged at intervals; the fan-out routing also includes: a second sub-fan-out routing; the second sub-fan-out routing is located between adjacent second metal strips. The display panel according to claim 6, wherein: The orthographic projection of the first sub-fan-out routing on the substrate is located between the orthographic projections of the adjacent second sub-fan-out routing on the substrate; the orthographic projection of the first metal strip on the substrate is located between the orthographic projections of the adjacent second metal strips on the substrate. The display panel according to claim 6, wherein: The orthographic projection of the first sub-fan-out routing on the substrate coincides with the orthographic projection of the second sub-fan-out routing on the substrate; the orthographic projection of the first metal strip on the substrate coincides with the orthographic projection of the second metal strip on the substrate. The display panel according to claim 6, wherein: The lengths of the first metal strip and the second metal strip along a direction parallel to the fan-out wiring are both equal to the length of the support area along a direction parallel to the fan-out wiring. The display panel according to claim 6, wherein: The areas of the first metal strip and the second metal strip in each of the supporting regions are greater than or equal to 70% of the area of ​​the supporting region. The display panel according to claim 3, wherein: The redundant pad further includes: a second transparent electrode layer located between the first insulating layer and the second insulating layer; and the second transparent electrode layer overlaps with the supporting area. The display panel according to claim 3, wherein: The redundant pad further includes: a second transparent electrode layer located between the first insulating layer and the second insulating layer; the second transparent electrode layer is connected between adjacent supporting areas to form an integrated structure. The display panel according to any one of claims 2 to 12, wherein: The first transparent electrode layer overlaps with the supporting area. The display panel according to any one of claims 2 to 12, wherein: The first transparent electrode layer is connected between adjacent support areas to form an integrated structure. The display panel according to any one of claims 2 to 12, wherein: The first insulating layer and the second insulating layer are connected to form an integral structure between adjacent supporting areas. A display device, wherein The display device comprises the display panel according to any one of claims 1 to 15.

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