Method and device for realizing STR function

Abstract

The embodiment of the invention discloses a method and device for realizing an STR function. The method comprises the following steps: when a power state management module realizes an STR function, sending a first suspension instruction to an application module needing to be suspended, and controlling an execution management module to enter a preset state; the execution management module is used for sending a second suspension instruction to the application module after entering the preset state; when the application module receives the second suspension instruction and does not receive the first suspension instruction, the application module executes STR operation, establishes connection with the power state management module again, and sends a confirmation message to the power state management module based on the reestablished connection; and after receiving the confirmation message, the power state management module continues to execute the STR process. According to the scheme provided by the embodiment of the invention, the problem that the dormancy and wakeup time is prolonged due to suspension failure under certain special conditions can be avoided.

Description

Technical Field

[0001] The present disclosure relates to computer technology, and more particularly to a method and device for implementing a STR (Suspend to RAM) function. Background Art

[0002] The electronic and electrical architecture of automobiles is evolving towards a structure centered on HPC (High Performance Computing, which can serve as the central computing platform for the entire vehicle). HPC can be a power and body controller, propulsion and chassis controller, data network router, gateway, firewall, regional master controller, and data storage center, integrating multiple functions in one, or performing only some of them. In addition, HPC is a key architectural component between software code and physical operations. It is responsible for converting software code written by engineers into actual operations that can be performed by the vehicle, achieving a leap from digital bytes to mobile travel. This conversion capability makes software-defined vehicles possible, allowing vehicles to continuously gain new features and improvements through software updates like smartphones.

[0003] STR (Suspend to RAM) is a power management technology that saves the system state to RAM to achieve fast sleep and wake-up and reduce power consumption. When the system enters STR mode, the operating system saves the current process, memory state, and device state to RAM and shuts down other unnecessary hardware devices, thereby significantly reducing the system's power consumption.

[0004] With the application of STR technology on HPC, the purpose of fast HPC hibernation and restart can be achieved. However, in real car applications, in a few cases, the system does not execute the suspension process as expected but executes the shutdown process, which leads to a longer time to enter hibernation, and it takes a longer time to wake up the next time, which does not achieve the expected effect. Therefore, the existing technology needs to be improved. Summary of the invention

[0005] In view of this, the present invention provides a method, apparatus and device for implementing the STR function, which can avoid the problem of prolonged sleep and wake-up time caused by suspend failure in certain special circumstances.

[0006] A method for implementing a suspend to memory STR function according to an embodiment of the present invention comprises: when implementing the STR function, the power state management module sends a first instruction for instructing the application module to perform the STR operation to the application module that needs to be suspended, and controls the execution management module to enter a predetermined state; after entering the predetermined state, the execution management module sends a second instruction to the application module for instructing the application module to perform the STR operation; when the application module receives the second instruction but does not receive the first instruction, the application module performs the STR operation, re-establishes a connection with the power state management module, and sends a confirmation message to the power state management module based on the re-established connection; when the power state management module receives the confirmation message, it continues to execute the STR process.

[0007] In some implementations, when the power state management module times out without receiving a confirmation message from the application module, a shutdown process is executed.

[0008] In some implementations, the power state management module executes the STR process upon receiving a suspend indication from the power management module.

[0009] In some implementations, the power state management module sends the second indication to the application module via the trigger and notification state management module, the application module pre-registers with the trigger and notification state management module, and the application module verifies whether the registration is successful.

[0010] In some implementations, the application module pre-registers with the power state management module without verifying whether the registration is successful; and re-establishing a connection with the power state management module includes: the application module re-registers with the power state management module.

[0011] In some implementations, the method further includes: monitoring in real time through a platform health management module whether the application module is operating normally, and restarting the application module when an abnormality is detected in the application module.

[0012] An apparatus for implementing a suspend-to-memory (STR) function according to an embodiment of the present invention comprises: a power state management module, an execution management module and an application module; the power state management module is used to send a first instruction for instructing the application module to perform a STR operation to the application module that needs to be suspended when implementing the STR function, and control the execution management module to enter a predetermined state; the execution management module is used to send a second instruction to the application module after entering the predetermined state, for instructing the application module to perform a STR operation; the application module is used to perform a STR operation when receiving the second instruction but not the first instruction, and re-establish a connection with the power state management module, and send a confirmation message to the power state management module based on the re-established connection; the power state management module is also used to continue executing the STR process after receiving the confirmation message.

[0013] A computer device / equipment / system according to an embodiment of the present invention comprises a memory, a processor and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method according to the embodiment of the present invention.

[0014] A computer-readable storage medium according to an embodiment of the present invention stores a computer program / instruction thereon, and when the computer program / instruction is executed by a processor, the steps of the method described in the embodiment of the present invention are implemented.

[0015] A computer program product according to an embodiment of the present invention includes a computer program / instruction, and when the computer program / instruction is executed by a processor, the steps of the method according to the embodiment of the present invention are implemented.

[0016] Beneficial effects of the technical solution provided by the present disclosure:

[0017] In the embodiment of the present invention, the application module not only performs the STR operation based on the instruction of the power state management module, but also performs the STR operation based on the state of the execution management module. In this way, when the application module and the power state management module cannot communicate normally due to some reasons, the application module can also enter the suspended state in time, and reply a confirmation message to the power state management module through a new connection, so that the power state management module can perform the STR process normally instead of the unexpected shutdown process, thereby avoiding the system sleep and wake-up time from becoming longer. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments provided according to the present disclosure and should not be regarded as limiting the scope of the present disclosure.

[0019] Figure 1 is a schematic structural diagram of an embodiment of the HPC of the present invention;

[0020] Figure 2 is a schematic structural diagram of an embodiment of the A core of the present invention;

[0021] Figure 3 is a schematic structural diagram of another embodiment of the A core of the present invention;

[0022] Figure 4 is a structural schematic diagram of another embodiment of the A core of the present invention;

[0023] Figure 5 It is a flow chart of an embodiment of a method for realizing STR function of the present invention;

[0024] Figure 6 It is a schematic diagram of the structure of an embodiment of a computer device / equipment / system of the present invention, which is used to implement the method of the embodiment of the present invention. DETAILED DESCRIPTION

[0025] The present disclosure will be further described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0026] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the main purpose of the present disclosure.

[0027] The solution for implementing the STR (suspend to memory) function in the embodiment of the present invention will be described by taking the HPC in the vehicle as an example, especially taking the A core in the heterogeneous SOC (system on chip) in the HPC as an example. However, it can be understood that the solution for implementing the STR function can also be applied to other devices or architectures, such as domain controllers, regional controllers, electronic control units (ECUs), single-core structures, multi-core structures, etc. in the vehicle, which are not limited by the embodiments of the present invention.

[0028] like Figure 1As shown, it is a schematic diagram of the structure of an embodiment of HPC (high performance computer) 1. The HPC1 is developed based on SOC10. In some embodiments, HPC1 can be used as a central computing unit in a vehicle. SOC10 can adopt a heterogeneous dual-core structure, for example, including A core and M core. In this embodiment, the STR (suspend to memory) function can be applied to the A core. For example, when the M core detects that the system meets the conditions for entering the sleep state, the M core can instruct the A core to perform the STR function. Figure 2 As shown, it is a structural diagram of an embodiment of the A core, which may include: SPMC (Slave Power management Client, sub-power management module) 201, which performs power management of the A core based on the instruction of the M core. The power state management module 202 is used for the management of the power state, wherein the power state includes: normal operating state, transient state, suspend state and shutdown state, etc. The power state management module 202 can switch between the above states based on actual conditions. For example, when receiving the suspend instruction of SPMC201, it switches from the normal operating state to the transient state, and when the transient operation is completed, it switches to the suspend state. In addition, the power state management module 202 can also provide STR triggering and notification services. And the application module 203 cooperates with the notification of the power state management module 202 to perform corresponding actions to complete the operation of the STR function.

[0029] Specifically, in Figure 2 In the embodiment, when the A core is cold started, the application module 203 registers with the power state management module 202, thereby establishing a TCP (Transmission Control Protocol) connection between the application module 203 and the power state management module 202. When the A core is running, when specific conditions are met, the SPMC201 sends a suspension indication to the power state management module 202 to indicate entering the suspension state. The power state management module 202 switches the power state from the normal operating state to the transient state, and provides the transient state information to the application module 203 or other related modules. When the application module 203 receives the transient state information, it performs the suspension operation and sends a confirmation message to the power state management module 202. If the power state management module 202 can receive the confirmation message returned by the application module 203 within the timeout period, the power state management module 202 can continue to complete the suspension process. If the power state management module 202 does not receive a confirmation message returned by the application module 203 within the timeout period, the power state management module 202 will not continue to execute the suspend process, but will execute a shutdown process.

[0030] The inventor of the present application found in actual application that there is a low probability that the power state management module 20 does not execute the normal suspension process as expected, but executes the shutdown process. After analyzing the reasons, it was found that it may be because there is a problem with the TCP connection between the power state management module 202 and the application module 203, such as thread jamming or the application module 202 completes the registration (such as the registration function successfully runs completely), but the application module 203 does not receive the message from the power state management module 20, resulting in the power state management module 20 not receiving the confirmation response within the timeout period, thereby executing the shutdown process.

[0031] In view of this, an embodiment of the present application provides a new solution for implementing the suspend to memory (STR) function, in which an EM (execution manager) module is utilized. Specifically, the application module adds a subscription to the status of the EM module. When it is found that the EM module has switched to a predetermined state related to the STR function but the application module has not received relevant instructions from the power state management module 202, it indicates that the system has been performing a suspend operation but has not received relevant instructions. Therefore, the application module can perform a suspend operation, re-register with the power state management module 202, and send a confirmation message to the power state management module 202 based on the re-registered connection. In this way, the application module can suspend normally, and the power state management module 202 can also receive the confirmation message and continue to execute the suspend process. Thereby, the problem of prolonged sleep and wake-up time due to suspend failure in certain special cases can be avoided.

[0032] The embodiments of the present invention are described in more detail below in conjunction with the accompanying drawings. It should be noted that the entire text mainly uses HPC as an example for description, and more specifically uses A core as an example for description. However, from the perspective of the solution of the present application itself, it is not limited to this, and may be applied to any device that wants to implement the STR function.

[0033] like Figure 3 , which is a schematic diagram of the structure of another embodiment of the A core, which includes: SPMC201, power state management module 202, application module 203 and execution management module 204.

[0034] When a specific condition is met, the SPMC 201 sends a suspend instruction to the power state management module 202. The specific condition is, for example, when a sleep instruction is received from the main power management module in the M core.

[0035] Among them, the power state management module 202 implements the STR function according to the received instruction. When implementing the STR function, the power state management module 202 sends a suspension instruction to the application (APP) module 203 that needs to be suspended, which is used to instruct the application module 203 to perform the STR operation. Among them, the application module that needs to be suspended can be, for example, a module that needs to be powered on and responds in time and provides services, such as LogMaster (for providing services for storing Logs). In addition, the power state management module 202 simultaneously controls the execution management module 204 to enter a predetermined state, wherein the predetermined state can be, for example, a transient state. In some embodiments, when the power state management module 202 receives a suspension instruction, it switches its own state from a normal operating state to a transient state, and then notifies the application module 203 and the execution management module 204 of the transient state, so as to achieve related purposes such as instructing the application module 203 to perform a suspension operation and controlling the execution management module 204 to enter a transient state.

[0036] Among them, the execution management module 204 is used to manage the life cycle of the platform and application, including startup, shutdown, restart and resolution of process dependencies. When the execution management module 204 receives the transient notification from the power state management module 202, it can execute the operation of stopping the application module. In the A core, the application module is divided into an application module that needs to be stopped and an application module that needs to be suspended. For the stop operation, all programs and resources will be released, and the main process will exit. For the suspend operation, the inter-core communication will be actively stopped, such as stopping IPCF (inter-platform communication framework), disconnecting the socket and affecting related operations, but the main process will not exit. After completion, the execution management module 204 feeds back the transient completion indication to the power state management module 202, and the power state management module 202 can enter the suspended state. If the power state management module 202 further receives a confirmation message of the suspend indication fed back by the application module 204, it can enter the dormant state, thereby completing the STR function.

[0037] In addition, in this embodiment, the execution management module 204 also sends a transient completion indication to the application module 203. Figure 4 As shown, the execution management module 204 sends the indication of transient completion to the application module 203 through the trigger and notification state management module 205. The application module 203 may pre-register with the trigger and notification state management module 205 to subscribe to the EM state. In this way, when the trigger and notification state management module 205 receives the indication of transient completion, it may provide it to the application module 203.

[0038] In this embodiment, when the application module 203 receives an instruction from the power state management module 202 or an instruction from the execution management module 204, it will perform a suspend operation and return a corresponding confirmation message to the power state management module 202. However, when the application module 203 does not receive an instruction from the power state management module 202 but receives an instruction from the execution management module 204, the application module will re-register with the power state management module 202 to re-establish a connection, and send a confirmation message to the power state management module 202 based on the re-established connection.

[0039] In addition, in the above embodiment, the application module 203 registers with the power state management module 202, and there is no mechanism to verify whether the registration is successful. The application module 203 registers with the trigger and notification state management module 205, and the application module 203 verifies whether the registration is successful. For example, when powered on, after the application module 203 registers with the trigger and notification state management module 205, the trigger and notification state management module 205 will send a notification of the EM state to the application module 203. If the application module 203 does not receive the notification after registration, it can re-register.

[0040] In addition, in the above embodiment, the platform health management module (PHM) 206 can also monitor in real time whether the application module 203 is running normally. When the application module 203 is monitored to be abnormal, the application module is restarted. When the application module 203 is monitored to be normal, the above solution is executed. The PHM 206 can eliminate the problem of being unable to receive the suspension indication or unable to respond due to the application module 203 itself.

[0041] In this embodiment, the acquisition of the EM state is added through the application module 203 to ensure that the STR function can be normally implemented, thereby avoiding the system from unexpectedly executing the shutdown process, resulting in the extension of the sleep and wake-up time.

[0042] like Figure 5 FIG. 1 is a flow chart of an embodiment of a method for realizing STR function of the present invention, which comprises:

[0043] Step S10: Core A runs normally, and the power state management module is in running state.

[0044] Step S11, SPMC sends a suspend indication to the power state management module to instruct execution of the STR process.

[0045] Step S12: the power state management module switches the state to the transient state according to the received instruction, and notifies the application module (APP).

[0046] Step S13: Due to unknown reasons, the application module does not receive the instruction from the power state management module, so the application module does not perform STR related operations.

[0047] Step S14: the power state management module sends a transient state notification to the execution management module, and the execution management module executes related operations according to the received transient state notification, such as instructing some application modules to execute a stop operation.

[0048] Step S15, after completing the relevant operations, the execution management module sends a transient completion notification to the power state management module and the trigger and notification state management module.

[0049] Step S16: Based on the subscription of the application module, the triggering and notification state management module sends a notification of transient completion to the application module.

[0050] Step S17: The application module receives a notification of transient completion, but finds that no suspend indication is received.

[0051] Step S18: The application module re-registers with the power state management module.

[0052] Step S19: the application module performs suspension-related operations and sends a confirmation message to the power state management module.

[0053] Step S20: The power status management module receives a confirmation message.

[0054] Step S21, the power state management module switches to a sleep state to complete the STR function.

[0055] The method of this embodiment can ensure that the STR function is successfully implemented and avoid executing the shutdown operation.

[0056] In addition, an embodiment of the present invention further provides a computer device / equipment / system, such as Figure 6 As shown. It includes a memory 62, a processor 60 and a computer program stored in the memory. When the processor 60 executes the computer program in the memory 62, the steps of the method of the above embodiment are implemented.

[0057] In addition, an embodiment of the present invention further provides a computer-readable storage medium on which a computer program / instruction is stored. When the computer program / instruction is executed by a processor, the steps of the method of the above embodiment are implemented.

[0058] In addition, an embodiment of the present invention further provides a computer program product, including a computer program / instruction, which implements the steps of the method of the above embodiment when the computer program / instruction is executed by a processor.

[0059] In the above embodiment, when the memory 62 and the processor 60 are implemented independently, the memory 62 and the processor 60 can be connected to each other through a bus and communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc.

[0060] Optionally, in a specific implementation, if the memory 62 and the processor 60 are integrated on a chip, the memory 62 and the processor 60 can communicate with each other through an internal interface.

[0061] It should be understood that the processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc. It is worth noting that the processor may be a processor supporting the Advanced RISC Machines (ARM) architecture.

[0062] Further, optionally, the above-mentioned memory may include a read-only memory and a random access memory, and may also include a non-volatile random access memory. The memory may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may include a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may include a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available. For example, static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM) and direct memory bus random access memory (DR RAM).

[0063] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the process or function described in the embodiment of the present disclosure is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center by wired (for example: coaxial cable, optical fiber, data subscriber line (Digital Subscriber Line, DSL)) or wireless (for example: infrared, Bluetooth, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access, or a data storage device such as a server or data center that includes one or more available media integrations. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a digital versatile disc (DVD)), or a semiconductor medium (e.g., a solid state disk (SSD)), etc. It is worth noting that the computer-readable storage medium mentioned in the present disclosure may be a non-volatile storage medium, in other words, a non-transient storage medium.

[0064] A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

[0065] In the description of the embodiments of the present disclosure, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0066] In the description of the embodiments of the present disclosure, unless otherwise specified, " / " means or, for example, A / B can mean A or B. "And / or" in this article is only a way to describe the association relationship of associated objects, indicating that there can be three relationships, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

[0067] In the description of the embodiments of the present disclosure, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0068] The above description is only an exemplary embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A method for implementing a suspend to memory STR function, characterized in that: include: When implementing the STR function, the power state management module sends a first instruction for instructing the application module to perform the STR operation to the application module that needs to be suspended, and controls the execution management module to enter a predetermined state; The execution management module, after entering the predetermined state, sends a second instruction to the application module, for instructing the application module to perform the STR operation; When the application module receives the second indication but does not receive the first indication, the application module performs an STR operation, re-establishes a connection with the power state management module, and sends a confirmation message to the power state management module based on the re-established connection; as well as After receiving the confirmation message, the power state management module continues to execute the STR process.

2. The method according to claim 1, characterized in that When the power state management module times out without receiving a confirmation message from the application module, a shutdown process is executed.

3. The method according to claim 1, characterized in that The power state management module executes the STR process when receiving the suspend instruction from the power management module.

4. The method according to claim 1, characterized in that The power state management module sends the second indication to the application module through the trigger and notification state management module. The application module is pre-registered with the trigger and notification state management module, and the application module verifies whether the registration is successful.

5. The method according to claim 1, characterized in that The application module pre-registers with the power state management module without verifying whether the registration is successful; The re-establishing connection with the power state management module includes: the application module re-registering with the power state management module.

6. The method according to claim 1, characterized in that The method further includes: monitoring in real time whether the application module is operating normally through a platform health management module, and restarting the application module when an abnormality is detected in the application module.

7. A device for implementing a suspend-to-memory STR function, characterized in that: include: Power state management module, execution management module and application module; The power state management module is used to send a first instruction for instructing the application module to perform a STR operation to the application module that needs to be suspended when implementing the STR function, and control the execution management module to enter a predetermined state; The execution management module is used to send a second instruction to the application module after entering the predetermined state, so as to instruct the application module to perform the STR operation; The application module is configured to, when receiving the second indication but not receiving the first indication, perform the STR operation, re-establish a connection with the power state management module, and send a confirmation message to the power state management module based on the re-established connection; The power state management module is further configured to continue executing the STR process after receiving the confirmation message.

8. A computer device / equipment / system comprising a memory, a processor and a computer program stored in the memory, characterized in that: The processor executes the computer program to implement the steps of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program / instruction stored thereon, characterized in that: When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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