Silicon nitride waveguide structure and preparation method thereof

Abstract

The invention provides a preparation method of a silicon nitride waveguide structure, and the method comprises the following steps: providing a substrate, and forming a silicon nitride waveguide layer on the surface of the substrate; sequentially forming a first silicon oxide layer, a polycrystalline silicon layer and a second silicon oxide layer on the surface of the silicon nitride waveguide layer to form a hard mask layer; performing patterning processing on the hard mask layer to form an etching hard mask; etching the silicon nitride waveguide layer to form a target silicon nitride waveguide structure; and removing the residual etching hard mask. According to the invention, based on the hard masks of the three-layer structure and by optimizing the thickness of each layer of hard mask film, the etching size deviation can be controlled within an extremely small range, the etched waveguide structure is smooth in side wall and good in perpendicularity, and the coupling loss of a silicon nitride end face coupler and the transmission loss of a silicon nitride waveguide can be effectively reduced.

Description

Technical Field

[0001] The present application relates to the field of silicon optoelectronic technology, and in particular to a silicon nitride waveguide structure and a preparation method thereof. Background Art

[0002] SiN materials have low optical loss, wide spectral transparency (400-2350nm), compatibility with CMOS processes, compatibility with high-power optical systems, diversity in device manufacturing, and potential for integration with other materials, making them widely used in telecommunications, sensing, spectroscopy, imaging, and quantum technology. As a key structure for optical signal transmission, the accuracy and quality of the waveguide's preparation process play a decisive role in the performance of silicon photonic chips. The thickness of the commonly used SiN waveguide is 400nm. Limited by the lithography and etching processes, the minimum size of the commonly used end coupler is 130nm. In order to reduce the loss of the entire integrated SiN optical system, it is necessary to further reduce the coupling loss of the SiN waveguide end coupler. Therefore, when designing the device, it is necessary to further reduce the size of the end coupler, such as to 90nm. In the process of process preparation, how to make a 90nm-sized SiN waveguide device with a high aspect ratio is a major challenge. The photoresist of the 90nm process node is usually a thin film with a thickness of about 300nm. If only photoresist is used as a mask layer, a large amount of photoresist will be consumed in the process of etching SiN materials, thus affecting the etched waveguide morphology and failing to produce end couplers and waveguide structures with smooth sidewall surfaces and good verticality. Therefore, it is urgent to develop related process technologies for preparing small-sized, high-aspect-ratio SiN waveguides.

[0003] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of the present application. Summary of the invention

[0004] The purpose of the present invention is to provide a method for preparing a silicon nitride waveguide to achieve the etching of a small-sized, high-aspect-ratio silicon nitride waveguide, which can be applied to patterns of 90nm and below and can effectively reduce the coupling loss of the SiN end face coupler and the transmission loss of the SiN waveguide.

[0005] In order to solve the above problems, in a first aspect, a method for preparing a silicon nitride waveguide structure is provided, comprising the following steps:

[0006] S1. providing a substrate, wherein a silicon nitride waveguide layer is formed on the surface of the substrate;

[0007] S2, sequentially forming a first silicon oxide layer, a polysilicon layer, and a second silicon oxide layer on the surface of the silicon nitride waveguide layer to form a hard mask layer;

[0008] S3, patterning the hard mask layer to form an etching hard mask;

[0009] S4, etching the silicon nitride waveguide layer to form a target silicon nitride waveguide structure;

[0010] S5. Remove the remaining etching hard mask.

[0011] The present invention is based on a three-layer hard mask structure and optimizes the thickness of each layer of the hard mask film, so that the etching size deviation can be controlled within a very small range, and the etched waveguide structure has a smooth side wall and good verticality, which can effectively reduce the coupling loss of the silicon nitride end face coupler and the transmission loss of the silicon nitride waveguide.

[0012] The first silicon oxide layer and the second silicon oxide layer are formed by chemical vapor deposition process, and the polysilicon layer is formed by furnace process. The formed silicon oxide layer and polysilicon layer have dense structures, which can ensure the accurate transfer of patterns and improve the morphology of the final waveguide structure.

[0013] In step S3, the hard mask layer is patterned by photolithography and etching processes, including: forming a photoresist layer on the surface of the second silicon oxide layer; patterning the photoresist layer to obtain a photoresist mask; using the photoresist mask as an etching mask, etching the hard mask layer by ICP etching process to form an etched hard mask. High-resolution photoresist is used in the photolithography process to ensure accurate transfer of the pattern and ensure that the etched hard mask pattern has good verticality and side morphology.

[0014] When the hard mask layer is etched using the ICP etching process, the etching gas is Cl 2 , HBr, SF 6 Or 2 By optimizing the etching gas ratio, the pressure of the reaction chamber, the electric field strength and other parameters, the etching selectivity of the etching process is improved to ensure the mask thickness of the small-sized hard mask pattern and the pattern quality of the etched hard mask.

[0015] In step S4, the silicon nitride waveguide layer is etched by an ICP etching process to form a target silicon nitride waveguide structure; the etching gas of the ICP etching process includes CH x F y (x+y=4) type of gas, SF 6 With O 2The etching selectivity of the etching process is improved by optimizing the etching gas ratio, the pressure of the reaction chamber, the electric field strength and other parameters, ensuring the realization of a 90nm end coupler and etching a silicon nitride waveguide with vertical side walls and smooth side wall surfaces.

[0016] In step S5, the remaining etching hard mask is removed by a wet etching process. The process has good compatibility, can be applied on a large scale, and has low production cost.

[0017] The remaining polysilicon layer is removed using TMAH solution, and the remaining first oxide layer is removed using dilute hydrofluoric acid solution. The process has good compatibility, can be applied on a large scale, and has low production cost.

[0018] The substrate is an SOI substrate, and the SOI substrate includes a bottom silicon layer, a buried oxide layer and a top silicon layer. This solution has good compatibility with the existing silicon photonic chip preparation process, is easy to apply in large-scale production, and reduces production costs.

[0019] On the other hand, the present application provides a silicon nitride waveguide structure obtained by the preparation method described in any one of the first aspects.

[0020] The silicon nitride waveguide structure comprises a silicon nitride end face coupler and a silicon nitride transmission waveguide; the size of the silicon nitride end face coupler is 90nm.

[0021] Compared with the prior art, the beneficial effects of the present invention mainly include the following: 1) High-precision etching: Through the optimized thickness of the hard mask film layer and precise etching process control, high-precision etching of small-sized silicon nitride waveguides can be achieved, the size deviation is controlled within a very small range, the waveguide sidewalls are smooth and have good verticality, so as to effectively reduce the coupling loss of the SiN end face coupler and the transmission loss of the SiN waveguide; 2) Good process compatibility: The scheme and etching process provided by the present invention are well compatible with the existing silicon photonic chip preparation process, which is convenient for application in large-scale production and reduces production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the specific embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 A schematic diagram of the preparation process of a silicon nitride waveguide structure provided by the present invention. DETAILED DESCRIPTION

[0024] The above and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of a preferred embodiment with reference to the drawings. The directional terms mentioned in the following embodiments, such as up, down, left, right, front or back, etc., are only referenced to the directions of the attached drawings. Therefore, the directional terms used are used to illustrate and not to limit the present invention.

[0025] The following will describe the various embodiments of the present application in detail with reference to the accompanying drawings. However, it will be appreciated by those skilled in the art that in the various embodiments of the present application, many technical details are provided in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solution claimed in the present application can be implemented.

[0026] The steps in the following embodiments do not correspond one to one with the summary of the invention.

[0027] Embodiment 1

[0028] like Figure 1 Shown is a schematic diagram of a preparation process of a silicon nitride waveguide structure provided in an embodiment of the present invention.

[0029] In the existing technology, the thickness of the commonly used SiN waveguide is 400nm, and is subject to the limitation of photolithography and etching process, and the minimum size of the commonly used SiN end coupler is 130nm. In order to reduce the loss of the whole integrated SiN optical system, the size of the end coupler can be further reduced in device design, such as reaching 90nm. But the preparation of small-sized, high-aspect-ratio SiN waveguide devices is a big challenge. If only photoresist is used as mask layer, a large amount of photoresist will be consumed in the etching SiN material process, thereby affecting the waveguide morphology etched out, and the end coupler and waveguide structure with smooth sidewall surface and good verticality can not be prepared. Therefore, the present invention provides a method for preparing a target silicon nitride waveguide structure (including silicon nitride end coupler and silicon nitride transmission waveguide and other passive devices based on silicon nitride such as, grating, multimode interferometer, etc.) with good morphology.

[0030] refer to Figure 1 ( Figure 1 The present invention is only an example and does not represent an actual silicon nitride waveguide structure. The present invention provides a silicon nitride waveguide structure and a method for preparing the same. The method comprises the following steps:

[0031] Step 1: providing a substrate, with a silicon nitride waveguide layer formed on the surface of the substrate;

[0032] Please refer to Figure 1 In a, a substrate 1 is first provided, and a silicon nitride waveguide layer 2 is formed on the surface of the substrate 1.

[0033] It is to be understood that the present invention does not impose too many restrictions on the provided substrate 1, which can be any suitable semiconductor substrate. In the present embodiment, the substrate 1 used is an SOI (silicon on insulator) substrate. This is because SOI substrates are commercially readily available and widely used in silicon optoelectronic devices. The SOI substrate is usually a three-layer structure (not fully shown in the figure), which is a bottom silicon layer, a buried oxide layer, and a top silicon layer from bottom to top. In other embodiments, other substrates may also be selected. In other embodiments, the substrate 1 may be made of any suitable material (e.g., silicon or germanium).

[0034] In this embodiment, a silicon nitride waveguide layer 2 is formed on the surface of the substrate 1, and the silicon nitride waveguide layer 2 is the basis for subsequent etching to form a target silicon nitride waveguide structure. A certain thickness of SiO2 is usually formed between the silicon nitride waveguide layer 2 and the surface of the substrate 1. 2 (not shown in the figure), the SiO 2 The formation of the layer is generally a chemical vapor deposition process (CVD) or a thermal oxidation process. Of course, in some embodiments, a silicon nitride substrate can also be used directly. In addition, generally before the preparation of the silicon nitride waveguide structure, the substrate 1 may have other structures formed therein, which is not limited thereto.

[0035] Step 2: Form a SiO 2 / poly-Si / SiO 2 A hard mask layer consisting of three thin films;

[0036] refer to Figure 1 In a, a first silicon oxide layer 30, a polysilicon layer 31 and a second silicon oxide layer 32 are sequentially deposited on the surface of the silicon nitride waveguide layer 2 to finally form a hard mask layer 3; wherein the first silicon oxide layer 30 and the second silicon oxide layer 32 are formed by a chemical vapor deposition process, and the polysilicon layer 31 is grown by a furnace tube process.

[0037] In this embodiment, a three-layer structure is used as the hard mask layer 3, wherein the first silicon oxide layer 30 can act as a stress buffer layer between the silicon nitride waveguide layer 2 and the subsequent hard mask layer 3, so that the stress between the hard mask layer 3 and the substrate 1 can be released or partially released, thereby ensuring the accuracy of the pattern of the hard mask layer 3 and obtaining a better etching effect; the middle polysilicon layer 31 has certain mechanical strength and conductivity, and is the main hard mask material, which can achieve a higher etching selectivity for silicon nitride material, and is convenient for pattern transfer and process control during photolithography and etching; and the top second silicon oxide layer 32 has good chemical stability, which can effectively prevent damage to the middle polysilicon layer 31 during the hard mask etching process.

[0038] In order to obtain better process effects, the thickness of the polysilicon layer 31 and the second silicon oxide layer 32 are optimized. First, the thickness of the second silicon oxide layer 32 on the top layer should be optimized to ensure that the mask pattern can be completely etched out in the subsequent hard mask etching process, and the middle polysilicon layer 31 is not consumed, so as to ensure that the etched hard mask pattern has good verticality and side morphology; further, in the subsequent waveguide etching process, the polysilicon layer 31 is the main mask material, and the thickness of the polysilicon layer 31 is required to be sufficient to block the consumption during the silicon nitride etching process. Normally, the first silicon oxide layer 30 and the second silicon oxide layer 32 are tens of nanometers, and the second silicon oxide layer 32 will be thicker; while the polysilicon layer 30 is hundreds of nanometers to ensure the completion of waveguide etching.

[0039] Step 3: patterning the hard mask layer to form an etching hard mask;

[0040] refer to Figure 1 As shown in FIG. 5 , the hard mask layer 3 is patterned to form an etching hard mask 33. The hard mask layer 3 is patterned by photolithography and etching processes to form a pattern that matches the size and shape of the target silicon nitride waveguide.

[0041] Specifically, a photoresist layer 4 is first formed on the surface of the second silicon oxide layer 32 by a spin coating process; then the photoresist layer 4 is patterned, including exposure, development and other processes, to finally obtain a photoresist mask 41; then the photoresist mask 41 is used as an etching mask, and the second silicon oxide layer 32, the polysilicon layer 31 and the first silicon oxide layer 30 are etched in sequence by an ICP etching process, and an etching hard mask 33 is formed after removing the remaining photoresist.

[0042] In this embodiment, during the photolithography process, high-resolution photoresist is selected, combined with advanced ASML photolithography equipment, to ensure accurate transfer of 90nm size patterns; in this embodiment, the hard mask layer 3 can be etched using ICP etching equipment, and Cl 2 , HBr, SF 6 , O 2 A suitable etching gas such as argon is used to generate plasma under the action of radio frequency power, and active particles in the plasma react with Si to generate volatile products which are pumped away by a vacuum pump, thereby achieving etching of the hard mask layer 3.

[0043] Step 4: etching the silicon nitride waveguide layer to form a target silicon nitride waveguide structure;

[0044] refer to Figure 1As shown in FIG. ef, the silicon nitride waveguide layer 2 is etched by an ICP etching process to form a target silicon nitride waveguide structure 5. The target silicon nitride waveguide structure generally includes a silicon nitride end face coupler and a silicon nitride transmission waveguide.

[0045] When etching silicon nitride, CH x F y (x+y=4) type of gas with SF 6 With O 2 , plasma is also generated under the action of RF power, and the active particles in the plasma react with SiN to generate volatile products that are pumped away by the vacuum pump, thereby achieving SiN etching. During the etching process, the parameters such as etching gas flow, RF power, reaction gas pressure and time are precisely controlled to ensure that SiN is uniformly etched and that no large amount of overetching is generated on the substrate 1.

[0046] Step 5: Remove the remaining etch hard mask.

[0047] After the etching of silicon nitride is completed, a wet etching process is generally used to remove the remaining etching hard mask. In the actual etching process, the silicon dioxide on the top of the etching hard mask 33 is usually consumed during the etching process, and the remaining polysilicon layer 31 and the first silicon oxide layer 30 are subsequently left. To this end, a TMAH solution can be used to remove the remaining polysilicon, and a 1:100 diluted hydrofluoric acid (DHF) solution can be used to wet etch and remove the remaining first silicon oxide layer 30, ensuring that the surface of the silicon nitride waveguide structure 5 is clean and no hard mask material remains.

[0048] The present invention also provides a silicon nitride waveguide structure, which is obtained by the above-mentioned preparation method. The silicon nitride waveguide structure comprises a silicon nitride end face coupler and a silicon nitride transmission waveguide; the size of the silicon nitride end face coupler is 90nm.

[0049] In order to facilitate the description, some common English nouns or letters used in the present invention are only used for exemplary reference rather than restrictive interpretation or specific usage, and the protection scope of the present invention should not be limited by their possible Chinese translations or specific letters.

[0050] It should also be noted that, in this document, relational terms such as "first" and "second" are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

Claims

1. A method for preparing a silicon nitride waveguide structure, characterized in that: The steps include: S1. providing a substrate, wherein a silicon nitride waveguide layer is formed on the surface of the substrate; S2, sequentially forming a first silicon oxide layer, a polysilicon layer, and a second silicon oxide layer on the surface of the silicon nitride waveguide layer to form a hard mask layer; S3, patterning the hard mask layer to form an etching hard mask; S4, etching the silicon nitride waveguide layer to form a target silicon nitride waveguide structure; S5. Remove the remaining etching hard mask.

2. The method for preparing a silicon nitride waveguide structure according to claim 1, characterized in that: The first silicon oxide layer and the second silicon oxide layer are formed by a chemical vapor deposition process, and the polysilicon layer is formed by a furnace process.

3. The method for preparing a silicon nitride waveguide structure according to claim 1, characterized in that: In step S3, the hard mask layer is patterned by photolithography and etching processes, including: forming a photoresist layer on a surface of the second silicon oxide layer; Performing patterning on the photoresist layer to obtain a photoresist mask; The photoresist mask is used as an etching mask, and the hard mask layer is etched using an ICP etching process to form an etching hard mask.

4. The method for preparing a silicon nitride waveguide structure according to claim 3, characterized in that: When the hard mask layer is etched using the ICP etching process, the etching gas is one or more of Cl2, HBr, SF6 or O2.

5. The method for preparing a silicon nitride waveguide structure according to claim 1, characterized in that: In step S4, the silicon nitride waveguide layer is etched using an ICP etching process to form a target silicon nitride waveguide structure; The etching gas of the ICP etching process includes CH x F y (x+y=4) type gases, SF6 and O2.

6. The method for preparing a silicon nitride waveguide structure according to claim 1, characterized in that: In step S5, a wet etching process is used to remove the remaining etching hard mask.

7. The method for preparing a silicon nitride waveguide structure according to claim 6, characterized in that: The remaining polysilicon layer is removed using a TMAH solution, and the remaining first oxide layer is removed using a diluted hydrofluoric acid solution.

8. The method for preparing a silicon nitride waveguide structure according to claim 1, characterized in that: The substrate is an SOI substrate, and the SOI substrate includes a bottom silicon layer, a buried oxide layer and a top silicon layer.

9. A silicon nitride waveguide structure, characterized in that: The method is obtained by the preparation method according to any one of claims 1 to 8.

10. The silicon nitride waveguide structure according to claim 9, characterized in that: The silicon nitride waveguide structure includes a silicon nitride end face coupler and a silicon nitride transmission waveguide; The size of the silicon nitride end face coupler is 90 nm.

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