Touch sensing circuit, touch sensing chip and method for improving sensing fidelity of touch sensing circuit
By adding pull-up clamp loops and pull-down clamp loops to the touch sensing circuit, the consistency of current replication is ensured, and the sensing fidelity reduction caused by touch voltage fluctuations is solved, and the signal-to-noise ratio and performance are improved.
Patent Information
- Application Number
- CN202411997893.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-05-06
AI Technical Summary
When the touch voltage fluctuates, the current copied by the pull-up mirror module and the pull-down mirror module are inconsistent, thereby reducing the sensing fidelity and signal-to-noise ratio.
By adding a pull-up clamp loop and a pull-down clamp loop in the touch sensing circuit, we ensure that the span voltage of the pull-up mirror module and the span voltage of the pull-up drive module are consistent, so as to maintain the consistency of current replication.
It effectively avoids the reduction in sensing fidelity caused by fluctuations in touch voltage, and improves the signal-to-noise ratio and performance of touch sensing.
Smart Images

Figure CN119937841A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of analog integrated circuits, and in particular to a touch sensing circuit, a touch sensing chip, and a method for improving the sensing fidelity of the touch sensing circuit. Background Art
[0002] In the interactive mode of modern electronic devices, touch screen and fingerprint recognition technology have become an indispensable and important part with their intuitive and convenient characteristics. The core of these technologies is to accurately and efficiently detect and process user input, so as to provide users with a smooth and intelligent operation experience. In order to achieve this function, the analog front end (AFE) and touch screen panel in the touch or fingerprint detection chip are crucial. The touch screen panel includes a touch / touch electrode array, and the touch sensor chip is used to detect and store the capacitance value change of the user touching or pressing the capacitor. The analog front end is responsible for detecting the change in the capacitance value of the touch electrode and converting its change into a digital signal for further analysis and processing by the subsequent digital processing unit.
[0003] The analog front end needs to accurately control the touch voltage used to drive the external capacitor (such as the capacitor array of the touch sensor or fingerprint sensor), and at the same time detect the current or total charge during the driving process, and then obtain the capacitance information of the driven capacitor through the analog-to-digital converter. The change in capacitance can reflect the user's touch situation, such as touch position, touch area, touch force or fingerprint characteristics, etc. However, Figure 1 As shown, due to the voltage V RX It will change up and down during the driving process, but the output node N2 of the mirror branch is usually locked at a fixed voltage by the subsequent integrator. RX During the period of time when the high voltage is reached and maintained, there will be a significant difference between the source-drain voltage difference of the pull-up driver PM1 in the touch sensing circuit and the source-drain voltage difference of the mirror tube PM2, resulting in a difference between the copied pull-up current and the target value of the expected ratio, and the impact of this difference will be aggravated as the high level lasts longer, resulting in a decrease in the fidelity of touch sensing and a decrease in the signal-to-noise ratio of touch sensing. When the touch voltage V RX The same is true for low voltage. Summary of the invention
[0004] The object of the present invention is to provide a touch sensing circuit, a touch sensing chip and a method for improving the sensing fidelity of the touch sensing circuit, so as to make the current copied to the pull-up mirror module and the pull-down mirror module consistent, so as to avoid the reduction of sensing fidelity caused by touch voltage fluctuations, thereby improving the touch screen performance and user experience.
[0005] In order to achieve the above objectives, the present invention is implemented by the following technical solutions:
[0006] In a first aspect, the present invention provides a touch sensing circuit, the touch sensing circuit comprising:
[0007] A driving unit, the driving unit comprising a pull-up driving module and a pull-down driving module, the driving unit being used to output a touch voltage to drive the touch electrodes;
[0008] A current mirror unit, the current mirror unit comprising a pull-up mirror module and a pull-down mirror module, which are respectively used to copy the current flowing through the pull-up driving module and the pull-down driving module according to a preset ratio, so that the output current of the current mirror unit can reflect the capacitance of the touch electrode;
[0009] Among them, the touch sensing circuit also includes a pull-up clamping loop and a pull-down clamping loop. The pull-up clamping loop is used to make the cross-voltage of the pull-up mirror module consistent with the cross-voltage of the pull-up driving module, and the pull-down clamping loop is used to make the cross-voltage of the pull-down mirror module consistent with the cross-voltage of the pull-down driving module, so as to avoid the reduction of sensing fidelity caused by the up and down changes of the touch voltage.
[0010] Preferably, the pull-up driving module and the pull-down driving module are connected to the first node, the pull-up mirror module is connected to the third node, and the pull-down mirror module is connected to the fourth node.
[0011] The first input terminal and the second input terminal of the pull-up clamp loop are connected to the first node and the third node respectively, the pull-up clamp loop includes a third PMOS transistor, and the third PMOS transistor is connected between the third node and the second node; the second node is the output node of the current mirror unit;
[0012] The first input terminal and the second input terminal of the pull-down clamp loop are connected to the first node and the fourth node respectively. The pull-down clamp loop includes a third NMOS transistor, and the third NMOS transistor is connected between the fourth node and the second node.
[0013] Preferably, the pull-up clamp loop includes a first operational amplifier unit, a first input terminal and a second input terminal of the first operational amplifier unit are respectively connected to the first node and the third node, and an output terminal of the first operational amplifier unit is connected to the gate terminal of the third PMOS transistor; and / or,
[0014] The pull-down clamp loop includes a second operational amplifier unit, a first input terminal and a second input terminal of the second operational amplifier unit are respectively connected to the first node and a fourth node, and an output terminal of the second operational amplifier unit is connected to the gate terminal of the third NMOS transistor.
[0015] Preferably, the pull-up driving module includes a plurality of first PMOS transistors, the pull-down driving module includes a plurality of first NMOS transistors, the pull-up mirror module includes a plurality of second PMOS transistors, and the pull-down mirror module includes a plurality of second NMOS transistors.
[0016] Preferably, the second PMOS transistor is used to replicate the current flowing through the first PMOS transistor; and the second NMOS transistor is used to replicate the current flowing through the first NMOS transistor.
[0017] In a second aspect, the present invention provides a touch driver chip, which includes the touch sensing circuit described in any one of the aforementioned embodiments.
[0018] Preferably, the touch sensing chip is also used to implement display driving.
[0019] In a third aspect, the present invention provides a method for improving the sensing fidelity of a touch sensing circuit, by adding a pull-up clamping loop and a pull-down clamping loop in a driving unit and a current mirror unit of the touch sensing circuit, the pull-up clamping loop being used to make the cross-voltage of the pull-up mirror module consistent with the cross-voltage of the pull-up driving module, and the pull-down clamping loop being used to make the cross-voltage of the pull-down mirror module consistent with the cross-voltage of the pull-down driving module, thereby avoiding a reduction in sensing fidelity caused by up and down changes in touch voltage.
[0020] Preferably, the method is implemented based on any one of the aforementioned embodiments of the touch sensing circuit.
[0021] The present invention has at least the following technical effects:
[0022] The present invention uses two clamping loops (a pull-up clamping loop and a pull-down clamping loop) so that when the touch voltage changes up and down, the pull-up clamping loop keeps the cross-voltage of the pull-up mirror module consistent with the cross-voltage of the pull-up driving module, and the pull-down clamping loop keeps the cross-voltage of the pull-down mirror module consistent with the cross-voltage of the pull-down driving module, so that the current copied to the pull-up mirror module and the pull-down mirror module can be kept consistent, thereby avoiding a reduction in sensing fidelity caused by the up and down changes in the touch voltage. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 It is a schematic diagram of the structure of a touch sensing circuit in the prior art;
[0024] Figure 2 A schematic diagram of the structure of a touch sensing circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0025] The following is a further detailed description of a touch sensing circuit, a touch sensing chip and a method for improving the sensing fidelity of a touch sensing circuit proposed by the present invention in combination with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the drawings are in a very simplified form and are not in precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In order to make the purposes, features and advantages of the present invention more obvious and easy to understand, please refer to the accompanying drawings. It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no technical substantive significance. Any structural modification, change in proportional relationship or adjustment of size, without affecting the effects and purposes that can be achieved by the present invention, should still fall within the scope of the technical content disclosed by the present invention.
[0026] As described in the background art, since the touch voltage changes in real time during the driving process, the touch voltage V RX During the period of time when the higher voltage is reached and maintained, there is an obvious difference between the voltages of the nodes N1 and N2, which causes the current replication ratio to be distorted, thereby causing the touch sensing result obtained by the existing circuit to be distorted.
[0027] Specifically, Figure 1 As shown, the touch sensing circuit or the analog front end includes a driving unit A1 and a current mirror unit A2. The driving unit A1 connects the capacitor C on the panel through a switch module K, a terminal RX on the display panel, and a current mirror unit A2. T The driving unit A1 includes an operational amplifier OP as a buffer, a transistor PM1 connected to a power supply, a transistor NM1 connected to a ground, and the like. The inverting input terminal of the operational amplifier OP can be coupled to a capacitor C on the panel through a terminal RX. T . Reference voltage V ref The output terminal of the driving unit A1 can be coupled to the inverting input terminal of the operational amplifier OP.
[0028] The operational amplifier OP includes an output circuit constituting an output stage, coupled to an output terminal of the operational amplifier OP. The output circuit of the operational amplifier OP may include a first PMOS transistor PM1 and a first NMOS transistor NM1. The source of the first PMOS transistor PM1 may be coupled to a power supply voltage VDD terminal, and the drain may be coupled to an output node N1 of the output circuit. The source of the first NMOS transistor NM1 may be coupled to a ground voltage terminal, and the drain may be coupled to an output node N1 of the output circuit.
[0029] The current mirror unit A2 may include a second PMOS transistor PM2 and a second NMOS transistor NM2. The second PMOS transistor PM2 may be connected to the output node N2 of the current mirror unit A2 together with the second NMOS transistor NM2. The source of the second PMOS transistor PM2 may be connected to the power supply voltage VDD terminal, and the drain of the second PMOS transistor PM2 may be connected to the output node N2 of the current mirror unit A2. The gate of the second PMOS transistor PM2 may be connected to the gate of the first PMOS transistor PM1, and the first and second PMOS transistors PM1 and PM2 may form a current mirror circuit. The source of the second NMOS transistor NM2 may be connected to the ground voltage terminal, and the drain of the second NMOS transistor NM2 may be connected to the output node N2 of the current mirror unit A2. The gate of the second NMOS transistor NM2 may be connected to the gate of the first NMOS transistor NM1, and the first and second NMOS transistors NM1 and NM2 may also form a current mirror circuit.
[0030] The current mirror circuit is a commonly used circuit structure that can make the current of one transistor be mirrored to another transistor as faithfully as possible.
[0031] Ideally, if the size ratio of the second PMOS transistor PM2 to the first PMOS transistor PM1 is 1:N, the current flowing through the second PMOS transistor PM2 will be 1 / N of the current flowing through the first PMOS transistor PM1.
[0032] Similarly, in an ideal case, when the sizes of the second NMOS transistor NM2 and the first NMOS transistor NM1 are 1:N, the current flowing through the second NMOS transistor NM2 will be 1 / N of the current flowing through the first NMOS transistor NM1.
[0033] However, as a touch driving circuit, the touch voltage VN1 (V RX ) changes back and forth within a range (e.g. 1V to 3V). The common V N2 The voltage is a constant voltage (e.g. 2V) connected to the subsequent integrator. N1 (V RX ) reaches a higher voltage (for example, 3V), the source-drain voltage of the first PMOS transistor PM1 and the second PMOS transistor PM2 is significantly different, resulting in the current copied to the second PMOS transistor PM2 being different from the expected ratio of 1 / N, and the same is true for the second NMOS transistor NM2.
[0034] Specifically, due to the touch voltage V RXis a variable voltage value, while the voltage of the output node N2 of the current mirror unit A2 always maintains a fixed predetermined value (for example, 2V), which results in that at most times, the source-drain voltage V DS The value of the source-drain voltage V DS The values of are different, which causes the output current of the current mirror circuit to be different from the desired current value (such as the aforementioned 1 / N), thereby causing the problem of replication accuracy deviation, which leads to a decrease in the sensing signal-to-noise ratio.
[0035] In view of this, if Figure 2 As shown, this embodiment provides a touch sensing circuit, the touch sensing circuit includes: a driving unit A11, the driving unit A11 includes a pull-up driving module 01 and a pull-down driving module 02, and the driving unit A11 is used to output a touch voltage V RX Driving the touch electrodes.
[0036] The current mirror unit A12 is coupled to the driving unit A11, and the current mirror unit A12 includes a pull-up mirror module 11 and a pull-down mirror module 12, which are respectively used to copy the first current I flowing through the pull-up driving module 01 and the pull-down driving module 02 according to a preset ratio. PM1 , the second current I NM1 , and thus the output current of the current mirror unit A12 can reflect the capacitance of the touch electrode; wherein, the current mirror unit A12 also includes a pull-up clamping loop 1 and a pull-down clamping loop 2, the pull-up clamping loop 1 is used to make the cross-voltage of the pull-up mirror module 11 consistent with that of the pull-up driving module 01, and the pull-down clamping loop 2 is used to make the cross-voltage of the pull-down mirror module 12 consistent with that of the pull-down driving module 02, so as to avoid the reduction of sensing fidelity caused by the up and down changes of the touch voltage.
[0037] In this embodiment, two clamping loops (a pull-up clamping loop and a pull-down clamping loop) are provided. The pull-up clamping loop keeps the cross-voltage of the pull-up mirror module consistent with the cross-voltage of the pull-up driving module, and the pull-down clamping loop keeps the cross-voltage of the pull-down mirror module consistent with the cross-voltage of the pull-down driving module. Thus, the current copied to the pull-up mirror module and the pull-down mirror module can be kept consistent, so as to avoid the reduction of sensing fidelity caused by the up and down changes of the touch voltage.
[0038] Please continue to refer to Figure 2 As shown, in this embodiment, the driving unit A11 includes a buffer OP, a pull-up driving module 01, and a pull-down driving module 02. The pull-up driving module 01 and the pull-down driving module 02 are connected to the first node N1, the pull-up mirror module 11 is connected to the third node N3, and the pull-down mirror module 12 is connected to the fourth node N4.
[0039] The first input terminal (positive terminal) and the second input terminal (negative terminal) of the pull-up clamp loop 1 are connected to the first node N1 and the third node N3 respectively. The pull-up clamp loop 1 includes a third PMOS transistor PM3, and the third PMOS transistor PM3 is connected in series between the pull-up mirror module 11 (or the third node N3) and the second node N2; the second node N2 is the output node of the current mirror unit A12.
[0040] The first input terminal (positive terminal) and the second input terminal (negative terminal) of the pull-down clamp loop 2 are connected to the first node N1 and the fourth node N4 respectively. The pull-down clamp loop 2 includes a third NMOS transistor NM3, and the third NMOS transistor NM3 is connected in series between the pull-down mirror module 12 (or the fourth node N4) and the second node N2.
[0041] The pull-up clamp loop 1 includes a first operational amplifier unit OP1, a first input terminal (positive terminal) and a second input terminal (negative terminal) of the first operational amplifier unit OP1 are respectively connected to a first node N1 and a third node N3 (respectively exemplified as: the drains of a first PMOS transistor PM1 and a second PMOS transistor PM2), and an output terminal of the first operational amplifier unit OP1 is connected to a gate terminal of a third PMOS transistor PM3; and / or, the pull-down clamp loop 2 includes a second operational amplifier unit OP2, a first input terminal (positive terminal) and a second input terminal (negative terminal) of the second operational amplifier unit OP2 are respectively connected to the first node N1 and a fourth node N4, and an output terminal of the second operational amplifier unit OP2 is connected to a gate terminal of a third NMOS transistor NM3.
[0042] The pull-up driving module 01 may not be limited to a first PMOS transistor, but may include several first PMOS transistors, and the pull-down driving module 02 may also include several first NMOS transistors; similarly, the pull-up mirror module 11 may also include several second PMOS transistors, and the pull-down mirror module 12 may include several second NMOS transistors. As an example, the pull-up driving module 01 includes a first PMOS transistor PM1, and the pull-down driving module 02 includes a first NMOS transistor PN1, but the specific embodiment is not limited thereto. Similarly, as an example, the pull-up mirror module 11 includes a second PMOS transistor PM2, and the pull-down mirror module 12 includes a second NMOS transistor NM2, but the specific embodiment is not limited thereto, as long as the pull-up mirror module 11 and the pull-down mirror module 12 are respectively used to copy the current flowing through the pull-up driving module 01 and the pull-down driving module 02 according to a preset ratio (for example, a ratio less than 1). For example, the second PMOS transistor is used to copy the current flowing through the first PMOS transistor; the second NMOS transistor is used to copy the current flowing through the first NMOS transistor.
[0043] Please continue to refer to Figure 2As shown, the buffer OP is an operational amplifier, but the present invention is not limited thereto.
[0044] As an example, the inverting input terminal of the buffer OP is coupled to a plurality of capacitors C on the display panel through a terminal RX, a switch K and other structures. T . Reference voltage V ref The output terminal of the driving unit A11 is coupled to the inverting input terminal of the buffer OP.
[0045] Exemplarily, the source of the first PMOS transistor PM1 included in the pull-up driving module 01 can be coupled to the power supply voltage VDD terminal, and the drain can be coupled to the output node N1 of the driving unit A11 and the first input terminal of the pull-up clamp loop 1. The source of the first NMOS transistor NM1 can be coupled to the ground voltage terminal, and the drain can be coupled to the first node N1 of the driving unit A11 and the first input terminal (positive terminal) of the pull-down clamp loop 2.
[0046] The output node N1 of the driving unit A11 is used to output the touch voltage V RX The current output by the current mirror unit can reflect the capacitance of the touch electrode, wherein the current flowing through the first PMOS transistor PM1 and the first NMOS transistor NM1 are the first current I PM1 , the second current I NM1 .
[0047] Please continue to refer to Figure 2 As shown, in this embodiment, as an example, the pull-up mirror module 11 includes a second PMOS transistor PM2, and the pull-down mirror module 12 includes a second NMOS transistor NM2.
[0048] The source of the second PMOS transistor PM2 can be connected to the power supply voltage VDD terminal, and the drain of the second PMOS transistor PM2 can be connected to the third node N3. The gate of the second PMOS transistor PM2 is connected to the gate of the first PMOS transistor PM1 to connect to the first output terminal of the buffer OP. Therefore, the first PMOS transistor PM1 and the second PMOS transistor PM2 can form a current mirror.
[0049] The source of the second NMOS transistor NM2 can be connected to the ground voltage terminal, and the drain of the second NMOS transistor NM2 can be coupled to the fourth node N4. The gate of the second NMOS transistor NM2 is connected to the gate of the first NMOS transistor NM1 to connect to the second output terminal of the buffer OP. Therefore, the first NMOS transistor NM1 and the second NMOS transistor NM2 can form a current mirror. The second PMOS transistor PM2 is used to copy the first current I according to a predetermined ratio. PM1The second NMOS transistor NM2 is used to copy the second current I according to a predetermined ratio. NM1 , so that the current I flowing through the second PMOS transistor PM2 PM2 =kI PM1 , the current I flowing through the second NMOS transistor NM2 NM2 =kI NM1 , k represents the ratio, and its typical value is less than 1.
[0050] Please continue to refer to Figure 2 As shown, in this embodiment, the pull-up clamp loop 1 keeps the voltage across the pull-up mirror module 11 consistent with the voltage across the pull-up driver module 01, and the pull-down clamp loop 2 keeps the voltage across the pull-down mirror module 12 consistent with the voltage across the pull-down driver module 02. In a specific embodiment, the pull-up clamp loop 1 and the pull-down clamp loop 2 are respectively used to make the copied first current I PM1 The drain voltage of the second PMOS transistor PM2 and the copied second current I in the pull-down mirror module 12 are NM1 The drain voltage of the second NMOS transistor NM2 remains the same, thereby avoiding the touch voltage V RX The current replication error of the two branches caused by the up and down changes leads to sensing distortion.
[0051] Please continue to refer to Figure 2 As shown, in a specific embodiment, the source of the third PMOS transistor PM3 is connected to the drain of the second PMOS transistor PM2, that is, the third node N3. The source of the third NMOS transistor NM3 is connected to the drain of the second NMOS transistor NM2, that is, the fourth node N4. The pull-up clamp loop 1 is used to dynamically adjust the drain voltage of the second PMOS transistor PM2, so that the drain voltage of the second PMOS transistor PM2 follows the drain voltage of the first transistor PM1. When the touch voltage V RX Higher than the voltage V of the second node N2 N2 When the touch voltage V RX is lower than the voltage V of the second node N2 N2 When the voltage V N3 is substantially equal to the voltage V of the second node N2 N2 .
[0052] Similarly, the pull-down clamp loop 2 is used to dynamically adjust the drain voltage of the second NMOS transistor NM2 so that the drain voltage of the second NMOS transistor NM2 follows the drain voltage of the first NMOS transistor PM1. RX is lower than the voltage V of the second node N2 N2 When the touch voltage VRX Higher than the voltage V of the second node N2 N2 When the voltage V N4 is substantially equal to the voltage V of the second node N2 N2 .
[0053] The present invention adds a pull-up clamping loop to keep the cross-voltage of the pull-up mirror module consistent with the cross-voltage of the pull-up driving module, and adds a pull-down clamping loop to keep the cross-voltage of the pull-down mirror module consistent with the cross-voltage of the pull-down driving module, so that the current copied by the pull-up mirror module and the pull-down mirror module can be as close as possible to the expected proportional current copied, so as to avoid the reduction of sensing fidelity caused by the up and down changes of the touch voltage. The following is based on the pull-up driving module 01, the pull-down driving module 02, the pull-up mirror module 11, and the pull-down mirror module 12 of the example in the attached figure, each including a transistor, as an example to illustrate the principle of improving the touch fidelity of the present invention as follows: When the touch voltage (the voltage of the first node N1) V N1 Higher than the voltage V of the second node N2 N2 And when it is rising, because the touch voltage V N1 is coupled to the positive input terminal of the first operational amplifier unit OP1, so the output terminal voltage of the first operational amplifier unit OP1 also rises, thereby causing the source voltage of the third PMOS transistor PM3 (ie, the third node N3) to increase to V N3 rises until the voltage V N3 and touch voltage V N1 Therefore, this process realizes that the voltage V N3 Following the voltage V of the first node N1 N1 , thereby increasing the output replica current I copy The replication accuracy can improve the fidelity of touch sensing.
[0054] When the touch voltage V N1 is lower than the voltage V of the second node N2 N2 And when it is decreasing, because the touch voltage V N1 is coupled to the positive input terminal of the second operational amplifier unit OP2, so the output terminal voltage of the second operational amplifier unit OP2 also decreases, thereby causing the source voltage of the third transistor NM3 (the voltage of the fourth node N4) to decrease to V N4 drops until the voltage V N4 and touch voltage V N1 Therefore, this process realizes that the voltage V N4 Following the voltage V of the first node N1 N1 , thereby increasing the output replica current I copy The replication accuracy can improve the fidelity of touch sensing.
[0055] On the other hand, the present invention also provides a touch driver chip, including the touch sensing circuit as described above. This can improve the signal-to-noise ratio of the touch driver chip. The touch driver chip is also used to implement display driving, that is, the touch sensing chip integrates display driving and touch sensing functions.
[0056] In other aspects, the present invention also provides a method for improving the sensing fidelity of a touch sensing circuit, wherein a pull-up clamping loop 1 and a pull-down clamping loop 2 are added to the driving unit A11 and the current mirror unit A12 of the touch sensing circuit, wherein the pull-up clamping loop 1 is used to make the cross-voltage of the pull-up mirror module 11 consistent with the cross-voltage of the pull-up driving module 01, and the pull-down clamping loop 2 is used to make the cross-voltage of the pull-down mirror module 12 consistent with the cross-voltage of the pull-down driving module 02, thereby avoiding the reduction of sensing fidelity caused by the up and down changes of the touch voltage. Specifically, the method provided by the present invention is implemented by the touch sensing circuit of any of the aforementioned embodiments, and will not be described one by one here.
[0057] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0058] It should be noted that the devices and methods disclosed in the embodiments of this article can also be implemented in other ways. The device implementation described above is only schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of this article. In this regard, each box in the flowchart or block diagram can represent a part of a module, program or code, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented by a dedicated hardware-based system for performing a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.
[0059] In addition, the functional modules in the various embodiments of this document may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.
[0060] Although the content of the present invention has been described in detail through the above preferred embodiments, it should be appreciated that the above description should not be considered as a limitation of the present invention. After reading the above content, it will be apparent to those skilled in the art that various modifications and substitutions of the present invention will occur. Therefore, the protection scope of the present invention should be limited by the appended claims.
Claims
1. A touch sensing circuit, characterized in that: The touch sensing circuit comprises: A driving unit, the driving unit comprising a pull-up driving module and a pull-down driving module, the driving unit being used to output a touch voltage to drive the touch electrodes; A current mirror unit, the current mirror unit comprising a pull-up mirror module and a pull-down mirror module, which are respectively used to copy the current flowing through the pull-up driving module and the pull-down driving module according to a preset ratio, so that the output current of the current mirror unit can reflect the capacitance of the touch electrode; Among them, the touch sensing circuit also includes a pull-up clamping loop and a pull-down clamping loop. The pull-up clamping loop is used to make the cross-voltage of the pull-up mirror module consistent with the cross-voltage of the pull-up driving module, and the pull-down clamping loop is used to make the cross-voltage of the pull-down mirror module consistent with the cross-voltage of the pull-down driving module, so as to avoid the reduction of sensing fidelity caused by the up and down changes of the touch voltage.
2. The touch sensing circuit according to claim 1, wherein: The pull-up driving module and the pull-down driving module are connected to the first node, the pull-up mirror module is connected to the third node, and the pull-down mirror module is connected to the fourth node. The first input terminal and the second input terminal of the pull-up clamp loop are connected to the first node and the third node respectively, the pull-up clamp loop includes a third PMOS transistor, and the third PMOS transistor is connected between the third node and the second node; the second node is the output node of the current mirror unit; The first input terminal and the second input terminal of the pull-down clamp loop are connected to the first node and the fourth node respectively. The pull-down clamp loop includes a third NMOS transistor, and the third NMOS transistor is connected between the fourth node and the second node.
3. The touch sensing circuit according to claim 2, wherein: The pull-up clamp loop includes a first operational amplifier unit, a first input terminal and a second input terminal of the first operational amplifier unit are respectively connected to the first node and the third node, and an output terminal of the first operational amplifier unit is connected to the gate terminal of the third PMOS transistor; and / or, The pull-down clamp loop includes a second operational amplifier unit, a first input terminal and a second input terminal of the second operational amplifier unit are respectively connected to the first node and a fourth node, and an output terminal of the second operational amplifier unit is connected to the gate terminal of the third NMOS transistor.
4. The touch sensing circuit according to claim 1, wherein: The pull-up driving module includes a plurality of first PMOS transistors, the pull-down driving module includes a plurality of first NMOS transistors, the pull-up mirror module includes a plurality of second PMOS transistors, and the pull-down mirror module includes a plurality of second NMOS transistors.
5. The touch sensing circuit according to claim 4, wherein: The second PMOS transistor is used to replicate the current flowing through the first PMOS transistor; and the second NMOS transistor is used to replicate the current flowing through the first NMOS transistor.
6. A touch sensing chip, characterized in that: The touch sensing circuit comprises the touch sensing circuit according to any one of claims 1 to 5.
7. The touch control driver chip according to claim 6, characterized in that: The touch sensing chip is also used to implement display driving.
8. A method for improving the sensing fidelity of a touch sensing circuit, characterized in that: A pull-up clamping loop and a pull-down clamping loop are added to the driving unit and the current mirror unit of the touch sensing circuit. The pull-up clamping loop is used to make the cross-voltage of the pull-up mirror module consistent with the cross-voltage of the pull-up driving module, and the pull-down clamping loop is used to make the cross-voltage of the pull-down mirror module consistent with the cross-voltage of the pull-down driving module, so as to avoid the reduction of sensing fidelity caused by the up and down changes of the touch voltage.
9. The method according to claim 8, characterized in that The method is implemented based on the touch sensing circuit according to any one of claims 1 to 5.