Method for recovering L2P mapping table after SSD abnormal power failure

Abstract

The invention provides a method for recovering an L2P mapping table after abnormal power failure of an SSD, which comprises the following steps of: recording a corresponding relationship between a logic address and a physical address of each write operation to form a BT mapping table, and writing the BT mapping table into an NAND flash memory; dividing the whole L2P mapping table into L2P mapping table blocks with fixed sizes, writing the L2P mapping table blocks into an NAND flash memory, and updating indexes of the L2P mapping table blocks at the same time; after abnormal power failure and before the SSD is powered off, writing the L2P mapping table block index into the NAND flash memory, and writing the BT mapping table which is not written into the NAND flash memory into the NAND flash memory; after the SSD is powered on next time, the SSD master controller reads the L2P mapping table block index, reads the L2P mapping table block from the NAND flash memory and recovers the L2P mapping table block according to the position recorded in the L2P mapping table block index, finds all BT mapping tables needing to be recovered according to the sequence number recorded in the L2P mapping table block and reads the BT mapping tables, and the L2P mapping tables are updated according to the read BT mapping tables. According to the method, the efficient and rapid recovery of the L2P mapping table and the data correctness are ensured.

Description

Technical Field

[0001] The present invention relates to the field of solid state disk storage, and more specifically to a method for recovering an L2P mapping table after an abnormal power failure of an SSD. Background Art

[0002] Nowadays, solid-state drives (SSDs) generally use L2P mapping tables to record the mapping relationship between logical addresses LBA and Nand flash physical addresses. Especially for enterprise-level SSDs, in order to ensure performance and stability, the complete L2P mapping table needs to be saved in dynamic random access memory (DRAM) and updated in real time according to data writing during SSD operation.

[0003] Since DRAM is a volatile storage medium, once the power is off, the content of DRAM will be lost and cannot be recovered. The SSD host controller needs to be responsible for processing the recovery of the L2P mapping table after the power is lost. This recovery work needs to be completed before the SSD is powered on and used normally next time. The recovery time will affect the recognition speed of the SSD on the host side. The faster the recovery time, the better. The accuracy of the L2P mapping table recovery is also crucial to the correctness of the data.

[0004] The ratio of the size of the SSD L2P mapping table to its capacity is generally 1:1024, so for a 4T SSD, 4G of DRAM is required to store the L2P mapping table. With the rapid growth of information technology and data scale, the capacity of a single SSD is getting larger and larger (such as 8T, 16T, etc.), and the corresponding L2P mapping table and DRAM (8G, 16G, etc.) are also getting larger and larger. To ensure the correctness of the L2P mapping table, the complete L2P mapping table needs to be saved to the non-volatile Nand flash memory medium at power-on reset (POR) or sudden power-off recovery (SPOR). This process takes a lot of time, and a large enough capacitor is required on the SSD at SPOR to ensure that the complete L2P mapping table is written to the Nand flash memory. At the same time, as the amount of L2P mapping table data increases, the amount of data that the CPU of the SSD master controller needs to process increases when it is powered on next time, and the data processing capability of the CPU of the SSD master controller is getting higher and higher.

[0005] The prior art adds enough capacitors on the SSD disk to maintain the SPOR and write the complete L2P mapping table into the Nand flash memory, but this solution is costly and has limited capacitor capacity. Or before power failure, a capacitor of a certain capacity maintains the SPOR and writes part of the L2P mapping table into the Nand flash memory. At the next power-on, the CPU of the SSD master controller re-updates the information that has not been recorded in the L2P mapping table in time to the Dram in groups of 4 bytes. However, this solution has high requirements on the computing power of the SSD master controller CPU. The concurrency capability depends on the number of SSD master controller CPUs, and software programs are required to control the concurrency and computing logic between the SSD master controller CPUs, which increases the software complexity. Summary of the invention

[0006] The object of the present invention is to provide a method for recovering an L2P mapping table after an abnormal power failure of an SSD, which can efficiently and quickly recover and ensure data correctness.

[0007] According to one aspect of the present invention, a method for recovering an L2P mapping table after an abnormal power failure of an SSD is provided.

[0008] Recording the correspondence between the logical address and the physical address of each write operation to form a BT mapping table, and when the amount of data in the BT mapping table accumulates to a first threshold, writing it into the NAND flash memory;

[0009] The entire L2P mapping table is divided into blocks of fixed size as L2P mapping table blocks, and when the amount of updated data in the L2P mapping table blocks reaches a second threshold, the updated data is written into the NAND flash memory, and the L2P mapping table block index is updated at the same time;

[0010] After the SSD loses power abnormally but before it is powered off, the L2P mapping table block index is written into the NAND flash memory, and the BT mapping table that has not been written into the NAND flash memory is written into the NAND flash memory;

[0011] After the SSD is powered on next time, the L2P mapping table block index is read out, and according to the position recorded in the L2P mapping table block index, the L2P mapping table block is read out and restored from the NAND flash memory, all BT mapping tables that need to be restored are found and read out according to the sequence number recorded in the L2P mapping table block, and the L2P mapping table is updated according to the read BT mapping table.

[0012] In some implementations, the first threshold is set so that the BT mapping table is written into the NAND flash memory after an abnormal power failure and before the SSD is powered off.

[0013] In some implementations, the second threshold is set so that the L2P mapping table can be restored through the L2P mapping table block and the BT mapping table after the SSD is powered on next time after an abnormal power failure.

[0014] In some implementations, the restored or updated L2P mapping table is stored in a dynamic random access memory.

[0015] In some implementations, each of the divided L2P mapping table blocks has an initial physical address in the NAND flash memory, and each of the L2P mapping table blocks has a new physical address in the NAND flash memory after being updated.

[0016] In some implementations, after the physical address of the L2P mapping table block is updated, the L2P mapping table block index is updated accordingly.

[0017] In some implementations, after the BT mapping table is updated, the L2P mapping table is updated accordingly.

[0018] In some implementations, the two steps of finding and reading all BT mapping tables that need to be restored and updating the L2P mapping table according to the BT mapping table are cyclically operated and executed concurrently.

[0019] The beneficial effects are as follows: the present invention reduces the amount of data that needs to be synchronously written into the Nand flash memory before the SSD is powered off by designing relevant records of the L2P mapping table, and reduces the capacitance of the SSD. At the same time, the recovery time of the L2P mapping table is accelerated when the power is turned on next time, ensuring that the L2P mapping table is efficiently and quickly restored and the data correctness is guaranteed.

[0020] The present invention effectively simplifies the firmware program work when the L2P mapping table is restored after a sudden power failure of the SSD, reduces the amount of CPU calculation of the SSD master controller, and further reduces the number of CPUs of the SSD master controller and the power consumption.

[0021] The present invention improves the efficiency of L2P mapping table recovery, reduces the disk recognition waiting time at the next power-on, and avoids the problem of disk recognition failure caused by too long L2P mapping table recovery time. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of a method for recovering an L2P mapping table after an abnormal power failure of an SSD according to an embodiment of the present invention before an abnormal power failure;

[0023] Figure 2 A schematic diagram of a method for recovering an L2P mapping table after an abnormal power failure of an SSD according to an embodiment of the present invention before power failure after an abnormal power failure;

[0024] Figure 3 The present invention is a schematic diagram of a method for recovering an L2P mapping table after abnormal power failure of an SSD after power failure according to an embodiment of the present invention. DETAILED DESCRIPTION

[0025] The present invention provides a method for recovering an L2P mapping table after an abnormal power failure of a solid state hard disk.

[0026] The complete logical address to physical address mapping table (L2P mapping table) is stored in the dynamic random access memory (DRAM), and the entire L2P mapping table is divided into fixed-size blocks with a certain granularity. The granularity can be 4K, 8K, 16K, etc. In this embodiment, the entire L2P mapping table is divided into fixed-size blocks with a granularity of 4K. During the operation of the SSD, the corresponding L2P mapping table block is dynamically written into the NAND flash memory according to the real-time data writing situation, and the physical location of the L2P mapping table block in the NAND flash memory is recorded in the dynamic random access memory DRAM, which is called the L2P mapping table block index. Each divided L2P mapping table block has a latest storage location on the Nand flash memory. After the corresponding L2P mapping table block is updated, it is written to the new Nand flash physical location, and the L2P mapping table block index also needs to be updated. The L2P mapping table block index is generally 1 / 1024 of the L2P mapping table size, which is several MB in size. At the same time, the correspondence between the logical address LBA recorded for each write operation and the physical address of the data in the Nand flash memory is called a BT mapping table. The BT table is also synchronously written into the Nand flash memory during operation. The size of the BT table is adjusted according to the actual situation such as the SSD capacity. The BT table is generally tens of KB. After an abnormal power failure, the L2P mapping table block index and the latest BT mapping table are written into the Nand memory by relying on the capacitor equipped with the SSD. This amount of data is significantly less than the L2P mapping table, and the capacitor on the SSD can maintain normal operation.

[0027] When the SSD is powered on next time, the SSD master controller first finds the L2P mapping table block index written during the abnormal power failure. This L2P mapping table block index records the location where each L2P mapping table block was last written to the Nand flash memory, and reads all L2P mapping table blocks from the Nand flash memory and restores them to the dynamic random access memory (DRAM).

[0028] The BT table to be restored is searched by the serial number recorded in the L2P block mapping table block. After the BT table is read into the dynamic random access memory (DRAM), the driver hardware circuit updates the correspondence between the logical address LBA and the physical address of the Nand flash memory to the L2P mapping table in the DRAM. This process is completed by a dedicated hardware circuit and can be executed in parallel, which reduces the workload of the CPU of the SSD master controller, is more efficient than software operation, significantly reduces the time of L2P mapping table recovery, and can ensure the accuracy of all data in the disk.

[0029] like Figure 1 As shown, during the SSD operation:

[0030] S1. Divide the L2P mapping table into blocks of fixed size.

[0031] S2. Record the correspondence between the logical address LBA corresponding to the write operation and the physical address of the NAND flash memory in the BT mapping table, update the L2P mapping table, and record the updated L2P mapping table block position.

[0032] S3. When the amount of data in the BT mapping table accumulates to the threshold value A, it is written into the Nand flash memory. The threshold value A for writing the BT mapping table into the Nand flash memory depends on the size of the storage space for recording the BT table in the SSD master controller, so that the BT mapping table must also be written into the Nand flash memory when the SSD is powered off. The larger the BT table recorded by the SSD master controller, the more time is required in the end, and the more time is required, the larger the threshold value A is.

[0033] S4. When the updated data of the L2P mapping table block reaches the threshold value B, the updated L2P mapping table block is written to the NAND flash memory, and the L2P mapping table block index is updated at the same time. The size of the threshold value B will affect the time when the L2P mapping table is restored the next time the SSD is powered on. If the corresponding L2P mapping table block was written to the NAND flash memory before the last power failure, then the next time the power is on, it only needs to be read from the NAND flash memory. If the updated L2P mapping table block is not written to the NAND flash memory, then the updated part of the L2P mapping table needs to be restored using the BT table.

[0034] The above steps S2, S3 and S4 continue to occur as the host writes data.

[0035] like Figure 2 As shown, after an abnormal power failure and before the SSD is powered off: the complete L2P mapping table block index is written into the NAND flash memory; and the last BT mapping table not written into the NAND flash memory is written into the Nand flash memory.

[0036] like Figure 3 As shown, the next time the SSD is powered on:

[0037] S1. The CPU of the SSD master controller reads the L2P mapping table block index written before the last power failure;

[0038] S2. The CPU of the SSD master controller reads the L2P mapping table block from the Nand flash memory and restores it to the DRAM in units of blocks according to the position recorded in the L2P mapping table block index;

[0039] S3. The CPU of the SSD master controller finds all BTtables that need to be restored according to the serial numbers recorded in the L2P mapping table block and reads them out;

[0040] S4. The CPU of the SSD master controller drives the hardware circuit to update the correspondence between the logical address recorded in the read BT table and the Nand flash memory physical address into the L2P mapping table.

[0041] The above steps S3 and S4 need to be operated cyclically and can be executed concurrently to improve execution efficiency.

[0042] The above are only some embodiments of the present invention. For those skilled in the art, several modifications and improvements can be made without departing from the creative concept of the present invention, which all belong to the protection scope of the present invention.

Claims

1. A method for recovering an L2P mapping table after an abnormal power failure of an SSD, characterized in that: Recording the correspondence between the logical address and the physical address of each write operation to form a BT mapping table, and when the amount of data in the BT mapping table accumulates to a first threshold, writing it into the NAND flash memory; The entire L2P mapping table is divided into blocks of fixed size as L2P mapping table blocks, and when the amount of updated data in the L2P mapping table blocks reaches a second threshold, the updated data is written into the NAND flash memory, and the L2P mapping table block index is updated at the same time; After the SSD loses power abnormally but before it is powered off, the L2P mapping table block index is written into the NAND flash memory, and the BT mapping table that has not been written into the NAND flash memory is written into the NAND flash memory; After the SSD is powered on next time, the L2P mapping table block index is read out, and according to the position recorded in the L2P mapping table block index, the L2P mapping table block is read out and restored from the NAND flash memory, all BT mapping tables that need to be restored are found and read out according to the sequence number recorded in the L2P mapping table block, and the L2P mapping table is updated according to the read BT mapping table.

2. The method for recovering the L2P mapping table after abnormal power failure of the SSD according to claim 1, characterized in that: The setting of the first threshold enables the BT mapping table to be written into the NAND flash memory after abnormal power failure and before the SSD is powered off.

3. The method for recovering the L2P mapping table after abnormal power failure of the SSD according to claim 1, characterized in that: The second threshold is set so that the L2P mapping table can be restored through the L2P mapping table block and the BT mapping table after the SSD is powered on next time after abnormal power failure.

4. The method for recovering the L2P mapping table after abnormal power failure of the SSD according to claim 1, characterized in that: The restored or updated L2P mapping table is stored in a dynamic random access memory.

5. The method for recovering the L2P mapping table after abnormal power failure of the SSD according to claim 1, characterized in that: Each of the divided L2P mapping table blocks has an initial physical address in the NAND flash memory, and each of the L2P mapping table blocks has a new physical address in the NAND flash memory after being updated.

6. The method for recovering the L2P mapping table after abnormal power failure of the SSD according to claim 5, characterized in that: After the physical address of the L2P mapping table block is updated, the L2P mapping table block index is updated accordingly.

7. The method for recovering the L2P mapping table after abnormal power failure of the SSD according to claim 6, characterized in that: After the BT mapping table is updated, the L2P mapping table is updated accordingly.

8. The method for recovering the L2P mapping table after abnormal power failure of the SSD according to claim 1, characterized in that: The two steps of finding and reading all BT mapping tables that need to be restored and updating the L2P mapping table according to the BT mapping table are cyclically operated and executed concurrently.

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