Probe integrated device and preparation method and control method of probe integrated device

Abstract

The invention discloses a probe integrated device and a preparation method and a control method of the probe integrated device. The device comprises a probe array, a silicon electrode substrate, a recording chip bare chip and a rigid printed circuit substrate. The preparation method comprises the following steps: preparing a probe array and a silicon electrode substrate; carrying out balling on the bare chip of the recording chip, aligning the bare chip with one end of the silicon electrode substrate, and inversely mounting the bare chip on the probe array and the silicon electrode substrate to obtain a substrate with the bare chip; and adhering to a rigid printed circuit substrate, and connecting through a metal wire to obtain the probe integrated device. The control method comprises the following steps: acquiring a brain neuron signal; and carrying out amplification and analog-to-digital conversion processing on the cerebral neuron signal to obtain a cerebral neuron digital signal. According to the embodiment of the invention, miniaturization of the device can be promoted, acquisition of high-flux signals is facilitated, and three-dimensional space neurons can be recorded. The probe array can be widely applied to the technical field of probe arrays.

Description

Technical Field

[0001] The present application relates to the technical field of probe arrays, and in particular to a probe integrated device and a preparation method and a control method of the probe integrated device. Background Art

[0002] Most electrodes in related technologies use a single-probe, single-recording contact solution. These electrodes are two-dimensional planar electrode arrays, and their recording resolution depends on the spacing between adjacent probes. If the adjacent probes are too close, there will be a certain amount of crosstalk, so it is difficult to use them for high-resolution recording of single neurons in three-dimensional space, such as neuron positioning. Moreover, as the number of channels increases, the size of the area occupied by the implanted part of the electrode probe also increases. If the area is too large, it will cause damage to the tissue and neurons in the implanted area. The electrode probe usually needs to be adapted to the corresponding electrode interface before connecting to the input end of the recording chip. This method is not only limited in the number of channels by the existing hard electrode interface, making it difficult to achieve a miniaturized design, but also affects the signal transmission quality.

[0003] In summary, the technical problems existing in the relevant technologies need to be improved. Summary of the invention

[0004] The main purpose of the embodiments of the present application is to propose a probe integrated device and a method for preparing and controlling the probe integrated device, which can promote the miniaturization of the device, facilitate the acquisition of high-throughput signals, and record neurons in three-dimensional space.

[0005] To achieve the above-mentioned purpose, one aspect of an embodiment of the present application provides a probe integrated device, the device comprising a probe array, a silicon electrode substrate, a recording chip die and a rigid printed circuit substrate, the probe array is connected to the silicon electrode substrate through a metal wire, the recording chip die is aligned with one end of the silicon electrode substrate and flip-chip connected, and the other end of the silicon electrode substrate is bonded to the rigid printed circuit substrate and connected through a metal wire, wherein:

[0006] The probe array is used to obtain brain neuron signals;

[0007] The silicon electrode substrate is used to transmit the brain neuron signal to the recording chip die;

[0008] The recording chip bare die is used to amplify and perform analog-to-digital conversion processing on the brain neuron signal to obtain a brain neuron digital signal;

[0009] The rigid printed circuit substrate is used to support the silicon electrode substrate and control the operation of the recording chip die.

[0010] In some embodiments, the probe array includes a plurality of probes and a plurality of contacts, the number of the probes is equal to the number of the contacts, the plurality of probes are arranged longitudinally, the ends of the plurality of probes are connected to the plurality of contacts, and the plurality of probes and the plurality of contacts form a spatial arrangement of multiple needles and multiple contacts.

[0011] In some embodiments, the recording chip die includes an amplifier and an analog-to-digital converter, and the output of the amplifier is connected to the input of the analog-to-digital converter, wherein:

[0012] The amplifier is used to amplify the brain neuron signal to obtain an amplified brain neuron signal;

[0013] The analog-to-digital converter is used to perform analog-to-digital conversion on the amplified brain neuron signal to obtain a brain neuron digital signal.

[0014] To achieve the above object, another aspect of the embodiment of the present application provides a method for preparing a probe integrated device, the method comprising the following steps:

[0015] The probe array and the silicon electrode substrate are prepared by a thermal oxidation process;

[0016] After ball planting, the bare recording chip is aligned with one end of the silicon electrode substrate, and the bare recording chip is flipped onto the probe array and the silicon electrode substrate to obtain a substrate with a bare chip;

[0017] The substrate with the bare chip is adhered to a rigid printed circuit substrate by gluing, and the substrate with the bare chip and the rigid printed circuit substrate are connected by metal wires to obtain a probe integrated device.

[0018] In some embodiments, the step of preparing the probe array and the silicon electrode substrate by a thermal oxidation process comprises:

[0019] Based on the electrode pattern, an insulating layer is prepared;

[0020] Depositing the insulating layer to prepare an upper insulating layer;

[0021] The upper insulating layer is sequentially subjected to etching mask processing to prepare a probe array and a silicon electrode substrate.

[0022] In some embodiments, the step of preparing an insulating layer based on the electrode layout includes:

[0023] Design electrode layout according to electrode parameters;

[0024] Transferring the electrode pattern onto a photoresist by photolithography to obtain a photoresist substrate;

[0025] A polyimide solution is spin-coated on the upper surface of the photoresist substrate and then subjected to a thermal curing treatment to prepare an insulating layer.

[0026] In some embodiments, depositing the insulating layer to prepare an upper insulating layer includes:

[0027] irradiating ultraviolet light onto the upper surface of the insulating layer through a photomask to obtain an insulating layer having a preset pattern;

[0028] Depositing a metal layer on the upper surface of the insulating layer having the preset pattern to obtain a deposited insulating layer;

[0029] A polyimide solution is spin-coated on the upper surface of the deposited insulating layer and then subjected to a thermal curing treatment to prepare an upper insulating layer.

[0030] In some embodiments, the etching mask process is performed on the upper insulating layer in sequence to prepare the probe array and the silicon electrode substrate, including:

[0031] Forming a through-hole structure on the upper surface of the upper insulating layer by a photolithography method to obtain an upper insulating layer having a through-hole structure;

[0032] Etching the upper insulating layer having the through-hole structure to form an electrode region;

[0033] Coating a thick resist and performing photolithography on the upper surface of the electrode region to obtain the main structure of the electrode;

[0034] Performing dry etching and electrode release treatment on the main structure of the electrode to obtain a preliminary probe array and a silicon electrode substrate;

[0035] The preliminary probe array and the silicon electrode substrate are subjected to surface modification and cleaning treatments in sequence to obtain the probe array and the silicon electrode substrate.

[0036] To achieve the above object, another aspect of the embodiment of the present application further provides a control method for a probe integrated device, the control method comprising the following steps:

[0037] Obtain brain neuron signals;

[0038] Transmitting the brain neuron signal to a signal processing end;

[0039] The brain neuron signal is amplified and subjected to analog-to-digital conversion processing to obtain a brain neuron digital signal.

[0040] In some embodiments, amplifying and performing analog-to-digital conversion processing on the neuron electrical signal to obtain a brain neural simulation signal includes:

[0041] amplifying the brain neuron signal to obtain an amplified brain neuron signal;

[0042] The amplified brain neuron signal is subjected to analog-to-digital conversion processing to obtain a brain neuron digital signal.

[0043] The embodiments of the present application include at least the following beneficial effects: The present application provides a probe integrated device and a method for preparing and controlling the probe integrated device. The scheme obtains brain neuron signals through a probe array, and adopts a single-probe multi-contact longitudinal arrangement. It can reach the cortex and deep brain structures, and can record neurons in three-dimensional space, so as to study small, highly localized neuron sets and long-distance correlations between different brain regions. Further, based on a silicon electrode substrate and a recording chip die, the electrode flip-chip die and the die lead bonding PCB substrate are used to greatly enhance the integration of the device, promote the miniaturization of the device, reduce the cost, and effectively improve the signal transmission quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 It is a schematic diagram of the structure of a probe integrated device provided in an embodiment of the present application;

[0045] Figure 2 is a schematic diagram of the structure of the probe array provided in the embodiment of the present application;

[0046] Figure 3 is a schematic structural diagram of an existing 100-channel probe array provided in an embodiment of the present application;

[0047] Figure 4 is a schematic diagram of the structure of an existing 16-channel electrode array provided in an embodiment of the present application;

[0048] Figure 5 It is a schematic diagram of the steps of a method for preparing a probe integrated device provided in an embodiment of the present application;

[0049] Figure 6 It is a schematic diagram of the steps of a control method of a probe integrated device provided in an embodiment of the present application;

[0050] Figure 7 It is a schematic diagram of the steps of preparing a probe array and a silicon electrode substrate provided in an embodiment of the present application;

[0051] Figure 8 It is a schematic diagram of the structural layer for preparing the probe array and the silicon electrode substrate provided in the embodiment of the present application. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in conjunction with the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the embodiments of the present application. They are only examples of systems and methods consistent with some aspects of the embodiments of the present application as detailed in the attached claims.

[0053] It is understood that the terms "first", "second", etc. used in this application can be used to describe various concepts in this article, but unless otherwise specified, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another concept. For example, without departing from the scope of the embodiment of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the words "if" and "if" as used herein can be interpreted as "at the time of" or "when" or "in response to determination".

[0054] The terms "at least one", "multiple", "each", "any", etc. used in this application, at least one includes one, two or more, multiple includes two or more, each refers to each of the corresponding multiple, and any refers to any one of the multiple.

[0055] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0056] First of all, it should be noted that the brain is the most important and complex organ of human beings. Understanding the structure and function of the brain is one of the most challenging frontier scientific issues in the 21st century. The study of the brain is inseparable from tools. With the advancement of technology, invasive and non-invasive brain-computer interfaces have become the two most commonly used research methods. Compared with the non-invasive brain-computer interface method of obtaining signals from outside the body, the invasive brain-computer interface technology can directly obtain, analyze and understand the signals at the neuron level through the implantation of electrodes, which can obtain more signal details and has a higher spatial resolution. This method of establishing a direct information interaction channel between the brain and the external physical environment has become one of the most important tools in the current stage of research on the mechanism of brain operation.

[0057] Neurons are the basic functional units of the nervous system. They are interconnected through synapses to form complex neural networks. Neuron localization refers to the process of determining the specific location and distribution of neurons in the brain or nervous system. At this stage, neuron localization is crucial to understanding the structure and function of the brain. It can help brain science researchers identify specific neural circuits, understand which neurons are involved in specific behaviors and cognitive processes, understand the neural development process: observe how neurons migrate to their final locations during development, and help diagnose and study neurological diseases: determine the abnormal location or loss of neurons in certain disease states. Guide neuroscience research: provide precise anatomical information for experimental design, so as to more accurately manipulate or record the activity of specific neurons.

[0058] As the electrode probe that is in direct contact with neurons, its performance will directly affect the quality of signal acquisition. First of all, neurons are distributed in three-dimensional space, that is, three-dimensional rather than a simple plane. It is necessary to decode the layered information of different deep brain structures and cortical areas. The complexity of neuronal circuits requires the development of three-dimensional (i.e. 3D) electrophysiological recording tools to perform high-resolution measurements of activities within and between multiple cortical areas. Related technologies such as Figure 3 As shown, it is an electrode array with 100 channels. The electrode recording contact is exposed at the tip of each needle and plated with metal. The number of channels depends on the number of electrode probes. Therefore, when the number of channels reaches a certain value, the electrode array will occupy a relatively large size, which is easy to cause damage and difficult to implant. Figure 4 It is a 16-channel electrode array (4x4). The electrode tip area is the recording contact. The end of the electrode probe is connected through the electrode connector interface. The electrode interface is usually hard. The electrode input channel is connected to the printed circuit board system through the electrode interface board to the board, and is connected to the acquisition end device. The electrode interface occupies most of the size of the entire electrode, which is not conducive to high-throughput integration. At the same time, the signal needs to pass through the electrode probe and the electrode interface in sequence and then connect to the amplifier input of the recording chip, and the signal quality is reduced. In addition, the above two types are planar electrodes, which can only record neurons on the plane covered by the probe array surface, and cannot achieve signal recording in three-dimensional space. The recording resolution is also limited. One channel can record one or more neurons at the same time, and there is a certain amount of crosstalk between adjacent channels. Therefore, it cannot be used in scenarios where high-resolution recording is required, such as neuron positioning and imaging.

[0059] Therefore, when designing such probes, a trade-off between size and number of recording points is usually required. These electrodes are limited in spatial distribution and are confined to a two-dimensional plane. Due to the single-needle single-contact design, the distance between adjacent channel contacts is too large to achieve high-resolution recording. Usually, one contact will record multiple neuronal signals. Such electrodes cannot be used in applications such as precise positioning and imaging of single neurons.

[0060] Based on this, refer to Figure 1 , Figure 1 A schematic diagram of a probe integrated device provided by an embodiment of the present invention, referring to Figure 1 The device includes a probe array, a silicon electrode substrate, a recording chip die and a rigid printed circuit substrate. The probe array is connected to the silicon electrode substrate through a metal wire. The recording chip die is aligned with one end of the silicon electrode substrate and flip-chip connected. The other end of the silicon electrode substrate is bonded to the rigid printed circuit substrate and connected through a metal wire.

[0061] Probe arrays are used to acquire signals from brain neurons;

[0062] Furthermore, the probe array includes a plurality of probes and a plurality of contacts, the number of the probes is equal to the number of the contacts, the plurality of probes are arranged longitudinally, the ends of the plurality of probes are connected to the plurality of contacts, and the plurality of probes and the plurality of contacts form a spatial arrangement of multiple needles and multiple contacts.

[0063] In this embodiment, if Figure 2 The figure shows a 256-channel silicon electrode probe, which consists of 8 independent probes. Each probe has 32 electrode contacts arranged vertically on both sides. The 32 contacts are connected to the reserved pads on the silicon substrate (for flip-chip bare chips) through metal wires. The extra pads reserved on the silicon substrate will be used to lead out the chip control signal lines. And the adjacent spacing of each contact can be adjusted according to the micro-nano processing technology. The center spacing of adjacent channel contacts in the figure is designed to be 20um, which can achieve high-resolution three-dimensional spatial accuracy at the single neuron level. 8 probes integrate 256 recording channels. This single-probe integrated multi-contact longitudinal distribution method greatly reduces the size of the implanted probe and reduces tissue damage compared to the traditional single-needle single-channel contact planar electrode method. At the same time, the number of probes and the number of contacts integrated in a single needle can be easily expanded as needed to achieve high-throughput recording.

[0064] The silicon electrode substrate is used to transmit brain neuron signals to the recording chip die;

[0065] The recording chip is used to amplify and perform analog-to-digital conversion on brain neuron signals to obtain brain neuron digital signals;

[0066] Furthermore, the recording chip die includes an amplifier and an analog-to-digital converter, wherein the output end of the amplifier is connected to the input end of the analog-to-digital converter, wherein the amplifier is used to amplify the brain neuron signal to obtain the amplified brain neuron signal; and the analog-to-digital converter is used to perform analog-to-digital conversion on the amplified brain neuron signal to obtain the brain neuron digital signal.

[0067] The rigid printed circuit substrate is used to support the silicon electrode substrate and control the operation of the recording chip die.

[0068] In this embodiment, the multi-channel expandable three-dimensional recording electrode probe proposed in the embodiment of the present invention adopts an integrated design of the electrode, and the front end of the electrode is a plurality of probes, each probe has 32 surface-modified electrode contacts arranged longitudinally on both sides, and the spatial arrangement of multiple needles and multiple contacts allows recording of spatial neurons. The 32 contacts are connected to the reserved pads on the silicon-based substrate (for flip-chip bare chips) through metal wires. The extra control pin pads reserved on the silicon substrate will be used to lead out the chip control signal line. Figure 1 For the new corresponding probe device integration solution, the recording chip bare die pad is first planted, and then the chip bare die pad is aligned with the pad reserved on the silicon substrate and flipped. Since the probe has been connected to the substrate pad through the internal metal wire, this method can avoid the use of traditional electrode interface. The purpose of using bare die is also to further achieve miniaturization. The probe substrate with bare die is attached to the hard circuit board through the adhesive back to enhance the mechanical strength of the device, and then the remaining control line pad is bonded to the circuit board through metal wires, and then the signal is processed by the hard PCB circuit.

[0069] In summary, the embodiment of the present invention designs a neural probe that can record three-dimensional spatial signals, manufactures silicon electrode probes through micro-nano processing technology, and achieves high spatiotemporal resolution signal recording at the single neuron level through single-needle multi-contact and reasonable control of the layout of the probe's longitudinal contacts, making up for the defect that planar electrodes cannot be used for spatial neuron positioning. Secondly, by combining chip bare die flip-chip electrode basic probes, wire bonding and other integration methods, the use of traditional electrode interfaces is avoided, the problem of traditional electrode interfaces affecting signal quality is solved, and the signal stability and reliability of the device are effectively improved. At the same time, the size of the device is effectively reduced, the damage caused by electrode implantation is reduced, and the miniaturized size is more conducive to the expansion of the number of channels.

[0070] See also Figure 5 The present application also provides a method for preparing a probe integrated device, which can realize the above-mentioned probe integrated device. The preparation method includes the following steps:

[0071] S510, preparing a probe array and a silicon electrode substrate by a thermal oxidation process;

[0072] First of all, it should be noted that Figure 8As shown, thermal oxidation is a method for generating an oxide film on the surface of a material. This technology is used to force an oxidant to diffuse into the material and react with it at high temperature. It is used to grow a layer of silicon dioxide (SiO2) on the surface of a silicon wafer. This silicon dioxide layer has good electrical insulation, etching selectivity and material purity. After that, a metal layer is deposited on the insulating layer, usually gold (Au) or other conductive materials, and then the insulating layer is covered and etched on the metal surface to release the electrode from the silicon wafer. The top mask prevents other layers from being etched, and finally the back is etched, and finally the complete probe falls off the silicon wafer to form a complete substrate and probe.

[0073] In some embodiments, an insulating layer is prepared based on an electrode pattern, wherein the electrode pattern is designed according to electrode parameters; the electrode pattern is transferred to a photoresist by a photolithography method to obtain a photoresist substrate; based on the upper surface of the photoresist substrate, a polyimide solution is spin-coated and thermally cured to prepare an insulating layer.

[0074] In some specific embodiments, the electrode layout is first designed, and the electrode layout is designed according to the above electrode parameters and functional requirements, and then a photoresist is prepared, and an intermediate product of transferring the design pattern to the photoresist is obtained by photolithography. Finally, the insulating layer is prepared, and a polyimide (PI) solution is spin-coated on the silicon substrate to form an insulating layer, and then its insulating properties are enhanced by thermal curing.

[0075] In some embodiments, an insulating layer is deposited to prepare an upper insulating layer, wherein ultraviolet light is irradiated onto the upper surface of the insulating layer through a photoresist to obtain an insulating layer having a preset pattern; a metal layer is deposited based on the upper surface of the insulating layer having the preset pattern to obtain a deposited insulating layer; and a polyimide solution is spin-coated on the upper surface of the deposited insulating layer and thermally cured to prepare an upper insulating layer.

[0076] In some specific embodiments, photolithography is first performed to form a pre-stripping pattern, ultraviolet light is irradiated on the PI layer through a photomask to form a desired pattern, and then the photoresist of the unexposed portion is removed by a development process. Then, a metal layer is deposited on the insulating layer, usually gold (Au) or other conductive materials, because gold has good conductivity and biocompatibility, and finally an upper insulating layer is prepared, and a PI solution is spin-coated again to form an upper insulating layer, and a curing process is performed.

[0077] In some embodiments, the upper insulating layer is sequentially subjected to etching mask treatment to prepare a probe array and a silicon electrode substrate, wherein a through-hole structure is formed on the upper surface of the upper insulating layer by a photolithography method to obtain an upper insulating layer with a through-hole structure; the upper insulating layer with the through-hole structure is etched to form an electrode region; the upper surface of the electrode region is coated with a thick glue and subjected to photolithography treatment to obtain the main structure of the electrode; the main structure of the electrode is dry-etched and subjected to electrode release treatment to obtain a preliminary probe array and a silicon electrode substrate; the preliminary probe array and the silicon electrode substrate are sequentially subjected to surface modification and cleaning treatment to obtain a probe array and a silicon electrode substrate.

[0078] In some specific embodiments, Figure 7 As shown, firstly, a photolithography mask is made to form a through hole, and a through hole is formed in the upper insulating layer by photolithography technology to provide a channel for subsequent metal layer connection. Then, the through hole is etched, and the through hole pattern formed in the previous step is transferred to the insulating layer using wet or dry etching technology. Further, the needle body is photolithography masked, a thick layer of glue is coated on the electrode area, and photolithography is performed to form the main structure of the electrode. Further, the needle body is dry-etched, and the shape of the electrode is accurately etched using dry etching technology, such as plasma etching. Then, the electrode is released, and the remaining photoresist and other temporary materials are removed to release the electrode in a free state. Further, the surface modification of the electrode recording point is performed, and the surface of the recording point of the electrode is modified to improve its biocompatibility and signal quality. Finally, cleaning and testing are performed, and the electrode is cleaned to remove residues, and then electrical testing and inspection are performed to ensure its performance.

[0079] S520, aligning the bare recording chip die with one end of the silicon electrode substrate after ball planting, flipping the bare recording chip die on the probe array and the silicon electrode substrate to obtain a substrate with the bare chip;

[0080] S530, gluing the substrate with the bare chip to the rigid printed circuit substrate, and connecting the substrate with the bare chip and the rigid printed circuit substrate through metal wires to obtain a probe integrated device;

[0081] In summary, the preparation method of the embodiment of the present invention is to first plant the ball on the bare chip pad of the recording chip, then align the bare chip pad with the pad reserved on the silicon-based substrate, and flip the bare chip on the silicon substrate and the probe. Since the probe has been connected to the substrate pad through an internal metal wire, this method can avoid the use of a traditional electrode interface. The purpose of using a bare chip is also to further achieve miniaturization. The probe substrate with the bare chip is attached to the hard circuit board through the adhesive back to enhance the mechanical strength of the device, and then the remaining control line pad is bonded to the circuit board through metal wires, and then the signal is processed by the hard PCB circuit.

[0082] See also Figure 6 The embodiment of the present application also provides a control method for a probe integrated device, which can implement the above-mentioned probe integrated device. The control method includes the following steps:

[0083] S610, obtaining brain neuron signals;

[0084] S620, transmitting the brain neuron signal to the signal processing end;

[0085] S630, amplify and perform analog-to-digital conversion processing on the brain neuron signal to obtain a brain neuron digital signal.

[0086] In summary, when the control method of the embodiment of the present invention is working, the electrode probe is implanted into the target point of the brain tissue, and the contacts on the probe contact and establish a connection with the neurons. The neuron signal transmits the discharge signal to the corresponding channel electrode pad through the metal wire on the electrode substrate. The electrode pad is connected to the amplifier analog input of the recording chip bare chip through a surface mount, and then transmitted to the interface reserved for the rigid printed circuit board after analog-to-digital conversion. The recording chip is mainly composed of an amplifier (to amplify the neuron signal) and an analog-to-digital converter (to convert the neuron analog signal into a digital signal that is easy to process and transmit). On the one hand, the rigid printed circuit board is to increase the stress level of the device (because it needs to be implanted in the brain tissue), and on the other hand, it is necessary to provide the necessary peripheral control circuits, signal transmission interfaces, etc. for the recording chip to work.

[0087] The improvements of the embodiments of the present invention compared with the prior art are:

[0088] 1) In terms of electrode design, a multi-channel electrode probe with high aspect ratio and high spatial resolution is designed by longitudinally arranging multiple contacts of a single probe, which can record neurons in three-dimensional space. This high aspect ratio probe is designed to reach the cortex and deep brain structures. The accuracy of the three-dimensional probe spacing provides the advantage of recording across different layers of the cortex, so that small, highly localized sets of neurons and long-distance correlations between different brain regions can be studied, which is helpful for studying neural circuit mechanisms in different spaces. It can be used for high spatiotemporal resolution recording scenarios such as single neuron-scale positioning and neuron atlas imaging. In addition, compared with traditional electrode arrays, it has a smaller implant size. Thanks to the compact spatial structure of the probe, the number of recording channels can be easily expanded and effectively reduce damage to tissues.

[0089] 2) In terms of device integration, the electrode flip-chip bare die and bare die wire bonding PCB substrate method greatly enhances the device integration, promotes device miniaturization, reduces costs, and gets rid of the constraints of traditional electrode interface size on the number of recording channels. The electrode flip-chip solution can effectively improve the signal transmission quality.

[0090] In summary, the embodiments of the present invention have the following advantages over the prior art:

[0091] 1) The electrode contact filling density per unit volume of silicon probes is much higher than that of traditional microelectrodes. The geometry of the circuit is known, so it is easy to identify the position of the electrode contacts in the brain relative to other contacts. At the same time, the controllable recording contacts can be flexibly adjusted according to design needs to achieve high spatiotemporal resolution neural signal recording. This feature can be used to locate and record some specific neurons. Secondly, the accuracy of the three-dimensional probe spacing provides the advantage of recording across different layers of the cortex, which is helpful for studying the neural circuit mechanisms in different spaces.

[0092] 2) The use of traditional electrode connector interface is eliminated, and the integration of the device is greatly enhanced by flipping the electrode and bonding the chip lead to the PCB substrate. After getting rid of the electrode interface, the number of recording channels will no longer be limited by the interface size. By increasing the number of probes and arranging the number of channel contacts on each probe according to the required longitudinal depth, ultra-high channel and high-resolution signal recording can be achieved, while ensuring miniaturization and reducing damage to tissues.

[0093] 3) The micro-nano processed probes have consistency in process performance. In terms of signals, the possibility of failure caused by the introduction of electrode interfaces is eliminated. The electrode channels are directly connected to the recording chip bare die by flip-chip, which can greatly reduce the loss and interference of signals during transmission and improve the quality of signal transmission.

[0094] It can be understood that the contents of the above method embodiments are all applicable to the present system embodiments, the functions specifically implemented by the present system embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0095] The preferred embodiments of the present invention are described above with reference to the accompanying drawings, but the scope of the rights of the present invention is not limited thereto. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present invention should be within the scope of the rights of the present invention.

Claims

1. A probe integrated device, characterized in that: The device comprises a probe array, a silicon electrode substrate, a recording chip die and a rigid printed circuit substrate, wherein the probe array is connected to the silicon electrode substrate via a metal wire, the recording chip die is aligned with one end of the silicon electrode substrate and is flip-chip connected, and the other end of the silicon electrode substrate is bonded to the rigid printed circuit substrate and connected via a metal wire, wherein: The probe array is used to obtain brain neuron signals; The silicon electrode substrate is used to transmit the brain neuron signal to the recording chip die; The recording chip bare die is used to amplify and perform analog-to-digital conversion processing on the brain neuron signal to obtain a brain neuron digital signal; The rigid printed circuit substrate is used to support the silicon electrode substrate and control the operation of the recording chip die.

2. The device according to claim 1, characterized in that The probe array includes a plurality of probes and a plurality of contacts, the number of the probes is equal to the number of the contacts, the plurality of probes are arranged longitudinally, the ends of the plurality of probes are connected to the plurality of contacts, and the plurality of probes and the plurality of contacts form a spatial arrangement of multiple needles and multiple contacts.

3. The device according to claim 1, characterized in that The recording chip bare die includes an amplifier and an analog-to-digital converter, the output end of the amplifier is connected to the input end of the analog-to-digital converter, wherein: The amplifier is used to amplify the brain neuron signal to obtain an amplified brain neuron signal; The analog-to-digital converter is used to perform analog-to-digital conversion on the amplified brain neuron signal to obtain a brain neuron digital signal.

4. A method for preparing a probe integrated device, characterized in that: The preparation method comprises the following steps: The probe array and the silicon electrode substrate are prepared by a thermal oxidation process; After ball planting, the bare recording chip is aligned with one end of the silicon electrode substrate, and the bare recording chip is flipped onto the probe array and the silicon electrode substrate to obtain a substrate with a bare chip; The substrate with the bare chip is adhered to a rigid printed circuit substrate by gluing, and the substrate with the bare chip and the rigid printed circuit substrate are connected by metal wires to obtain a probe integrated device.

5. The method according to claim 4, characterized in that The method of preparing the probe array and the silicon electrode substrate by a thermal oxidation process comprises: Based on the electrode pattern, an insulating layer is prepared; Depositing the insulating layer to prepare an upper insulating layer; The upper insulating layer is sequentially subjected to etching mask processing to prepare a probe array and a silicon electrode substrate.

6. The method according to claim 5, characterized in that The method of preparing an insulating layer based on the electrode layout includes: Design electrode layout according to electrode parameters; Transferring the electrode pattern onto a photoresist by photolithography to obtain a photoresist substrate; A polyimide solution is spin-coated on the upper surface of the photoresist substrate and then subjected to a thermal curing treatment to prepare an insulating layer.

7. The method according to claim 5, characterized in that The step of depositing the insulating layer to prepare an upper insulating layer comprises: irradiating ultraviolet light onto the upper surface of the insulating layer through a photomask to obtain an insulating layer having a preset pattern; Depositing a metal layer on the upper surface of the insulating layer having the preset pattern to obtain a deposited insulating layer; A polyimide solution is spin-coated on the upper surface of the deposited insulating layer and then subjected to a thermal curing treatment to prepare an upper insulating layer.

8. The method according to claim 5, characterized in that The step of sequentially performing etching mask processing on the upper insulating layer to prepare a probe array and a silicon electrode substrate comprises: Forming a through-hole structure on the upper surface of the upper insulating layer by a photolithography method to obtain an upper insulating layer having a through-hole structure; Etching the upper insulating layer having the through-hole structure to form an electrode region; Coating a thick resist and performing photolithography on the upper surface of the electrode region to obtain the main structure of the electrode; Performing dry etching and electrode release treatment on the main structure of the electrode to obtain a preliminary probe array and a silicon electrode substrate; The preliminary probe array and the silicon electrode substrate are subjected to surface modification and cleaning treatments in sequence to obtain the probe array and the silicon electrode substrate.

9. A control method for a probe integrated device, characterized in that: The control method comprises the following steps: Obtain brain neuron signals; Transmitting the brain neuron signal to a signal processing end; The brain neuron signal is amplified and subjected to analog-to-digital conversion processing to obtain a brain neuron digital signal.

10. The method according to claim 9, characterized in that The amplifying and analog-to-digital conversion of the brain neuron signal to obtain a brain neuron digital signal includes: amplifying the brain neuron signal to obtain an amplified brain neuron signal; The amplified brain neuron signal is subjected to analog-to-digital conversion processing to obtain a brain neuron digital signal.

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