Transform-based end-to-end chip layout hot spot detection method

Abstract

The invention discloses a Transform-based end-to-end chip layout hot spot detection method, which comprises the following steps of: converting chip layout data into binary image data, inputting the binary image data into a photo-etching simulator driven by a GPU (Graphic Processing Unit) to obtain a photo-etched printing image, and measuring the photo-etched printing image and an original binary image to obtain position information of potential hot spots; and inputting the trained transformer-based end-to-end hot spot detector according to the prior photoetching information obtained by the original binary image and the printed image after photoetching, outputting the position information of the hot spot and carrying out frame selection, and positioning the hot spot in the layout. The method is driven by the GPU accelerated photoetching simulator, the requirement for data set related hyper-parameters is eliminated, the flexibility is remarkably improved, the consumption of computing resources is reduced, meanwhile, priori knowledge of the photoetching simulator is integrated into a framework, a hot spot detection model is guided to focus on a potential hot spot area, and the interpretability and generalization ability are remarkably improved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit computer-aided design, and in particular to a Transformer-based end-to-end chip layout hotspot detection method. Background Art

[0002] With the rapid development of semiconductor technology, the reduction of transistor feature size and the increase of chip size have brought great challenges to manufacturability design. Hot spot detection is a key step in manufacturability design, which can detect potential defect modes early.

[0003] Traditional detection methods are mainly divided into two solutions: lithography simulation and layout retrieval. After each chip design, lithography simulation technology needs to simulate the entire lithography manufacturing process of the entire chip to accurately detect hot spots. However, simulation takes a lot of time and is not suitable for the current large-scale integrated circuit manufacturing. Layout retrieval methods identify hotspot layout slices with similar patterns through matching or clustering. However, this type of method relies on a large-scale layout pattern hotspot library and cannot retrieve hotspots outside the current library.

[0004] With the rapid development of semiconductor technology, the continuous reduction in the size of integrated circuit components continues to push the boundaries of current chip manufacturing processes. As feature sizes decrease, it becomes increasingly difficult to ensure the printability of layout designs, leading to an increased incidence of manufacturing defects. This challenge is particularly evident in critical areas, called hot spots, which have a higher risk of defects. Therefore, it becomes particularly important to accurately and efficiently locate hot spots.

[0005] Currently, there are three main methods for hotspot detection: lithography simulation, pattern matching, and machine learning. Traditional lithography simulation methods are highly accurate but extremely time-consuming, making them less practical in mass production environments. In contrast, pattern matching methods identify potential hotspots in new designs by using a set of predefined hotspot layout patterns. Although this method is faster than traditional lithography simulation, its limitation is that it cannot detect novel or previously unseen hotspots.

[0006] However, existing deep learning-based methods still have some problems. Existing two-stage hotspot detectors, such as the Chinese invention patent application with publication number CN117314828A, disclose a lithography hotspot detection method and system based on a deep learning LHD model, and existing one-stage hotspot detectors, such as the Chinese invention patent application with publication number CN118247560A, disclose a lithography hotspot detection method based on a Transformer-CNN dual-domain fusion network. Both rely on an anchor-based model framework to generate candidate boxes, which requires manual setting of a large number of sensitive hyperparameters and post-processing. Hyperparameters include the size of the anchor box, aspect ratio, etc., which are used to define the candidate area for target detection. This method lacks the flexibility to adapt to hotspots of different scales and shapes. In addition, existing methods still need to use non-maximum suppression NMS (Non-Maximum Suppression), which means that they are not end-to-end and consume additional computing resources. Summary of the invention

[0007] Purpose of the invention: In order to overcome the shortcomings of the prior art, the present invention provides an end-to-end chip layout hotspot detection method based on Transformer, which is driven by a GPU-accelerated lithography simulator to solve the problems of the existing hotspot detection method based on deep learning, such as the need to manually set a large number of hyperparameters and perform post-processing, as well as the lack of flexibility and high consumption of computing resources.

[0008] The present invention adopts the following technical solution: a Transformer-based end-to-end chip layout hotspot detection method, comprising the following steps: Step 1, convert the existing chip layout data into binary image data and save it; Step 2: Input the converted binary image data into a GPU-driven lithography simulator, output the printed image after lithography and save it; Step 3: Build an end-to-end hotspot detector based on transformer, input the printed image after lithography and the original binary image into the query vector initialization module for measurement, obtain the location information of potential hotspots, and save it; Step 4: Based on the prior lithography information obtained from the original binary image and the printed image after lithography, a layout training set and a validation set are constructed, and the transformer-based end-to-end hotspot detector is input for model training to obtain a trained hotspot detection model. Step 5: Obtain the potential hotspot location information in the binary image layout of the chip to be tested according to steps 2 and 3, input the hotspot detection model trained in step 4 for testing, and locate the hotspots in the layout.

[0009] Preferably, in step 2, the GPU-driven lithography simulator has the following specific processing steps: Step 2.1, in the lithography simulator, the incident light passes through the mask, the spatial information of the mask image is transmitted to the optical projection system, and the input light intensity distribution is converted into the lithography intensity distribution on the wafer plane; Step 2.2: The lithography simulator converts the aerial image Convert to printed image , the printed image This is the image of the wafer after etching. The area on the wafer plane where the photolithography intensity is greater than the photolithography threshold is considered to be the etched area, otherwise no etching occurs: Step 2.3: Print the image It is expressed as: ; in, represents the steepness of the control function, Represents the threshold, which is used to control the center position of Sigmoid. Represents the sigmoid function, which acts on the input image through the sigmoid function , the image Mapped to the interval between (0,1) to become a smoothed probability value or normalized output;

[0010] Image As the printed image is output after photolithography, gradient descent is performed in an iterative learning method.

[0011] Preferably, in step 3, the transformer-based end-to-end hotspot detector comprises, in sequence: a backbone network, an encoder, a query vector initialization module, a decoder, and a feedforward neural network; The backbone network adopts the ResNet50 architecture. The backbone network processes the input layout image into a feature map, learns the two-dimensional representation of the input layout image and performs feature extraction, flattens the extracted features into a high-level activation map, and transmits it to the encoder; The encoder is a Transformer-based encoder, which is used to capture the global dependencies and spatial relationships inherent in the layout pattern, obtain a new feature map, and pass it to the decoder; The decoder is a Transformer-based decoder that processes N target queries in parallel at each layer through a feature aggregation module, superimposes prior knowledge of lithography simulation on the input of each attention layer, outputs N prediction results, and transmits them independently to the feedforward neural network.

[0012] Preferably, in step 3, the query vector initialization module divides the input post-lithography printed image and the original binary image into non-overlapping blocks, calculates the metric loss of each block, and integrates the lithography simulation prior information into the key components of the transformer-based end-to-end hotspot detector; the metric loss is used to measure the difference between the two images, generate a loss map, and highlight the key areas.

[0013] Preferably, in step 3, obtaining the location information of the potential hotspot includes the following sub-steps: Step 3.1, dividing the image: dividing the input original binary image and the printed image after photolithography into a number of non-overlapping blocks; Step 3.2: For each block , calculate the difference in pixel value for each pixel position in the block ; Step 3.3. Calculate the metric loss of each block: The metric loss of each block It is calculated by summing the squared differences of all pixels in the block; Step 3.4: Construct a loss graph: Summarize the metric losses of all blocks and construct a loss graph , which contains the metric loss value for each block; Step 3.5, select potential hot spots: select the first k blocks with the highest loss values ​​in the loss graph as potential hot spots, and retain the location information of the blocks where the potential hot spots are located; Step 3.6, integrate the location prior information: pass the location information of the block where the potential hotspot is located as prior knowledge to the decoder, guide the decoder to focus on the area with significant lithography differences, and improve the accuracy and efficiency of hotspot detection.

[0014] Preferably, the Transformer-based encoder includes several layers of Transformer encoders, each layer of Transformer encoder includes a multi-head self-attention module and a feedforward network, and introduces fixed position encoding; The multi-head self-attention module focuses on different parts of the map at the same time, captures local and global context information, and identifies hot spots that are not adjacent but have important global connections. The fixed position encoding is added to the input of each attention layer to integrate the spatial relationship into the multi-head self-attention module to understand the layout structure and locate potential hot spots; Each layer of Transformer encoder processes the feature sequence in parallel, outputs local features combined with the global context, and passes them to the decoder.

[0015] Preferably, the feedforward neural network comprises a three-layer perceptron with a ReLU activation function, a network with a hidden dimension of d, followed by a linear projection layer for predicting the center coordinates, height and width of the bounding box of each hotspot, and the linear projection layer is used to output a category label through softmax.

[0016] Preferably, in step 5, locating the hot spots in the layout of the chip to be tested includes the following sub-steps: Step 5.1, repeat step 1 in the layout of the chip to be tested to obtain binary image data; Step 5.2, repeat step 2 in the layout of the chip to be tested to obtain a printed image after photolithography; Step 5.3, repeat step 3 in the layout of the chip to be tested to obtain prior lithography information; Step 5.4: Input the original binary image and prior lithography information into the hotspot detection model trained in step 4, output the location information of the hotspot and select it as the final output result of the hotspot detection model.

[0017] The technical solution of the present invention also provides: an electronic device, comprising: one or more processors; a storage device having one or more programs stored thereon; When the one or more programs are executed by the one or more processors, the one or more processors implement any of the above-mentioned Transformer-based end-to-end chip layout hotspot detection methods.

[0018] The technical solution of the present invention also provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the steps in any of the above-mentioned Transformer-based end-to-end chip layout hotspot detection methods are implemented.

[0019] Compared with the prior art, the present invention adopts the above technical solution and has the following technical effects: 1. The end-to-end hotspot detection method of the present invention is driven by a GPU-accelerated lithography simulator, which eliminates the need for data set-related hyperparameters, while significantly improving flexibility and reducing the consumption of computing resources.

[0020] 2. In the end-to-end hotspot detection method of the present invention, the prior knowledge of the lithography simulator is integrated into the framework, guiding the hotspot detection model to focus on potential hotspot areas, significantly improving the interpretability and generalization capabilities. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a flowchart of the end-to-end chip layout hotspot detection method based on Transformer of the present invention; Figure 2 A flowchart of a GPU-driven lithography simulator outputting a printed image after lithography; Figure 3 It is a schematic diagram of the comparison results between the embodiment of the present invention and the general target detection network based on deep learning on the ICCAD2016 data set; Figure 4 4 is a diagram showing the comparison results between the embodiment of the present invention and the current advanced method. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the application is further elaborated in detail below in conjunction with the accompanying drawings. The described embodiments are only a part of the embodiments involved in the present invention. All non-innovative embodiments of other researchers in the field on this embodiment belong to the protection scope of the present invention. At the same time, for the step numbering in the embodiment of the present invention, it is only set for the convenience of explanation, and the order between the steps is not limited in any way. The execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0023] In one embodiment of the present invention, a transformer-based end-to-end chip layout hotspot detection method is driven by a GPU-accelerated prior lithography simulator, such as Figure 1 As shown, the specific steps include: Step 1, convert the existing chip layout data into binary image data and save it; Step 2: Input the converted binary image data into a GPU-driven lithography simulator, output the printed image after lithography and save it; Step 3: Build an end-to-end hotspot detector based on transformer, input the printed image after lithography and the original binary image into the query vector initialization module for measurement, obtain the location information of potential hotspots, and save it; Step 4: Based on the prior lithography information obtained from the original binary image and the printed image after lithography, a layout training set and a validation set are constructed, and the transformer-based end-to-end hotspot detector is input for model training to obtain a trained hotspot detection model. Step 5: Obtain the potential hotspot location information in the binary image layout of the chip to be tested according to steps 2 and 3, input the hotspot detection model trained in step 4 for testing, and locate the hotspots in the layout.

[0024] exist Figure 1 In the embodiment, the model architecture mainly consists of two parts: a priori lithography simulator and transformer-based target detector.

[0025] After passing through the lithography simulator, the input chip layout image will obtain prior information on the locations where hotspots are likely to appear. At the same time, the chip layout image enters the transformer-based end-to-end hotspot detector, and after passing through the decoder, query vector initialization module, encoder, and feedforward network in sequence, it outputs the detected chip layout image containing hotspots.

[0026] In this embodiment, Figure 2 As shown, the specific implementation process of step 2 is as follows: 1) In the lithography system, the incident light passes through the mask and transmits the spatial information of the mask pattern The input light intensity distribution is converted to the lithography intensity distribution on the wafer plane.

[0027] Intensity distribution is usually obtained using aerial images This means that the whole can be modeled using the Hopkins diffraction theory: ; in, Represents the intensity distribution aerial image, represents the spatial information of the mask image, The function represents the Tonggu Hopkins diffraction function, Indicates The optical kernel function, represents the corresponding weight, represents the convolution operation, Indicates the number of convolution kernels.

[0028] 2) Lithography model will be aerial image Convert to printed image , the printed image represents the image after the wafer is etched. If the photolithography intensity on the wafer plane is greater than the photolithography threshold, it is considered that the area is etched, otherwise no etching occurs: ; in, represents the coordinates on the photoresist image, Represents the coordinates of the aerial image, Represents the photolithography threshold.

[0029] 3) In order to implement gradient descent in the iterative learning method, the printed image is represented as: ; in, represents the steepness of the control function, Represents the threshold, which is used to control the center position of Sigmoid. Represents the sigmoid function, acting on the input , mapping it to the interval between (0,1) to make it a smooth probability value or normalized output.

[0030] In this embodiment, step 3 constructs an end-to-end hotspot detector based on transformer, and the structure is as follows: Backbone network: In this embodiment, the backbone network uses the ResNet50 architecture to effectively extract features from the input layout image. The backbone network processes the input layout image into a feature map to learn a two-dimensional representation of the input.

[0031] These extracted features are then flattened and passed to the Transformer encoder to capture global dependencies, thereby facilitating accurate hotspot detection.

[0032] Transformer-based encoder: In this embodiment, the Transformer encoder plays a key role in capturing the global dependencies and spatial relationships inherent in layout patterns.

[0033] First, the high-level activation map from the ResNet50 backbone network A 1×1 convolution is applied to reduce the number of channels from C to a smaller dimension d to obtain a new feature map. Since the encoder requires a sequence as input, the spatial dimensions of the feature map are flattened into a d×HW sequence, converting the feature map into a series of d-dimensional vectors so that it can be processed by the Transformer.

[0034] Each layer of the Transformer encoder consists of a multi-head self-attention module and a feed-forward network. The multi-head self-attention mechanism enables the model to focus on different parts of the map at the same time, thereby capturing local and global contextual information, which is critical for identifying hot spots that are not adjacent but have important global connections.

[0035] In order to process spatial information, this embodiment further introduces fixed position encoding in the Transformer encoder and adds it to the input of each attention layer. In this way, spatial relationships are also integrated into the self-attention mechanism, enabling the model to understand the layout structure and accurately locate potential hot spots.

[0036] The Transformer encoder processes feature sequences in parallel, achieving efficient computation while retaining the ability to detect complex multi-scale hotspot patterns. The features output by the encoder contain both local features and global context, which are then passed to the decoder to complete the final detection of hotspots.

[0037] Transformer-based decoder: The feature aggregation module based on the Transformer decoder exploits the prior knowledge of lithography simulation to enhance the accuracy of hotspot detection.

[0038] The Transformer decoder processes N object queries in parallel at each layer, effectively converting these learnable positional embeddings into predictions of hotspot locations and classifications.

[0039] Furthermore, the incorporation of lithography simulation data ensures that targeted queries can leverage domain-specific knowledge and focus on regions most likely to contain hotspots.

[0040] The learnable object query superimposes the spatial information enhanced by the lithography simulator at the input of each attention layer, ensuring that the decoder retains spatial awareness and contextual information. The embeddings output by the decoder are independently passed to a feedforward neural network, which is responsible for predicting the bounding box coordinates and class label of each hotspot, and finally outputs N predictions.

[0041] Feed-Forward Network (FFN): In this example, the FFN consists of a 3-layer perceptron with ReLU activation function and a network with hidden dimension d, followed by a linear projection layer. The FFN is used to predict the center coordinates, height and width of each bounding box, while the linear layer outputs the class label through softmax.

[0042] Furthermore, in this embodiment, the query vector initialization module described in step 3 is a key component for integrating lithography simulation prior information into the hotspot detection target detector. The module divides the input layout image and lithography printing image into non-overlapping blocks and calculates the metric loss of each block to quantify the lithography difference. Specifically, the metric loss is used to measure the difference between the two images, thereby generating a loss map that highlights the key areas.

[0043] In this embodiment, step 3 obtains the location information of the potential hotspot, and the specific implementation process is as follows: 1) Image division: Divide the input original binary image and the printed image after lithography into non-overlapping blocks; 2) For each block , calculate the difference in pixel value for each pixel position in the block : ; in, and Respectively represent the pixel positions in the original binary image and the printed image after lithography The pixel intensity.

[0044] 3) Calculate the metric loss of each block: The metric loss of each block It is calculated by summing the squares of the differences of all pixels in the block. The formula is: ; in, is the block size, is the index of the block.

[0045] 4) Construct a loss graph: Summarize the metric losses of all blocks and construct a loss graph , which contains the metric loss value for each block; 5) Select potential hot spots: Select the top k blocks with the highest loss values ​​in the loss graph as potential hot spots, and the location information of these blocks is retained; 6) Integrate position prior information: Pass the position information as prior knowledge to the Transformer decoder to guide the model to focus on areas with significant lithography differences, thereby improving the accuracy and efficiency of hotspot detection.

[0046] The specific implementation process of step 5 in the testing phase is: 1) Repeat step 1 for the test layout to obtain binary image data; 2) Repeat step 2 for the test pattern to obtain a printed image after photolithography; 3) Repeat step 3 for the test layout to obtain prior lithography information; 4) Input the binary original image and the prior lithography information into the hotspot detection model trained in step 4, output the location information of the hotspot and select it as the final output result of the model.

[0047] Furthermore, the chip layout hotspot detection method of the present invention is compared with the general target detection network based on deep learning on the ICCAD2016 dataset. The results are as follows: Figure 3 shown.

[0048] from Figure 3 It can be seen that on the ICCAD2016-2 and ICCAD2016-3 datasets, the method proposed in the present invention is much better than the mainstream general model framework for target detection in terms of both precision and recall. On the ICCAD2016-4 dataset, although the precision is lower than that of the YOLOV3 model and the recall rate is lower than that of CenterNet, the method proposed in the present invention is still better than the mainstream general model framework for target detection in terms of comprehensive precision and recall rate.

[0049] Furthermore, the chip layout hotspot detection method of the present invention is compared with the current advanced methods, such as Figure 4 As shown, the advanced method is the R-HSD model.

[0050] from Figure 4 It can be seen that the proposed method is superior to the current advanced method R-HSD in terms of precision and recall, and based on the baseline model DETR, the precision is improved by 3.04% and the recall is improved by 1.77%.

[0051] An embodiment of the present invention also provides an electronic device, including: one or more processors; a storage device on which one or more programs are stored; when the one or more programs are executed by the one or more processors, the one or more processors implement the transformer-based end-to-end chip layout hotspot detection method described in any of the above embodiments.

[0052] An embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the steps of any one of the transformer-based end-to-end chip layout hotspot detection methods in the above embodiments are implemented.

[0053] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A Transformer-based end-to-end chip layout hotspot detection method, characterized in that: The steps include: Step 1: Convert the existing chip layout data into binary image data and save it; Step 2: Input the converted binary image data into a GPU-driven lithography simulator, output the printed image after lithography and save it; Step 3: Build an end-to-end hotspot detector based on transformer, input the printed image after lithography and the original binary image into the query vector initialization module for measurement, obtain the location information of potential hotspots, and save it; Step 4: Based on the prior lithography information obtained from the original binary image and the printed image after lithography, a layout training set and a validation set are constructed, and the transformer-based end-to-end hotspot detector is input for model training to obtain a trained hotspot detection model. Step 5: Obtain the potential hotspot location information in the binary image layout of the chip to be tested according to steps 2 and 3, input the hotspot detection model trained in step 4 for testing, and locate the hotspots in the layout.

2. The Transformer-based end-to-end chip layout hotspot detection method according to claim 1, characterized in that: In step 2, the GPU-driven lithography simulator has the following specific processing steps: Step 2.1: In the lithography simulator, the incident light passes through the mask, and the spatial information of the mask image is transmitted to the optical projection system. The input light intensity distribution is converted into the lithography intensity distribution on the wafer plane. The intensity distribution model is constructed by the Hopkins diffraction theory, which is expressed as follows: ； in, Represents the intensity distribution aerial image, represents the spatial information of the mask image, The function represents the Hopkins diffraction function, Indicates The optical kernel function, represents the corresponding weight, represents the convolution operation, Indicates the number of convolution kernels; Step 2.2: The lithography simulator converts the aerial image Convert to printed image , the printed image This is the image of the wafer after etching. The area on the wafer plane where the photolithography intensity is greater than the photolithography threshold is considered to be the etched area, otherwise no etching occurs: ； in, represents the coordinates on the photoresist image, Represents the coordinates of the aerial image, represents the photolithography threshold; Step 2.3: Print the image It is expressed as: ； in, represents the steepness of the control function, Represents the threshold, which is used to control the center position of Sigmoid. Represents the sigmoid function, acting on the input ,Will Map to the interval between (0,1); Image As the printed image is output after photolithography, gradient descent is performed in an iterative learning method.

3. The Transformer-based end-to-end chip layout hotspot detection method according to claim 1, characterized in that: In step 3, the transformer-based end-to-end hotspot detector includes components: a backbone network, an encoder, a query vector initialization module, a decoder, and a feedforward neural network; The backbone network adopts the ResNet50 architecture. The backbone network processes the input layout image into a feature map, learns the two-dimensional representation of the input layout image and performs feature extraction, flattens the extracted features into a high-level activation map, and transmits it to the encoder; The encoder is a Transformer-based encoder, which is used to capture the global dependencies and spatial relationships inherent in the layout pattern, obtain a new feature map, and pass it to the decoder; The decoder is a Transformer-based decoder that processes N target queries in parallel at each layer through a feature aggregation module, superimposes prior knowledge of lithography simulation on the input of each attention layer, outputs N prediction results, and transmits them independently to the feedforward neural network.

4. The Transformer-based end-to-end chip layout hotspot detection method according to claim 3, characterized in that: In step 3, the query vector initialization module divides the input post-lithography printed image and the original binary image into non-overlapping blocks, calculates the metric loss of each block, selects potential hotspots, obtains lithography simulation prior information, and integrates it into the decoder; the metric loss is used to measure the difference between the two images, generate a loss map, and highlight the key areas.

5. The Transformer-based end-to-end chip layout hotspot detection method according to claim 4, characterized in that: Step 3, obtaining the location information of potential hotspots, includes the following sub-steps: Step 3.1, dividing the image: dividing the input original binary image and the printed image after photolithography into a number of non-overlapping blocks; Step 3.2: For each block , calculate the difference in pixel value for each pixel position in the block : ； in, and Respectively represent the pixel positions in the original binary image and the printed image after lithography The pixel intensity of Step 3.

3. Calculate the metric loss of each block: The metric loss of each block It is calculated by summing the squared differences of all pixels in the block, and the formula is: ； in, Indicates the size of the block, Indicates the index of the block; Step 3.4: Construct a loss graph: Summarize the metric losses of all blocks and construct a loss graph , which contains the metric loss value for each block; Step 3.5: Select potential hot spots: Select the top hot spots with the highest loss value in the loss graph. The blocks are regarded as potential hot spots, and the location information of the blocks where the potential hot spots are located is retained; Step 3.6, integrate location prior information: pass the location information of the block where the potential hotspot is located as prior knowledge to the decoder, guide the decoder to focus on the area with significant lithography differences, and improve the accuracy and efficiency of hotspot detection.

6. The Transformer-based end-to-end chip layout hotspot detection method according to claim 4, characterized in that: Each layer of Transformer encoder includes a multi-head self-attention module and a feed-forward network, and introduces fixed position encoding; The multi-head self-attention module focuses on different parts of the map at the same time, captures local and global context information, and identifies hot spots that are not adjacent but have important global connections. The fixed position encoding is added to the input of each multi-head self-attention module to integrate the spatial relationship into the multi-head self-attention module to understand the layout structure and locate potential hot spots; Each layer of Transformer encoder processes the feature sequence in parallel, applies a 1×1 convolution to the input high-level activation map, reduces the number of channels from C to dimension d, combines the local features of the global context, obtains a new feature map, and converts it into a series of d-dimensional vectors and passes it to the decoder.

7. The Transformer-based end-to-end chip layout hotspot detection method according to claim 4, characterized in that: The feedforward neural network includes a three-layer perceptron with a ReLU activation function, a network with a hidden dimension of d, followed by a linear projection layer for predicting the center coordinates, height and width of the bounding box of each hotspot, and the linear projection layer is used to output a category label through softmax.

8. The Transformer-based end-to-end chip layout hotspot detection method according to claim 1, characterized in that: In step 5, the hot spots in the layout of the chip to be tested are located, including the following sub-steps: Step 5.1, repeat step 1 in the layout of the chip to be tested to obtain binary image data; Step 5.2, repeat step 2 in the layout of the chip to be tested to obtain a printed image after photolithography; Step 5.3, repeat step 3 in the layout of the chip to be tested to obtain prior lithography information; Step 5.4: Input the original binary image and prior lithography information into the hotspot detection model trained in step 4, output the location information of the hotspot and select it as the final output result of the hotspot detection model.

9. An electronic device, characterized in that: include: one or more processors; a storage device having one or more programs stored thereon; When the one or more programs are executed by the one or more processors, the one or more processors implement the Transformer-based end-to-end chip layout hotspot detection method as described in any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the program is executed by a processor, the steps in the end-to-end chip layout hotspot detection method based on Transformer described in any one of claims 1 to 8 are implemented.

Images