An End-to-End Chip Layout Hotspot Detection Method Based on Transformer

Abstract

The present invention discloses an end-to-end chip layout hot spot detection method based on Transformer. The chip layout data is converted into binary image data and input into a lithography simulator driven by GPU to obtain the printed image after lithography. The printed image is measured against the original binary image to obtain the location information of potential hot spots. According to the prior lithography information obtained from the original binary image and the printed image after lithography, the information is input into a trained end-to-end hot spot detector based on Transformer, and the location information of the hot spots is output and boxed to locate the hot spots in the layout. The method of the present invention is driven by a GPU-accelerated lithography simulator, eliminating the need for dataset-related hyperparameters, significantly improving flexibility, reducing the consumption of computing resources, and at the same time, the prior knowledge of the lithography simulator is integrated into the framework to guide the hot spot detection model to focus on potential hot spot areas, significantly improving the interpretability and generalization ability.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit computer-aided design, and particularly to an end-to-end chip layout hot spot detection method based on Transformer. Background Art

[0002] With the rapid development of semiconductor technology, the reduction of transistor feature size and the increase of chip size have brought great challenges to design for manufacturability. Hot spot detection is a key step in design for manufacturability, which can detect potential defect patterns at an early stage.

[0003] Traditional detection methods are mainly divided into two schemes: lithography simulation and layout retrieval. Lithography simulation technology needs to simulate the entire lithography manufacturing process for the whole chip after each chip design to accurately detect hot spots. However, the simulation takes a lot of time and is not applicable to the manufacturing of current large-scale integrated circuits. The layout retrieval method identifies hot spot layout slices with similar patterns through matching or clustering. However, this type of method relies on a large-scale layout pattern hot spot library and cannot retrieve hot spots outside the current library.

[0004] With the rapid development of semiconductor technology, the continuous reduction of the size of integrated circuit components has continuously pushed the boundaries of current chip manufacturing processes. As the feature size decreases, it becomes increasingly difficult to ensure the printability of the layout design, resulting in an increase in the incidence of manufacturing defects. This challenge is particularly evident in critical areas, called hot spot regions, where the risk of defects is higher. Therefore, accurately and efficiently locating hot spot regions becomes particularly important.

[0005] Currently, there are mainly three methods for hot spot detection: lithography simulation, pattern matching, and machine learning. Traditional lithography simulation methods have high accuracy but are extremely time-consuming, making them less practical in large-scale production environments. In contrast, pattern matching methods identify potential hot spots in new designs by using a set of predefined hot spot layout patterns. Although this method is faster than traditional lithography simulation, its limitation is that it cannot detect novel or previously unseen hot spots.

[0006] However, existing deep learning-based methods still have some problems. Existing two-stage hot spot detectors, such as the Chinese patent application with publication number CN117314828A, disclose a lithography hot spot detection method and system based on a deep learning LHD model. Existing one-stage hot spot detectors, such as the Chinese patent application with publication number CN118247560A, disclose a lithography hot spot detection method based on a Transformer-CNN dual-domain fusion network. Both rely on an anchor-based model framework to generate candidate boxes, which requires manually setting a large number of sensitive hyperparameters and post-processing. The hyperparameters include the size and aspect ratio of the anchor boxes, etc., which are used to define the candidate regions for object detection. This method lacks the flexibility to adapt to hot spots of different scales and shapes. In addition, existing methods still need to use non-maximum suppression (NMS), which means they are not end-to-end and consume additional computing resources. Summary of the Invention

[0007] Object of the Invention: To overcome the deficiencies of the prior art, the present invention provides an end-to-end chip layout hot spot detection method based on Transformer, driven by a GPU-accelerated lithography simulator, to solve the problems in existing deep learning-based hot spot detection methods that require manually setting a large number of hyperparameters and performing post-processing, and at the same time have insufficient flexibility and high consumption of computing resources.

[0008] The present invention adopts the following technical solutions: An end-to-end chip layout hot spot detection method based on Transformer, comprising the following steps:

[0009] Step 1: Convert the existing chip layout data into binary image data and save it;

[0010] Step 2: Input the converted binary image data into a GPU-driven lithography simulator, output the printed image after lithography and save it;

[0011] Step 3: Construct an end-to-end hot spot detector based on transformer, input the printed image after lithography and the original binary image into the query vector initialization module for measurement, obtain the position information of potential hot spots, and save it;

[0012] Step 4: According to the prior lithography information obtained from the original binary image and the printed image after lithography, construct a layout training set and a validation set, input them into the end-to-end hot spot detector based on transformer for model training, and obtain a trained hot spot detection model;

[0013] Step 5: Input the potential hot spot location information in the binary image layout obtained from the chip layout to be tested according to Step 2 and Step 3 into the trained hot spot detection model in Step 4 for testing, and locate the hot spots in the layout.

[0014] Preferably, in Step 2, the GPU-driven lithography simulator has the following specific processing process:

[0015] Step 2.1: In the lithography simulator, the incident light passes through the mask, transfers the spatial information of the mask image to the optical projection system, and converts the input light intensity distribution into the lithography intensity distribution on the wafer plane;

[0016] Step 2.2: The lithography simulator converts the aerial image into a printed image , and the printed image is the image after wafer etching. The area on the wafer plane where the lithography intensity is greater than the lithography threshold is considered the etched area, otherwise etching does not occur:

[0017] Step 2.3: Represent the printed image as:

[0018] ;

[0019] where, represents the steepness of the control function, represents the threshold value used to control the center position of the Sigmoid, represents the sigmoid function. By applying the sigmoid function to the input image , the image is mapped to the interval between (0, 1), becoming a smooth probability value or a normalized output;

[0020] Take the image as the printed image after lithography and output it, and perform gradient descent in the iterative learning method.

[0021] Preferably, in Step 3, the transformer-based end-to-end hot spot detector sequentially includes: a backbone network, an encoder, a query vector initialization module, a decoder, and a feed-forward neural network;

[0022] The backbone network adopts the ResNet50 architecture. The backbone network processes the input layout image into a feature map, learns the two-dimensional representation of the input layout image and performs feature extraction, flattens the extracted features into a high-level activation map, and transfers it to the encoder;

[0023] The encoder is a Transformer-based encoder, which is used to capture the global dependencies and spatial relationships inherent in the layout pattern, obtain a new feature map, and transmit it to the decoder;

[0024] The decoder is a Transformer-based decoder. It processes N target queries in parallel at each layer through a feature aggregation module, superimposes the prior knowledge of lithography simulation on the input of each attention layer, and outputs N prediction results, which are independently transmitted to the feed-forward neural network.

[0025] Preferably, in step 3, the query vector initialization module divides the input printed image after lithography and the original binary image into non-overlapping blocks, calculates the metric loss of each block, and integrates the prior information of lithography simulation into the key components of the end-to-end hot spot detector based on transformer; the metric loss is used to measure the difference between two images, generate a loss map, and highlight the key areas.

[0026] Preferably, in step 3, obtaining the position information of potential hot spots includes the following sub-steps:

[0027] Step 3.1, Divide the image: Divide the input original binary image and the printed image after lithography into several non-overlapping blocks;

[0028] Step 3.2, For each block , calculate the pixel value difference at each pixel position in the block ;

[0029] Step 3.3, Calculate the metric loss of each block: The metric loss of each block is calculated by summing the squares of the differences of all pixels in the block;

[0030] Step 3.4, Construct a loss map: Aggregate the metric losses of all blocks to construct a loss map , which contains the metric loss values of each block;

[0031] Step 3.5, Select potential hot spots: Select the top k blocks with the highest loss values in the loss map as potential hot spots, and retain the position information of the blocks where the potential hot spots are located;

[0032] Step 3.6, Integrate position prior information: Transmit the position information of the blocks where the potential hot spots are located to the decoder as prior knowledge, guiding the decoder to focus its attention on the areas with significant lithography differences, and improving the accuracy and efficiency of hot spot detection.

[0033] Preferably, the Transformer-based encoder includes several layers of Transformer encoders. Each layer of the Transformer encoder includes a multi-head self-attention module and a feed-forward network, and fixed-position encoding is introduced;

[0034] The multi-head self-attention module simultaneously focuses on different parts of the layout, captures local and global context information, and identifies hotspots that are not adjacent but have important global correlations;

[0035] The fixed-position encoding is added to the input of each attention layer to incorporate spatial relationships into the multi-head self-attention module, which is used to understand the layout structure and locate potential hotspot regions;

[0036] Each layer of the Transformer encoder processes the feature sequence in parallel, outputs local features combined with global context, and transmits them to the decoder.

[0037] Preferably, the feed-forward neural network: includes a three-layer perceptron with a ReLU activation function, a network with a hidden dimension of d, followed by a linear projection layer, which is used to predict the center coordinates, height, and width of the bounding box of each hotspot. The linear projection layer uses softmax to output class labels.

[0038] Preferably, in step 5, locating the hotspots in the layout of the chip to be tested includes the following sub-steps:

[0039] Step 5.1: Repeat step 1 for the layout of the chip to be tested to obtain binary image data;

[0040] Step 5.2: Repeat step 2 for the layout of the chip to be tested to obtain the printed image after lithography;

[0041] Step 5.3: Repeat step 3 for the layout of the chip to be tested to obtain prior lithography information;

[0042] Step 5.4: Input the original binary image and the prior lithography information into the hotspot detection model trained in step 4, output the position information of the hotspots and frame them, which is used as the final output result of the hotspot detection model.

[0043] The technical solution of the present invention also provides: an electronic device, including:

[0044] One or more processors;

[0045] A storage device on which one or more programs are stored;

[0046] When the one or more programs are executed by the one or more processors, the one or more processors implement the above-mentioned Transformer-based end-to-end chip layout hot spot detection method.

[0047] The technical solution of the present invention also provides a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, the steps in any of the above-mentioned Transformer-based end-to-end chip layout hot spot detection methods are implemented.

[0048] Compared with the prior art, the present invention adopts the above technical solution and has the following technical effects:

[0049] 1. The end-to-end hot spot detection method of the present invention is driven by a GPU-accelerated lithography simulator, eliminating the need for dataset-related hyperparameters, significantly improving flexibility, and reducing the consumption of computing resources.

[0050] 2. In the end-to-end hot spot detection method of the present invention, the prior knowledge of the lithography simulator is integrated into the framework to guide the hot spot detection model to focus on potential hot spot areas, significantly improving the interpretability and generalization ability. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 It is a flow block diagram of the Transformer-based end-to-end chip layout hot spot detection method of the present invention;

[0052] Figure 2 It is a flow block diagram of the GPU-driven lithography simulator outputting a printed image after lithography of the present invention;

[0053] Figure 3 It is a schematic diagram of the comparison results between the embodiments of the present invention and the general object detection network based on deep learning on the ICCAD2016 dataset;

[0054] Figure 4 It is a comparison result diagram between the embodiments of the present invention and the current advanced methods. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0055] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the application will be further elaborated in detail below with reference to the accompanying drawings. The described embodiments are only a part of the embodiments involved in the present invention. All non-innovative embodiments made by other researchers in the field based on this embodiment belong to the protection scope of the present invention. At the same time, for the step numbers in the embodiments of the present invention, they are only set for the convenience of explanation and description, and no limitation is imposed on the order between the steps. The execution order of each step in the embodiments can be adaptively adjusted according to the understanding of those skilled in the art.

[0056] In one embodiment of the present invention, an end-to-end chip layout hot spot detection method based on a transformer is driven by a GPU-accelerated prior lithography simulator, as Figure 1 shown, and specifically includes the following steps:

[0057] Step 1: Convert the existing chip layout data into binary image data and save it;

[0058] Step 2: Input the converted binary image data into the GPU-driven lithography simulator, output the printed image after lithography and save it;

[0059] Step 3: Construct an end-to-end hot spot detector based on a transformer, input the printed image after lithography and the original binary image into the query vector initialization module for measurement, obtain the position information of potential hot spots, and save it;

[0060] Step 4: According to the prior lithography information obtained from the original binary image and the printed image after lithography, construct a layout training set and a validation set, input them into the end-to-end hot spot detector based on a transformer for model training, and obtain a trained hot spot detection model;

[0061] Step 5: Input the position information of potential hot spots in the binary image layout obtained from the chip layout to be tested according to Steps 2 and 3 into the trained hot spot detection model in Step 4 for testing, and locate the hot spots in the layout.

[0062] In Figure 1 this embodiment, the model architecture mainly consists of two parts: a prior lithography simulator and a target detector based on a transformer.

[0063] After passing through the lithography simulator, the input chip layout image will obtain prior information on the positions where hot spots are likely to appear. At the same time, the chip layout image enters the end-to-end hot spot detector based on a transformer, and after passing through the decoder, query vector initialization module, encoder, and feed-forward network in sequence, it outputs the detected chip layout image containing hot spots.

[0064] In this embodiment, as Figure 2 shown, the specific implementation process of Step 2 is as follows:

[0065] 1) In the lithography system, the incident light passes through the mask, and the spatial information of the mask pattern is transmitted to the optical projection system. This causes the input light intensity distribution to be converted into the lithography intensity distribution on the wafer plane.

[0066] The intensity distribution is usually represented by an aerial image and can be modeled using Hopkins diffraction theory as a whole:

[0067] ;

[0068] in, Represents the intensity distribution aerial image, represents the spatial information of the mask image, The function represents the Tonggu Hopkins diffraction function, Indicates The optical kernel function, represents the corresponding weight, represents the convolution operation, Indicates the number of convolution kernels.

[0069] 2) Lithography model will be aerial image Convert to printed image , the printed image represents the image after the wafer is etched. If the photolithography intensity on the wafer plane is greater than the photolithography threshold, it is considered that the area is etched, otherwise no etching occurs:

[0070] ;

[0071] in, represents the coordinates on the photoresist image, Represents the coordinates of the aerial image, Represents the photolithography threshold.

[0072] 3) In order to implement gradient descent in the iterative learning method, the printed image is represented as:

[0073] ;

[0074] in, represents the steepness of the control function, Represents the threshold, which is used to control the center position of Sigmoid. Represents the sigmoid function, acting on the input , mapping it to the interval between (0,1) to make it a smooth probability value or normalized output.

[0075] In this embodiment, step 3 constructs an end-to-end hotspot detector based on transformer, and the structure is as follows:

[0076] Backbone network: In this embodiment, the backbone network uses the ResNet50 architecture to effectively extract features from the input layout image. The backbone network processes the input layout image into a feature map to learn a two-dimensional representation of the input.

[0077] These extracted features are then flattened and passed to the Transformer encoder to capture global dependencies, thereby facilitating accurate hotspot detection.

[0078] Transformer-based encoder: In this embodiment, the Transformer encoder plays a key role in capturing the global dependencies and spatial relationships inherent in layout patterns.

[0079] First, the high-level activation map from the ResNet50 backbone network A 1×1 convolution is applied to reduce the number of channels from C to a smaller dimension d to obtain a new feature map. Since the encoder requires a sequence as input, the spatial dimensions of the feature map are flattened into a d×HW sequence, converting the feature map into a series of d-dimensional vectors so that it can be processed by the Transformer.

[0080] Each layer of the Transformer encoder consists of a multi-head self-attention module and a feed-forward network. The multi-head self-attention mechanism enables the model to focus on different parts of the map at the same time, thereby capturing local and global contextual information, which is critical for identifying hot spots that are not adjacent but have important global connections.

[0081] In order to process spatial information, this embodiment further introduces fixed position encoding in the Transformer encoder and adds it to the input of each attention layer. In this way, spatial relationships are also integrated into the self-attention mechanism, enabling the model to understand the layout structure and accurately locate potential hot spots.

[0082] The Transformer encoder processes feature sequences in parallel, achieving efficient computation while retaining the ability to detect complex multi-scale hotspot patterns. The features output by the encoder contain both local features and global context, which are then passed to the decoder to complete the final detection of hotspots.

[0083] Transformer-based decoder: The feature aggregation module based on the Transformer decoder exploits the prior knowledge of lithography simulation to enhance the accuracy of hotspot detection.

[0084] The Transformer decoder processes N object queries in parallel at each layer, effectively converting these learnable positional embeddings into predictions of hotspot locations and classifications.

[0085] Furthermore, the incorporation of lithography simulation data ensures that the target query can utilize domain-specific knowledge and focus on the areas most likely to have hotspots.

[0086] The learnable target query superimposes the spatial information enhanced by the lithography simulator on the input of each attention layer, thus ensuring that the decoder retains spatial awareness and context information. The embeddings output by the decoder are independently passed to a feed-forward neural network, which is responsible for predicting the bounding box coordinates and class labels of each hotspot, and finally outputs N prediction results.

[0087] Feed-Forward Network (FFN): In this embodiment, the FFN consists of a three-layer perceptron with a ReLU activation function and a network with a hidden dimension of d, followed by a linear projection layer. The FFN is used to predict the center coordinates, height, and width of each bounding box, and the linear layer outputs the class labels through softmax.

[0088] Furthermore, in this embodiment, the query vector initialization module described in step 3 is a key component for integrating lithography simulation prior information into the hotspot detection target detector. This module divides the input layout image and lithography printed image into non-overlapping blocks, calculates the metric loss for each block to quantify the lithography difference. Specifically, the metric loss is used to measure the difference between two images, thereby generating a loss map that highlights the key regions.

[0089] In this embodiment, the position information of the potential hotspots obtained in step 3 is specifically implemented as follows:

[0090] 1) Divide the image: Divide the input original binary image and the printed image after lithography into non-overlapping blocks;

[0091] 2) For each block , calculate the pixel value difference at each pixel position in the block :

[0092] ;

[0093] Where and respectively represent the pixel intensities at the pixel position in the input original binary image and the printed image after lithography.

[0094] 3) Calculate the metric loss for each block: The metric loss of each block is calculated by summing the squares of the differences of all pixels in the block, and the formula is:

[0095] ;

[0096] Among them, is the size of the block, is the index of the block.

[0097] 4) Construct a loss graph: Aggregate the metric losses of all blocks to construct a loss graph that contains the metric loss values of each block;

[0098] 5) Select potential hotspots: Select the top k blocks with the highest loss values in the loss graph as potential hotspots, and the location information of these blocks is retained;

[0099] 6) Integrate location prior information: Pass the location information as prior knowledge to the Transformer decoder to guide the model to focus its attention on regions with significant lithography differences, thereby improving the accuracy and efficiency of hotspot detection.

[0100] In the specific implementation process of step 5 in the test phase:

[0101] 1) Repeat step 1 for the test layout to obtain binary image data;

[0102] 2) Repeat step 2 for the test layout to obtain the printed image after lithography;

[0103] 3) Repeat step 3 for the test layout to obtain prior lithography information;

[0104] 4) Input the binary original image and the prior lithography information into the hotspot detection model trained in step 4, output the location information of the hotspots and frame them out as the final output result of the model.

[0105] Furthermore, compare the hotspot detection method for the chip layout of the present invention with the general object detection network based on deep learning on the ICCAD2016 dataset, and the results are as Figure 3 shown.

[0106] It can be seen from Figure 3 that on the ICCAD2016-2 and ICCAD2016-3 datasets, the method proposed by the present invention significantly leads the mainstream general model frameworks of object detection in terms of both precision and recall. On the ICCAD2016-4 dataset, although the precision is lower than that of the YOLOV3 model and the recall is lower than that of the CenterNet, considering the comprehensive precision and recall, the method proposed by the present invention is still superior to the mainstream general model frameworks of object detection.

[0107] Furthermore, compare the hotspot detection method for the chip layout of the present invention with the current advanced method, as Figure 4 shown, where the advanced method is the R-HSD model.

[0108] From Figure 4 It can be seen that the method of the present invention is superior to the current advanced method R-HSD in terms of both precision and recall rate, and based on the baseline model DETR, the precision is improved by 3.04% and the recall rate is improved by 1.77%.

[0109] An embodiment of the present invention further provides an electronic device, including: one or more processors; a storage device on which one or more programs are stored; when the one or more programs are executed by the one or more processors, the one or more processors implement the end-to-end chip layout hot spot detection method based on transformer described in any of the above embodiments.

[0110] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, and when the program is executed by a processor, the steps in any of the end-to-end chip layout hot spot detection methods based on transformer in the above embodiments are implemented.

[0111] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. A Transformer-based end-to-end chip layout hotspot detection method, characterized in that: The steps include: Step 1, convert the existing chip layout data into binary image data and save it; Step 2: Input the converted binary image data into a GPU-driven lithography simulator, output the printed image after lithography and save it; Step 3: Build an end-to-end hotspot detector based on transformer, input the printed image after lithography and the original binary image into the query vector initialization module for measurement, obtain the location information of potential hotspots, and save it; The query vector initialization module divides the input post-lithography printed image and the original binary image into non-overlapping blocks, calculates the metric loss of each block, selects potential hot spots, obtains lithography simulation prior information, and integrates it into the decoder; Obtaining the location information of potential hotspots includes the following sub-steps: Step 3.1, dividing the image: dividing the input original binary image and the printed image after photolithography into a number of non-overlapping blocks; Step 3.2: For each block , calculate the difference in pixel value for each pixel position in the block : ； in, and Respectively represent the pixel positions in the original binary image and the printed image after lithography The pixel intensity of Step 3.

3. Calculate the metric loss of each block: The metric loss of each block It is calculated by summing the squared differences of all pixels in the block, and the formula is: ； in, Indicates the size of the block, Indicates the index of the block; Step 3.4: Construct a loss graph: Summarize the metric losses of all blocks and construct a loss graph , which contains the metric loss value for each block; Step 3.5: Select potential hot spots: Select the top hot spots with the highest loss value in the loss graph. The blocks are regarded as potential hot spots, and the location information of the blocks where the potential hot spots are located is retained; Step 3.6: Integrate the location prior information: The location information of the block where the potential hotspot is located is passed to the decoder as prior knowledge to guide the decoder to focus on the area with significant lithography differences, thereby improving the accuracy and efficiency of hotspot detection. Step 4: Based on the prior lithography information obtained from the original binary image and the printed image after lithography, a layout training set and a validation set are constructed, and the transformer-based end-to-end hotspot detector is input for model training to obtain a trained hotspot detection model. Step 5: Obtain the potential hotspot location information in the binary image layout of the chip to be tested according to steps 2 and 3, input the hotspot detection model trained in step 4 for testing, and locate the hotspots in the layout.

2. The Transformer-based end-to-end chip layout hotspot detection method according to claim 1, characterized in that: In step 2, the GPU-driven lithography simulator has the following specific processing steps: Step 2.1: In the lithography simulator, the incident light passes through the mask, and the spatial information of the mask image is transmitted to the optical projection system. The input light intensity distribution is converted into the lithography intensity distribution on the wafer plane. The intensity distribution model is constructed by the Hopkins diffraction theory, which is expressed as follows: ； in, Represents the intensity distribution aerial image, represents the spatial information of the mask image, The function represents the Hopkins diffraction function, Indicates The optical kernel function, represents the corresponding weight, represents the convolution operation, Indicates the number of convolution kernels; Step 2.2: The lithography simulator converts the aerial image Convert to printed image , the printed image This is the image of the wafer after etching. The area on the wafer plane where the photolithography intensity is greater than the photolithography threshold is considered to be the etched area, otherwise no etching occurs: ； in, represents the coordinates on the photoresist image, Represents the coordinates of the aerial image, represents the photolithography threshold; Step 2.3: Print the image It is expressed as: ； in, represents the steepness of the control function, Represents the threshold, which is used to control the center position of Sigmoid. Represents the sigmoid function, acting on the input ,Will Map to the interval between (0,1); Image As the printed image is output after photolithography, gradient descent is performed in an iterative learning method.

3. The Transformer-based end-to-end chip layout hotspot detection method according to claim 1, characterized in that: In step 3, the transformer-based end-to-end hotspot detector includes components: a backbone network, an encoder, a query vector initialization module, a decoder, and a feedforward neural network; The backbone network adopts the ResNet50 architecture. The backbone network processes the input layout image into a feature map, learns the two-dimensional representation of the input layout image and performs feature extraction, flattens the extracted features into a high-level activation map, and transmits it to the encoder; The encoder is a Transformer-based encoder, which is used to capture the global dependencies and spatial relationships inherent in the layout pattern, obtain a new feature map, and pass it to the decoder; The decoder is a Transformer-based decoder that processes N target queries in parallel at each layer through a feature aggregation module, superimposes prior knowledge of lithography simulation on the input of each attention layer, outputs N prediction results, and transmits them independently to the feedforward neural network.

4. The Transformer-based end-to-end chip layout hotspot detection method according to claim 3, characterized in that: In step 3, the metric loss is used to measure the difference between the two images and generate a loss map to highlight the key areas.

5. The Transformer-based end-to-end chip layout hotspot detection method according to claim 3, characterized in that: Each layer of Transformer encoder includes a multi-head self-attention module and a feed-forward network, and introduces fixed position encoding; The multi-head self-attention module focuses on different parts of the map at the same time, captures local and global context information, and identifies hot spots that are not adjacent but have important global connections. The fixed position encoding is added to the input of each multi-head self-attention module to integrate the spatial relationship into the multi-head self-attention module to understand the layout structure and locate potential hot spots; Each layer of Transformer encoder processes the feature sequence in parallel, applies a 1×1 convolution to the input high-level activation map, reduces the number of channels from C to dimension d, combines the local features of the global context, obtains a new feature map, and converts it into a series of d-dimensional vectors and passes it to the decoder.

6. The Transformer-based end-to-end chip layout hotspot detection method according to claim 5, characterized in that: The feedforward neural network includes a three-layer perceptron with a ReLU activation function, a network with a hidden dimension of d, followed by a linear projection layer for predicting the center coordinates, height and width of the bounding box of each hotspot, and the linear projection layer is used to output a category label through softmax.

7. The Transformer-based end-to-end chip layout hotspot detection method according to claim 1, characterized in that: In step 5, the hot spots in the layout of the chip to be tested are located, including the following sub-steps: Step 5.1, repeat step 1 in the layout of the chip to be tested to obtain binary image data; Step 5.2, repeat step 2 in the layout of the chip to be tested to obtain a printed image after photolithography; Step 5.3, repeat step 3 in the layout of the chip to be tested to obtain prior lithography information; Step 5.4: Input the original binary image and prior lithography information into the hotspot detection model trained in step 4, output the location information of the hotspot and select it as the final output result of the hotspot detection model.

8. An electronic device, characterized in that: include: one or more processors; a storage device having one or more programs stored thereon; When the one or more programs are executed by the one or more processors, the one or more processors implement the Transformer-based end-to-end chip layout hotspot detection method as described in any one of claims 1 to 7.

9. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the program is executed by a processor, the steps in the end-to-end chip layout hotspot detection method based on Transformer described in any one of claims 1 to 7 are implemented.

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