Large-scale intelligent computing sensing computing light chip architecture and system

Abstract

The invention relates to the technical field of optical computing, in particular to a large-scale intelligent computing sensing optical computing chip architecture and system. The architecture comprises a pre-sensing calculation unit and a sensing calculation chip cluster, and pre-sensing calculation subunits in the pre-sensing calculation unit are in one-to-one correspondence with sensing calculation chips in the sensing calculation chip cluster; wherein the pre-sensing calculation subunit is used for receiving an input light field and performing parallel processing on multi-dimensional light field information in the input light field according to a task target to obtain a light field after parallel processing; and the sensing and calculating chip is used for loading the light field subjected to parallel processing to the signal light based on a resonance mechanism of the resonant ring to obtain loaded signal light, and each dimension of the loaded signal light carries scene information of the input light field. By the adoption of the scheme, the processing speed and efficiency of light calculation in a natural scene can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of optical computing technology, and in particular to a large-scale intelligent computing and sensing optical chip architecture and system. Background Art

[0002] With the rapid development of artificial intelligence and scientific computing, the complexity and scale of computing needs are also increasing. However, the existing electronic computing technology is limited by Moore's Law, and its performance is gradually approaching saturation, making it difficult to effectively cope with the increasingly stringent requirements of large-scale complex algorithms on computing power and power consumption. Light has natural advantages such as high throughput and low latency in the propagation process. Optical computing technology that uses photons instead of electrons as computing carriers is seen as the key to breaking the existing computing bottleneck.

[0003] However, the current common optical computing paradigm often assumes that natural scenes have been recorded by sensors, and loads this information onto coherent light such as lasers through phase modulators and other means. In this process, the limitations of the sensor's photoelectric conversion and digital-to-analog conversion speeds severely restrict the processing speed and efficiency of optical computing in natural scenes. Summary of the invention

[0004] The present disclosure aims to solve one of the technical problems in the related art at least to some extent.

[0005] To this end, the first purpose of the present invention is to propose a large-scale intelligent computing and sensing optical chip architecture to improve the processing speed and efficiency of optical computing in natural scenes.

[0006] The second objective of the present disclosure is to propose a large-scale intelligent computing, sensing and optical chip system.

[0007] To achieve the above-mentioned purpose, the first aspect of the present disclosure proposes a large-scale intelligent computing and sensing optical chip architecture, including: a pre-sensing computing unit and a sensing and computing chip cluster, wherein the pre-sensing computing sub-units in the pre-sensing computing unit correspond to the sensing and computing chips in the sensing and computing chip cluster in a one-to-one manner; wherein, The pre-sensing calculation subunit is used to receive an input light field, and perform parallel processing on multi-dimensional light field information in the input light field according to a task objective to obtain a light field after parallel processing; The sensing and computing chip is used to load the parallel processed light field onto the signal light based on the resonance mechanism of the resonant ring to obtain the loaded signal light, wherein each dimension of the loaded signal light carries the scene information of the input light field.

[0008] Optionally, the architecture further includes: The microlens array is used to input the parallel processed light field into the sensing chip.

[0009] Optionally, the microlens array includes at least one of the following: Supersurface; Liquid crystal array.

[0010] Optionally, when the sensing and computing chip is used to load the parallel processed light field onto the signal light based on the resonance mechanism of the resonant ring, it is specifically used to: Determine the bias voltage and modulation method based on the pre-trained network parameters; The parallel processed light field is modulated according to the modulation mode to load the parallel processed light field onto the signal light.

[0011] Optionally, when the sensing and computing chip is used to modulate the light field after the parallel processing according to the modulation mode, it is specifically used to: determining a scene preprocessing task according to the bias voltage; Preprocessing the light field after the parallel processing according to the scene preprocessing task to obtain a preprocessed light field; The preprocessed light field is modulated according to the modulation mode.

[0012] Optionally, the scene preprocessing task includes at least one of the following: Feature extraction; Noise suppression.

[0013] Optionally, the pre-sensing calculation subunit is used to perform parallel processing on the multi-dimensional light field information in the input light field by using at least one of the following processing methods: For the amplitude dimension light field information, the amplitude at different spatial positions is regulated by utilizing the change of the metasurface refractive index, reflection and scattering of the input light field at different spatial positions; With respect to the phase dimension light field information, the phase delay of the input light field is regulated by changing the geometric parameters of the metasurface unit; With respect to the light field information in the polarization dimension, the polarization state of the input light field is regulated by adjusting the anisotropy of the dielectric constant in the metasurface, so that light of different polarizations has specific propagation and transmission characteristics; For the frequency-dimensional light field information, the frequency selection of the input light field is achieved by changing the geometric parameters of the metasurface unit, so as to achieve the regulation of the frequency-dimensional light field information; With respect to the angular dimension light field information, the light propagation angle of the input light field is regulated by adjusting the spatial arrangement of the metasurface units.

[0014] To achieve the above-mentioned purpose, the second aspect of the present disclosure proposes a large-scale intelligent computing, sensing and optical chip system, including: the large-scale intelligent computing, sensing and optical chip architecture shown in any one of the above-mentioned first aspects.

[0015] Optionally, the system further comprises: The optical calculation unit is used to receive the loaded signal light and perform optical calculation on the loaded signal light to obtain an optical calculation result corresponding to the input light field.

[0016] Optionally, the optical computing unit adopts an optical computing chip.

[0017] In summary, the large-scale intelligent computing-sensing-optical chip architecture and system provided by the present invention, through the reconstruction and optimization of sensors in the traditional paradigm, gradually eliminates the functions of sensors, and replaces them with a pre-sensing computing-sensing-computing chip intelligent computing-sensing-computing optical chip architecture. This architecture is an all-optical computing-sensing-computing architecture that can directly load the scene information of the input light field onto the signal light, which can change the dependence on sensors in the traditional paradigm, effectively eliminate various delays introduced by sensors, and realize true optical perception and optical processing. Compared with traditional methods, the advantage of this architecture is that it can achieve seamless connection between perception and computing on the same physical level, can minimize the delay and energy consumption in the information processing process, and can significantly improve the processing efficiency of the input light field.

[0018] Additional aspects and advantages of the present disclosure will be given in part in the following description and in part will be obvious from the following description or learned through practice of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and / or additional aspects and advantages of the present disclosure will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which: Figure 1 A schematic diagram of the structure of a large-scale intelligent computing, sensing and optical chip architecture provided by an embodiment of the present disclosure; Figure 2 A schematic diagram of the structure of a large-scale intelligent computing, sensing and optical chip architecture provided by another embodiment of the present disclosure; Figure 3 A schematic diagram of the structure of a large-scale intelligent computing, sensing and optical chip system provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0020] Embodiments of the present disclosure are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present disclosure, and should not be construed as limiting the present disclosure.

[0021] With the rapid development of artificial neural network technology, the performance and complexity of machine vision algorithms have shown a significant upward trend. With this progress, new artificial intelligence technologies such as large models have an increasing demand for computing power, which has driven an urgent pursuit of high computing power. However, as Moore's Law gradually slows down, the existing electronic computing technology is approaching saturation in processor performance, which makes it unable to cope with the computing power and power consumption requirements of large-scale complex algorithms. The main bottleneck of traditional electronic computing architecture is its high power consumption and limited computing speed, which makes it difficult to effectively meet the high parallel processing capabilities required for dynamic machine vision processing.

[0022] In this context, optical computing technology has attracted widespread attention with its excellent high-speed and high-throughput characteristics, prompting the emergence of a variety of new optical computing paradigms. However, the traditional optical computing paradigm is the sensing and computing separation paradigm, that is, the perception and computing are processed separately. It separates the sensor and the processor, causing the digital-to-analog conversion to become a bottleneck in the operation of the system. The time delay caused by it has become a significant obstacle to the widespread application of optical computing technology.

[0023] The present disclosure is described in detail below with reference to specific embodiments.

[0024] Figure 1 This is a schematic diagram of the structure of a large-scale intelligent computing and sensing optical chip architecture provided by an embodiment of the present disclosure. Figure 1 As shown, the large-scale intelligent computing and sensing optical chip architecture includes: a pre-sensing computing unit and a sensing and computing chip cluster. The pre-sensing computing sub-units in the pre-sensing computing unit and the sensing and computing chips in the sensing and computing chip cluster correspond one to one.

[0025] According to some embodiments, the pre-sensing computing subunit is used to receive an input light field, and perform parallel processing on multi-dimensional light field information in the input light field according to a task objective to obtain a light field after parallel processing.

[0026] In some embodiments, the input light field refers to a light field that needs to be processed, and the light field may be a natural scene, for example.

[0027] In some embodiments, according to the task objectives, the pre-sensing computing subunit can respond to and process the phase, amplitude, polarization, frequency and other dimensional light field information in the input light field. The relevant parameters involved in the processing can be determined according to the task objectives.

[0028] For example, if the task goal instructs to statically classify the scene corresponding to the input light field, the pre-sensing computing subunit will complete the modulation of the spatial dimension light field information, and compress the polarization, frequency and other dimensional light field information except the spatial dimension light field information; For example, if the task objective indicates to analyze the scene spectrum of the input light field, the pre-sensing computing subunit can use a wavelength-sensitive dispersive medium to modulate the spectral information of the scene and retain as much information as possible.

[0029] It should be noted that the pre-sensing computing subunit processes information of different dimensions of the input light field in parallel, so that more original scene information can be retained in the obtained light field after parallel processing.

[0030] According to some embodiments, the sensing and computing chip is used to load the parallel processed light field onto the signal light based on the resonance mechanism of the resonant ring to obtain the loaded signal light.

[0031] In some embodiments, the resonance mechanism of the resonant ring refers to the fact that for light with a wavelength equal to the resonant wavelength, the optical path of one circle in the ring is exactly equal to an integer number of wavelengths. At this time, the laser in the ring will coherently constructively interact with the input laser. As light of the corresponding wavelength is continuously input, the laser energy will continue to accumulate in the resonant ring, and there will be almost no light intensity at the output end of the resonant ring. For light with a wavelength not equal to the resonant wavelength, the above-mentioned coherent constructive effect is almost nonexistent, and almost all of the light is output through the output end. In summary, from the perspective of the input and output of the resonant ring, the output will drop sharply at a specific wavelength, while it will be almost constant at other wavelengths. The sensing chip uses this mechanism to modulate light of different wavelengths.

[0032] In some embodiments, the signal light may be, for example, a coherent light wave such as a laser suitable for computing.

[0033] In some embodiments, each dimension of the loaded signal light carries scene information of the input light field.

[0034] The loaded signal light includes but is not limited to at least one of the following dimensions: space; time; polarization; Phase; amplitude; frequency.

[0035] It should be noted that the sensing chip can successfully convert the intensity information of the scene into the spectral dimension information of the laser through the resonance mechanism of the resonant ring. This process can effectively realize the real-time feeding of natural information, enabling the sensing chip to obtain richer and more diverse scene data.

[0036] According to some embodiments, during the coordination between the pre-sensing computing sub-unit and the sensing computing chip, information can be directly transmitted within the architecture in the form of optical signals, thereby avoiding delays and losses that may be caused by traditional electrical signal conversion processes.

[0037] In some embodiments, by realizing direct mapping between scene information of the input light field and signal light, this architecture can not only greatly improve computing speed and data processing capabilities, but also help reduce power consumption and meet computing needs in resource-constrained scenarios. This architecture is expected to be used in intelligent mission scenarios such as unmanned driving and drones that require efficient real-time processing capabilities and low-power solutions.

[0038] In summary, the architecture provided in this embodiment, through the reconstruction and optimization of sensors in the traditional paradigm, gradually eliminates the functions of sensors, and replaces them with an intelligent computing-sensing-computing optical chip architecture of pre-sensing computing-sensing-computing chip. This architecture is an all-optical computing-sensing-computing architecture, which can directly load the scene information of the input light field onto the signal light, can change the dependence on sensors in the traditional paradigm, effectively eliminate various delays introduced by sensors, and realize true optical perception and optical processing. Compared with traditional methods, the advantage of this architecture is that it can achieve seamless connection between perception and computing on the same physical level, can minimize the delay and energy consumption in the information processing process, and can significantly improve the processing efficiency of the input light field.

[0039] Optionally, the large-scale intelligent computing sensing and optical chip architecture further includes: The microlens array is used to input the parallel processed light field into the sensing chip.

[0040] According to some embodiments, the light field after parallel processing can be accurately input into the sensing chip through a microlens array. The design of this microlens array can not only improve the efficiency of light input, but also effectively focus and distribute light, thereby optimizing the subsequent signal processing process.

[0041] In some embodiments, the microlens array may include at least one of the following: Supersurface; Liquid crystal array.

[0042] Among them, the metasurface includes multiple metasurface units. The metasurface unit refers to the basic unit of the metasurface to regulate the light field. It is composed of sub-wavelength-scale micro-nano structures (columnar, step-shaped, etc.) and their substrate materials and environmental media. Based on the design of the micro-nano structure in terms of rich degrees of freedom such as shape, height, and material, it is possible to achieve diverse modulation of the various dimensions of the light field (spectrum, polarization, phase, and amplitude).

[0043] Optionally, when the pre-sensing calculation subunit is used to perform parallel processing on multi-dimensional light field information in the input light field, at least one of the following processing methods may be used: For the amplitude dimension light field information, the amplitude at different spatial positions is regulated by utilizing the change in the metasurface refractive index, reflection, and scattering of the input light field at different spatial positions; the amplitude target value to which the amplitude needs to be regulated can be determined according to the task objectives; For the phase dimension light field information, the phase delay of the input light field is regulated by changing the geometric parameters of the metasurface unit (including but not limited to size, shape, etc.); wherein the phase delay target value to which the phase delay needs to be regulated can be determined according to the task objectives; With respect to the light field information in the polarization dimension, the polarization state of the input light field is regulated by adjusting the anisotropy of the dielectric constant in the metasurface, so that light of different polarizations has specific propagation and transmission characteristics; the target value of the polarization state to which the polarization state needs to be regulated can be determined according to the task objective; For the frequency-dimensional light field information, the frequency selection of the input light field is realized by changing the geometric parameters (including but not limited to size, shape, etc.) of the metasurface unit, so as to realize the regulation of the frequency-dimensional light field information; wherein, the frequency to be selected can be determined according to the task objectives; For the angular dimension light field information, the spatial arrangement of the metasurface units is adjusted to achieve selective regulation of the light wave propagation direction and light wave propagation mode, so as to achieve regulation of the light propagation angle of the input light field; wherein, the light propagation angle target value to which the light propagation angle needs to be regulated can be determined according to the task objective. Optionally, when the sensing chip is used to load the parallel processed light field onto the signal light based on the resonant ring resonance mechanism, it is specifically used to: Determine the bias voltage and modulation method based on the pre-trained network parameters; The light field after parallel processing is modulated according to a modulation method, so as to load the light field after parallel processing onto the signal light.

[0044] According to some embodiments, the bias voltage may be a preset bias voltage, which does not specifically refer to a fixed voltage, and may be determined according to actual application scenarios and tasks. When the pre-trained network structure changes, the corresponding bias voltage and modulation method will also change.

[0045] It should be noted that by setting the bias voltage appropriately, not only can the input signal be modulated, but a series of scene preprocessing tasks can also be completed. This adjustable operation mode can ensure the flexibility and adaptability of the architecture in different application scenarios, and can lay a solid foundation for subsequent complex task processing.

[0046] That is to say, the sensing chip can also determine the scene preprocessing task according to the bias voltage; preprocess the light field after parallel processing according to the scene preprocessing task to obtain the preprocessed light field; and modulate the preprocessed light field according to the modulation method.

[0047] In some embodiments, scene preprocessing tasks include but are not limited to at least one of the following: Feature extraction; Noise suppression.

[0048] It is easy to understand that this architecture modulates the information of natural scenes directly onto coherent light waves such as lasers that are suitable for computing through a "computing-sensing-computing chip cluster", while completing basic feature extraction and other operations. The "computing-sensing-computing chip cluster" works in coordination to capture natural scene information in real time while performing rapid feature extraction and preliminary analysis, which not only supports a variety of perception tasks, but also demonstrates superior performance when processing more complex scene information.

[0049] In summary, the architecture provided by this embodiment not only breaks through the methodological limitations of traditional sensing and computing separation, but also creates a new optical sensing and processing solution. At the same time, by effectively integrating the advantages of computing, sensing and computing chips with large-scale optical computing chips, it can provide a solid foundation for intelligent computing, sensing and computing processing of complex natural scenes in the future, and has important practical significance and broad market prospects in multiple application fields.

[0050] In order to implement the above embodiments, the present disclosure also proposes a large-scale intelligent computing, sensing and optical computing chip system, including: the large-scale intelligent computing, sensing and optical computing chip architecture provided by the above embodiments.

[0051] Optionally, the large-scale intelligent computing, sensing and optical chip system further includes: The optical calculation unit is used to receive the loaded signal light and perform optical calculation on the loaded signal light to obtain an optical calculation result corresponding to the input light field.

[0052] According to some embodiments, Figure 2 This is a schematic diagram of the structure of a large-scale intelligent computing and sensing optical chip system provided by the embodiment of the present disclosure. Figure 2 As shown, the optical computing unit may adopt an optical computing chip, which may be a large-scale optical computing chip.

[0053] In some embodiments, by setting up a large-scale optical computing chip at the back end, it is possible to process the information transmitted by the sensing chip in real time. This large-scale optical computing design improves computing power and enables the architecture to cope with large-scale natural scene intelligent sensing and computing processing needs.

[0054] It should be noted that during the operation of the architecture provided by this embodiment, the information processed by the computing-sensing-computing architecture is coherent light carrying the original scene information, which can directly enter various large-scale optical computing chips that have been proposed to perform more complex and advanced intelligent task calculations. At this time, the advantages of the computing-sensing-computing architecture are revealed, and the multi-dimensional light field information of the natural scene is loaded into the various dimensions of the output coherent light (such as intensity, phase, and spectrum, etc.) through the proposed architecture, without the need for traditional sensor perception, data storage and other links, thus breaking through the bottleneck of photoelectric conversion and digital-to-analog conversion. In addition, by designing the output features, this architecture can efficiently realize various intelligent task processing operations in the optical domain, thereby promoting the further development of optical information processing technology.

[0055] For example, Figure 3 This is a schematic diagram of the structure of a large-scale intelligent computing and sensing optical chip system provided by the embodiment of the present disclosure. Figure 3 As shown in the figure, the multi-dimensional light field information of natural scenes is integrated through pre-sensing calculations, and the sensing and computing chips complete feature extraction and loading. Finally, each dimension of coherent light carries the original scene information, such as intensity and spectrum. The processed information is optimized and extracted, and will eventually be transmitted to large-scale optical computing chips for more complex and advanced intelligent task calculations. This important feature enables the efficient implementation of various intelligent task processing operations in the optical domain through design, thereby promoting the further development of optical information processing technology.

[0056] In summary, the system provided by this embodiment is not only applicable to the fields of image recognition and machine learning, but also shows broad prospects and potential in various applications such as autonomous driving, intelligent monitoring, virtual reality, etc. With the ability to process large-scale tasks, this system can simultaneously process input information from multiple sensors, thereby achieving highly integrated and intelligent scene understanding.

[0057] The collection, storage, use, processing, transmission, provision and disclosure of user personal information involved in this disclosure shall comply with the relevant laws and regulations and shall not violate public order and good morals.

[0058] It should be noted that personal information from users should be collected for legitimate and reasonable purposes and should not be shared or sold outside of these legitimate uses. In addition, such collection / sharing should be carried out after receiving the user's informed consent, including but not limited to notifying the user to read the user agreement / user notice and sign the agreement / authorization including authorization of relevant user information before the user uses the function. In addition, any necessary steps should be taken to protect and safeguard access to such personal information data and ensure that others who have access to personal information data comply with its privacy policy and procedures.

[0059] The present disclosure anticipates providing implementation schemes for users to selectively block the use or access of personal information data. That is, the present disclosure anticipates providing hardware and / or software to prevent or block access to such personal information data. Once the personal information data is no longer needed, risks can be minimized by limiting data collection and deleting the data. In addition, when applicable, such personal information is de-identified to protect the privacy of the user.

[0060] The acquisition, transmission, storage, use, and processing of data in the technical solution disclosed in this disclosure are in compliance with the relevant provisions of national laws and regulations.

[0061] It should be noted that in the embodiments of the present disclosure, certain software, components, models and other existing solutions in the industry may be mentioned, which should be regarded as exemplary. Their purpose is only to illustrate the feasibility of implementing the technical solution of the present application, but it does not mean that the applicant has or will necessarily use the solution.

[0062] In the description of the aforementioned embodiments, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they contradict each other.

[0063] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, "plurality" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0064] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present disclosure includes additional implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present disclosure belong.

[0065] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection with one or more wires (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or otherwise processing in a suitable manner if necessary, and then stored in a computer memory.

[0066] It should be understood that the various parts of the present disclosure can be implemented in hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0067] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0068] In addition, each functional unit in each embodiment of the present disclosure may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0069] The storage medium mentioned above may be a read-only memory, a disk or an optical disk, etc. Although the embodiments of the present disclosure have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations of the present disclosure. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present disclosure.

Claims

1. A large-scale intelligent computing, sensing and optical chip architecture, characterized in that: include: A pre-sensing computing unit and a sensing computing chip cluster, wherein the pre-sensing computing sub-units in the pre-sensing computing unit correspond one to one with the sensing computing chips in the sensing computing chip cluster; wherein, The pre-sensing calculation subunit is used to receive an input light field, and perform parallel processing on multi-dimensional light field information in the input light field according to a task objective to obtain a light field after parallel processing; The sensing and computing chip is used to load the parallel processed light field onto the signal light based on the resonance mechanism of the resonant ring to obtain the loaded signal light, wherein each dimension of the loaded signal light carries the scene information of the input light field.

2. The architecture according to claim 1, characterized in that The architecture also includes: The microlens array is used to input the parallel processed light field into the sensing chip.

3. The architecture according to claim 2, characterized in that: The microlens array includes at least one of the following: Supersurface; Liquid crystal array.

4. The architecture according to claim 1, characterized in that The sensing chip is used to load the parallel processed light field onto the signal light based on the resonance mechanism of the resonant ring, and is specifically used to: Determine the bias voltage and modulation method based on the pre-trained network parameters; The parallel processed light field is modulated according to the modulation mode to load the parallel processed light field onto the signal light.

5. The architecture according to claim 4, characterized in that When the sensing and computing chip is used to modulate the light field after parallel processing according to the modulation mode, it is specifically used to: determining a scene preprocessing task according to the bias voltage; Preprocessing the light field after the parallel processing according to the scene preprocessing task to obtain a preprocessed light field; The preprocessed light field is modulated according to the modulation mode.

6. The architecture according to claim 5, characterized in that The scene preprocessing task includes at least one of the following: Feature extraction; Noise suppression.

7. The architecture according to claim 1, characterized in that: When the pre-sensing calculation subunit is used to perform parallel processing on the multi-dimensional light field information in the input light field, at least one of the following processing methods is adopted: For the amplitude dimension light field information, the amplitude at different spatial positions is regulated by utilizing the change of the metasurface refractive index, reflection and scattering of the input light field at different spatial positions; With respect to the phase dimension light field information, the phase delay of the input light field is regulated by changing the geometric parameters of the metasurface unit; With respect to the light field information in the polarization dimension, the polarization state of the input light field is regulated by adjusting the anisotropy of the dielectric constant in the metasurface, so that light of different polarizations has specific propagation and transmission characteristics; For the frequency-dimensional light field information, the frequency selection of the input light field is achieved by changing the geometric parameters of the metasurface unit, so as to achieve the regulation of the frequency-dimensional light field information; With respect to the angular dimension light field information, the light propagation angle of the input light field is regulated by adjusting the spatial arrangement of the metasurface units.

8. A large-scale intelligent computing, sensing and optical chip system, characterized in that: include: A large-scale intelligent computing sensing optical chip architecture as described in any one of claims 1 to 7.

9. The system according to claim 8, characterized in that The system further comprises: The optical calculation unit is used to receive the loaded signal light and perform optical calculation on the loaded signal light to obtain an optical calculation result corresponding to the input light field.

10. The system according to claim 9, characterized in that The optical computing unit adopts an optical computing chip.

Images