Display device, controller, and current sensing integrated circuit

Abstract

The invention discloses a display device, a controller and a current sensing integrated circuit. The display device includes: a display panel including a plurality of pixels; a power management circuit supplying a power supply voltage to the plurality of pixels through a power supply line; a current sensing circuit generating a digital current code by sensing a panel current flowing through the power line; and a controller determining a peak gray level and a panel load by analyzing input image data, the controller determining a voltage level of the power supply voltage based on the peak gray level and the panel load, and the controller setting a transition time based on the voltage level of the power supply voltage, the panel current is converted to the digital current code during the conversion time.

Description

Technical Field

[0001] Embodiments of the present invention relate to a display device, and more particularly, to a controller, a current sensing integrated circuit, and a display device including the controller and the current sensing integrated circuit. Background Art

[0002] In order to reduce power consumption or control the brightness of the display panel, the display device may include a current sensing circuit for sensing the current flowing through the display panel or the panel current. The current sensing circuit may convert the panel current as an analog signal into a digital current code. Generally speaking, the conversion time for converting the panel current into the digital current code may be fixed or constant. Summary of the invention

[0003] Some embodiments provide a display device that sets a conversion time of a current sensing circuit based on a voltage level of a power supply voltage.

[0004] Some embodiments provide a controller that sets a switching time of a current sensing circuit based on a voltage level of a power supply voltage.

[0005] Some embodiments provide a current sensing integrated circuit having a transition time set based on a voltage level of a power supply voltage.

[0006] According to an embodiment, a display device is provided, comprising: a display panel comprising a plurality of pixels; a power management circuit, supplying a power supply voltage to the plurality of pixels through a power supply line; a current sensing circuit, generating a digital current code by sensing a panel current flowing through the power supply line; and a controller, determining a peak grayscale and a panel load by analyzing input image data, the controller determining a voltage level of the power supply voltage based on the peak grayscale and the panel load, and the controller setting a conversion time based on the voltage level of the power supply voltage, during which the panel current is converted into the digital current code.

[0007] In an embodiment, the controller may set the conversion time in such a manner that as the voltage level of the power supply voltage increases, the conversion time decreases, and as the voltage level of the power supply voltage decreases, the conversion time increases.

[0008] In an embodiment, the display device may further include: an impact current detection circuit that generates an alarm signal by comparing the digital current code with an impact current code corresponding to an impact reference current.

[0009] In an embodiment, the controller may control the power management circuit to reduce the voltage level of the power supply voltage in response to the alarm signal.

[0010] In an embodiment, the controller may be implemented as a controller integrated circuit, and the current sensing circuit and the inrush current detection circuit may be included in a current sensing integrated circuit separate from the controller integrated circuit.

[0011] In an embodiment, the current sensing integrated circuit may include a conversion time setting register for setting the conversion time, and the controller may set the conversion time by changing a value of the conversion time setting register via inter-integrated circuit (I2C) communication between the controller integrated circuit and the current sensing integrated circuit.

[0012] In an embodiment, the controller may include: a peak grayscale determination circuit, which determines the peak grayscale by analyzing the input image data; a panel load determination circuit, which determines the panel load by analyzing the input image data; a power supply voltage determination circuit, which determines the voltage level of the power supply voltage based on the peak grayscale and the panel load; a transition time determination circuit, which determines the transition time based on the voltage level of the power supply voltage; and a power supply voltage control circuit, which provides a voltage code corresponding to the voltage level of the power supply voltage to the power management circuit.

[0013] In an embodiment, the peak gray level determination circuit may determine a maximum gray level among a plurality of gray levels represented by the input image data for the plurality of pixels as the peak gray level.

[0014] In an embodiment, the panel load determination circuit may calculate the panel load by dividing a sum of the plurality of gray levels represented by the input image data for the plurality of pixels by a maximum gray level sum.

[0015] In an embodiment, the power supply voltage determination circuit may increase the voltage level of the power supply voltage as the peak gray level increases, and may increase the voltage level of the power supply voltage as the panel load increases.

[0016] In an embodiment, the conversion time determination circuit may decrease the conversion time as the voltage level of the power supply voltage increases, and may increase the conversion time as the voltage level of the power supply voltage decreases.

[0017] In an embodiment, the controller may further include: a power supply voltage-conversion time lookup table storing the conversion time corresponding to the voltage level of the power supply voltage, and the conversion time determination circuit may use the power supply voltage-conversion time lookup table to determine the conversion time corresponding to the voltage level of the power supply voltage.

[0018] In an embodiment, the power supply voltage control circuit may reduce the voltage code provided to the power management circuit in response to an alarm signal from an inrush current detection circuit to reduce the voltage level of the power supply voltage.

[0019] In an embodiment, the controller may include: a global current management circuit that receives the digital current code from the current sensing circuit, the global current management circuit determines a target current code corresponding to the panel load, and the global current management circuit controls the panel current by comparing the digital current code and the target current code.

[0020] In an embodiment, the controller may include: an overcurrent protection circuit, receiving the digital current code from the current sensing circuit, the overcurrent protection circuit comparing the digital current code with a reference overcurrent code, and the overcurrent protection circuit controlling the power management circuit to stop supplying the power supply voltage when the digital current code is higher than the reference overcurrent code.

[0021] According to an embodiment, a controller of a display device includes: a peak grayscale determination circuit, which determines a peak grayscale by analyzing input image data; a panel load determination circuit, which determines a panel load of a display panel for the display device by analyzing the input image data; a power supply voltage determination circuit, which determines a voltage level of a power supply voltage supplied to a plurality of pixels of the display device based on the peak grayscale and the panel load; a conversion time determination circuit, which determines a conversion time based on the voltage level of the power supply voltage and provides the conversion time to a current sensing circuit that senses a panel current, during which the panel current is converted into a digital current code; and a power supply voltage control circuit, which provides a voltage code corresponding to the voltage level of the power supply voltage to a power management circuit.

[0022] In an embodiment, the conversion time determination circuit may decrease the conversion time as the voltage level of the power supply voltage increases, and may increase the conversion time as the voltage level of the power supply voltage decreases.

[0023] In an embodiment, the controller may be implemented as a controller integrated circuit, the current sensing circuit may be included in a current sensing integrated circuit separate from the controller integrated circuit, and the conversion time determination circuit may provide the conversion time to the current sensing circuit through I2C communication between the controller integrated circuit and the current sensing integrated circuit.

[0024] In an embodiment, the controller may receive the digital current code from the current sensing circuit through the I2C communication. In such an embodiment, the controller may further include: a global current management circuit that determines a target current code corresponding to the panel load and controls the panel current by comparing the digital current code with the target current code; and an overcurrent protection circuit that compares the digital current code with a reference overcurrent code and controls the power management circuit to stop supplying the power supply voltage when the digital current code is higher than the reference overcurrent code.

[0025] According to an embodiment, a current sensing integrated circuit of a display device includes: a conversion time setting register storing a conversion time; a current sensing circuit converting a panel current of the display device into a digital current code during the conversion time; and a surge current detection circuit generating an alarm signal by comparing the digital current code with a surge current code corresponding to a surge reference current. In such an embodiment, the conversion time of the conversion time setting register is set based on a voltage level of a power supply voltage supplied to a plurality of pixels of the display device.

[0026] As described above, in embodiments of the display device, controller, and current sensing integrated circuit, the voltage level of the power supply voltage can be determined based on the peak grayscale level and the panel load, and a conversion time during which the panel current is converted to a digital current code can be set based on the voltage level of the power supply voltage. Therefore, the inrush current can be detected quickly and / or the accuracy of the current sensing operation can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0028] Figure 1 is a block diagram showing a display device according to an embodiment.

[0029] Figure 2 is a circuit diagram showing an example of a pixel included in a display device according to an embodiment.

[0030] Figure 3 is a diagram showing an example of a sensed current represented by a digital current code when a current sensing circuit has different switching times.

[0031] Figure 4 is a graph showing an example of the response time of an inrush current detection circuit when the current sensing circuit has different transition times.

[0032] Figure 5is a diagram for describing an example of an inrush current detection error in a case where a current sensing circuit has substantially the same transition time with respect to different voltage levels of a power supply voltage.

[0033] Figure 6 is a diagram showing an example of an inrush current detection error with respect to a voltage level of a power supply voltage.

[0034] Figure 7 : is a diagram showing an example of a transition time with respect to a voltage level of a power supply voltage in a display device according to an embodiment.

[0035] Figure 8 is a diagram for describing an example of an inrush current detection error in a display device according to an embodiment.

[0036] Fig. 9 is a block diagram showing a controller according to an embodiment.

[0037] Fig.10 is a diagram for describing an example of the voltage level of the power supply voltage determined by the power supply voltage determination circuit.

[0038] Fig.11 is a timing chart for describing an example of the timing of the power supply voltage determination operation and the conversion time determination operation.

[0039] Fig.12 is a block diagram illustrating a current sensing integrated circuit according to an embodiment.

[0040] Fig.13 is a block diagram illustrating an electronic device including a display device according to an embodiment. DETAILED DESCRIPTION

[0041] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments are shown. However, the present invention may be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. The same reference numerals represent the same elements throughout.

[0042] It will be understood that when an element is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.

[0043] It will be understood that, although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of this article, the "first element", "component", "region", "layer" or "part" discussed below may be referred to as a second element, component, region, layer or part.

[0044] The terms used herein are only used for the purpose of describing specific embodiments, and are not intended to be restrictive. As used herein, "one", "a kind of", "said (the)" and "at least one (kind)" do not represent quantitative restrictions, and are intended to include singular and plural numbers, unless the context clearly states otherwise. Therefore, in the claims, the reference to "one" element is followed by the reference to "said (the)" element, including one element and multiple elements. For example, "an element" has the same meaning as "at least one element", unless the context clearly states otherwise. "At least one (kind)" should not be interpreted as limiting "one" or "a kind". "Or" means "and / or". As used herein, the term "and / or" includes any and all combinations of one or more related listed items. It should also be understood that the term "includes" and / or "contains" or "contains" and / or "has", when used in this specification, specifies the existence of stated features, regions, integers, steps, operations, elements and / or components, but does not exclude the existence or addition of one or more other features, regions, integers, steps, operations, elements, components and / or their groups.

[0045] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. It will be understood that relative terms are intended to cover different orientations of the device in addition to the orientation depicted in the accompanying drawings. For example, if the device is turned over in one drawing, the element described as being on the "lower" side of the other elements will subsequently be positioned on the "upper" side of the other elements. Therefore, the exemplary term "lower" can cover both "lower" and "upper" orientations, depending on the specific orientation of the accompanying drawings. Similarly, if the device is turned over in one drawing, the element described as being "below" or "below" the other elements will subsequently be positioned "above" the other elements. Therefore, the exemplary terms "below..." or "below..." can cover both upper and lower orientations.

[0046] As used herein, "about" or "approximately" includes the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0047] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and the present disclosure, and should not be interpreted in an idealized or overly formal sense unless explicitly defined herein.

[0048] Hereinafter, embodiments of the present invention will be explained in detail with reference to the accompanying drawings.

[0049] Figure 1 is a block diagram showing a display device according to an embodiment; Figure 2 is a circuit diagram showing an example of a pixel included in a display device according to an embodiment; Figure 3 is a diagram showing an example of a sensed current represented by a digital current code in a case where a current sensing circuit has different switching times; Figure 4 is a diagram showing an example of a response time of an inrush current detection circuit in a case where the current sensing circuit has different switching times; Figure 5 is a diagram for describing an example of an inrush current detection error in a case where a current sensing circuit has substantially the same transition time with respect to different voltage levels of a power supply voltage; Figure 6 is a diagram showing an example of an inrush current detection error with respect to a voltage level of a power supply voltage; Figure 7 is a diagram showing an example of a conversion time with respect to a voltage level of a power supply voltage in a display device according to an embodiment; and Figure 8 is a diagram for describing an example of an inrush current detection error in a display device according to an embodiment.

[0050] Reference Figures 1 to 8According to an embodiment, the display device 100 may include: a display panel 110 including a plurality of pixels PX; a power management circuit 140 supplying a first power voltage ELVDD (e.g., a high power voltage) to the plurality of pixels PX through a power line PSL; a current sensing circuit 150 sensing a panel current flowing through the power line PSL; and a controller 180 controlling the operation of the display device 100. In some embodiments, the display device 100 may further include: a data driver 120 providing a data signal DS to the plurality of pixels PX; a scan driver 130 providing a scan signal SC to the plurality of pixels PX; and an inrush current detection circuit 160 detecting an inrush current occurring in the display panel 110.

[0051] The display panel 110 may include a plurality of data lines, a plurality of scan lines, and a plurality of pixels PX coupled to the plurality of data lines and the plurality of scan lines. Figure 2 As shown in , each pixel PX may include a first transistor T1, a second transistor T2, a storage capacitor CST, and a light emitting element EL.

[0052] The storage capacitor CST may store the data signal DS transmitted through the data line DL and the second transistor T2. In some embodiments, the storage capacitor CST may include a first electrode connected to the gate of the first transistor T1 and a second electrode connected to a node between the first transistor T1 and the light emitting element EL.

[0053] The first transistor T1 may generate a driving current based on the data signal DS stored in the storage capacitor CST. In some embodiments, the first transistor T1 may include a gate connected to a first electrode of the storage capacitor CST, a first terminal connected to a power line PSL transmitting a first power supply voltage ELVDD, and a second terminal connected to a second electrode of the storage capacitor CST and the light emitting element EL.

[0054] The second transistor T2 may transmit the data signal DS of the data line DL to the first electrode of the storage capacitor CST in response to the scan signal SC. In some embodiments, the second transistor T2 may include a gate receiving the scan signal SC, a first terminal connected to the data line DL, and a second terminal connected to the first electrode of the storage capacitor CST.

[0055] The light emitting element EL may emit light based on the driving current generated by the first transistor T1. In an embodiment, for example, the light emitting element EL may be an organic light emitting diode (OLED), but is not limited thereto. In other embodiments, for example, the light emitting element EL may be a nano light emitting diode (NED), a quantum dot (QD) light emitting diode, a micro light emitting diode, an inorganic light emitting diode, or any other suitable light emitting element. In some embodiments, the light emitting element EL may include an anode connected to the second terminal of the first transistor T1 and the second electrode of the storage capacitor CST, and a cathode connected to a line transmitting a second power supply voltage ELVSS (e.g., a low power supply voltage).

[0056] Although Figure 2 An embodiment of a pixel PX including two transistors and one capacitor is shown, but the pixel PX of the display device 100 according to the embodiment is not limited to Figure 2 In other embodiments, the pixel PX may include three or more transistors and / or two or more capacitors.

[0057] Return to reference Figure 1 , the data driver 120 may generate a data signal DS based on the output image data ODAT and the data control signal DCTRL received from the controller 180, and may provide the data signal DS to a plurality of pixels PX through a plurality of data lines. In some embodiments, the data control signal DCTRL may include, but is not limited to, an output data enable signal, a horizontal start signal, and a load signal. In some embodiments, the controller 180 may be implemented as follows Figure 1 , and the data driver 120 may be implemented as a data driver IC different from the controller IC 190. In other embodiments, the data driver 120 and the controller 180 may be implemented as a single IC, and the single IC may be referred to as a timing controller embedded data driver (TED) IC.

[0058] The scan driver 130 may generate a scan signal SC based on a scan control signal SCTRL received from the controller 180, and may sequentially provide the scan signal SC to a plurality of pixels PX row by row through a plurality of scan lines. In some embodiments, the scan control signal SCTRL may include, but is not limited to, a scan start signal and a scan clock signal. In some embodiments, the scan driver 130 may be integrated or formed in the display panel 110. In other embodiments, the scan driver 130 may be implemented as one or more scan driver ICs.

[0059] The power management circuit 140 may supply the first power supply voltage ELVDD to the plurality of pixels PX through the power supply line PSL. In some embodiments, the power management circuit 140 may also generate a second power supply voltage ELVSS supplied to the plurality of pixels PX, an analog power supply voltage supplied to the data driver 120, a high gate voltage and a low gate voltage supplied to the scan driver 130, and the like. In some embodiments, the power management circuit 140 may receive a voltage code VC representing a voltage level of the first power supply voltage ELVDD from the controller 180, and may generate a first power supply voltage ELVDD having a voltage level corresponding to the voltage code VC. In addition, in some embodiments, the power management circuit 140 may be implemented as a power management integrated circuit (PMIC), and may receive the voltage code VC from the controller 180 through inter-integrated circuit (I2C) communication between the controller IC 190 and the PMIC, but is not limited thereto. In other embodiments, the power management circuit 140 may be included in the controller 180.

[0060] The current sensing circuit 150 may generate a digital current code DCC by sensing a panel current flowing through a power line PSL transmitting a first power voltage ELVDD. Here, the panel current may be a current flowing through the power line PSL, and may correspond to the sum of the driving currents of the light emitting elements EL of the plurality of pixels PX provided to the display panel 110. In addition, the current sensing circuit 150 may convert the panel current into a digital current code DCC during a conversion time CT set by the controller 180. Here, the conversion time CT for converting the panel current into the digital current code DCC may include a sampling time for sampling a sensing voltage corresponding to the panel current, and an analog-to-digital conversion (ADC) time for converting the sampled sensing voltage analog-to-digital into the digital current code DCC.

[0061] The rush current detection circuit 160 may generate an alarm signal ALERT by detecting a rush current occurring in the display panel 110, and may provide the alarm signal ALERT to the controller 180. Here, the rush current may be a current of the display panel 110 that is greater than a rush reference current that excessively increases the power consumption of the display device 100. In an embodiment, when the rush current is detected, the display device 100 may reduce the first power supply voltage ELVDD (e.g., to a predetermined voltage level) to reduce the current of the display panel 110 and the power consumption of the display device 100. In some embodiments, the rush current detection circuit 160 may compare the digital current code DCC generated by the current sensing circuit 150 with the rush current code corresponding to the rush reference current, and when the digital current code DCC is greater than or equal to the rush current code, may provide the alarm signal ALERT to the controller 180. The controller 180 may control the power management circuit 140 to reduce the voltage level of the first power supply voltage ELVDD (e.g., to a predetermined voltage level) in response to the alarm signal ALERT.

[0062] In some embodiments, Figure 1 As shown in , the current sensing circuit 150 and the inrush current detection circuit 160 may be included or formed in a current sensing IC 170 different from the controller IC 190 of the controller 180. In some embodiments, the current sensing circuit 150 may receive the conversion time CT from the controller 180 through I2C communication between the controller IC 190 and the current sensing IC 170, and may transmit the digital current code DCC to the controller 180 through I2C communication. In such an embodiment, when the inrush current detection circuit 160 is formed in a current sensing IC 170 different from the controller IC 190, the inrush current detection operation of the inrush current detection circuit 160 may be performed quickly. In some embodiments, the inrush current detection circuit 160 may transmit the alarm signal ALERT to the controller 180 through, but not limited to, general purpose input output (GPIO) communication.

[0063] The controller 180 (e.g., a timing controller (TCON)) may receive input image data IDAT and a control signal CTRL from an external host processor (e.g., an application processor (AP), a graphics processing unit (GPU), or a graphics card). In some embodiments, the input image data IDAT may be RGB image data including red image data, green image data, and blue image data. In addition, in some embodiments, the control signal CTRL may include, but is not limited to, a vertical synchronization signal, a horizontal synchronization signal, an input data enable signal, a main clock signal, and the like. The controller 180 may generate a data control signal DCTRL, a scan control signal SCTRL, and output image data ODAT based on the control signal CTRL and the input image data IDAT. The controller 180 may control the operation of the data driver 120 by providing the data control signal DCTRL and the output image data ODAT to the data driver 120, and may control the operation of the scan driver 130 by providing the scan control signal SCTRL to the scan driver 130.

[0064] In the display device 100 according to the embodiment, the controller 180 may determine the peak gray level and the panel load by analyzing the input image data IDAT, and may determine the voltage level of the first power supply voltage ELVDD based on the peak gray level and the panel load. In some embodiments, the controller 180 may determine the maximum gray level among the plurality of gray levels represented by the input image data IDAT of the plurality of pixels PX as the peak gray level, and may calculate the panel load by dividing the sum of the plurality of gray levels of the plurality of pixels PX by the maximum gray level sum (e.g., the sum of 255 gray levels). In an embodiment, as described below with reference to Fig.10 As described, the controller 180 can increase the voltage level of the first power supply voltage ELVDD as the peak gray level increases, and can increase the voltage level of the first power supply voltage ELVDD as the panel load increases. Since the voltage level of the first power supply voltage ELVDD is adjusted based on the peak gray level and the panel load, the power consumption of the display device 100 can be reduced, and the image quality of the display device 100 is not deteriorated.

[0065] Furthermore, in the display device 100 according to the embodiment, the controller 180 may set the conversion time CT of the current sensing circuit 150 based on the voltage level of the first power voltage ELVDD. As the conversion time CT increases, the ripple of the sensing current represented by the digital current code DCC may decrease. Figure 32 shows a sensed current 210 represented by a digital current code DCC generated by a current sensing circuit 150 having a transition time CT of about 100 microseconds (μs) and a sensed current 230 represented by a digital current code DCC generated by a current sensing circuit 150 having a transition time CT of about 200 μs when a panel current of about 100 milliamperes (mA) flows through a power line PSL. Figure 3 As shown in , when the current sensing circuit 150 has a conversion time CT of about 100 μs, the sensing current 210 represented by the digital current code DCC can fluctuate within a variation range of about 38 mA. However, when the conversion time CT increases from about 100 μs to about 200 μs, the variation range of the sensing current 230 represented by the digital current code DCC can be reduced from about 38 mA to about 20 mA, and the ripple of the sensing current 230 can be reduced. Therefore, when the conversion time CT of the current sensing circuit 150 increases, the ripple of the sensing current represented by the digital current code DCC can be reduced, and the accuracy of the current sensing operation of the current sensing circuit 150 can be improved.

[0066] However, when the conversion time CT of the current sensing circuit 150 increases, the rush current detection operation of the rush current detection circuit 160 may be delayed, and the power consumption of the display device 100 may increase. Figure 4 The panel current 310, the pulse 330 of the alarm signal ALERT, and the response time RT1 of the inrush current detection circuit 160 are shown when the conversion time CT is about 80 μs, and the panel current 320, the pulse 340 of the alarm signal ALERT, and the response time RT2 of the inrush current detection circuit 160 are also shown when the conversion time CT is about 320 μs. Figure 4 As shown in , when the conversion time CT is about 80 μs, the response time RT1 of the rush current detection circuit 160 may be about 1.7 ms. However, when the conversion time CT is about 320 μs, the response time RT2 of the rush current detection circuit 160 may be about 1.94 ms. That is, as the conversion time CT increases, the response times RT1 and RT2 of the rush current detection circuit 160 may increase, the panel currents 310 and 320 may increase, and the power consumption of the display device 100 may increase.

[0067] Furthermore, when the first power voltage ELVDD has a high voltage level (eg, a voltage level higher than a predetermined voltage), power consumption of the display device 100 caused by an increase in the conversion time CT may further increase. Figure 5The panel current 350 when the first power supply voltage ELVDD is about 27V and the panel current 360 when the first power supply voltage ELVDD is about 22V are shown in the case where the current sensing circuit 150 has substantially the same conversion time CT and the panel current increases at the first time point TP1. Figure 5 In FIG. 1 , the points on the panel currents 350 and 360 may indicate the time points at which the inrush current detection operation is performed. Figure 5 As shown in , when the first power supply voltage ELVDD is about 22 volts (V), the panel current 360 may increase relatively slowly, and at the third time point TP3 when the impact current greater than the impact reference current RRC is detected, the impact current detection error DE2 corresponding to the difference between the impact reference current RRC and the panel current 360 may be relatively small. However, when the first power supply voltage ELVDD is about 27 V, the panel current 350 may increase relatively quickly, and at the second time point TP2 when the impact current greater than the impact reference current RRC is detected, the impact current detection error DE1 corresponding to the difference between the impact reference current RRC and the panel current 350 is relatively large. That is, as Figure 5 and Figure 6 As shown in , as the voltage level of the first power supply voltage ELVDD increases, the rush current detection error DE corresponding to the rush reference current RRC and the difference between the panel currents 350 and 360 may increase. That is, when the first power supply voltage ELVDD has a high voltage level, the rush current is detected after the panel current 350 becomes a rush current having a large difference with respect to the rush reference current RRC, and thus the power consumption of the display device 100 may increase.

[0068] In the display device 100 according to the embodiment, as Figure 7 As shown in , the controller 180 may set the conversion time CT of the current sensing circuit 150 in such a manner that the conversion time CT of the current sensing circuit 150 decreases as the voltage level of the first power voltage ELVDD increases and increases as the voltage level of the first power voltage ELVDD decreases. In some embodiments, as shown below with reference to Fig.12 As described, the current sensing IC 170 may include a conversion time setting register 155 for setting the conversion time CT, and the controller 180 may set the conversion time CT of the current sensing circuit 150 in a manner of changing the value of the conversion time setting register 155 through I2C communication between the controller IC 190 and the current sensing IC 170. Figure 7 An embodiment in which the conversion time CT decreases in linear proportion to an increase in the voltage level of the first power voltage ELVDD is shown, in other embodiments, the conversion time CT may decrease in nonlinear proportion to an increase in the voltage level of the first power voltage ELVDD.

[0069] As described above, in the display device 100 according to the embodiment, when the first power voltage ELVDD has a high voltage level, the conversion time CT of the current sensing circuit 150 decreases as the voltage level of the first power voltage ELVDD increases, so that the rush current detection operation of the rush current detection circuit 160 can be performed quickly, which can reduce Figure 5 The rush current detection error DE1 shown in FIG. 1 is reduced, and the power consumption of the display device 100 can be reduced. Figure 8 FIG. 3 shows a panel current 350′ of the display device 100 according to an embodiment when the first power supply voltage ELVDD is about 27V and a panel current 360 of the display device 100 according to an embodiment when the first power supply voltage ELVDD is about 22V. Figure 8 As shown in FIG. 1 , when the first power supply voltage ELVDD is about 27V, the conversion time CT1 of the current sensing circuit 150 can be shorter than the conversion time CT2 of the current sensing circuit 150 when the first power supply voltage ELVDD is about 22V. Therefore, when the first power supply voltage ELVDD is about 27V, even if the panel current 350' increases rapidly, Figure 5 Compared with the rush current detection error DE1 shown in , the rush current detection error DE1' corresponding to the difference between the rush reference current RRC and the panel current 350' at the second time point TP2' at which the rush current greater than the rush reference current RRC is detected can be reduced. That is, in the case where the first power supply voltage ELVDD has a high voltage level, the conversion time CT of the current sensing circuit 150 can be reduced, the rush current detection operation can be quickly performed to reduce the rush current detection error DE1', and the power consumption of the display device 100 can be reduced.

[0070] In addition, in the display device 100 according to the embodiment, since the conversion time CT of the current sensing circuit 150 increases as the voltage level of the first power voltage ELVDD decreases, in the case where the first power voltage ELVDD has a low voltage level (that is, a voltage lower than a predetermined voltage), as described above with reference to Figure 3 As described above, the ripple of the sensing current represented by the digital current code DCC generated by the current sensing circuit 150 can be reduced, and the accuracy of the current sensing operation of the current sensing circuit 150 can be improved.

[0071] As described above, in the display device 100 according to the embodiment, the voltage level of the first power supply voltage ELVDD may be determined based on the peak gray level and the panel load, and the conversion time CT of the current sensing circuit 150 may be set based on the voltage level of the first power supply voltage ELVDD. Therefore, in the case where the first power supply voltage ELVDD has a relatively high voltage level, the conversion time CT of the current sensing circuit 150 may be reduced, the rush current detection operation may be performed quickly, and the power consumption of the display device 100 may be reduced. In addition, in the case where the first power supply voltage ELVDD has a relatively low voltage level, the conversion time CT of the current sensing circuit 150 may be increased, and the accuracy of the current sensing operation of the current sensing circuit 150 may be improved.

[0072] Fig. 9 is a block diagram showing a controller according to an embodiment, Fig.10 is a diagram for describing an example of a voltage level of a power supply voltage determined by a power supply voltage determination circuit, and Fig.11 is a timing chart for describing an example of the timing of the power supply voltage determination operation and the conversion time determination operation.

[0073] Reference Figures 9 to 11 , the controller 180 according to the embodiment may include a peak gray level determination circuit 181, a panel load determination circuit 182, a power supply voltage determination circuit 183, a conversion time determination circuit 184, and a power supply voltage control circuit 186. In some embodiments, the controller 180 may also include a power supply voltage-conversion time lookup table (ELVDD-CT LUT) 185, a global current management circuit GCM, and an overcurrent protection circuit OCP. In addition, in some embodiments, the controller 180 may be implemented as a controller IC 190 that is different (or separate) from the current sensing IC 170 and the PMIC.

[0074] The peak gray level determination circuit 181 may determine the peak gray level PG by analyzing the input image data IDAT. In some embodiments, the peak gray level determination circuit 181 may determine the maximum gray level among the plurality of gray levels represented by the input image data IDAT of the plurality of pixels as the peak gray level PG. For example, when the input image data IDAT represents gray levels of 10 to 100 in one frame, the peak gray level determination circuit 181 may determine the gray level of 100, which is the maximum gray level, as the peak gray level PG.

[0075] The panel load determination circuit 182 may determine the panel load PL by analyzing the input image data IDAT. In some embodiments, the panel load determination circuit 182 may calculate the panel load PL by dividing the sum of multiple gray levels represented by the input image data IDAT of multiple pixels by the maximum gray level sum (e.g., the sum of 255 gray levels). In one case, for example, in the case where the input image data IDAT represents 255 gray levels with respect to all pixels, the panel load determination circuit 182 may determine the panel load PL to be 1 (or 100%). In another case, for example, in the case where the input image data IDAT represents 100 gray levels for all pixels, the panel load determination circuit 182 may determine the panel load PL to be approximately 0.39 (or approximately 39%). In another case, for example, in the case where the input image data IDAT represents 0 gray levels for all pixels, the panel load determination circuit 182 may determine the panel load PL to be 0 (or 0%).

[0076] The power supply voltage determination circuit 183 may determine the power supply voltage ELVDD (or Figure 2 In some embodiments, the power supply voltage determination circuit 183 may increase the voltage level VL of the power supply voltage ELVDD as the peak gray level PG increases, and may increase the voltage level VL of the power supply voltage ELVDD as the panel load PL increases. Fig.10 A first graph 410 of the power supply voltage ELVDD with respect to the peak gray level PG when the panel load PL is a maximum load (e.g., 1 or 100%) and a second graph 420 of the power supply voltage ELVDD with respect to the peak gray level PG when the panel load PL is a minimum load (e.g., 0 or 0%) are shown. Under the same panel load PL, as the peak gray level PG increases from the minimum gray level (e.g., 0 gray level) to the maximum gray level (e.g., 255 gray level), the voltage level VL of the power supply voltage ELVDD may gradually increase as in each of the first graph 410 and the second graph 420. In addition, at the same peak gray level PG, as the panel load PL increases from the minimum load to the maximum load, the voltage level VL of the power supply voltage ELVDD may increase from a point of the second graph 420 to a point of the first graph 410. That is, as each of the peak gray level PG and the panel load PL increases, the power voltage may be increased from a minimum voltage level corresponding to the minimum gray level and the minimum load to a maximum voltage level corresponding to the maximum gray level and the maximum load within the power voltage range ELVDD_RANGE.

[0077] The power supply voltage determination circuit 183 may provide the voltage level VL of the power supply voltage ELVDD determined based on the peak gray level PG and the panel load PL to the power supply voltage control circuit 186. The power supply voltage control circuit 186 may provide the power management circuit 140 with a voltage code VC corresponding to the voltage level VL of the power supply voltage ELVDD determined by the power supply voltage determination circuit 183. In some embodiments, the power management circuit 140 may be implemented as a PMIC, and the power supply voltage control circuit 186 may provide the voltage code VC to the power management circuit 140 through I2C communication between the controller IC 190 and the PMIC, but is not limited thereto. In some embodiments, the power supply voltage determination circuit 183 may provide the voltage level VL of the power supply voltage ELVDD determined based on the peak gray level PG and the panel load PL to the conversion time determination circuit 184.

[0078] The conversion time determination circuit 184 may determine the conversion time CT based on the voltage level VL of the power voltage ELVDD, during which the panel current is converted into the digital current code DCC. In an embodiment, for example, the conversion time determination circuit 184 may reduce the conversion time CT as the voltage level VL of the power voltage ELVDD increases, and may increase the conversion time CT as the voltage level VL of the power voltage ELVDD decreases. Therefore, when the voltage level VL of the power voltage ELVDD is relatively high, the impact current detection operation may be performed quickly, and when the voltage level VL of the power voltage ELVDD is relatively low, the accuracy of the current sensing operation may be improved. In some embodiments, the controller 180 may further include an ELVDD-CT LUT 185 storing the conversion time CT corresponding to the voltage level VL of the power voltage ELVDD, and the conversion time determination circuit 184 may determine the conversion time CT corresponding to the voltage level VL of the power voltage ELVDD using the ELVDD-CT LUT 185.

[0079] The conversion time determination circuit 184 may provide the current sensing IC 170 with a conversion time CT determined based on the voltage level VL of the power supply voltage ELVDD. In some embodiments, the conversion time determination circuit 184 may transmit the conversion time CT to the current sensing IC 170 through I2C communication between the controller IC 190 and the current sensing IC 170, but is not limited thereto. The current sensing IC 170 may convert the panel current into a digital current code DCC during the conversion time CT set by the conversion time determination circuit 184, and may transmit the digital current code DCC representing the sensed current to the controller IC 190 through I2C communication.

[0080] The controller IC 190 may include a global current management circuit GCM that receives a digital current code DCC. The global current management circuit GCM may determine a target current code representing a target current based on the panel load PL, and may compare the digital current code DCC representing a sensed current with the target current code representing the target current. The global current management circuit GCM may adjust the input image data IDAT based on a comparison result between the digital current code DCC and the target current code. In an embodiment, for example, when the digital current code DCC is higher than the target current code, the global current management circuit GCM may reduce a plurality of gray levels represented by the input image data IDAT. Therefore, when the panel current increases as the temperature of the display panel increases, the global current management circuit GCM may reduce the panel current by adjusting the input image data IDAT, thereby effectively preventing an increase in brightness due to an increase in the temperature of the display panel.

[0081] The controller IC 190 may include an overcurrent protection circuit OCP that receives the digital current code DCC. The overcurrent protection circuit OCP may compare the digital current code DCC representing the sensed current with a reference overcurrent code representing a reference overcurrent. When the digital current code DCC is higher than the reference overcurrent code, the overcurrent protection circuit OCP may control the power management circuit 140 to stop supplying the power supply voltage ELVDD. Therefore, when an overcurrent occurs in the display device, the supply of the power supply voltage ELVDD may be stopped, thereby effectively preventing damage to the display device.

[0082] In some embodiments, the operation of determining the power supply voltage ELVDD by the power supply voltage determination circuit 183 and the operation of determining the conversion time CT by the conversion time determination circuit 184 may be performed in each frame period FP. Fig.11 As shown in, each frame period FP defined by the vertical synchronization signal VSYNC may include a blanking period BP in which the data signal is not provided to the plurality of pixels and an active period AP in which the data signal is provided to the plurality of pixels, and the operation of determining the power supply voltage ELVDD and the operation of determining the conversion time CT may be sequentially performed in the blanking period BP of each frame period FP.

[0083] In addition, in some embodiments, the current sensing IC 170 may generate an alarm signal ALERT by detecting the inrush current of the display panel, and the alarm signal ALERT may be provided to the controller IC 190. In some embodiments, the current sensing IC 170 (e.g., the inrush current detection circuit 160) may transmit the alarm signal ALERT to the controller IC 190 through GPIO communication, but is not limited thereto. In response to the alarm signal ALERT, the power supply voltage control circuit 186 may reduce the voltage code VC provided to the power management circuit 140 (e.g., reduced to a predetermined voltage code representing a predetermined voltage level) to reduce the voltage level of the power supply voltage ELVDD. The power management circuit 140 may reduce the voltage level of the power supply voltage ELVDD in response to the reduced voltage code VC, and may supply the power supply voltage ELVDD having the reduced voltage level to the display panel. Therefore, the panel current of the display panel may be reduced, and the power consumption of the display device may be reduced.

[0084] Fig.12 is a block diagram showing a current sensing IC according to an embodiment.

[0085] Reference Fig.12 , an embodiment of the current sensing IC 170 may include a transition time setting register 155 , a current sensing circuit 150 , and an inrush current detection circuit 160 .

[0086] The conversion time setting register 155 may store a conversion time CT during which the panel current PC of the display panel 110 is converted into the digital current code DCC. The controller IC 190 may determine the conversion time CT of the current sensing circuit 150 based on the voltage level of the power supply voltage ELVDD supplied to the plurality of pixels of the display panel 110, and may set the conversion time CT of the current sensing circuit 150 by changing the value of the conversion time setting register 155 through I2C communication.

[0087] The current sensing circuit 150 may convert the panel current PC flowing through the power line PSL transmitting the power supply voltage ELVDD into a digital current code DCC during the conversion time CT stored in the conversion time setting register 155. In some embodiments, the current sensing circuit 150 may perform a sampling operation of sampling the sensing voltage VSENSE between two opposite ends of the sensing resistor RSENSE connected in the power line PSL. Since the panel current PC flows through the sensing resistor RSENSE, the sensing voltage VSENSE across the sensing resistor RSENSE may correspond to the panel current PC of the display panel 110. In addition, the current sensing circuit 150 may perform an analog-to-digital conversion (ADC) operation on the sampled sensing voltage VSENSE to generate a digital current code DCC representing the sensing current. Therefore, the conversion time CT during which the panel current PC is converted into the digital current code DCC may include the time of the sampling operation of sampling the sensing voltage VSENSE corresponding to the panel current PC, and the time of the ADC operation for the sampled sensing voltage VSENSE. In addition, in some embodiments, the conversion time CT may include the time of one or more sampling operations and the time of one or more ADC operations. The current sensing circuit 150 may provide the digital current code DCC to the inrush current detection circuit 160 , and may transmit the digital current code DCC to the controller IC 190 through I2C communication.

[0088] The impact current detection circuit 160 can generate an alarm signal ALERT by comparing the digital current code DCC or the panel current PC representing the sensed current with the impact current code or the impact reference current corresponding to the impact reference current. When the panel current PC is greater than the impact reference current, or when the digital current code DCC is greater than the impact current code, the impact current detection circuit 160 can provide the alarm signal ALERT to the controller IC 190. The controller IC 190 can control the power management circuit 140 to reduce the voltage level of the power supply voltage ELVDD (e.g., to a predetermined voltage level) in response to the alarm signal ALERT. Therefore, the panel current PC of the display panel 110 can be reduced, and the power consumption of the display device can be reduced.

[0089] Fig.13 is a block diagram illustrating an electronic device including a display device according to an embodiment.

[0090] Reference Fig.13, an embodiment of the electronic device 1100 may include a processor 1110, a memory device 1120, a storage device 1130, an input / output (I / O) device 1140, a power supply 1150, and a display device 1160. The electronic device 1100 may also include a plurality of ports for communicating with a video card, a sound card, a memory card, a universal serial bus (USB) device, other electronic devices, and the like.

[0091] The processor 1110 may perform various computing functions or tasks. The processor 1110 may be an application processor (AP), a microprocessor, a central processing unit (CPU), etc. The processor 1110 may be coupled to other components via an address bus, a control bus, a data bus, etc. In addition, in some embodiments, the processor 1110 may also be coupled to an expansion bus, such as a peripheral component interconnect (PCI) bus.

[0092] The memory device 1120 may store data used for the operation of the electronic device 1100. For example, the memory device 1120 may include at least one nonvolatile memory device (such as an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, a flash memory device, a phase change random access memory (PRAM) device, a resistive random access memory (RRAM) device, a nano floating gate memory (NFGM) device, a polymer random access memory (PoRAM) device, a magnetic random access memory (MRAM) device, a ferroelectric random access memory (FRAM) device, etc.) and / or at least one volatile memory device (such as a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, a mobile dynamic random access memory (mobile DRAM) device, etc.).

[0093] The storage device 1130 may be a solid state drive (SSD) device, a hard disk drive (HDD) device, a compact disk read-only memory (CD-ROM) device, etc. The I / O device 1140 may be an input device such as a keyboard, a keypad, a mouse, a touch screen, etc. and an output device such as a printer, a speaker, etc. The power supply 1150 may supply power for the operation of the electronic device 1100. The display device 1160 may be coupled to other components through a bus or other communication links.

[0094] In the display device 1160, the voltage level of the power supply voltage can be determined based on the peak grayscale and the panel load, and a conversion time can be set according to the voltage level of the power supply voltage, during which the panel current is converted into a digital current code. In some embodiments, the conversion time can decrease as the voltage level of the power supply voltage increases, and can increase as the voltage level of the power supply voltage decreases. Therefore, when the power supply voltage has a relatively high voltage level, the rush current detection operation can be performed quickly, and when the power supply voltage has a relatively low voltage level, the accuracy of the current sensing operation can be improved.

[0095] Embodiments of the present invention can be applied to any electronic device 1100 including a display device 1160, such as a mobile phone, a smart phone, a tablet computer, a virtual reality (VR) device, a television (TV) (e.g., a digital TV, a three-dimensional (3D) TV, etc.), a wearable electronic device, a personal computer (PC), a home appliance, a notebook computer, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital camera, a music player, a portable game console, a navigation device, etc.

[0096] The present invention should not be interpreted as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the present invention to those skilled in the art.

[0097] While the invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit or scope of the invention as defined by the following claims.

Claims

1. A display device, wherein: The display device comprises: A display panel including a plurality of pixels; a power management circuit for supplying a power supply voltage to the plurality of pixels via a power supply line; a current sensing circuit for generating a digital current code by sensing a panel current flowing through the power line; and A controller determines a peak grayscale level and a panel load by analyzing input image data, the controller determines a voltage level of the power supply voltage based on the peak grayscale level and the panel load, and the controller sets a conversion time during which the panel current is converted into the digital current code based on the voltage level of the power supply voltage.

2. The display device according to claim 1, wherein: The controller sets the conversion time in such a manner that as the voltage level of the power supply voltage increases, the conversion time decreases, and as the voltage level of the power supply voltage decreases, the conversion time increases.

3. The display device according to claim 1, wherein: The display device further includes: The surge current detection circuit generates an alarm signal by comparing the digital current code with a surge current code corresponding to a surge reference current.

4. The display device according to claim 3, wherein: The controller controls the power management circuit to reduce the voltage level of the power supply voltage in response to the alarm signal.

5. The display device according to claim 3, wherein: The controller is implemented as a controller integrated circuit, and The current sensing circuit and the inrush current detection circuit are included in a current sensing integrated circuit that is separate from the controller integrated circuit.

6. The display device according to claim 5, wherein: The current sensing integrated circuit includes a conversion time setting register for setting the conversion time, and The controller sets the conversion time by changing a value of the conversion time setting register via inter-IC communication between the controller IC and the current sensing IC.

7. The display device according to claim 1, wherein: The controller comprises: a peak gray level determination circuit, which determines the peak gray level by analyzing the input image data; a panel load determination circuit, which determines the panel load by analyzing the input image data; a power supply voltage determination circuit that determines the voltage level of the power supply voltage based on the peak gray level and the panel load; a transition time determination circuit that determines the transition time based on the voltage level of the power supply voltage; and The power supply voltage control circuit provides a voltage code corresponding to the voltage level of the power supply voltage to the power management circuit.

8. The display device according to claim 7, wherein: The peak grayscale level determination circuit determines a maximum grayscale level among a plurality of grayscale levels represented by the input image data for the plurality of pixels as the peak grayscale level, and wherein the panel load determination circuit calculates the panel load by dividing a sum of the plurality of gray levels represented by the input image data for the plurality of pixels by a maximum gray level sum.

9. The display device according to claim 7, wherein: The power supply voltage determination circuit increases the voltage level of the power supply voltage as the peak grayscale level increases, and increases the voltage level of the power supply voltage as the panel load increases, and The conversion time determination circuit reduces the conversion time as the voltage level of the power supply voltage increases, and increases the conversion time as the voltage level of the power supply voltage decreases.

10. The display device according to claim 7, wherein: The controller further comprises: a power supply voltage-conversion time lookup table storing the conversion time corresponding to the voltage level of the power supply voltage, and The conversion time determination circuit uses the power supply voltage-conversion time lookup table to determine the conversion time corresponding to the voltage level of the power supply voltage.

11. The display device according to claim 7, wherein: The power supply voltage control circuit reduces the voltage code provided to the power management circuit in response to an alarm signal from an inrush current detection circuit to reduce the voltage level of the power supply voltage.

12. The display device according to claim 1, wherein: The controller comprises: a global current management circuit that receives the digital current code from the current sensing circuit, the global current management circuit determines a target current code corresponding to the panel load, and the global current management circuit controls the panel current by comparing the digital current code with the target current code; and An overcurrent protection circuit receives the digital current code from the current sensing circuit, compares the digital current code with a reference overcurrent code, and controls the power management circuit to stop supplying the power supply voltage when the digital current code is higher than the reference overcurrent code.

13. A controller for a display device, wherein: The controller comprises: a peak gray level determination circuit, which determines the peak gray level by analyzing the input image data; a panel load determination circuit for determining a panel load of a display panel for the display device by analyzing the input image data; a power supply voltage determination circuit that determines a voltage level of a power supply voltage supplied to a plurality of pixels of the display device based on the peak grayscale level and the panel load; a transition time determination circuit that determines a transition time based on the voltage level of the power supply voltage and provides the transition time to a current sensing circuit that senses a panel current, the panel current being converted to a digital current code during the transition time; and The power supply voltage control circuit provides a voltage code corresponding to the voltage level of the power supply voltage to the power management circuit.

14. The controller according to claim 13, wherein: The conversion time determination circuit decreases the conversion time as the voltage level of the power supply voltage increases, and increases the conversion time as the voltage level of the power supply voltage decreases.

15. A current sensing integrated circuit for a display device, wherein: The current sensing integrated circuit comprises: Conversion time setting register, storing conversion time; a current sensing circuit that converts a panel current of the display device into a digital current code during the conversion time; and a surge current detection circuit that generates an alarm signal by comparing the digital current code with a surge current code corresponding to a surge reference current, The conversion time of the conversion time setting register is set based on a voltage level of a power supply voltage supplied to a plurality of pixels of the display device.

Images