NAND flash memory management with predictive durability

Abstract

The invention relates to NAND flash memory management with predictive durability. Systems, apparatuses, and methods are provided for performing program operations in a non-volatile memory system. In one embodiment, a method is provided that may include classifying active memory blocks of a non-volatile memory device into a durable group and a non-durable group based on a plurality of factors including a page error count, a program time, and a number of program / erase (P / E) cycles; determining that a cache programming operation needs to be executed; selecting a first memory block from the durable group to perform a cache program operation; determining that conventional programming operation needs to be executed; and selecting a second memory block from the non-durable group to perform a regular program operation.

Description

This application is a divisional application of the invention application with application date of December 8, 2021, application number 202111493176.1, and invention name “Durability-aware NAND flash memory management”. Technical Field

[0001] The present invention relates to the management and implementation of NAND flash memory devices, and in particular to the programming operation of NAND flash memory devices. Background Art

[0002] The development of modern computing systems has been driven in part by the advent of solid-state drives (SSDs), which offer higher speed and latency performance than traditional hard disks. Unlike hard disks, which rely on magnetism to store data, solid-state drives use NAND flash memory devices to achieve data storage. NAND flash memory devices are a family of integrated circuits manufactured through advanced process and assembly technologies that enable multiple layers of memory cells to be stacked vertically into smaller particles and packages, thereby achieving high storage capacity.

[0003] The increase in storage capacity brought about by new NAND flash process technology breakthroughs also leads to a decrease in the reliability of NAND memory cells. For NAND flash devices, the programming operation refers to the operation of writing data to the NAND flash device. And NAND flash devices usually contain bad blocks, including factory bad blocks that are originally defective during the manufacturing process and grown bad blocks that become defective after multiple program and erase (P / E) cycles. As a well-known behavior, NAND memory cells begin to wear out with the increase in the number of P / E cycles, resulting in an increase in error counts and an increase in grown bad blocks.

[0004] NAND flash memory devices generally provide two types of programming operations: regular programming operations and cache programming operations. Both programming operations include receiving data into a cache buffer and moving the data into a data buffer and the NAND memory cell array. The cache programming operation will respond to the SSD controller when the data transfer from the cache buffer to the data buffer is completed. In contrast, the regular programming operation will not respond to the SSD controller until the data transfer to the NAND memory cell array is completed, which requires a long programming time (e.g., tPROG) on the order of several milliseconds.

[0005] Most modern SSD controllers utilize cached programming operations to maximize the performance of writing to NAND flash devices. With this feature enabled, the SSD controller acknowledges the completion of the write command to the host once it learns from the NAND device that the data has been moved from the cache buffer to the data buffer. However, this approach carries the potential risk of programming errors, where the final operation to write data to the NAND memory cells may still fail when a particular NAND block becomes defective without the SSD controller knowing about it. This is particularly challenging for NAND flash devices, which grow an increasing number of bad blocks over time.

[0006] To address the aforementioned problem of potential write failures to the NAND memory array in the event of a premature reply to the host, an SSD controller with on-board DRAM can be configured to retain a copy of the data in DRAM until later confirmation that it was successfully written to the NAND memory array. If the NAND reports a programming error, the SSD controller can then simply perform another programming operation on the NAND device with the data from DRAM.

[0007] However, this is a greater challenge for an SSD controller without DRAM because the controller can only retain a small, limited amount of data in its internal SRAM. Write commands from the host may quickly exceed the storage capacity of the internal SRAM while the controller is still waiting for the NAND memory device to slowly acknowledge the limited amount of data stored in the SRAM, causing the SRAM to overflow. As a result, during cache programming operations, the SSD controller without DRAM may not be able to save all temporary data to its internal SRAM, which may lead to catastrophic failures where the data that failed to be saved to the NAND memory is also not restored from the SRAM. Existing solutions that attempt to improve this situation may have to limit the number of cache programming operations using the SSD controller without DRAM, which results in performance degradation. Alternatively, existing solutions may also increase the amount of internal SRAM at the expense of larger chip size and higher silicon cost. Summary of the invention

[0008] The present disclosure provides a durability-aware non-volatile storage device management technique for actively monitoring the potential occurrence of growing bad blocks in order to minimize programming errors. In various embodiments, active storage blocks can be classified into two groups (e.g., a durable group and a non-durable group) based on many factors such as average page error count, programming time (e.g., tPROG), and P / E cycle count. Different management strategies can be applied to each of the two groups to achieve optimal performance while minimizing the probability of programming a cache into a growing bad block. In one embodiment, a durability score can be generated for an active block based on multiple factors, and the active block can be classified into a durable group or a non-durable group by comparing the durability score with a durability threshold.

[0009] In an exemplary embodiment, a method is provided, which may include: classifying active storage blocks of a non-volatile storage device into a durable group and a non-durable group based on multiple factors including a page error count, a programming time, and a number of program / erase (P / E) cycles; determining that a cache programming operation needs to be performed; selecting a first storage block from the durable group to perform the cache programming operation; determining that a regular programming operation needs to be performed; and selecting a second storage block from the non-durable group to perform the regular programming operation.

[0010] In another exemplary embodiment, a nonvolatile storage system is provided. The nonvolatile storage system may include a nonvolatile storage device and a processor. The processor may be configured to classify active storage blocks of the nonvolatile storage device into durable groups and non-durable groups based on multiple factors including page error counts, programming time, and program / erase (P / E) cycle numbers; determine that a cache programming operation needs to be performed; select a first storage block from the durable group to perform the cache programming operation; determine that a regular programming operation needs to be performed; and select a second storage block from the non-durable group to perform the regular programming operation.

[0011] In yet another exemplary embodiment, a non-transitory machine-readable medium is provided. The non-transitory machine-readable medium may have computer instructions that, when executed by a hardware processor, may cause the hardware processor to perform the following operations: classify active memory blocks of a non-volatile memory device into durable groups and non-durable groups based on multiple factors including page fault counts, programming time, and program / erase (P / E) cycle numbers; determine that a cache programming operation needs to be performed; select a first memory block from the durable group to perform the cache programming operation; determine that a regular programming operation needs to be performed; and select a second memory block from the non-durable group to perform the regular programming operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 A nonvolatile storage system according to an embodiment of the present disclosure is schematically shown.

[0013] Figure 2 Active memory blocks classified into two groups according to one embodiment of the present disclosure are schematically shown.

[0014] Figure 3 is a flowchart of a process for performing a program operation on a nonvolatile memory device according to one embodiment of the present disclosure. DETAILED DESCRIPTION

[0015] Now, specific embodiments according to the present application will be described in detail with reference to the accompanying drawings. For consistency, the same elements in various figures are represented by the same reference numerals.

[0016] The present disclosure provides systems and methods for durability-aware management of non-volatile memory devices. As used herein, a non-volatile memory device may be a computer storage device that can retain stored information after power failure and can retrieve the stored information after power is restored (turned off and reopened). Non-volatile memory devices may include NAND flash memory, NOR flash memory, magnetoresistive random access memory (MRAM), resistive random access memory (RRAM), phase change random access memory (PCRAM), Nano-RAM, etc. NAND flash memory can be used as an example to demonstrate the durability prediction technology implemented by the controller. However, other types of non-volatile memory devices may be used to implement the technology according to various embodiments of the present disclosure.

[0017] Figure 1 A nonvolatile storage system 100 according to one embodiment of the present disclosure is schematically shown. The nonvolatile storage system 100 may include a nonvolatile storage controller 102 and a nonvolatile storage device 104. When the nonvolatile storage system 100 is coupled to a host, the nonvolatile storage system 100 may provide data storage and / or access to stored data for the host. The nonvolatile storage device 104 may be a nonvolatile memory (NVM)-based storage device, such as a NAND device. It should be noted that the nonvolatile storage system 100 may include a plurality of nonvolatile storage devices, and the nonvolatile storage device 104 may be shown as a representative of a plurality of nonvolatile storage devices. The nonvolatile storage controller 102 may include a processor 106 and a memory 108. The processor 106 may be a computer processor, such as, but not limited to, a microprocessor or a microcontroller. The memory 108 may be a non-transitory computer-readable storage medium, such as a DRAM or SRAM, to store computer-executable instructions to be executed by the processor 106.

[0018] In various embodiments, it may be possible to record which memory blocks in the nonvolatile memory device 104 are bad (e.g., defective from the manufacturing process or after multiple P / E cycles) and which memory blocks in the nonvolatile memory device 104 are good so that the nonvolatile memory controller 102 can use the good memory blocks for data storage (e.g., performing programming operations). Good memory blocks may also be referred to as non-defective memory blocks or active memory blocks (or simply active blocks). Each active memory block may be classified into one of two groups: a durable group and a non-durable group. The nonvolatile memory controller 102 may manage programming operations and memory block accesses based on the durability group information. In an example embodiment, cache programming operations may be assigned to active blocks of a durable group to achieve high performance programming with higher reliability, while conventional programming operations may be assigned to active blocks of a non-durable group, where programming errors may still be recovered.

[0019] In addition, the non-volatile storage controller 102 may also use the durability group information to set its programming access policy. For example, host-initiated programming commands may be executed by cached programming operations using active blocks from the durable group to maximize the throughput of the host and the non-volatile storage system 100. In contrast, back-end programming operations, such as but not limited to those involved in garbage collection and refresh, may be executed by conventional programming operations using active blocks from non-durable groups when lower performance may be required.

[0020] The non-volatile storage controller 102 can further improve the reliability of the non-volatile storage device by utilizing the durability information of the blocks during garbage collection. For example, at the end of a round of garbage collection, the non-volatile storage controller 102 may add an additional bad block scanning step for those blocks in the non-durable group. If a block becomes defective, it will be marked as a bad block and removed from active use. This can make the effort of scanning bad blocks only for non-durable blocks more effective, because non-durable blocks may be more likely to become defective bad blocks and have a higher risk of failure during programming operations.

[0021] There are multiple indicators that show how durable a block can be before it becomes completely defective, such as the number of error bits for pages within the block, the programming time (e.g., tPROG) used to program the block, and the number of P / E cycles for the block. In one embodiment, the non-volatile storage controller 102 can use these indicators as factors to determine whether a block is durable or non-durable. The non-volatile storage controller 102 can evaluate the durability of a storage block by the number of error bits (or error count) during a read operation, with a smaller number of error counts indicating a more durable block and a larger number of error counts indicating a less durable block. In one embodiment, for example, when the error count of the worst page in a storage block is less than 0.5%, the storage block can be considered a durable block. The non-volatile storage controller 102 can also evaluate the programming time tPROG of a block, which is shorter or much longer than the manufacturer's specified programming time, indicating potential physical problems within the block. It should be noted that whether the number of error counts is large or small, and whether tPROG is long or short can be determined by testing for a specific non-volatile memory device, and can be adjusted during the life of the non-volatile memory device. Different non-volatile memory devices, for example, different brands, different batches of the same manufacturer, based on different architectures (e.g., single-level cell (SLC), multi-level cell (MLC), triple-level cell (TLC)), can have different numbers of error counts and / or tPROG during the life of the non-volatile memory device.

[0022] In some embodiments, a durability score R can be generated based on these durability factors and used to track the health and durability of each active block. The higher the durability score, the healthier and more durable the active block may be, and the less likely it is to suddenly become defective during the next cache programming operation. In one embodiment, R can be represented by a function of multiple variables, for example, R=R(x1, x2, x3, ...). These factors can be represented by variables, which can include programming time tPROG, page error count, and P / E cycle count of the block. In one embodiment, for example, the average page error count within the block can be variable x1, the most recent programming time tPROG can be variable x2, and the P / E cycle count can be variable x3. For a specific non-volatile storage device to be used, the corresponding weight of each factor and the mathematical relationship (e.g., linear, polynomial, logarithmic, etc.) of each factor can be obtained by experiment. In some embodiments, the higher the page error count and P / E cycle count, the less durable the block may be, and therefore the lower the durability score. Moreover, the farther away from the manufacturer's specified programming time, the lower the durability score may be.

[0023] During the life of the non-volatile memory device, the values ​​of these durability factors may change over time, and the durability score may also be adjusted over time. In one embodiment, the durability score may be updated at intervals proportional to the increase in the P / E cycle count. For example, the durability score may be updated with every 100 P / E cycle counts.

[0024] In some embodiments, each durability factor can be evaluated and a corresponding threshold can be determined for each factor. For example, a page error count of 0.5% can be used as a threshold for the page error count, 50% of the manufacturer's rated P / E cycle count can be used as a threshold for the number of P / E cycles, and 20% of the manufacturer's specified programming time can be used as a threshold for the programming time. In one embodiment, the durability score can be assigned an integer value from 0 to 7, with 0 indicating the least durable and 7 indicating the most durable. When all factors of a block are well below their thresholds, the durability score of the block can be assigned a value of 7 to indicate the least risk. When all factors of the block are well above their thresholds, the durability score of the block can be assigned a value of 0 to indicate the highest risk. When only one factor is above its threshold, an intermediate value of 3 can be assigned.

[0025] In some embodiments, some variables may be evaluated for their respective historical changes or rates of change. For example, the difference or gradient in the page fault count and programming time at two separate timestamps may be used to evaluate the durability score. In one example implementation, a significant increase in the page fault count tends to indicate an at-risk and non-durable block, so a lower durability score may be assigned to the block. Additionally, a sharp increase in the tPROG time may result in a decrease in the durability score of the block.

[0026] In different embodiments, the durability score may have different ranges of values. In addition to a range of scores from 0 to 7 (which may be a four-bit value in one implementation), in another embodiment, the durability score may be a single binary bit assigned to each block, with 1 representing a durable block and 0 representing a non-durable block. In yet another embodiment, the durability score may be represented by other bit numbers, for example, 8 bits or a byte to represent a decimal range of 0 to 255.

[0027] In some embodiments, active storage blocks can be classified into durable groups and non-durable groups based on the durability score R. In one embodiment, for example, the threshold R T , which can be used to determine which group a single active block may belong to. If the durability score R of the active block is greater than or equal to the threshold, R ≥ R T , the block can be assigned to the durable group. If the durability score R of the active block is less than the threshold, R <R T , then the block can be assigned to the non-durable group.

[0028] In some embodiments, the durability score threshold R T Can be set and adjusted dynamically to achieve the best compromise between performance and reliability. Low Threshold R T Prioritizing performance over reliability by allowing more blocks in the durability group to be used for faster cache program operations may be a good choice for nonvolatile storage devices in the early stages of their life cycle when the expected number of growing bad blocks is minimal. For nonvolatile storage devices in the later stages of their life cycle, a high threshold R T Probably the preferred option, this requires a more conservative approach to ensure maximum reliability with some expected compromises in throughput and performance.

[0029] In various embodiments, the durability score threshold R T This can be determined by testing a particular nonvolatile memory device to be used in the nonvolatile memory system 100. Different nonvolatile memory devices, such as those manufactured by different manufacturers based on different architectures (e.g., single-level cell (SLC), multi-level cell (MLC), triple-level cell (TLC)), can have different endurance score thresholds, and the threshold can be adjusted during the life of the nonvolatile memory device.

[0030] Figure 2 Schematically illustrates active storage blocks classified into two groups according to one embodiment of the present disclosure. The first group may be a durable group 202, which may include active blocks determined by the non-volatile storage controller to be durable. The second group may be a non-durable group 204, which may include active blocks determined by the non-volatile storage controller to be non-durable. In one embodiment, these two groups may be stored in the non-volatile storage device 104 and loaded into the memory 108 during operation of the non-volatile storage system 100.

[0031] Figure 3 is a flow chart of a process 300 for performing a programming operation on a non-volatile storage device according to an embodiment of the present disclosure.

[0032] In block 302, active storage blocks of a non-volatile storage device may be classified into durable groups and non-durable groups based on multiple factors including page error counts, programming time, and program / erase (P / E) cycle numbers. In various embodiments, for example, a smaller number of error counts, a shorter programming time, and a smaller number of P / E cycle numbers may indicate that the block is more durable, while a larger number of error counts, a programming time that is shorter or much longer than the manufacturer's specified programming time, and a larger number of P / E cycles may indicate that the block is non-durable. In one embodiment, a durability score for each active storage block may be generated based on multiple factors, and the active storage blocks may be classified into durable groups and non-durable groups by comparing the durability score of each active storage block with a durability threshold. The durability score may be adjusted during the life of the non-volatile storage device, and the value of each factor may change over time. The durability threshold may also be adjusted during the life of the non-volatile storage device.

[0033] In block 304, it may be determined that a cache programming operation needs to be performed, and a first memory block from the durable group may be selected to perform the cache programming operation in block 306. Because durable active memory blocks are less likely to report errors when writing data to memory cells, embodiments may select active memory blocks from the durable group to perform the cache programming operation to achieve high performance with higher reliability.

[0034] In block 308, it may be determined that a normal programming operation needs to be performed, and a second memory block may be selected from the non-durable group to perform the normal programming operation in block 310. Because non-durable active memory blocks are more likely to report errors when storing data to memory cells, embodiments may select active memory blocks from the non-durable group to perform the normal programming operation so that programming errors can be recovered.

[0035] The process 300 and features of the non-volatile storage system 100 related to durability may be implemented using software (e.g., an executable computer processor (CPU, GPU, or both)), hardware (e.g., a field programmable gate array (FPGA) or an application specific IC (ASIC)), firmware, or any suitable combination of the three. In one embodiment, for example, the process 300 and the durability-related features of the non-volatile storage system 100 may be programmed into a computer processor computer instructions, stored in a non-transitory machine-readable medium (e.g., a non-volatile storage device 104, a hard drive, a CD, a DVD, etc.), and executed by a processor 106 (e.g., a microprocessor or a microcontroller) that executes the executable instructions.

[0036] In an exemplary embodiment, a method is provided, which may include: classifying active storage blocks of a non-volatile storage device into a durable group and a non-durable group based on multiple factors including a page error count, a programming time, and a number of program / erase (P / E) cycles; determining that a cache programming operation needs to be performed; selecting a first storage block from the durable group to perform the cache programming operation; determining that a regular programming operation needs to be performed; and selecting a second storage block from the non-durable group to perform the regular programming operation.

[0037] In one embodiment, determining that a cache programming operation needs to be performed may include receiving a program command from a host, and determining that the program command from the host needs to be performed via the cache programming operation.

[0038] In one embodiment, determining that a normal programming operation needs to be performed may include initiating a back-end programming operation and determining that a back-end programming operation needs to be performed by the normal programming operation.

[0039] In one embodiment, the method may further include generating a durability score for each active storage block based on a plurality of factors. Categorizing the active storage blocks into durable and non-durable groups may include comparing the durability score of each active storage block to a durability threshold.

[0040] In one embodiment, the endurance score of each active storage block may be set based on historical changes in at least some of the plurality of factors.

[0041] In one embodiment, the endurance threshold may be adjusted during the life of the non-volatile storage device, where the endurance threshold is low in the early stages of use and increases with use.

[0042] In one embodiment, the method may further include: initiating a garbage collection operation, determining that a block erased during the garbage collection operation belongs to a non-durable group, and performing a bad block scan for the non-durable block.

[0043] In another exemplary embodiment, a nonvolatile storage system is provided. The nonvolatile storage system may include a nonvolatile storage device and a processor. The processor may be configured to classify active storage blocks of the nonvolatile storage device into durable groups and non-durable groups based on multiple factors including page error counts, programming time, and program / erase (P / E) cycle numbers; determine that a cache programming operation needs to be performed; select a first storage block from the durable group to perform the cache programming operation; determine that a regular programming operation needs to be performed; and select a second storage block from the non-durable group to perform the regular programming operation.

[0044] In one embodiment, determining that a cache programming operation needs to be performed may include receiving a program command from a host, and determining that the program command from the host needs to be performed via the cache programming operation.

[0045] In one embodiment, determining that a normal programming operation needs to be performed may include initiating a back-end programming operation and determining that a back-end programming operation needs to be performed by the normal programming operation.

[0046] In one embodiment, the processor may be further configured to generate a durability score for each active storage block based on a plurality of factors. To classify the active storage blocks into durable groups and non-durable groups, the processor may be further configured to compare the durability score of each active storage block with a durability threshold.

[0047] In one embodiment, the endurance score of each active storage block may be set based on historical changes in at least some of the plurality of factors.

[0048] In one embodiment, the endurance threshold may be adjusted during the life of the non-volatile storage device, where the endurance threshold is low in the early stages of use and increases with use.

[0049] In one embodiment, the processor may be further configured to: initiate a garbage collection operation, determine that a block erased during the garbage collection operation belongs to a non-durable group, and perform a bad block scan for the non-durable block.

[0050] In yet another exemplary embodiment, a non-transitory machine-readable medium is provided. The non-transitory machine-readable medium may have computer instructions that, when executed by a hardware processor, may cause the hardware processor to perform the following operations: classify active memory blocks of a non-volatile memory device into durable groups and non-durable groups based on multiple factors including page fault counts, programming time, and program / erase (P / E) cycle numbers; determine that a cache programming operation needs to be performed; select a first memory block from the durable group to perform the cache programming operation; determine that a regular programming operation needs to be performed; and select a second memory block from the non-durable group to perform the regular programming operation.

[0051] In one embodiment, determining that a cache programming operation needs to be performed may include receiving a program command from a host, and determining that the program command from the host needs to be performed via the cache programming operation.

[0052] In one embodiment, determining that a normal programming operation needs to be performed may include initiating a back-end programming operation and determining that a back-end programming operation needs to be performed by the normal programming operation.

[0053] In one embodiment, when executed by a hardware processor, the computer instructions may further cause the hardware processor to perform the following operations: generating a durability score for each active storage block based on a plurality of factors. Classifying the active storage blocks into durable groups and non-durable groups may include comparing the durability score of each active storage block to a durability threshold.

[0054] In one embodiment, the endurance score of each active storage block may be set based on historical changes in at least some of the plurality of factors.

[0055] In one embodiment, the endurance threshold may be adjusted during the life of the non-volatile storage device, where the endurance threshold is lower in the early stages of use and increases with use.

[0056] In one embodiment, when executed by a hardware processor, the computer instructions may further cause the hardware processor to perform the following operations: initialize a garbage collection operation; determine that a block erased during the garbage collection operation belongs to a non-durable group; and perform a bad block scan for the non-durable block.

[0057] Any disclosed methods and operations may be implemented as computer-executable instructions (e.g., software code of the operations described herein) stored on one or more computer-readable storage media (e.g., non-transitory computer-readable media, such as one or more optical disk media, volatile storage components (e.g., DRAM or SRAM), or non-volatile storage components (e.g., hard disk drives) and executed on a device controller (e.g., firmware executed by an ASIC). Any computer-executable instructions for implementing the disclosed techniques and any data created and used during implementation of the disclosed embodiments may be stored on one or more computer-readable media (e.g., non-transitory computer-readable media).

[0058] Although various aspects and embodiments have been disclosed herein, other aspects and embodiments will be apparent to those skilled in the art. The various aspects and embodiments disclosed herein are for purposes of illustration and are not intended to be limiting, with the true scope and spirit being indicated by the appended claims.

Claims

1. A method, characterized in that include: generating an endurance score for each active memory block of the non-volatile memory device, wherein a higher endurance score for an active memory block indicates that the active memory block is healthier, more durable, and less likely to become defective during a next programming operation; Classifying the active storage blocks of the non-volatile storage device into a durable group and a non-durable group based on comparing the durability scores of the active storage blocks with a durability threshold; determining that a cache programming operation needs to be performed, wherein the memory controller receives a response when data transfer from the cache buffer to the data buffer of the non-volatile memory device is completed without the data being written to the memory cell array; as well as A first memory block is selected from the durable group to perform the cache programming operation.

2. The method according to claim 1, characterized in that An endurance score is generated for each active memory block based on multiple factors including page fault count, programming time, and number of program / erase (P / E) cycles.

3. The method according to claim 2, characterized in that For each active memory block, an increase in page error count results in a lower endurance score, an increase in programming time also results in a lower endurance score, and the endurance score of each active memory block is updated at intervals proportional to the increase in the number of P / E cycles of the corresponding active memory block.

4. The method according to claim 1, characterized in that: Also includes: The durability threshold is adjusted during the life of the non-volatile storage device, wherein the durability threshold is low in an early stage of use to classify more active storage blocks in the durable group, and the durability threshold increases with use to classify fewer active storage blocks in the durable group.

5. The method according to claim 1, characterized in that Further including: generating an adjusted endurance score for the active storage blocks during a life of the non-volatile storage device; as well as Active storage blocks in the durable group and the non-durable group are adjusted based on the adjusted durability scores.

6. The method according to claim 1, characterized in that Further including: determining that a conventional programming operation needs to be performed, wherein the memory controller receives an acknowledgement after data has been written to the memory cell array; as well as A second memory block is selected from the non-durable group to perform a normal programming operation.

7. The method according to claim 1, characterized in that Further including: Initialize garbage collection operations; determining that a block erased during the garbage collection operation belongs to the non-durable group; as well as A bad block scan is performed on blocks erased during the garbage collection operation.

8. A non-volatile storage system, characterized in that: include: Non-volatile storage devices; and The processor is configured as: generating an endurance score for each active memory block of the non-volatile memory device, wherein a higher endurance score for an active memory block indicates that the active memory block is healthier, more durable, and less likely to become defective during a next programming operation; Classifying the active storage blocks of the non-volatile storage device into a durable group and a non-durable group based on comparing the durability scores of the active storage blocks with a durability threshold; determining that a cache programming operation needs to be performed, wherein the memory controller receives a response when data transfer from the cache buffer to the data buffer of the non-volatile memory device is completed without the data being written to the memory cell array; as well as A first memory block is selected from the durable group to perform the cache programming operation.

9. The method according to claim 8, characterized in that An endurance score is generated for each active memory block based on multiple factors including page fault count, programming time, and number of program / erase (P / E) cycles.

10. The method according to claim 9, characterized in that For each active memory block, an increase in page error count results in a lower endurance score, an increase in programming time also results in a lower endurance score, and the endurance score of each active memory block is updated at intervals proportional to the increase in the number of P / E cycles of the corresponding active memory block.

11. The method according to claim 8, characterized in that The processor is also configured to adjust the durability threshold during the life of the non-volatile storage device, wherein the durability threshold is low in an early stage of use to classify more active storage blocks in the durable group, and the durability threshold increases with use to classify fewer active storage blocks in the durable group.

12. The non-volatile storage system according to claim 8, characterized in that: The processor is further configured to: generating an adjusted endurance score for the active storage blocks during the life of the non-volatile storage device; and Active storage blocks in the durable group and the non-durable group are adjusted based on the adjusted durability scores.

13. The non-volatile storage system according to claim 8, characterized in that: The processor is further configured to: determining that a conventional programming operation needs to be performed, wherein the memory controller receives an acknowledgement after data has been written to the memory cell array; and A second memory block is selected from the non-durable group to perform a normal programming operation.

14. The non-volatile storage system according to claim 8, characterized in that: The processor is further configured to: Initialize garbage collection operations; determining that a block erased during the garbage collection operation belongs to the non-durable group; and A bad block scan is performed on blocks erased during the garbage collection operation.

15. A non-transitory machine-readable medium having computer instructions, characterized in that: When the executable instructions are executed by a hardware processor, the hardware processor is caused to perform the following operations: generating an endurance score for each active memory block of the non-volatile memory device, wherein a higher endurance score for an active memory block indicates that the active memory block is healthier, more durable, and less likely to become defective during a next programming operation; Classifying the active storage blocks of the non-volatile storage device into a durable group and a non-durable group based on comparing the durability scores of the active storage blocks with a durability threshold; determining that a cache programming operation needs to be performed, wherein the memory controller receives a response when data transfer from the cache buffer to the data buffer of the non-volatile memory device is completed without the data being written to the memory cell array; as well as A first memory block is selected from the durable group to perform the cache programming operation.

16. The non-transitory machine-readable medium of claim 15, wherein: When the executable instruction is executed by the hardware processor, the hardware processor is further caused to perform the following operations: An endurance score is generated for each active memory block based on multiple factors including page fault count, programming time, and number of program / erase (P / E) cycles. generating an adjusted endurance score for the active storage blocks during a life of the non-volatile storage device; as well as Active storage blocks in the durable group and the non-durable group are adjusted based on the adjusted durability scores.

17. The non-transitory machine-readable medium of claim 15, wherein: For each active memory block, an increase in page error count results in a lower endurance score, an increase in programming time also results in a lower endurance score, and the endurance score of each active memory block is updated at intervals proportional to the increase in the number of P / E cycles of the corresponding active memory block.

18. The non-transitory machine-readable medium of claim 15, wherein: The durability threshold is adjusted during the life of the non-volatile storage device, wherein the durability threshold is low in an early stage of use to classify more active storage blocks in the durable group, and the durability threshold increases with use to classify fewer active storage blocks in the durable group.

19. The non-transitory machine-readable medium of claim 15, wherein: When the executable instructions are executed by a hardware processor, the hardware processor is also caused to perform the following operations: determining that a conventional programming operation needs to be performed, wherein the memory controller receives an acknowledgement after data has been written to the memory cell array; and A second memory block is selected from the non-durable group to perform a normal programming operation.

20. The non-transitory machine-readable medium of claim 15, wherein: When the executable instructions are executed by a hardware processor, the hardware processor is also caused to perform the following operations: Initialize garbage collection operations; determining that a block erased during the garbage collection operation belongs to the non-durable group; and A bad block scan is performed on blocks erased during the garbage collection operation.

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