Dual-path output reconfigurable radio frequency energy acquisition front-end chip

By using the technology of maximum power point tracking and dual threshold voltage compensation in the RF energy acquisition front-end chip, combined with the dual compensation rectifier, the problem of difficult to achieve high efficiency and stable power supply in the low RF energy environment in the prior art is solved, and high sensitivity and high efficiency energy conversion are achieved.

CN119944995AInactive Publication Date: 2025-05-06WESTLAKE UNIV
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Patent Information

Application Number
CN202510010548.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-03
Publication Date
2025-05-06
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

In the environment of changing and low RF energy density, it is difficult to achieve a front-end chip with high sensitivity, high efficiency, low loss and output a stable supply voltage.

Method used

The dual output reconfigurable RF energy acquisition front-end chip based on maximum power point tracking and dual threshold voltage compensation is adopted, including an oscillator module, energy sensing module, switching array module, central control MCU module and reconfigurable rectifier module. High-efficiency energy conversion and stable voltage output are achieved through the maximum power point tracking algorithm and dual compensation rectifier.

Benefits of technology

It realizes RF energy acquisition with high sensitivity, high efficiency and low loss in a changing and low RF energy density environment, ensuring stable power supply to low-power electronic systems.

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Abstract

The invention relates to a dual-output reconfigurable radio frequency energy acquisition front-end chip, which comprises an oscillator module, an energy sensing module, a switch array module, a central control MCU module and a reconfigurable rectifier module, and is characterized in that the oscillator module is used for providing a clock signal; the energy sensing module works under the driving of the clock signal and is used for generating an energy sensing signal; the central control MCU module works under the driving of the clock signal and is used for receiving the energy sensing signal and generating a control signal aiming at the switch array module by adopting a maximum power point tracking algorithm based on the energy sensing signal; the switch array module is used for receiving the control signal and reconstructing the reconfigurable rectifier module; and the reconfigurable rectifier module is used for receiving radio frequency information and realizing dual-path output of rectified power supply voltage with dynamic and static compensation. Compared with the prior art, the method has the advantages of high sensitivity, high efficiency, high stability and the like.
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Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency energy collection, and in particular to a dual-channel output reconfigurable radio frequency energy collection front-end chip. Background Art

[0002] Radio Frequency Energy Harvesting (RFEH) technology has attracted extensive attention from academic and industrial circles at home and abroad, and is regarded as a potential power supply solution for future large-scale IoT sensors and various low-power wearable or implantable electronic devices. RFEH can collect RF signals of specific frequency bands in the environment and convert them into required electrical energy, freeing electronic devices from the limitations of traditional battery power supply, solving the battery replacement and charging problems of hundreds of millions of sensors and daily wearable devices in large-scale IoT and the battery leakage risks faced by implantable devices, enabling devices to achieve long-term self-powered operation without batteries, and has a wide range of application value.

[0003] RFEH is a promising alternative to achieve battery-free systems, but such systems face many loss issues, such as free space path loss and obstacle occlusion in far-field applications. Although these loss issues are less in near-field applications, the rectifier at the front end of the system has nonlinear characteristics, showing serious low power conversion efficiency (PCE) performance and limited input power (PIN) dynamic range. Dickson rectifier and complementary cross-coupled (CCDD) rectifier are two common topologies in RFEH applications. The transistor threshold voltage in the Dickson rectifier based on CMOS process leads to poor sensitivity and low achievable PCE peak, while the CCDD rectifier has excellent sensitivity and high PCE under low input conditions, but there will be certain conduction losses due to the bidirectional conduction characteristics of CMOS transistors. In addition, since the RF energy in the environment is often in a fluctuating state, the RFEH front end usually cannot output a stable DC voltage. Under this fluctuating power supply condition, low-power electronic systems that are sensitive to the supply voltage are difficult to work normally. Therefore, how to realize an RFEH front end with high sensitivity, high PCE, low loss and stable power supply voltage output under changing external input conditions with only extremely low RF energy density is an urgent problem to be solved. Summary of the invention

[0004] The purpose of the present invention is to overcome the defects of the above-mentioned prior art and to provide a high-sensitivity, high-efficiency, high-stability dual-output reconfigurable RF energy harvesting front-end chip based on maximum power point tracking and dual threshold voltage compensation.

[0005] The purpose of the present invention can be achieved by the following technical solutions:

[0006] A dual-output reconfigurable RF energy harvesting front-end chip includes an oscillator module, an energy sensing module, a switch array module, a central control MCU module and a reconfigurable rectifier module, wherein:

[0007] The oscillator module is used to provide a clock signal;

[0008] The energy sensing module operates under the drive of the clock signal to generate an energy sensing signal;

[0009] The central control MCU module works under the drive of the clock signal, is used to receive the energy sensing signal, and based on the energy sensing signal, uses the maximum power point tracking algorithm to generate a control signal for the switch array module;

[0010] The switch array module is used to receive the control signal and reconfigure the reconfigurable rectifier module;

[0011] The reconfigurable rectifier module is used to receive radio frequency information and realize dual-path output of rectified supply voltage with dynamic and static compensation.

[0012] Furthermore, the oscillator module adopts a ring oscillator architecture.

[0013] Furthermore, the energy sensing module includes a dynamic comparator and an SR latch, wherein:

[0014] The dynamic comparator is used to enter the reset phase and the comparison phase according to the high and low level states of the clock signal. In the reset phase, the level is reset. In the comparison phase, the input reference value is compared with the rectified supply voltage output by the reconfigurable rectifier module, and a comparison result signal is generated and stored in the SR latch. The SR latch outputs the energy sensing signal based on the comparison result signal.

[0015] Furthermore, the central control MCU module includes a state judgment circuit and a state conversion circuit, wherein:

[0016] The state judgment circuit generates a state change signal based on the energy sensing signal using a maximum power point tracking algorithm, and the state conversion circuit generates the control signal based on the state change signal.

[0017] Further, the state change signal includes a level reduction signal, a level stabilization signal or a level increase signal.

[0018] Furthermore, the reconfigurable rectifier module includes a multi-stage double-compensated secondary rectifier.

[0019] Furthermore, the switch array module includes a plurality of switch circuits, and the switch circuits are arranged in pairs between each stage of the double-compensated secondary rectifier.

[0020] Furthermore, each of the double-compensated secondary rectifiers adopts a cross-coupling driving structure.

[0021] Furthermore, each of the double-compensated secondary rectifiers includes a first-stage rectifier and a second-stage rectifier, the first-stage rectifier and the second-stage rectifier both include a low-threshold voltage PMOS transistor and a depletion-type NMOS transistor, the gate of the low-threshold voltage PMOS transistor of the second-stage rectifier is connected to the gate of the low-threshold voltage PMOS transistor of the first-stage rectifier, and static compensation is performed on the low-threshold voltage PMOS transistor of the second-stage rectifier.

[0022] Furthermore, the radio frequency information is transmitted to the reconfigurable rectifier module through a matching impedance network.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] 1. The present invention provides a reconfigurable rectifier module, which combines the static compensation structure with the dynamic compensation of the CCDD structure, reduces the impact of the threshold voltage on the system, and thus achieves high sensitivity and efficiency;

[0025] 2. In the central control MCU module of the present invention, the maximum power point tracking algorithm is used to generate the control signal for the switch array module. Through the independently designed MPPT control circuit, the system can be conveniently reconstructed based on the current state and maintained stable. The main output is always maintained within a given stable range, so that the system can operate well.

[0026] 3. The present invention uses the first reconfigurable dual-output structure to enable the system to always maintain a stable voltage output within a wide energy output range, thereby providing reliable power supply for sensitive low-power circuits. At the same time, the bypass output can maximize the energy utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is the overall connection block diagram of the present invention;

[0028] Figure 2 It is the overall principle block diagram of the present invention;

[0029] Figure 3It is a circuit principle block diagram of the double compensation secondary rectifier of the present invention;

[0030] Figure 4 This is a principle block diagram of the energy sensing module of the present invention;

[0031] Figure 5 is a principle block diagram of an oscillator module of the present invention;

[0032] Figure 6 This is a principle block diagram of the central control MCU module of the present invention.

[0033] In the figure: 1. Oscillator module, 2. Energy sensing module, 3. Central control MCU module, 4. Switch array module, 5. Reconfigurable rectifier module, 6. Impedance matching network, 7. Double compensation secondary rectifier, 8. Switch circuit, 9. Oscillator circuit, 10. Digital control circuit, 11. Comparator circuit, 12. Low threshold voltage PMOS transistor, 13. Depletion type NMOS transistor, 14. Dynamic comparator, 15. SR latch, 16. Three-stage ring oscillator circuit, 17. State judgment circuit, 18. State conversion circuit. DETAILED DESCRIPTION

[0034] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. This embodiment is implemented based on the technical solution of the present invention, and provides a detailed implementation method and specific operation process, but the protection scope of the present invention is not limited to the following embodiments.

[0035] like Figure 1 As shown, this embodiment provides a dual-output reconfigurable RF energy harvesting front-end chip based on maximum power point tracking and dual threshold voltage compensation, including an oscillator module 1, an energy sensing module 2, a central control MCU module 3, a switch array module 4 and a reconfigurable rectifier module 5, wherein the oscillator module 1 is used to provide a clock signal for the entire system; the energy sensing module 2 works under the drive of the clock signal to generate an energy sensing signal; the central control MCU module 3 works under the drive of the clock signal to receive the energy sensing signal, and based on the energy sensing signal, uses the maximum power point tracking algorithm to generate a control signal for the switch array module; the switch array module 4 is used to receive the control signal and reconfigure the reconfigurable rectifier module; the reconfigurable rectifier module 5 is used to receive RF information and realize dual-channel output of a rectified power supply voltage with dynamic and static compensation, thereby efficiently converting the input energy and outputting a stable rectified power supply voltage to provide energy for subsequent circuit modules.

[0036] like Figure 2As shown, the reconfigurable rectifier module 5 includes a multi-stage double-compensated secondary rectifier 7. The radio frequency (RF) signal is transmitted through the impedance matching network 6 so that it is transmitted to the input end of the reconfigurable rectifier module 5 with low loss, and the reconfigurable rectifier module 5 outputs a rectified supply voltage. The switch array module 4 includes a plurality of switch circuits 8, which are arranged in pairs between the double-compensated secondary rectifiers 7 at each stage. The central control MCU module 3 includes a digital circuit 10, and the switch circuit 8 can complete the reconstruction of the reconfigurable rectifier module 5 under the control of the digital circuit 10. The oscillator module 1 includes an oscillator circuit 9, and the energy sensing module 2 includes a comparator circuit 11. The oscillator circuit 9 provides a clock signal for the digital circuit 10 and the comparator circuit 11. Under the drive of the clock, the comparator circuit 11 will compare the main output of the reconfigurable rectifier module 5 with the given high and low reference levels and output the comparison result to drive the digital circuit 10 to complete the control function.

[0037] In a specific embodiment, the double-compensated secondary rectifier 7 can be set to four stages, thereby forming an 8-stage reconfigurable rectifier module. The 8-stage reconfigurable rectifier module can be reconfigured into two stages, front and back, and provide dual-path output, thereby ensuring a stable output voltage value while having high energy conversion efficiency.

[0038] like Figure 3 As shown, the double-compensated secondary rectifier 7 is constructed with a cross-coupled driving structure, including a first-stage rectifier and a second-stage rectifier, and the traditional cross-coupled differentially driven rectifier is optimized, including that the first-stage rectifier and the second-stage rectifier are designed with a low threshold voltage PMOS transistor 12 and a depletion-type NMOS transistor 13 with a lower threshold voltage, so as to avoid the influence of the threshold voltage. On this basis, static compensation is innovatively added on the basis of the cross-coupled differential drive, and the gate of the low threshold voltage PMOS transistor 12 of the second-stage rectifier in the double-compensated secondary rectifier 7 is connected to the gate of the low threshold voltage PMOS transistor 12 of the first-stage rectifier, so as to perform static compensation on the low threshold voltage PMOS transistor 12 of the second-stage rectifier, thereby reducing its threshold voltage during operation and achieving better sensitivity and efficiency.

[0039] The energy sensing module 2 can quickly compare the input reference value with the output supply voltage of the RFEH front end to determine the current working state. Figure 4As shown, the energy sensing module 2 is respectively composed of a dynamic comparator 14 and an SR latch 15. The dynamic comparator 14 has two state stages. It enters a reset stage and a comparison stage according to the high and low level states of the clock signal. In the reset stage, the level is reset. In the comparison stage, the input reference value is compared with the rectified supply voltage output by the reconfigurable rectifier module, and a comparison result signal is generated and stored in the SR latch 15, so that the final control output voltages VOUTN and VOUTP remain stable. The SR latch 15 outputs the energy sensing signal based on the comparison result signal.

[0040] The oscillator module 1 adopts a ring oscillator architecture. Figure 5 As shown, the oscillator module 1 adopts a three-stage ring oscillator architecture. After being disturbed by noise, the three-stage ring oscillator circuit 16 will form positive feedback to generate self-excited oscillation, and the oscillating wave will be shaped and output by a first-stage inverter. In a specific embodiment, the oscillator module 1 can be composed of a four-stage inverter and an on-chip capacitor, which can provide a clock signal with a frequency of 100kHz.

[0041] The central control MCU module 3 is implemented based on MPPT technology, receives the high and low level signals output by the energy sensing module 2 to determine the current working state of the system, processes the current state based on the MPPT algorithm, and outputs appropriate control signals to control the switch array module to reconstruct the RFEH front end. Figure 6 As shown, the central control MCU module 3 includes a state judgment circuit 17 and a state conversion circuit 18, wherein the state judgment circuit 17 generates a state change signal based on the energy sensing signal provided by the energy sensing module, that is, the comparison level signal adopts the maximum power point tracking algorithm to generate a state change signal, including three states, namely, a reduction in the number of levels, a stable number of levels and an increase in the number of levels, so that the system can be reconstructed and maintained stable; the state conversion circuit 18 generates a control signal based on the state change signal, so that the main output of the reconfigurable rectifier module 5 is always maintained within a given stable range, so that the system can operate well.

[0042] In a specific implementation, the switch array module 4 may be composed of 8 pairs of PMOS transistor switches and 2 pairs of NMOS transistor switches to achieve connection between multi-level systems with minimal conduction loss.

[0043] The preferred specific embodiments of the present invention are described in detail above. It should be understood that a person skilled in the art can make many modifications and changes based on the concept of the present invention without creative work. Therefore, any technical solution that can be obtained by a person skilled in the art through logical analysis, reasoning or limited experiments based on the concept of the present invention on the basis of the prior art should be within the scope of protection determined by the claims.

Claims

1. A dual-output reconfigurable RF energy harvesting front-end chip, characterized in that: It includes an oscillator module, an energy sensing module, a switch array module, a central control MCU module and a reconfigurable rectifier module, among which: The oscillator module is used to provide a clock signal; The energy sensing module operates under the drive of the clock signal to generate an energy sensing signal; The central control MCU module works under the drive of the clock signal, is used to receive the energy sensing signal, and based on the energy sensing signal, uses the maximum power point tracking algorithm to generate a control signal for the switch array module; The switch array module is used to receive the control signal and reconfigure the reconfigurable rectifier module; The reconfigurable rectifier module is used to receive radio frequency information and realize dual-path output of rectified supply voltage with dynamic and static compensation.

2. The dual-output reconfigurable RF energy harvesting front-end chip according to claim 1, characterized in that: The oscillator module adopts a ring oscillator architecture.

3. The dual-output reconfigurable RF energy harvesting front-end chip according to claim 1, characterized in that: The energy sensing module includes a dynamic comparator and an SR latch, wherein: The dynamic comparator is used to enter the reset phase and the comparison phase according to the high and low level states of the clock signal. In the reset phase, the level is reset. In the comparison phase, the input reference value is compared with the rectified supply voltage output by the reconfigurable rectifier module, and a comparison result signal is generated and stored in the SR latch. The SR latch outputs the energy sensing signal based on the comparison result signal.

4. The dual-output reconfigurable RF energy harvesting front-end chip according to claim 1, characterized in that: The central control MCU module includes a state judgment circuit and a state conversion circuit, wherein: The state judgment circuit generates a state change signal based on the energy sensing signal using a maximum power point tracking algorithm, and the state conversion circuit generates the control signal based on the state change signal.

5. The dual-output reconfigurable RF energy harvesting front-end chip according to claim 4, characterized in that: The state change signal includes a level reduction signal, a level stabilization signal or a level increase signal.

6. The dual-output reconfigurable RF energy harvesting front-end chip according to claim 1, characterized in that: The reconfigurable rectifier module includes a multi-stage double-compensated secondary rectifier.

7. The dual-output reconfigurable RF energy harvesting front-end chip according to claim 6, characterized in that: The switch array module includes a plurality of switch circuits, and the switch circuits are arranged in pairs between each stage of the double-compensation secondary rectifier.

8. The dual-output reconfigurable RF energy harvesting front-end chip according to claim 6, characterized in that: Each of the double-compensated secondary rectifiers adopts a cross-coupling driving structure.

9. The dual-output reconfigurable RF energy harvesting front-end chip according to claim 6, characterized in that: Each of the double-compensated secondary rectifiers includes a first-stage rectifier and a second-stage rectifier, the first-stage rectifier and the second-stage rectifier both include a low-threshold voltage PMOS transistor and a depletion-type NMOS transistor, the gate of the low-threshold voltage PMOS transistor of the second-stage rectifier is connected to the gate of the low-threshold voltage PMOS transistor of the first-stage rectifier, and static compensation is performed on the low-threshold voltage PMOS transistor of the second-stage rectifier.

10. The dual-output reconfigurable RF energy harvesting front-end chip according to claim 1, characterized in that: The radio frequency information is transmitted to the reconfigurable rectifier module through a matching impedance network.